Abstract: An apparatus and a method for predicting a result of a computer game at a specific time point using obtaining play attributes of the computer game in a time slot including the specific time point; and predicting the result of the computer game at the specific time point by inputting the play attributes to a game result prediction model corresponding to the time slot are provided.

Abstract: Dynamic random access memory (DRAM) data may be accessed by a memory controller using a broadcast mode or a non-broadcast mode. In the broadcast mode, a first portion of data that is the subject of an access request and a second portion of the data that is the subject of the access request may be accessed concurrently via first and second pseudo-channels, respectively. In the non-broadcast mode, data that is the subject of the access request may be accessed via a selected one of the first and second pseudo-channels.

Abstract: An apparatus to facilitate compute compression is disclosed. The apparatus includes a graphics processing unit including mapping logic to map a first block of integer pixel data to a compression block and compression logic to compress the compression block.

Abstract: An electronic device is provided. The electronic device includes a first buffer configured to store video data and a system on chip. The system on chip may include a compression module configured to compress the video data stored in the first buffer, an encryption module configured to encrypt the compressed video data, and a universal serial bus (USB) hardware interface configured to transmit the encrypted video data. The compression module, the encryption module, and the USB hardware interface may be connected by a hardware signal line which is used to transmit video data.

Abstract: A system has a plurality of functional modules including a first functional module and one or more other functional modules. The first functional module includes an embedded memory element and is configurable in a plurality of modes including a first mode and a second mode. When the first functional module is in the first mode, access to the embedded memory element is limited to the first functional module. At least one of the one or more other functional modules is provided with access to the embedded memory element based at least in part on the first functional module being in the second mode.

Abstract: One method for managing remote display performance includes operations for embedding pixel data in a file of an application executing on a server, and detecting an open window of a graphical user interface (GUI) associated with the application. The pixel data is used to create a pixel strip in the window, while the GUI is being displayed on a remote display of a remote client. Update information for the GUI being displayed on the remote display is transmitted from the server to the remote client, the update information corresponding to the change in the presentation of the open window on the server. Further, a change in a presentation of the open window is detected, and a pixel strip received at the remote display is identified. A performance metric for the remote display is calculated based on the received pixel strip when compared to the expected values for the pixel strip.

Abstract: A system has a plurality of functional modules including a first functional module and one or more other functional modules. The first functional module includes an embedded memory element and is configurable in a plurality of modes including a first mode and a second mode. When the first functional module is in the first mode, access to the embedded memory element is limited to the first functional module. At least one of the one or more other functional modules is provided with access to the embedded memory element based at least in part on the first functional module being in the second mode.

Abstract: A digital image viewing system comprises a wireless phone unit, a battery charger for the wireless phone unit and a digital photo frame in short-range wireless communication with the wireless phone unit. The digital photo frame may include phone function unit. Usual slide show is played on display of digital photo frame and replaced by a special image when a speaker of digital photo frame plays a ringer melody. The special image relates to a person causing the ringer melody. An operation at the wireless phone unit is transmitted to the digital photo frame through the short-range wireless communication to change the special image back to the usual slide show. Upon receipt of e-mail with image data attached, cellar phone automatically but conditionally opens the e-mail and takes out the image data to transmit it to digital photo frame through the short-range wireless communication or direct contact with battery charger.

Abstract: An operation method of a display driver includes generating a count value by counting a period of a synchronization signal related to a synchronization packet received from a host, receiving a mode change command from the host, the mode change command indicating a change from a video mode transmitting first image data to a display by bypassing a frame memory to a command mode transmitting second image data to the display through the frame memory, and generating an internal synchronization signal having a period substantially equal to the period of the synchronization signal by using the count value based on the mode change command after a last pulse of the synchronization signal is generated. A time interval between the last pulse and a first pulse of the internal synchronization signal is equal to the period of the synchronization signal.

Abstract: An embodiment of the present invention is a technique to control memory access. An address pre-swizzle circuit conditions address bits provided by a processor according to access control signals. A data steering circuit connects to N sub-channels of memory to dynamically steer data for a memory access type including tiled and untiled memory accesses according to the access control signals, the conditioned address bits, and sub-channel identifiers associated with the N sub-channels. The tiled memory access includes horizontally and vertically tiled memory accesses. An address post-swizzle circuit generates sub-channel address bits to the N sub-channels using the conditioned address bits and according to the access control signals and the sub-channel identifiers.

Abstract: Conversion between z-scanning indices, raster-scanning indices and two-dimensional coordinates uses simple bit-operations in high efficiency video coding. Depending on the conversion, certain bits are extracted from one representation to obtain positions of another representation, or bits are interleaved to generate another representation. Conversion is able to be between any of z-scanning indices, raster-scanning indices and (x,y) representations.

Abstract: An image access method applicable to an image access device is provided. The method includes: providing a plurality of codes that respectively represent a plurality of image sources; determining a plurality of sets of access settings according to a pixel format arrangement, each set of access setting corresponding to a code arrangement combination composed of the codes; and sequentially accessing data of the image sources by the image access apparatus according to the code arrangement combinations corresponding to the access settings.

Abstract: A graphics processing unit 2 includes a texture pipeline 6 which performs filter operations upon texture values. If the texture values are integer texture values, then they may be processed by the texture pipeline in a variable order corresponding to the order in which they are retrieved from a memory 4. If the texture values are floating point texture values, then they are processed in a fixed order in order to ensure result invariants as the filter operation is non-associative for floating point values. The filter operation is not commenced until all of the floating point texture values have been retrieved from the memory 4 and other available for processing.

Abstract: This disclosure describes techniques for performing memory transfer operations with a graphics processing unit (GPU) based on a selectable memory transfer mode, and techniques for selecting a memory transfer mode for performing all or part of a memory transfer operation with a GPU. In some examples, the techniques of this disclosure may include selecting a memory transfer mode for performing at least part of a memory transfer operation, and performing, with a GPU, the memory transfer operation based on the selected memory transfer mode. The memory transfer mode may be selected from a set of at least two different memory transfer modes that includes an interleave memory transfer mode and a sequential memory transfer mode. The techniques of this disclosure may be used to improve the performance of GPU-assisted memory transfer operations.

Abstract: A texture processing pipeline can be configured to service memory access requests that represent texture data access operations or generic data access operations. When the texture processing pipeline receives a memory access request that represents a texture data access operation, the texture processing pipeline may retrieve texture data based on texture coordinates. When the memory access request represents a generic data access operation, the texture pipeline extracts a virtual address from the memory access request and then retrieves data based on the virtual address. The texture processing pipeline is also configured to cache generic data retrieved on behalf of a group of threads and to then invalidate that generic data when the group of threads exits.

Abstract: An access control device, which increases memory access efficiency to data stored in a memory, includes a plurality of groups of the memory, and divides and stores the data in different memory areas of the plurality of groups of the memory, distinguished based on predetermined bits of an access address. The access control device accesses the data stored in the different memory areas simultaneously in the same clock cycle of access to the memory. The predetermined bits of the access address are controlled independently for each of the groups of the memory. The part of the access address other than the predetermined bits controlled independently for each of the groups is common for the plurality of groups. Modes can be selected to access two horizontally or vertically consecutive unit data or data on vertically alternate lines at a time. The data may be image data or pixel data.

Abstract: A system and method for cryptographically securing a graphics system connectable via an external bus to a computing system, the graphics system including a graphics processor, a video memory and a memory controller for controlling the flow of data to and from the video memory. The graphics system further includes a copy engine for copying data between a system memory of the computing system and the video memory, where this copy engine acts independently of the graphics processor of the graphics system. The present invention enables the copy engine of the graphics system to decrypt encrypted data in the course of copying data from the system memory to the video memory and to encrypt unencrypted data in the course of copying data from the video memory to the system memory. Thus, cryptographic protection of secure content may be assured by the graphics system without the excessive usage of its primary resources for this non-graphical purpose.

Abstract: The present invention provides a computer implemented method and apparatus to project a projected avatar associated with an avatar in a virtual universe. A computer receives a command to project the avatar, the command having a projection point. The computer transmits a request to place a projected avatar at the projection point to a virtual universe host. The computer renders a tab associated with the projected avatar.

Abstract: Provided is an image rotation method and apparatus for rotating an original image of 2n×2n pixels when n is a natural number greater than 1, including loading each row of pixels of the original image into a corresponding load memory vector; and, after the load step, for at least one iteration, performing a transposition operation for each matched load memory vector after matching the load memory vectors and, for zero or more iterations, an interleaving operation between each matched load memory vector after matching the load memory vectors, while the transposition step and the interleaving step are performed a total of n iterations.

Abstract: A data transfer circuit that transfers a first kind of data stored in an external memory circuit includes: an internal memory circuit that is capable of, by an external circuit, writing and/or rewriting a second kind of data including information for one region as a transfer source in the external memory circuit and another region as a transfer destination in the external memory circuit; a transfer circuit that transfer the first kind of data; and a control circuit that makes the transfer circuit transfer the first kind of data stored in the one region to the other region based on the second kind of data.

Abstract: The method includes the following steps: monitoring an actual value of a relevant parameter of a display bandwidth of data to be output by the memory; comparing the actual value of the relevant parameter with a threshold to determine whether the actual display bandwidth meets predetermined requirements; and selecting an access arbitration mode for the memory according to whether the predetermined requirements are met. The access controller includes: a monitoring and comparing unit, adapted to monitor an actual value of a relevant parameter of a display bandwidth of data to be output by the memory and compare the actual value of the relevant parameter with a threshold to determine whether the actual display bandwidth meets predetermined requirements; and an arbitration adjusting unit, adapted to select an access arbitration mode for the memory according to whether the predetermined requirements are met.

Abstract: Provided herein is a cable label forming apparatus having an edit screen display device, a selection candidate display instructing device, and a selection candidate display device. The selection candidate display device displays a last selected candidate among the plurality of selection candidates on a priority basis in a normal edit screen when displaying the plurality of selection candidates is instructed, and displays a specific candidate among the plurality of selection candidates on a priority basis in a cable label forming edit screen when displaying the plurality of selection candidates is instructed.

Abstract: A display interface buffer includes a general purpose memory to store data capable of being displayed on a panel, a plurality of display drivers to receive data from the general purpose memory, each of the display drivers to drive a different portion of the panel with the data, and processor or a direct memory access controller to access data in the general purpose memory and to provide the data to the display drivers for presentation on the panel.

Abstract: A mobile terminal including a touch pad; a first display unit including a transparent display; a second display unit including a non-transparent display disposed below the transparent display; and a controller configured to selectively control the first and second display units to operate in a dual-operation mode by controlling at least a portion of the first display unit to be transparent and not display information and controlling the second display unit to display information that can be viewed through the at least the portion of the first display unit that is transparent.

Abstract: Disclosed is an image processing apparatus for inputting a plurality of rectangular images each composed of n×n pixels and outputting line-by-line image data in which one line is composed of n×n×m pixels. A line buffer stores n lines of image data, each line is composed n×n×m pixels. The apparatus generate a write address for writing a rectangular image to the line buffer memory and a read-out address for reading line-by-line image data out of the line buffer memory, and changes over a method of generating the write address between a first write-address generating method and a second write-address generating method whenever m rectangular images are written to the line buffer, and changes over the read-out address between a first read-out-address generating method and a second read-out-address generating method whenever n lines of image data are read out of the line buffer.

Abstract: Provided herein is a cable label forming apparatus having an edit screen display device, a selection candidate display instructing device, and a selection candidate display device. The selection candidate display device displays a last selected candidate among the plurality of selection candidates on a priority basis in a normal edit screen when displaying the plurality of selection candidates is instructed, and displays a specific candidate among the plurality of selection candidates on a priority basis in a cable label forming edit screen when displaying the plurality of selection candidates is instructed.

Abstract: A display control device for controlling a display panel includes a contents frame rate detector detecting a contents frame rate of an input image data and outputting a repetitive frame number dependent from a display frame rate of the display panel and the detected contents frame rate; a frame memory for storing a level data of a previous frame; and an emulated level generator in communication with the contents frame rate detector and the frame memory. An output level data to the display panel is generated according to the repetitive frame number from the contents frame rate detector, the previous level data from the frame memory and an input level data of the input image data.

Abstract: The present invention pertains to a configurable PCI-Express switch. The configurable PCI-Express switch includes a differential I/O interface capable of being configured in a first configuration or a second configuration. In the first configuration, the differential I/O interface implements a PCI-Express interface with a coupled device. In the second configuration, the differential I/O interface implements a differential interface other than PCI-Express with the coupled device. The configurable PCI-Express switch also includes a switching unit capable of configuring the differential I/O interface in the first configuration or the second configuration.

Abstract: An image processing apparatus includes a separation unit which determines the attribute of data contained in input document image data and separates the document image data into areas by attributes, an extraction unit which extracts, from the separated areas, an area of a graphics image as a target of vectorization processing, a determination unit which determines whether the attribute of the area of the graphics image is a clipart area or a line drawing area including a line drawing, and a vector conversion unit which performs vectorization processing corresponding to the attribute of the graphics image based on the determination result of the determination unit.

Abstract: An image display apparatus includes a memory 1 having a first mode and a second mode in which image data are sequentially written and read per frame and per sub-frame area respectively, a compressor 10 capable of switching a compression output state and an uncompressed output state in which a compression image data and an uncompressed image data are outputted respectively, and a decompressor 20 capable of switching a decompression output state and a non-decompression output state. A controller 6 switches the compressor from the uncompressed output state to the compression output state during a first input vertical blanking period, switches the decompressor from the non-decompression output state to the decompression output state during a first output vertical blanking period immediately after the first input vertical blanking period, and switches the memory from the second mode to the first mode during a first output vertical blanking period.

Abstract: A portable development and execution framework for processing media objects. The framework involves: accepting an instruction to perform a media processing function; accepting a media object to be associated with the media processing function; wrapping the media object with an attribute that specifies a type and format of the media object, and a hardware domain associated with the media object; and causing an execution domain to perform the media processing function on the media object. The instruction to perform the media processing function is expressed in a form that is independent of the hardware domain associated with the media object, and may also be independent of the type and format of the media object. The media object may be an image, and the media processing function may include an image processing function performed on a GPU.

Abstract: A method of processing a user interface component is provided and includes receiving one or more user interface components that can be communicated to a wireless device. A component risk level for each of the one or more user interface components is determined and assigned to each of the one or more user interface components. Each of the one or more user interface components can be digitally signed using an embedded risk code that indicates the assigned risk level. Further, the component risk level can be selected from a plurality of component risk levels. In a particular embodiment, the component risk level can be determined based on the type of the user interface component. Further, the component risk level can be determined based on a developer of the user interface component.

Abstract: In one embodiment of the invention, a memory integrated circuit is provided including an address decoder to selectively access memory cells within a memory array; a mode register with bit storage circuits to store an enable bit and at least one sub-channel select bit; and control logic. The control logic is coupled to a plurality of address signal lines, the address decoder, and the mode register. In response to the enable bit and the at least one sub-channel select bit, the control logic selects one or more of the address signal lines to capture independent address information to support independent sub-channel memory accesses into the memory array. The control logic couples the independent address information into the address decoder.

Abstract: A document management software is executed in print control device connectable via a network to an information processing device that sends an instruction and document thereto. The software includes: a step of determining if a non-native document is selected, wherein the non-native document is stored in a detachable memory connected to the print control device; a step of sending to the information processing device the selected non-native document so as to convert the non-native document into a native document; and a step of receiving the converted native document from the information processing device for printing, wherein the native document is printable document.

Abstract: A memory hub permits a graphics processor to access random access memories, such as dynamic random access memories (DRAMs). In one implementation, the memory hub permits an increase in effective memory bandwidth by aggregating the memory of two or more memories. In another implementation, the memory hub permits a graphics processor to offload memory access interfacing operations to the memory hub.

Abstract: Disclosed are a method and system for magnifying and displaying local image of a touch display device. When an object is detected to be approaching an effective touch zone on a touch surface of a touch panel, the distance or altitude between the approaching object at a position on the effective touch zone of the touch panel where the approaching object heads for and the touch surface of the touch panel is determined. When the distance is less than a first predefined approaching altitude, a target graphic representation associated with the position of the approaching object on the touch panel is first enlarged and then, based on a second predefined approaching altitude, an operation of magnification of the local area or the target graphic representation displayed on a display panel corresponding to the position of the approaching object or execution of an executable object linked to the graphic representation is carried out.

Abstract: A table-based driving circuit for displays that switches between a normal operational mode and a read table block mode. The driving circuit comprises an address sequencer and a memory. The memory comprises the full table of individual sequences, such as interlacing or color-sequential sequence. In the read table mode, the next upcoming addresses are read, i.e. are downloaded, from the memory into an address table register in the address sequencer. In the normal operational mode, the address sequencer generates the addresses for the video data to be stored in the memory or to be displayed.

Abstract: An image data transfer method including the steps of: (a) reading pixel data of a two-dimensional image stored in a first image storage and having a plurality of pixels, the position of each of the pixels being represented by coordinates of first and second directions, the pixel data being read by scanning data transfer units of the pixel data in the second direction where each of the data transfer units is formed by data of a predetermined number of pixels consecutive in the first direction; (b) writing the data transfer units read at step (a) in a temporary data storage where data is stored at a position designated by a combination of first and second addresses, the data transfer units being written in burst mode in a region of the temporary data storage in which the first addresses are consecutive while the second address is fixed; and (c) reading the data transfer units written in the temporary data storage from the region in which the first addresses are consecutive while the second address is fixed in b

Abstract: The information processing device in the present invention includes a memory 1 which is a DRAM featuring a burst mode, and burst-transfers data at successive column addresses, masters (13), (14), and (15) which issue access requests, and a command processing unit (11) which converts an access address that is included in the access request issued from each master. One or more of the masters access an M×N rectangular area where M and N are integers, and the command processing unit (11) converts access addresses so that a column address of data at the (K+m)th column, where K and m are integers and m?M, of an Lth line, and a column address of data at a Kth column of an (L+n)th line, where L and n are integers and n?N, become successive.

Abstract: An apparatus comprising a memory and a coder/decoder circuit. The memory may have a first memory portion and a second memory portion. The coder/decoder circuit may be configured to (i) position a set of atoms across the memory, (ii) define a strip across a portion of the atoms, (iii) designate a first atom within the strip, (iv) locate one or more second atoms to be paired with the first atom, (v) determine whether the one or more second atoms when paired with the first atom forms a legitimate pair, and (vi) read the legitimate pair from the first memory portion and the second memory portion.

Abstract: In the case where a previous character (P1) is cleared on a screen (20) and a new character (P2) is displayed on the right of the previous one, first, image data to be transferred (P2) is prepared in a source image memory. Next, a write start address (W) is set at the head of a bit sequence of a left clearance width (LC)×BPP, which precedes the destination address (T) of a frame buffer into which the head (S) of the image data (P2) is to be written. After that, a series of burst transfer repeatedly copies clearance data held in a register into a region of the left clearance width (LC), starting from the write start address (W), and subsequently writes one line (a transfer width (W1)×BPP) of the image data (P2). The write start address is incremented by a frame width (FW)×BPP.

Abstract: In response to a requirement of transferring a file from a personal computer PC to a projector 10 that is output by dragging and dropping a corresponding file icon onto a projector icon, a CPU 50 requires setting of a password. The CPU 50 maps the preset password to a file and transfers the file with the password to an external storage device of the projector 10. The projector 10 requires input of a password, which is expected to be assigned to the file, and allows reproduction of the file when the input password is coincident with the preset password.

Abstract: A mobile telephone using the LCD for the display thereof wherein the address data bus connected to the CPU comprises two separate data buses; the one exclusively provided for the LCD, and the other one for the parts other than the LCD, and in the case of accesses other than access to the LCD, the LCD exclusive address data bus is not actuated.

Abstract: To display a row of characters in the VGA alphanumeric mode, the ASCII and attribute bits for all such characters are retrieved from the main memory and stored in a local cache memory. The font and unused bits that are also retrieved from the memory during the retrieval of ASCII and attribute bits are discarded. The stored ASCII and attribute bits for each such character is then used to compute the address of the associated font bits in the main memory. Next, for each character, the font bits are retrieved from the main memory using a burst read operation and using the computed address for that font. The font bits associated with all the characters in the row are stored in the local cache memory and are subsequently scanned out to be used in the display of the characters.

Abstract: A mobile telephone using a LCD for the display thereof wherein the address data bus connected to the CPU comprises two separate data buses; the one exclusively provided for the LCD, and the other one for the parts other than the LCD, and in the case of accesses other than access to the LCD, the LCD exclusive address data bus is not actuated.

Abstract: In a multiple render target mode, a pixel shader computes color values for pixels and stores the computed color values in a register file. The register file acts as a buffer for the computed color values. Conventionally writing pixels in the order they are received (pixel-major order) can result in large strides across memory in the frame buffer. At least a minimum amount of work should be done within a DRAM page, for example, to cover the overhead required in opening the DRAM page. Therefore, color values are written from the register file to two or more targets in a frame buffer in a target-major order within a segment. Writing in a target-major order (sequential with respect to targets but non-sequential with respect to quads received and processed) yields coherent writes to frame buffer memory and improves memory efficiency.

Abstract: A system includes an integrated encoder comprising an optical storage controller for coupling to an optical storage medium, and a data encoder for coding input data coupled to the optical storage controller, a first external memory coupled to a first memory controller in the integrated encoder, and a second external memory coupled to a second memory controller in the integrated encoder. In one aspect, the integrated encoder further comprises a first memory arbiter for selectively directing access to the first external memory by the optical storage controller and the data encoder, and a second memory arbiter for selectively directing access to the second external memory by the optical storage controller and the data encoder.

Abstract: A portable development and execution framework for processing media objects. The framework involves: accepting an instruction to perform a media processing function; accepting a media object to be associated with the media processing function; wrapping the media object with an attribute that specifies a type and format of the media object, and a hardware domain associated with the media object; and causing an execution domain to perform the media processing function on the media object. The instruction to perform the media processing function is expressed in a form that is independent of the hardware domain associated with the media object, and may also be independent of the type and format of the media object. The media object may be an image, and the media processing function may include an image processing function performed on a GPU.

Abstract: A method of raster scanning a sample on a continuously moving stage for charged-particle beam imaging said sample is disclosed. The method includes line scanning a charged-particle beam across a surface of the sample repeatedly to form on the surface at least one 2-dimensional line array composed of scan lines lying adjacent to each other. When each line scan is to be performed, the charged-particle beam is shifted, along the stage-moving direction, by an extra predefined distance at least equal to a distance the stage has traveled during a time period from the beginning of the first line scan of the first formed line array to the beginning of the current line scan (to be performed) of the current line array (to be formed).

Abstract: A method for automatically adapting to the capabilities of a data transmitting terminal a device supplying data to said terminal requesting the data. The method is characterized in that the data supplying device receives information concerning the capabilities of the device requesting data to send to the latter the data to be transmitted in accordance with the specified capabilities.