Specified Plasma Coupling Path Patents (Class 345/62)
  • Patent number: 7012581
    Abstract: A plasma display panel includes a first substrate, a second substrate spaced away from the first substrate, scanning and sustaining electrodes formed on the first substrate and extending in a first direction, a dielectric layer formed on the first substrate, covering the scanning and sustaining electrodes therewith, and a data electrode formed on the second substrate and extending in a second direction perpendicular to the first direction, each of the scanning and sustaining electrodes being comprised of a transparent electrode, the dielectric layer being comprised of a transparent dielectric layer, the dielectric layer having a high-capacity portion having a capacity higher than that of the rest of the dielectric layer, the high-capacity portion being spaced away from a discharge gap and extending in the first direction, each of the scanning and sustaining electrodes being formed with an opening between the discharge gap and the high-capacity portion.
    Type: Grant
    Filed: August 4, 2003
    Date of Patent: March 14, 2006
    Assignee: Pioneer Corporation
    Inventors: Kentaro Ueda, Toshiyuki Akiyama, Yasutaka Tsutsui
  • Patent number: 7012580
    Abstract: A method for driving a plasma display device is provided which is capable of causing writing discharge to normally occur. A sub-field includes an initializing period, a scanning period during which video data to display a video is written in a discharge cell by causing writing discharge to occur between a scanning electrode and a data electrode, and a sustaining period during which sustaining discharge to cause the discharge cell in which a writing discharge has occurred to emit light in a manner to correspond to video data is made to occur between the scanning electrode and a sustaining electrode. The initializing period includes a wall charge adjusting period during which wall charge adjusting discharge to adjust charges accumulated between the scanning electrode and the sustaining electrode is made to occur, a sustaining erasing period, a priming period, and a priming erasing period.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: March 14, 2006
    Assignee: Pioneer Corporation
    Inventor: Eishi Mizobata
  • Patent number: 7009584
    Abstract: A plasma display panel (PDP), and a method of driving plasma display panel, achieve improved contrast by minimizing quantity of luminescence in a non-luminescent display period, that is, a reset period. A method of driving a PDP having a plurality of discharge cells with a plurality of scanning electrodes, a plurality of sustain electrodes, and a plurality of address electrodes involves forming a frame having a plurality of sub-fields; causing a reset discharge in only first sub-fields of the respective plurality of discharge cells; deciding ON/OFF state of discharge cells in current sub-field in accordance with ON/OFF state of discharge cells in previous sub-field; and converting the discharge cell into any one of ON/OFF wall electric charges in accordance with the ON/OFF state of the decided discharge cell.
    Type: Grant
    Filed: August 16, 2002
    Date of Patent: March 7, 2006
    Assignee: LG Electronics, Inc.
    Inventor: Jung Hun Kim
  • Patent number: 6992645
    Abstract: It is disclosed that there is a method and an apparatus for driving a plasma display panel that is adaptive for improving brightness as well as realizing a high resolution. A method and an apparatus for driving a plasma display panel according to the present invention displays discharge cells of the (3i?2)th and (3i?1)th rows in use of the first video signal field; and discharge cells of the (3i?1)th and (3i)th rows in use of the second video signal field.
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: January 31, 2006
    Assignee: LG Electronics Inc.
    Inventors: Joong Kyun Kim, Jae Hwa Ryu
  • Patent number: 6985125
    Abstract: Addressing and sustaining of a surface discharge AC plasma display panel by applying addressing voltages to at least one section of the panel while at least one other section of the panel is being simultaneously sustained.
    Type: Grant
    Filed: June 13, 2001
    Date of Patent: January 10, 2006
    Assignee: Imaging Systems Technology, Inc.
    Inventors: Bala K Velayudhan, Carol A. Wedding, Jeffrey W. Guy
  • Patent number: 6982685
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Grant
    Filed: July 5, 2002
    Date of Patent: January 3, 2006
    Assignee: Fujitsu Limited
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 6940474
    Abstract: The present invention relates to a method for processing video signals for display on a display panel comprising a matrix array of cells which could only be “ON” or “OFF”, wherein the time duration of a video field is divided into N sub-fields during which the cells can be activated, each sub-field comprising at least an addressing period and a sustaining period, the duration of which corresponding to the weight associated with said sub-field, said method comprising at least a priming period, characterized in that the position of the priming period is determined as follows: determination of a sustain threshold value D for a given addressing speed and panel technology, calculation of the number of sustain pulses in each sub-field n, n being such that 1?n?N, if the number of sustain pulses is above or equal to D, addition of a priming pulse before at least the sub-field n+1. This method is mainly applicable to plasma display panel.
    Type: Grant
    Filed: January 10, 2003
    Date of Patent: September 6, 2005
    Assignee: Thomson Licensing
    Inventors: Sébastien Weitbruch, Cédric Thebault, Axel Goetzke
  • Patent number: 6903709
    Abstract: A plasma display panel and a method of driving the same are provided in which circuit elements necessary for controlling potentials of scan electrodes can be reduced without using a complicated multilayered wiring. In the plasma display panel, k (k?2) data electrodes, each of which is continuous from one end of a column to the other end, are arranged for each column of a matrix display. All scan electrodes in a display screen are classified into k groups, and one of k groups is assigned to k data electrodes in each column. Each data electrode is crossed with or opposed to scan electrodes belonging to the group that is assigned to the data electrode without overlapping a partition in a plan view and is crossed with or opposed to other scan electrodes with overlapping the partition.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: June 7, 2005
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Tatsuhiko Kawasaki, Hitoshi Hirakawa, Takashi Shiizaki, Takashi Sasaki
  • Patent number: 6862008
    Abstract: In a display device having driving circuits formed on the same substrate where pixels are formed, the lateral frame area of the display device is reduced. A gate signal line driving circuit is placed in parallel with a source signal line driving circuit, so that no driving circuits are provided in at least two opposing directions out of four directions with respect to a pixel region. With the above-described structure, the area the gate signal line driving circuit occupies in prior art is removed to reduce the width (side to side) of the display device. Therefore a display device that has a small frame area in the lateral direction can be provided.
    Type: Grant
    Filed: August 5, 2002
    Date of Patent: March 1, 2005
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama
  • Patent number: 6853358
    Abstract: A method for driving a plasma display panel is provided in which wasteful power consumption is reduced and ion bombardment that may deteriorate cells is suppressed for a long life of cells. A ratio of lighting that is a ratio of the number of cells to be lighted to a total number of cells is detected in accordance with display data that determine contents of addressing. In accordance with the detected ratio of lighting, a waveform of a voltage pulse that is applied in the sustaining step for displaying the corresponding display data is changed so that a gradient of the voltage change at a leading edge becomes smaller for a large value of the ratio of lighting than for a small value of the same.
    Type: Grant
    Filed: October 17, 2003
    Date of Patent: February 8, 2005
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yasuhiko Kunii, Takashi Sasaki
  • Patent number: 6816133
    Abstract: A driving method of a plasma display panel and a driving circuit thereof are disclosed. In the method, image data is inputted by applying a scanning pulse to the scanning electrode and selectively applying a data pulse to the data electrode during an address period. Then, a first pulse and a second pulse of different phase are respectively applied to the first sustaining electrode and the second sustaining electrode during a sustain period. A third pulse is applied to the scanning electrode to sustain the image data. A first discharge current and a second discharge current are occurred, an time interval is formed between the discharge currents to reduce an instant power consumption of the PDP. The driving method is also used to reduce the electromagnetic interference and increases the operation margin.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: November 9, 2004
    Assignee: Au Optronics Corp.
    Inventor: Chung-Kuang Tsai
  • Patent number: 6803889
    Abstract: A signal transfer circuit in a pre-drive circuit converts the reference potential of a control signal, supplied from a drive control circuit, to the reference potential of an output element. The control signal is then amplified in a signal amplifier circuit and thereafter supplied to the output element. This makes it possible to isolate the reference potential and transfer the control signal to the output element even when the reference potentials of the drive control circuit and the control signal are different from that of the output element. The drive control circuit can also be prevented from being affected by variations in potential of the output element or the like.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: October 12, 2004
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Makoto Onozawa, Tomokatsu Kishi, Shigetoshi Tomio, Tetsuya Sakamoto
  • Patent number: 6795044
    Abstract: Scanning electrodes are shared between adjacent display lines. Sustaining electrodes are disposed between the scanning electrodes by two. The sustaining electrodes form display lines by gaps with adjacent scanning electrodes. The sustaining electrodes are separated into a first sustaining electrode group in which a plurality of sustaining electrodes disposed at the one side of the scanning electrode are commonly connected and a second sustaining electrode group in which a plurality of sustaining electrodes disposed at the other side of the scanning electrode are commonly connected to be independently driven.
    Type: Grant
    Filed: July 2, 2001
    Date of Patent: September 21, 2004
    Assignee: NEC Corporation
    Inventors: Yoshito Tanaka, Hajime Homma, Tadashi Nakamura
  • Patent number: 6791514
    Abstract: In a plasma display, a plurality of first display electrodes and a plurality of second electrodes are arranged in parallel with one another and in which a plurality of addressing electrodes are arranged to intersect the first and the second display electrodes. When a sustaining discharge is generated between the first and the second display electrode by applying an anode potential to one of the first and the second display electrode and a cathode potential to the other thereof, a potential lower than the anode potential and higher than the cathode potential is applied to the first and the second display electrode adjacent to the first and the second display electrode between which the sustaining discharge is generated.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: September 14, 2004
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Noriaki Setoguchi, Tomokatsu Kishi
  • Patent number: 6784859
    Abstract: A plasma display drive method, in which the address action is carried out in a short time without fail, has been disclosed. In the reset action, wall charges are left uniformly in the display cell, and the following address action comprises the selective action to select the OFF cell, the eliminative action to eliminate the wall charges in the OFF cell selected in the selective action, and the write action to form wall charges needed for the sustain action in the ON cell.
    Type: Grant
    Filed: August 21, 2001
    Date of Patent: August 31, 2004
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Noriaki Setoguchi, Tomokatsu Kishi
  • Patent number: 6784858
    Abstract: A driving method as well as a circuit of a plasma display panel is provided in which a rate of increasing voltage at start of a discharge is reduced, a reset period is shortened, and an excessive discharge in the reset period is avoided. The plasma display panel 1 comprises plural cells each of which emits light when a discharge is generated between a pair of display electrodes X and Y. Charge quantities of all cells are equalized in a reset period. In a bias period of the reset period, a current is supplied from a constant current circuit 93 to cells so that an increasing voltage is applied to the pair of display electrodes, while a capacitance element C3 is connected in parallel with a cell, so that an output current Ic of the constant current circuit 93 is distributed to the capacitance element C3 and the cell.
    Type: Grant
    Filed: March 13, 2001
    Date of Patent: August 31, 2004
    Assignee: Fujitsu Limited
    Inventor: Kenji Awamoto
  • Patent number: 6765547
    Abstract: A method of driving a plasma display panel including erasing wall charges formed in a previous sub-field, applying X and Y scan pulses of first and second polarities to the X and Y electrode lines of a first pair of the X and Y groups that includes a first pair of the X and Y electrode lines, and an X scan pulse of a second polarity to form wall charges of the second polarity around the Y electrode lines, applying a display data signal corresponding to the first pair of the X and Y electrode lines to address electrode lines while applying a bias voltage of the first and second polarities to the X and Y electrode lines to erase the wall charges formed at discharge cells which are not to be displayed, and repeatedly applying sustain pulses to the X and Y electrode lines.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: July 20, 2004
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Joo-yul Lee
  • Patent number: 6738033
    Abstract: When a gas discharge panel is driven, a voltage is applied between scan and address electrode groups to perform set-up. The voltage waveform has four intervals. In a first interval, the voltage is raised in a short time (less than 10 &mgr;s) to a first voltage, wherein 100 V≦first voltage<starting voltage. Then, in a second interval, the voltage is raised to a second voltage no less than the starting voltage and with an absolute gradient smaller than that for the voltage rise in the first interval (no more than 9 V/&mgr;s). Next, in a third interval, the voltage is lowered in a short time (no more than 10 &mgr;s) from the second voltage to a third voltage no more than the starting voltage. Following this, in a fourth interval, the voltage is lowered still further (for 100 &mgr;s to 250 &mgr;s) with a gradient smaller than that for the voltage fall in the third interval. The time occupied by the whole voltage waveform should be no more than 360 &mgr;s.
    Type: Grant
    Filed: May 9, 2001
    Date of Patent: May 18, 2004
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Junichi Hibino, Hidetaka Higashino, Nobuaki Nagao, Masaru Sekizawa, Kanako Miyashita, Masafumi Ookawa
  • Patent number: 6731255
    Abstract: A method of driving a plasma display panel showing images having frames composed of odd and even fields. The plasma display panel has scan electrodes and address electrodes perpendicular to the scan electrodes. In the method, first the odd and then the even scan electrodes, or vice versa, are addressed in the frame and subsequently sustained. This method saves time, which may be used to speed up the plasma display device.
    Type: Grant
    Filed: July 7, 2000
    Date of Patent: May 4, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Gerrit Hendrik Van Leeuwen, Antonius Hendricus Maria Holtslag
  • Patent number: 6686912
    Abstract: A driving apparatus comprises switches SW1 to Sw3, a first signal line OUTA, and a second signal line OUTB. By ON/OFF control of the switches SW1 to Sw3, the voltage of the first signal line OUTA is changed between a positive voltage (+1/2V) level, which is smaller than a voltage V to be applied to a load 20, and the ground level, and the voltage of the second signal line OUTB is changed between the ground level and a negative voltage (−1/2V). By ON/OFF control of switches SW4 and SW5, the positive and negative voltages given by the first and second signal lines are selectively applied to the load 20. The maximum voltage applied to each element in the driving apparatus can be thereby lowered to the voltage (1/2V), which is smaller than the voltage V to be applied to the load 20. This makes it possible to hold down the breakdown voltage of each element to half the conventional value.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: February 3, 2004
    Assignee: Fujitsu Limited
    Inventors: Tomokatsu Kishi, Tetsuya Sakamoto, Shigetoshi Tomio
  • Patent number: 6680716
    Abstract: Sustaining discharges are conducted in a first sub-field in a pair of adjacent first and second sub-fields. Then, writing discharges in a second sub-field are conducted after the sustaining discharges in the first sub-field without conducting any erasure discharge between the sustaining discharges and the writing discharges. A relation expressed by an equation L1=L2=1 and an inequality Ln+2≦Ln+1+Ln holds for a luminance weighting Li. The luminance weighting Li is a luminance weighting of the i-th lowest sub-field from the bottom among the plurality of sub-fields.
    Type: Grant
    Filed: March 9, 2001
    Date of Patent: January 20, 2004
    Assignee: NEC Corporation
    Inventor: Tadashi Nakamura
  • Publication number: 20040001036
    Abstract: A method for driving a plasma display panel is provided in which a time necessary for an addressing process is shortened without using any special driving component. The method comprises an addressing process that includes the steps of setting light emission operation of the cells of a display of one screen, starting j-th row selection at a point during (j−1)th row selection, and changing the data electrodes from a control state corresponding to display data of the (j−1)th row to a control state corresponding to display data of the j-th row during a period in which the (j−1)th row selection and the j-th row selection are overlapped with each other.
    Type: Application
    Filed: June 12, 2003
    Publication date: January 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Kunio Takayama, Kenji Awamoto, Yasunobu Hashimoto
  • Patent number: 6661394
    Abstract: A driving circuit for a radio frequency plasma display panel that is capable of effectively making an impedance matching between a radio frequency signal generator and a panel. In the circuit, radio frequency electrode lines are divided into a plurality of groups. A plurality of impedance matchers are independently connected to each group of the radio frequency electrode lines to match impedance of input and output terminals thereof. Accordingly, an impedance difference between the radio frequency electrode lines caused by a length difference of radio frequency supply lines is uniformly compensated, so that a maximum power of radio frequency signal can be applied to each radio frequency electrode line to provide a stable operation of the panel as well as to improve a picture quality.
    Type: Grant
    Filed: April 17, 2000
    Date of Patent: December 9, 2003
    Assignee: LG Electronics Inc.
    Inventor: Jeong Pil Choi
  • Patent number: 6633285
    Abstract: In a circuit driving a capacitive load Cp, current passed through a transistor Q3, a diode D1 and a recovering coil L is passed through lines L1, L2, and the inductance components of the lines L1 and L2, and the drain-source capacitances of the transistors Q1 and Q2 generate LC resonance. Capacitors C1 and C2 are connected in parallel to the drain-source regions of the transistors Q1 and Q2 to increase the total drain-source capacitance and reduce the resonance frequency, so that unwanted electromagnetic wave radiation in a frequency band affecting other electronic devices is suppressed.
    Type: Grant
    Filed: July 5, 2001
    Date of Patent: October 14, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shigeo Kigo, Hidehiko Shoji, Jumpei Hashiguchi
  • Publication number: 20030146886
    Abstract: A plasma display panel comprises a plurality of row electrode pairs (X, Y) and a dielectric layer 12 covering the row electrode pairs (X, Y) provided on a front glass substrate 10, and also column electrodes D provided on a back glass substrate 13 to intersect with the row electrode pairs (X, Y) so as to form display discharge cells C1 in a discharge space at the intersections. A discharge area C2 is formed between the adjacent display discharge cells C1 in the column direction to provide for a discharge created between the back to back row electrodes X and Y of the adjacent row electrode pairs (X, Y). A recess groove 12A is formed in a portion of the dielectric layer 12 opposite each discharge area C2.
    Type: Application
    Filed: November 27, 2002
    Publication date: August 7, 2003
    Applicant: Pioneer Corporation and Shizuoka Pioneer Corporation
    Inventor: Mario Amatsuchi
  • Patent number: 6603446
    Abstract: Disclosed is a configuration of a PDP in which different sustaining discharge signals are applied to odd-numbered ones of X electrodes and Y electrodes and even-numbered ones thereof respectively. Owing to the configuration, the wiring in a drive circuit for driving the X electrodes or Y electrodes is simplified, and a scan driver can be formed with an IC or ICs. A plasma display device has a display panel including first to third electrodes. Sustaining discharge signals that are mutually out of phase are applied alternately to adjoining ones of the first electrodes and adjoining ones of the second electrodes respectively. Consequently, first display cells are defined between the second electrodes and the first electrodes on one side of the second electrodes, and second display cells are defined between the second electrodes and the first electrodes on the other side of the second electrodes.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: August 5, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Takeshi Kuwahara, Haruo Koizumi
  • Patent number: 6597332
    Abstract: A plasma addressing display device comprising a flat panel including a display cell having columns of signal electrodes and also including a plasma cell having rows of discharge channels, with pixels formed at intersections of the signal electrodes and the discharge channels; a scanning circuit for sequentially discharging the columns of the signal electrodes at a pre-set period to select pixels from row to row; and a signal circuit for supplying picture signals to the column of the signal electrodes to write the picture signals in the pixels of the selected row, the scanning circuit discharging each discharge channel with time shift as the discharging period allocated to the discharge channel of a previous row is partially overlapped at least with the discharging period allocated to the discharge channel of the next row to allocate a discharging period longer than the pre-set period to each discharge channel.
    Type: Grant
    Filed: July 26, 2000
    Date of Patent: July 22, 2003
    Assignees: Sony Corporation, Sharp Kabushiki Kaisha
    Inventors: Yoshihiro Kanno, Yoichi Morita, Takahiro Togawa, Hirohito Komatsu, Masatake Hayashi, Kiyoshi Okano
  • Patent number: 6590570
    Abstract: A comparator which can operate stably against an absolute value distribution of a threshold voltage among MOS transistors and has a wide allowable range against the threshold voltage dispersion and besides allows reduction in power consumption. The comparator employs a single MOS transistor, and a resistance element is connected between the drain electrode of the MOS transistor and a power supply. A capacitor is connected between the gate electrode of the MOS transistor and a dc potential point, and a switch is connected between the gate electrode and the drain electrode. A comparison reference level and comparison input data are inputted in a time series to the source electrode of the MOS transistor, and the MOS transistor performs a comparation operation.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: July 8, 2003
    Assignee: Sony Corporation
    Inventor: Yasuhito Maki
  • Patent number: 6573879
    Abstract: A plasma-addressed liquid crystal display device capable of high-speed drive and improved viewing characteristic is composed of a liquid crystal cell structure and plasma cell structure stacked with each other. The liquid crystal cell structure is formed by sandwiching a liquid crystal having a spontaneous polarization between a first transparent substrate having therein transparent electrode stripes and an alignment film covering the electrode stripes, and a dielectric sheet having thereon an alignment film. The plasma cell structure is formed of a second transparent substrate having thereon cathode stripes and anode stripes disposed alternately with a spacing therebetween, stacked via stripe-shaped partitions disposed along the anode stripes onto the dielectric sheet so as to form plasma channels between the partitions filled with an ionizable gas sealed up therein.
    Type: Grant
    Filed: August 17, 2001
    Date of Patent: June 3, 2003
    Assignee: Canon Kabushiki Kaisha
    Inventors: Osamu Taniguchi, Akira Tsuboyama
  • Patent number: 6549180
    Abstract: A plasma display panel that is adaptive for shortening an address interval. The PDP is provided with first and second sustaining electrode lines making each row line, and first and second address electrode lines making each column line. The first and second address electrode lines are alternately overlapped with an insulating material as the row lines are progressed.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: April 15, 2003
    Assignee: LG Electronics Inc.
    Inventors: Eun Ho Yoo, Woo Gon Jeon
  • Patent number: 6512499
    Abstract: A flat plasma discharge display device comprises a first substrate 1 and second substrate 2 which are provided opposite to each other, and address electrode group 13 having a plurality of address electrodes A arranged in parallel, a first discharge maintaining electrode group 11 having a plurality of first discharge maintaining electrodes S1 arranged in parallel, and a second discharge maintaining electrode group 12 having a plurality of second discharge maintaining electrodes S2 arranged in parallel. The first discharge maintaining electrodes S1, the second discharge maintaining electrodes S2 and the address electrodes A have main directions of extension thereof which are selected to be first and second directions intersecting each other. Consequently, a numerical aperture can be increased.
    Type: Grant
    Filed: August 8, 2000
    Date of Patent: January 28, 2003
    Assignee: Sony Corporation
    Inventor: Hironobu Abe
  • Patent number: 6501444
    Abstract: In a plasma display panel, red, green, and blue pixels have the same voltage range for write discharges. The red, the green, and the blue pixels have first, second, and third data electrodes, respectively, covered with an insulating film. A red fluorescent substance layer is formed on the insulating film over the first data electrode. A green fluorescent substance layer is formed on the insulating film over the second data electrode. A blue fluorescent substance layer is formed on the insulating film over the third data electrode. The green fluorescent substance is smaller than both of the red and the blue fluorescent substance layers in thickness.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: December 31, 2002
    Assignee: NEC Corporation
    Inventors: Kazuaki Yanagida, Masayuki Noborio
  • Patent number: 6496163
    Abstract: A memory type alternating current plasma display panel has two pixel blocks on both sides of a spacer wall, and scanning/sustain electrode pairs for the two pixel blocks respectively have the innermost sustain electrodes closer to the spacer wall than the associated scanning electrodes so as to increase an offset margin during assemblage of panel structures.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: December 17, 2002
    Assignee: NEC Corporation
    Inventor: Koki Iseki
  • Patent number: 6473061
    Abstract: A PDP drive method capable of restraining the generation of contour noise and making to be high a brightness level. In the PDP drive method, discharging cells on the plasma display panel start simultaneously on a radio frequency discharge by row lines. Next, the radio frequency discharge, which is caused in each discharging cell on the row line, is erased by applying an erasing pulse corresponding to a brightness level of video to the discharging cells on a row line.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: October 29, 2002
    Assignee: LG Electronics Inc.
    Inventors: Geun-Soo Lim, Woo Hyun Paik, Jeong Pil Choi, Eun Ho Yoo, Myung Ho Park
  • Patent number: 6456264
    Abstract: In an address-while-display (AWD) driving method in which addressing and sustaining are simultaneously performed, a plasma display panel (PDP) is driven with an automatic power control function for reducing power consumption when there are lots of ON pixels over the entire PDP, that is, the brightness of the screen of the PDP is higher than a predetermined level. In the PDP driving method, in order to suppress power consumption for maintaining a bright state of the screen, discharge sustain pulses at respective sub-fields for implementing gray scale display of each frame are invalidated using erase pulses in a constant ratio for each sub-field, while all the video signals applied in the form of the AWD driving waveforms are continuously applied to the respective frame periods in which all the video signals are displayed without interruption, that is, irrespective of whether discharge is performed.
    Type: Grant
    Filed: June 20, 2000
    Date of Patent: September 24, 2002
    Assignee: Samsung SDI Co., LTD
    Inventors: Kyoung-ho Kang, Jeong-duk Ryeom
  • Patent number: 6456263
    Abstract: A method for driving a gas electric discharge device which has a first electrode and a second electrode and is constructed such that a wall voltage is capable of being produced between the first and second electrodes. The method includes applying a voltage monotonously rising from a first set value to a second set value, between the first and second electrodes, thereby to generate a plurality of gas electric discharges so as to decrease the wall voltage for charge adjustment during the voltage rise.
    Type: Grant
    Filed: January 5, 1999
    Date of Patent: September 24, 2002
    Assignee: Fujitsu Limited
    Inventors: Yasunobu Hashimoto, Yasushi Yoneda, Kenji Awamoto, Seiichi Iwasa
  • Patent number: 6400345
    Abstract: A PALC panel is operated by increasing the voltage between the channel electrodes to a firing voltage to create a plasma in the channel, reducing the voltage between the channel electrodes to a sustaining voltage to sustain the plasma for an interval during which a selected drive voltage is applied to the data drive electrode to establish an electric field in the layer of electro-optic material, and reducing the voltage between the channel electrodes to a bias voltage, which is insufficient to sustain the plasma but provides an electric field having a component parallel to the cover sheet in the layer of electro-optic material.
    Type: Grant
    Filed: June 28, 1999
    Date of Patent: June 4, 2002
    Assignee: Tektronix, Inc.
    Inventors: Kevin J. Ilcisin, Thomas S. Buzak
  • Patent number: 6388644
    Abstract: In a plasma display or a field emission display, sub-pixels having extra (non-saturating) phosphors are applied to enhance the efficacy. Depending on the luminance and color of a pixel to be displayed, driving of the most efficient combination of sub-pixels is performed.
    Type: Grant
    Filed: February 22, 2000
    Date of Patent: May 14, 2002
    Assignee: U.S. Philips Corporation
    Inventors: Siebe T. De Zwart, Sijbrandus Van Heusden, Gerrit Oversluizen
  • Patent number: 6362799
    Abstract: A plasma display panel has a pair of insulating substrates (a front substrate and a rear substrate) which face each other. A plurality of surface discharge electrodes, each including a transparent scanning electrode and a transparent maintaining electrode arranged with a surface discharge gap in between, are formed in a matrix form on the front substrate. A plurality of scanning trace electrodes, which are made of metal material, are formed extending horizontally on the scanning electrodes. A plurality of first partition walls are formed vertically extending in stripes between the surface discharge electrodes. A plurality of maintaining trace electrodes, connected to the maintaining electrodes, are formed vertically extending on the first partition walls. The front substrate having the electrodes thus formed thereon is covered with a transparent dielectric layer and a magnesia oxide layer in sequence.
    Type: Grant
    Filed: April 19, 1999
    Date of Patent: March 26, 2002
    Assignee: NEC Corporation
    Inventors: Mitsuo Ueoka, Hidekazu Takada
  • Patent number: 6342873
    Abstract: In a surface discharge type plasma display device, lead-out wirings for a plurality of surface discharge electrode pairs of a scanning electrode 3 and sustaining electrodes 4 are arranged such that current flowing directions of adjacent pairs of the surface discharge electrodes during a sustaining discharge period are opposite to each other.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: January 29, 2002
    Assignee: NEC Corporation
    Inventors: Mitsuo Ueoka, Keiji Nunomura
  • Patent number: 6243084
    Abstract: Before applying a pulse (Vp) of the first voltage for uniforming charges between each of the first electrodes X and each of the second electrode Y1 to Yn which are adjacent to each other, a pulse (Vpp) of the fifth voltage which has a reverse polarity to that of the pulse of the first voltage and is lower than the pulse of the first voltage and higher than the pulse of the fourth voltage for sustaining a discharge is applied between the first and second electrodes. Thus, in a method for driving a plasma display in which cells are provided at intersections of a plurality of electrodes, a full write discharge is surely caused even if residual wall charges are left, and luminous efficiency is increased.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: June 5, 2001
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventor: Takayoshi Nagai
  • Patent number: 6211865
    Abstract: A driving apparatus of a plasma display panel which can apply a plurality of driving pulses of different polarities onto same row electrodes of the PDP by a transistor of a low withstanding voltage. The apparatus has a first pulse generating circuit for generating a first pulse of a predetermined polarity and applying it to a first line and a second pulse generating circuit for generating a second pulse of a polarity different from the predetermined polarity and applying it to the row electrodes of the plasma display panel. A switching device which is turned on for at least a period of time when the first pulse generating circuit generates the first pulse and connects the first line and the row electrodes is provided between the first and second pulse generating circuits.
    Type: Grant
    Filed: July 7, 1998
    Date of Patent: April 3, 2001
    Assignee: Pioneer Electronic Corporation
    Inventors: Kenichiro Hosoi, Mitsushi Kitagawa
  • Patent number: 6191762
    Abstract: Disclosed is a timing circuit which produces control signals by which a data interfacing section can simultaneously implement input and output operations of a video data from a frame memory and to an address electrode driving section, respectively. A first pulse signal whose pulse duration corresponds to a whole horizontal line time, a second pulse signal which is identical to a delayed first pulse signal by one horizontal line time and a third pulse signal whose pulse duration is the one horizontal line time longer than that of the first pulse signal are produced by using a system clock signal of 2 MHz. During the pulse duration of the third pulse signal, a first clock signal which contains pulse signals whose numbers are one number larger than the numbers of whole horizontal lines (480) by using a system clock signal of 25 MHz. The first clock signal is provided to the data interfacing section to control the input and output operations thereof.
    Type: Grant
    Filed: February 2, 1999
    Date of Patent: February 20, 2001
    Assignee: Daewoo Electronics Co., Ltd.
    Inventor: Se-Yong Kim
  • Patent number: 6188374
    Abstract: A plasma display panel that is adapted to reduce the power consumption and the EMI and to prolong a life thereof. In the panel, common terminals are used in first and second sustain electrode lines arranged on a pixel cell matrix to keep a discharge in pixel cells. The common terminals simultaneously apply a driving signal to each of two sustain electrode lines, thereby charging electric charges in next line pixel cells during maintaining the discharge at one line pixel cells.
    Type: Grant
    Filed: March 26, 1998
    Date of Patent: February 13, 2001
    Assignee: LG Electronics, Inc.
    Inventor: Seong Hak Moon
  • Patent number: 6169527
    Abstract: A plasma display panel displaying interlaced images is provided with shades blocking a part of the light emitted by respective outermost display lines, suppressing flicker caused by the part of the light emitted thereby and improving display quality.
    Type: Grant
    Filed: August 7, 1997
    Date of Patent: January 2, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Toshio Ueda
  • Patent number: 6144349
    Abstract: The present invention relates to a plasma display device which limits a generation of electromagnetic wave. The plasma display device has first and second drive circuits for applying a drive voltage to first and second display electrode pair. Further, a direction of a charge current flowing at said first display electrode pair when said drive voltage is applied by said first drive circuit is opposite on said plasma display panel to a direction of a charge current flowing at said second display electrode pair when said drive voltage is applied by said second drive circuit. According to the present invention, a transitional charge/discharge current, which is generated upon the application of a drive voltage to one of the display electrodes, and a light emission discharge current flow in opposite directions on the panel. Thus, electromagnetic waves that are generated by the inductances of the display electrode pair cancel each other out.
    Type: Grant
    Filed: March 6, 1998
    Date of Patent: November 7, 2000
    Assignee: Fujitsu Limited
    Inventors: Yoshimasa Awata, Naoki Matsui, Kenji Awamoto, Yoshikazu Kanazawa, Shigetoshi Tomio, Fumitaka Asami, Masaya Tajima, Hideki Isohata, Junichi Okayasu, Kiyoshi Takata, Takashi Fujisaki
  • Patent number: 6005539
    Abstract: A plasma display apparatus is disclosed wherein a column electrode driver for a PDP has a simpler constitution to facilitate wirings between the column electrode driver and column electrodes in the PDP.
    Type: Grant
    Filed: July 23, 1997
    Date of Patent: December 21, 1999
    Assignee: Pioneer Electronic Corporation
    Inventor: Tetsuro Nagakubo
  • Patent number: 5943030
    Abstract: A display panel driving circuit includes a plurality of elementary driver circuits each provided for each one of drive electrodes, an electric power recovery common line, an electric power release common line, first and second coils having one end thereof connected to the electric power recovery common line and the electric power release common line, respectively, and a capacitor having one end connected in common to the other end of the first and second coils.
    Type: Grant
    Filed: November 25, 1996
    Date of Patent: August 24, 1999
    Assignee: NEC Corporation
    Inventor: Seisaku Minamibayashi
  • Patent number: 5790087
    Abstract: A method for driving a plasma display panel (PDP) to indicate a precise emission image corresponding to pixel data thereon. The method comprises the steps of applying first priming pulses to all of the row electrodes simultaneously to execute a simultaneous priming stage, and then applying a second pulse for reproducing charged particles in the discharge region just before applying a scan pulse for writing pixel data to the pixel cell, thereby writing the pixel data to the respective pixel cells. In other words, the application of the second priming pulse can adjust the amount of charged particles in the discharge region of the pixel cell just before applying the scan pulse to write the pixel data. Therefore, the desired amount of barrier charge corresponding to the contents of the pixel data can be achieved in the pixel cell, thereby obtaining a precise display image on the PDP panel.
    Type: Grant
    Filed: April 15, 1996
    Date of Patent: August 4, 1998
    Assignee: Pioneer Electronic Corporation
    Inventors: Tetsuya Shigeta, Nobuhiko Saegusa, Masahiro Suzuki
  • Patent number: 5610623
    Abstract: A method for driving a gas discharge display panel consists of the steps of applying a writing pulse on a specific display electrode line selected from display electrode lines arranged side by side in the panel, applying a scanning pulse on a specific scanning electrode line selected from scanning electrode lines which are arranged side by side and cross the display electrode lines to produce writing gas discharge in cooperation with the writing pulse in a specific discharge cell arranged at an intersection space between the specific display electrode and the specific scanning electrode line, and applying a series of maintaining pulses subsequent to the scanning pulse on the specific scanning electrode during only a maintaining period to produce maintaining gas discharge subsequent to the writing gas discharge in the specific discharge cell, the maintaining gas discharge being intermittently produced in synchronism with the maintaining pulses.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: March 11, 1997
    Assignees: Nippon Hoso Kyokai, Matsushita Electronics Corporation
    Inventors: Yoshimichi Takano, Tetsuo Sakai, Hiroshi Murakami, Kazuo Takahashi, Mutsumi Mimasu, Utaro Miyagawa, Makoto Takei, Koichi Wani