Abstract: A timing controller includes: an image input module configured to output respective raw data according to accessed video source data; a data processing module configured to buffer the raw data in one row and splice each row of raw data into display time control data and display luminous control data; a grayscale mapping and dividing module configured to establish a mapping relationship between the display luminous control data and a high grayscale and a mapping relationship between the display time control data and a low grayscale, to output display data; and a timing control module configured to control writing of the display data.

Abstract: A pixel includes a first light source including at least one first light emitting element between a first split electrode and a second power supply; a second light source unit including at least one second light emitting element between a second split electrode and the second power supply; a driving-current generator including a first transistor between a first power supply and the first and second light source units and generating a driving current corresponding to a first data signal; a first switching unit including a first switching element between the driving-current generator and the first light source; and a second switching unit including a second switching element between the driving-current generator and the second light source unit and controlling an electrical connection between the first and second light source units in response to a second data signal.

Abstract: A display panel is provided. The display panel includes a plurality of pixels, a first main data line, a first sub data line, and a first connecting line. The first main data line is electrically connected to pixels arranged in at least two columns. The first sub data line and the first main data line are separated by M columns of pixels, and the first sub data line is electrically connected to pixels arranged in at least two other columns. The first connecting line connects the first main data line and the first sub data line.

Abstract: An object of the present disclosure is to improve flicker by reducing a luminance change according to a change in an image frequency during a variable refresh rate (VRR) operation.

Abstract: A method for displaying a play screen and an electronic device relate to the field of terminal technologies to reduce power consumption of an electronic device. The method includes: determining, by the electronic device based on a preset condition, whether the screen element in the play screen includes a second dynamic element, where the second dynamic element has a second frame rate, and the preset condition includes that: an area proportion of the second dynamic element in the play screen is less than a preset threshold, and the second frame rate is greater than the first frame rate; and when the screen element in the play screen includes the second dynamic element, displaying, by the electronic device, the play screen of the foreground application at the first frame rate.

Abstract: A display device includes a display panel including a plurality of pixels, a current sensor that senses a sensing current that flows through the pixels, and a data compensator. The data compensator calculates a target current from an image frame of input image data using a current deviation for each position of the image frame and a current contribution ratio for each color of the image frame, and that generates a scale factor by comparing the target current and the sensing current. The display device further includes a timing controller that generates output image data by scaling grayscale values of the input image data using the scale factor; and a data driver that provides a data signal corresponding to the output image data to the pixels.

Abstract: A display device is disclosed that includes a display panel, a timing controller, and a data driver. The display panel includes a plurality of pixels. The timing controller is configured to calculate an on-pixel ratio of first image data and correct the first image data into second image data based on the on-pixel ratio. The data driver is configured to generate a data signal based on the second image data and provide the data signal to the pixels. The timing controller calculates the second image data by estimating a temperature of the display panel using the on-pixel ratio and gamma-correcting the first image data in response to the temperature.

Abstract: A display device determines a target temperature based on an average luminance of each of the panel blocks, calculates a temperature change amount of each of the panel blocks by multiplying a difference between the target temperature and a previous prediction temperature of each of the panel blocks determined before a reference period by a block temperature coefficient of the panel blocks, and calculates a current prediction temperature of each of the panel blocks by adding the temperature change amount of each of the panel blocks to the previous prediction temperature of each of the panel blocks, the panel blocks include a first panel block and second panel blocks adjacent to the first panel block, and the block temperature coefficient of the first panel block is determined based on the target temperature of the first panel block and the target temperature of each of the second panel blocks.

Abstract: An electronic device may include processing circuitry configured to generate a first frame of image content and a second frame of image content. The second frame of image content is different from the first frame of image content. The electronic device may also include a display configured to display the first frame of image content at a first refresh rate. In response to receiving the second frame of image content, the electronic device may initially increase the refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

Abstract: Disclosed are a pixel circuit, a driving method, an electroluminescent display panel and a display apparatus. The pixel circuit includes: a driving control module, a first light emitting control module, a light emitting device and a first capacitor; where the first light emitting control module is coupled between the driving control module and a first electrode of the light emitting device; and the first capacitor is coupled between the light emitting control end and the first electrode of the light emitting device.

Abstract: Various embodiments disclose a method and an apparatus including a display, a memory including information on a number of duty cycles per one refresh period for emitting light by pixels of the display corresponding to each of a plurality of refresh rates of the display, and a processor, wherein the processor is configured to control the electronic device to perform an operation according to a first number of duty cycles based on the display operating at a first refresh rate, and perform an operation according to a second number of duty cycles based on the display operating at a second refresh rate, wherein the first number is less than the second number based on the first refresh rate being higher than the second refresh rate.

Abstract: A display device according to the embodiment of the present disclosure includes: a display panel that includes a display area where a plurality of pixels is disposed and a non-display area disposed around the display area; a gate driver that provides a scan signal and an emission control signal to the display panel; and a controller that drives the display panel in accordance with a refresh rate. The plurality of pixels includes a light emitting element and a pixel circuit that drives the light emitting element. The pixel circuit is driven in sets including at least one refresh period and at least one hold period in low frequency driving. The controller controls dynamically the refresh rate during the at least one set when a gradation of an image changes, and simultaneously, changes and supplies a bias voltage during the at least one hold period.

Abstract: An image display device includes a plurality of driving circuits disposed on a substrate, and a plurality of light emitting elements corresponding to a plurality of pixels respectively. Each of the plurality of driving circuits being configured to provide a driving current to each of the plurality of light emitting elements and to control the driving current by a pulse amplitude modulation and a pulse width modulation. The driving circuit being configured using TFTs.

Abstract: A novel method for driving a digital display having a plurality of pixel rows includes receiving a frame of data to be written to the display in a predetermined frame time, dividing the frame time into a plurality of time intervals, defining a plurality of row groups, and defining a unique sequence for each row group to display corresponding multi-bit data words and a number of off states on the pixels of the rows of the row groups. The drive sequence of each row is offset with respect to an initial row by a unique predetermined number of off states. The predetermined numbers of off states ensure that the pixel updates of the groups do not overlap.

Abstract: A display device includes: pixels that receive data voltages corresponding to output grayscales; a sensing circuit that senses electrical states of the pixels to provide sensing information; and a grayscale converter that generates the output grayscales with respect to the pixels based on input grayscales and the sensing information, wherein the grayscale converter predicts a temperature of at least one of the pixels based on the sensing information, calculates a current control amount for the at least one of the pixels based on the predicted temperature and the input grayscales, and calculates the output grayscales for the at least one of the pixels based on the current control amount and the input grayscales.

Abstract: A driving voltage compensation circuit including a compensation circuit and a first switching circuit, the first switching circuit connects a driving element and a light emitting device, and the compensation circuit is connected to the driving element. The circuit operates according to an operational timing, the operational timing including a plurality of cycles, each cycle including at least a first time period and a second time period; during the first time period of each of the plurality of cycles, the first switching circuit is turned on, and the compensation circuit is turned off; the energy storage element releases electrical energy to provide a driving voltage to the driving element; during the second time period, the compensation circuit utilizes the received data voltage to store electrical energy for the energy storage element of the compensation circuit.

Abstract: Provided is a timing controller. The timing controller includes: M signal output terminals, wherein the M signal output terminals are respectively connected to M signal input terminals corresponding to M source driver chips; the timing controller includes a controller, a timing transmission circuit, and a pull-down circuit. The controller is configured to control the timing transmission circuit and the pull-down circuit, such that the M signal output terminals are connected to ground in a first phase, the M source driver chips are in a low power consumption mode in the case that the M signal input terminals are connected to ground, and the first phase indicates a phase in which the M source driver chips are expected to enter the low power consumption mode.

Abstract: A projection system and method therefore related to a first projection device; a second projection device; at least one spatial modulator; and an electronic processor configured to: receive a two-dimensional video data, generate a first plurality of intensity values of a first color gamut and a second plurality of intensity values of a second color gamut, subtract a luminance threshold from a plurality of pixel values of the second color gamut to yield a plurality of positive pixel values and a plurality of negative pixel values, set respective ones of the plurality of pixel values to predetermined values to obtain a residual of the second color gamut, add the residual to the first color gamut, add maximized pixel values to the first color gamut and the second color gamut to create an output gamut, and blend the output gamut with a native color gamut to generate a blended gamut.

Abstract: A display apparatus includes: a modular display panel including a plurality of display modules; and a timing controller. Each of the plurality of display modules includes: a display panel including a pixel array and subpixel circuits; and a driving unit which drives the subpixel circuits such that inorganic light-emitting elements in the pixel array successively emit light in a first order of multiple row lines or in a second order opposite to the first order. The timing controller provides the driving unit of a first display module with first control signals for causing the inorganic light-emitting elements of the first display module to emit light in the first order, and provides the driving unit of a second display module, which is positioned above or below the first display module, with second control signals for causing the inorganic light-emitting elements of the second display module to emit light in the second order.

Abstract: A pixel including: a light emitting element; a first transistor connected between a first node and a second node, and to generate a driving current to flow from a first power line to a second power line through the light emitting element; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node corresponding to a gate electrode of the first transistor; a fourth transistor connected between the third node and a third power line; a fifth transistor connected between the first power line and the first node; a sixth transistor connected between the second node and a fourth node corresponding to a first electrode of the light emitting element; a seventh transistor connected between the fourth node and a fourth power line; and an eighth transistor connected between the fourth node and a fifth power line.

Abstract: A pixel includes a first switching transistor, a second switching transistor, a driving transistor, and a light emitting element. The first switching transistor includes a first terminal to which a bias power supply voltage is applied, a second terminal connected to a first node, and a gate terminal to which a light emitting element initialization signal is applied. The second switching transistor includes a first terminal connected to the first node, a second terminal connected to a second node, and a gate terminal to which the light emitting element initialization signal is applied. The driving transistor includes a first terminal connected to the second node, a second terminal connected to a third node, and a gate terminal. The light emitting element is connected to the driving transistor. The first node is connected to the third node, and the bias power supply voltage is applied to the second and third nodes.

Abstract: A display apparatus includes a display panel including a pixel, a gate driver providing a gate signal to the pixel, a data driver providing a data voltage to the pixel and an emission driver providing an emission signal to the pixel. The pixel includes a driving switching element applying a driving current to the light emitting element, a storage capacitor connected to the driving switching element, a bias capacitor connected to the storage capacitor and receiving a bias gate signal, a threshold voltage compensation switching element connected to an electrode of the driving switching element and a light emitting element initialization switching element connected to an electrode of the light emitting element. A control signal applied to an electrode of the threshold voltage compensation switching element and a control signal applied to an electrode of the light emitting element initialization switching element are generated from different signal generators.

Abstract: A display panel and a driving method thereof are provided. The driving method includes: acquiring a display synchronization signal, and according to it to determine a first backlight synchronization signal including a plurality of second pulses corresponding to a plurality of first pulses in the display synchronization signal; acquiring a display setting frequency greater than a minimum value of refresh rates of frame images, and according to it to determine a unit backlight clock signal, where a duration of the unit backlight clock signal is equal to of a reciprocal of the display setting frequency; and generating a third pulse between some two adjacent second pulses to drive a backlight plate to emit light.

Abstract: Reducing blinking pixels in a display includes detecting a first timing of activation of one or more emissive elements of the display, detecting a second timing of sensing pulses from a sensor arranged to detect radiation transmitted through the display, determining, based on the first timing and the second timing, a synchronized timing that staggers the activation of the one or more emissive elements of the display and the sensing pulses from the sensor, and dynamically altering, based on the determined synchronized timing, a subsequent timing of the sensing pulses from the sensor to reduce blinking of at least some of the pixels compared to blinking associated with the synchronized timing.

Abstract: A pixel driving circuit and a display panel are provided. The pixel driving circuit includes a data writing module, a data conversion module, and a current driving module. The data writing module is electrically connected to a first node and configured to transmit a data signal to the first node. The data conversion module is electrically connected to the first node, a second node, and a modulation signal source, and configured to generate a current driving control signal, and to output the current driving control signal to the second node. The current driving module is electrically connected to the second node, a light-emitting control wire, and a light-emitting device, and configured to control the light-emitting device to emit light. An effective pulse of the current driving control signal has different pulse widths in different gray-scale states.

Abstract: A pixel driving circuit includes a data writing circuit, a light-emitting control circuit and a light-emitting diode chip. The data writing circuit is electrically connected to a first scanning signal terminal, a data signal terminal and a first node. The light-emitting control circuit is electrically connected to the first node, an enable signal terminal, a first voltage signal terminal and a second node, and is configured to transmit a first voltage signal received at the first voltage signal terminal to the second node. The light-emitting diode chip is electrically connected to the second node and a second voltage signal terminal. The light-emitting diode chip includes a plurality of light-emitting portions. The light-emitting diode chip is configured to drive the plurality of light-emitting portions to emit light in different periods of time respectively or drive at least two light-emitting portions to emit light in a same period of time.

Abstract: An organic light emitting diode (OLED) display system comprises an OLED array and a power management system that includes at least one voltage generator for the OLED array. A timing microcontroller comprises a decoder/encoder configured to receive HDR pixel data and output display pixel data. A portion of the HDR pixel data is sampled and a luminance index value of the sampled portion is determined, where the luminance index value corresponds to a maximum luminance of the sampled portion. The luminance index value is used to control the at least one voltage generator to reduce power consumption of the OLED display system.

Abstract: A data driver can include a white data voltage output circuit having an Ath channel for outputting a first white data voltage and a Bth channel for outputting a second white data voltage different from the first white data voltage. The data driver can further include red, green, and blue data voltage output circuits configured to output a red data voltage, a green data voltage, and a blue data voltage, respectively. One of the Ath channel and the Bth channel can operate in a first driving condition, and the Ath channel and the Bth channel can operate together in a second driving condition.

Abstract: A display device is provided and includes a display panel, a light source, a light source controller, and a timing controller. The light source is adjacent to the display panel. The light source controller is electrically connected to the light source. The timing controller is electrically connected to the light source controller and the display panel. The timing controller includes a decoding unit and first and second processing units. The first processing unit is electrically connected to the decoding unit and the display panel. The second processing unit is electrically connected to the decoding unit and the light source controller. The decoding unit provides a refresh signal to the first and second processing units so that the display panel refreshes displayed content in a first refresh sequence according to first refresh rates, and the light source refreshes brightness in a second refresh sequence according to second refresh rates.

Abstract: Provided is a device for controlling luminance of a display, having a simplified ACL circuit compared to the prior art. The device for controlling luminance of a display calculates the average luminance (Y_avg) when video data is input, and determines the luminance variation (?Y) according to the average luminance. The device for controlling luminance of a display may adjust the luminance of a display by controlling a current (driving current) that is used to drive a light-emitting diode included in a pixel, instead of modifying video data for the adjustment of luminance. That is, unlike the prior art, the device for controlling luminance of a display does not modify video data, for the control of luminance.

Abstract: Embodiments of the present application provide a method for controlling voltages of a liquid crystal on silicon (LCoS) two-dimensional array which includes a plurality of pixel sets, and the plurality of pixel sets include a first pixel set and a second pixel set. The method includes: determining a plurality of bit sequences, where the plurality of bit sequences include a first bit sequence and a second bit sequence; controlling a voltage of the first pixel set by using the first bit sequence; and controlling a voltage of the second pixel set by using the second bit sequence, where the first pixel set and the second pixel set are in different phase cycles in a port direction of the LCoS two-dimensional array, the first pixel set and the second pixel set have a same phase, and duty ratios of the first bit sequence and the second bit sequence are the same.

Abstract: A display device includes a communicator; a memory; a display panel including a plurality of display modules; and one or more processors. The processor receives position information and corrected pixel value of a first area in a first display module; identifies a pixel corresponding to the first area based on the position information; obtains a correction coefficient corresponding to the identified pixel based on the corrected pixel value and an output pixel value of the identified pixel; obtains correction coefficients corresponding to each of a plurality of remaining pixels based on the correction coefficient and a distance between the identified pixel and each of the remaining pixels and stores same in a memory; processes an input image based on the correction coefficients, and controls the display panel to display the processed input image. The device thereby improves display uniformity between display modules more effectively.

Abstract: This disclosure provides an array substrate and a display device. In the array substrate, the pixel driving circuit includes a driving transistor, a first transistor and a second transistor. The driving transistor and the first transistor are P-type transistors, and the second transistor is N-type transistor. The array substrate also includes a base substrate, and a first conductive layer arranged at a side of the base substrate and including: a first conductive portion forming a gate electrode of the driving transistor; a first gate line at a side of the first conductive portion, a part of the first gate line being configured to form a gate electrode of the first transistor; and a second gate line at a side of the first gate line away from the first conductive portion, a part of the second gate line being configured to form a first gate electrode of the second transistor.

Abstract: An organic light emitting diode (OLED) display control circuit and a control method thereof are provided. The OLED control circuit includes a counting unit, a judgment unit, a remainder calculation unit and a signal compensation unit. The counting unit counts display lines of a current frame according to a vertical synchronization signal to generate a first count value. The judgment unit compares the first count value and a second count value to generate a judgment result. The second count value represents the number of display lines of a previous frame preceding to the current frame. The remainder calculation unit calculates a remainder generated by dividing the first count value by a period of an emission control signal. The signal compensation unit adjusts the emission control signal to compensate for an incomplete period of the emission control signal occurring in the end of the current frame period.

Abstract: In a display device that changes the number of light emissions per frame period, a display control circuit outputs a control signal specifying an emission period included in a frame period to an emission control line driver circuit. The emission control line driver circuit adds sequential delays to the control signal and thereby generates signals to be applied to the emission control lines. When leading and trailing frame periods have the same proportion of emission periods but include different numbers of emission periods, the leading and trailing frame periods are intervened by a transition frame period having a different proportion of emission periods from the leading frame period. This configuration prevents flickering caused by the changing of the number of light emissions per frame period.

Abstract: Disclosed are an electronic device, and a method for controlling same. Particularly, the present disclosure relates to an electronic device, and a method for controlling same, which can secure high visibility of a subject by acquiring, from an original image, a plurality of sub images having a smaller bit number than the original image, and acquiring a synthesized image on the basis of information about the shapes of objects included in the plurality of sub images.

Abstract: A display panel includes: a pixel circuit, and a light-emitting element, that the pixel circuit includes a driving transistor configured to provide a driving current for the light-emitting element; a working process of the pixel circuit includes a data writing stage, in which a gate of the driving transistor receives a data signal, and a bias adjustment stage, in which a source or drain of the driving transistor receives a bias adjustment signal; and the pixel circuit has a frame refresh frequency F1, and a data refresh frequency including a first data refresh frequency F11 and a second data refresh frequency F22, that at least one second data refresh period includes N11 bias adjustment stages, a bias adjustment signal V11 is inputted in a first bias adjustment stage, and a bias adjustment signal Vi is inputted in an i-th bias adjustment stage, where V11?Vi.

Abstract: Micro LED display device and driving method thereof. The display device includes a display substrate and a data driving circuit. The display substrate includes multiple pixels, and each pixel includes a first subpixel and a second subpixel. The first subpixel has a first subpixel circuit and a first light-emitting element. The second subpixel has a second subpixel circuit and a second light-emitting element. The first subpixel circuit and the second subpixel circuit are configured independently. The data driving circuit is electrically connected to the first and the second subpixel circuits. The data driving circuit transmits a first data signal to the first subpixel circuits to drive the first light-emitting elements and a second data signal to the second subpixel circuits to drive the second light-emitting elements. The first data signal is a PWM signal, and the second data signal is a PAM signal.

Abstract: The present disclosure provides a display panel and an electronic device. The display panel includes: a base substrate; a pixel arranged on the base substrate, wherein the pixel includes a plurality of sub-pixel drive circuits sequentially arranged in the first direction in the display area, each of the sub-pixel drive circuits includes a switching transistor, a detection transistor and a storage capacitor, the switching transistor and the detection transistor are respectively located on both sides of the storage capacitor in a second direction; a first gate line configured to provide a first scanning signal to the plurality of sub-pixel drive circuits; and a second gate line configured to provide a second scanning signal to the plurality of sub-pixel drive circuits.

Abstract: An electronic device is disclosed that includes a display panel, a data driving circuit, a scan driving circuit, and a driving controller. The driving controller generates image data based on a received image signal. The driving controller includes a minimum emission gray level determining unit that determines a gray level of the image signal, a pattern determining unit that determines a dither pattern of the image signal, a driving frequency sensing unit that determines a driving frequency of the image signal, and a data compensation unit that compensates for the image data based on the gray level and at least one of the dither pattern and the driving frequency.

Abstract: A display device includes a processor which supplies grayscale data in active periods of frame periods and stops supply of the grayscale data in blank periods of the frame periods, a timing controller which generates a change signal when a difference between a first blank period of a first frame period and a second blank period of a second frame period is greater than a threshold value, a power supply which supplies a first power voltage having a voltage level changed based on the change signal to a first power line, and pixels commonly connected to the first power line.

Abstract: A display apparatus includes: a display panel configured to display an image based on input image data; a gate driver configured to output a gate signal to the display panel; a data driver configured to output a data voltage to the display panel; and a driving controller configured to control an operation of the gate driver and an operation of the data driver, to determine a driving mode of the display apparatus to one of a normal driving mode and a low frequency driving mode based on the input image data, and to determine a driving frequency of the display panel based on the input image data, wherein the driving controller is configured to determine the driving frequency of the display panel using a flicker value varied according to a grayscale value of the input image data and a luminance setting value.

Abstract: A display device includes: a plurality of scanning lines; a plurality of data lines; a plurality of light-emission control lines; a plurality of pixel circuits each including a light-emitting element; a scanning line drive circuit that drives the scanning lines based on a first clock signal; a data line drive circuit that drives the data lines; a light-emission control line drive circuit that drives the light-emission control lines based on a second clock signal; and a display control circuit that outputs at least the first and second clock signals. The display control circuit classifies a frame period into a scanning period and a pause period, and during the pause period, the display control circuit stops the first clock signal and makes a frequency of the second clock signal lower than that during the scanning period. This further reduces the power consumption of the display device that performs low-frequency driving.

Abstract: In accordance with increasing communication demand, means for efficiently providing mass downstream communication at a low cost are desired. Accordingly, a communication system providing supplemental downlink as well as multicast communication comprising a display control device for causing a display unit to display a video, and a communication terminal having an image capturing unit for directly capturing the video displayed by the display unit or capturing a video projected or reflected on a wall surface or the like is provided, wherein the display control device includes a video acquiring unit, a region identification unit, a video generating unit, and a display control unit, and the communication terminal includes a region identification unit, a decoding unit, and a mechanism for communicating a control signal for supplemental downlink by the above-described optical communication using means other than optical communication (means such as WiFi, mobile data communication or the like).

Abstract: A semiconductor device is provided. The semiconductor device includes: an offset compensation circuit configured to obtain first data including first low-order bit data, second low-order bit data and high-order bit data, select two compensation values from among a plurality of compensation values based on the first low-order bit data, identify a final compensation value by interpolating the two compensation values based on the second low-order bit data, and compensate the final compensation value to generate second data; and a source driver configured to interpolate and output two gamma voltages from among a plurality of gamma voltages based on the second data.

Abstract: Disclosed herein is a display device for preventing a luminance floatation phenomenon in a low grayscale region. The display device includes a display panel, an external input interface configured to receive an image signal from an external device, and a controller configured to adjust a gamma value when an input frequency of the image signal is less than an output frequency of the display panel and a variable refresh rate (VRR) function for changing the output frequency according to the input frequency is activated and to output the image signal to the display panel based on the adjusted gamma value.

Abstract: Provided are a display panel, a driving method thereof and a display device. The display panel includes: a pixel circuit and a light-emitting element, where the pixel circuit includes a light emitting control module, a drive module and a compensation module; the light emitting control module includes a first light emitting control module configured to selectively provide a first power supply signal for the drive module; the drive module is configured to provide a drive current for the light-emitting element and comprises a drive transistor; the compensation module is configured to compensate a threshold voltage of the drive transistor; and a working process of the pixel circuit includes a light emitting stage and a bias stage.

Abstract: A pixel circuit, a driving method of pixel circuit, and a display device are provided. The pixel circuit includes: a light emitting device, a driving sub-circuit, an energy storage sub-circuit, a data writing sub-circuit and a pull-down sub-circuit; the data writing sub-circuit is configured to control a voltage signal on a data line to be written into a control end of the driving sub-circuit in response to a data writing control signal; a first end of the driving sub-circuit is electrically connected to a target node, a second end of the driving sub-circuit is electrically connected to a power supply voltage, and the driving sub-circuit is configured to control a conduction of the driving sub-circuit under a control of a voltage on a control end of the driving sub-circuit.

Abstract: Methods and systems are provided for determining a posture of a user of an Information Handling System (IHS) during extreme lighting conditions. In particular, the HIS include executable instructions to utilize the visual light camera of the IHS to generate a visual light image of a user of the HIS, identify a plurality of physical feature landmarks of the user in the visual light image such that when a quality of the received visual light image goes below a specified minimum image quality level, utilizing the IR camera of the Information Handling System (IHS) to generate an IR image of the user, and identify the physical feature landmarks of the user based on the IR image.

Abstract: A display panel includes: a pixel circuit, and a light-emitting element, that the pixel circuit includes a driving transistor configured to provide a driving current for the light-emitting element; a working process of the pixel circuit includes a data writing stage, in which a gate of the driving transistor receives a data signal, and a bias adjustment stage, in which a source or drain of the driving transistor receives a bias adjustment signal; and the pixel circuit has a frame refresh frequency F1, and a data refresh frequency including a first data refresh frequency F11 and a second data refresh frequency F22, that at least one second data refresh period includes N11 bias adjustment stages, a bias adjustment signal V11 is inputted in a first bias adjustment stage, and a bias adjustment signal Vi is inputted in an i-th bias adjustment stage, where V11?Vi.