Abstract: A display device may include: a light-emitting diode (LED) backlight unit (BLU), a pixel driving circuit configured to generate a scan signal and an image signal, a pixel circuit configured to generate an output current based on the scan signal and the image signal, and transmit the output current to the LED BLU, the pixel circuit including, a first transistor connected between an input pin and a node, the input pin configured to receive the image signal, the first transistor including a gate terminal configured to receive the scan signal, a second transistor connected between the node and a ground terminal, the second transistor including a gate terminal connected to the node, a third transistor connected between the node and a gate node, a fourth transistor configured to generate the output current according to a voltage of the gate node, and a capacitor connected to the gate node.

Abstract: A semiconductor chip comprises a semiconductor stack and a passivation layer. The semiconductor stack comprises a top surface, a bottom surface opposite to the top surface, and a plurality of sidewalls between the top surface and the bottom surface. The passivation layer conformally covers the top surface and the sidewalls of the semiconductor stack. When viewing from the bottom surface, a plan-view contour of the semiconductor stack comprises a plurality of edges and corners. Each of the corners is defined by two adjacent edges. A plan-view contour of the passivation layer surrounding the plan-view contour of the semiconductor stack comprises a protruding portion adjacent to one of the corners and the protruding portion protrudes outwards from the plan-view contour of the passivation layer.

Abstract: An electronic device is provided and includes a display panel, a light source, and a timing controller. The light source is disposed corresponding to the display panel. The timing controller is electrically connected to the display panel and the light source. The display panel refreshes a displayed content according to a first signal generated by the timing controller. The light source refreshes a brightness according to a second signal generated by the timing controller. The light source begins refreshing the brightness at a first time point. The display panel begins refreshing the displayed content at a second time point. The first time point is different from the second time point.

Abstract: The method includes, in a low-frequency driving mode where a keeping phase is arranged between two active phases, providing a light-emitting control signal with a duty cycle of a % to a pixel circuit during the active phase; and performing first and second switches on the light-emitting control signal during the keeping phase. The first switch is performed before the second switch. Panel brightness at the first switch is higher than panel brightness at the second switch. The duty cycle of the light-emitting control signal is b % after the second switch. b>a. A total duration of active levels of the light-emitting control signal within one frame after the first switch is between a total duration of active levels of the light-emitting control signal with the duty cycle of a % and a total duration of active levels of the light-emitting control signal with the duty cycle of b % within one frame.

Abstract: A compensation method and compensation apparatus for a display panel, a display device and a storage medium. The method includes: with a first display grayscale of a first display region as a reference display grayscale, acquiring a second display grayscale of a second display region after a user adjusts the second display region; determining, according to the first display grayscale and the second display grayscale, a difference coefficient between the second display region and the first display region under a current use duration of the display panel; determining, according to the difference coefficient and a pre-stored display compensation curve of the second display region, a compensation start duration of the second display region, where the display compensation curve is a change curve of a relationship between a use duration of the second display region and a difference coefficient between the second display region and the first display region.

Abstract: A display may have an array of organic light-emitting diode display pixels operating at a low refresh rate. Each display pixel may have six thin-film transistors and one capacitor. One of the six transistors may serve as the drive transistor and may be compensated using the remaining five transistors and the capacitor. One or more on-bias stress operations may be applied before threshold voltage sampling to mitigate first frame dimming. Multiple anode reset and on-bias stress operations may be inserted during vertical blanking periods to reduce flicker and maintain balance and may also be inserted between successive data refreshes to improve first frame performance. Two different emission signals controlling each pixel may be toggled together using a pulse width modulation scheme to help provide darker black levels.

Abstract: A display includes subpixel emissive areas of first, second, and third colors arranged in an array that includes rows and columns. The display also includes scan lines, column lines, and electronic subpixel circuits arranged in the array, with each subpixel circuit in a column of the array being electrically connected to a same column line and each electronic subpixel circuit configured for receiving electronic signals from a scan line and from a column line and for converting the received signals into a current signal provided to one of the subpixel emissive areas to drive light emission from the subpixel emissive area. The display further includes demultiplexer (DEMUX) switches, where every other column line of the columns lines is configured to be connected to at least two outputs from a column line driver through the DEMUX switches.

Abstract: A rectifier circuit having first and second match circuits, a bias circuit, first and second switches is provided. The first match circuit has first and second terminals and receives a first input signal. The second match circuit receives a second input signal. The bias circuit provides a first bias voltage to the second terminal of the first match circuit and a second bias voltage to the first terminal of the second match circuit. The first switch is coupled to the first terminal of the first match circuit and an output terminal of the rectifier circuit and updates an output signal according to the first input signal. The second switch is coupled to the second terminal of the second match circuit and the output terminal and updates the output signal according to the second input signal.

Abstract: A display driver that includes image processing circuitry and a source driver. The image processing circuitry is configured to perform a burn-in compensation to determine a first compensated luminance value for a first pixel in a first area of a display panel based at least in part on a first accumulated luminance value for the first pixel. The first area has a first pixel layout. The image processing circuitry is further configured to scale a second accumulated luminance value for a second pixel in a second area of the display panel to determine a scaled accumulated luminance value. The second area has a second pixel layout different from the first pixel layout. The image processing circuitry is further configured to perform a burn-in compensation to determine a second compensated luminance value for the second pixel based at least in part on the scaled accumulated luminance value.

Abstract: A compensation method of a display panel includes controlling a first display part of a target panel to display a light load image based on a standard gamma curve, controlling a second display part of the target panel to display a heavy load image, acquiring a first brightness of a first color sub-pixels in an (N1+1)th row electrically connected to a first data line of the first display part, acquiring a second brightness of the first color sub-pixels in an (N2+1)th row of a first sub-display part of the second display part electrically connected to a second data line, and according to a difference between the first brightness and the second brightness, determining a first compensation data corresponding to the first gray scale and the second preset gray scale of at least the first color sub-pixels of the first sub-display part in the target panel.

Abstract: A pixel circuit is disclosed. The pixel circuit includes: a driving element including a first electrode connected to a first node, a gate electrode connected to a second node, and a second electrode connected to a third node; a light emitting element including an anode electrode connected to a fourth node and configured to be driven according to the current from the driving element; a first switch element configured to supply a data voltage to the second node; a second switch element configured to supply an initialization voltage to the first node; a third switch element configured to supply a reference voltage to the third node or the fourth node; a fourth switch element configured to supply a cathode voltage or the reference voltage to the third node or the fourth node; and a fifth switch element configured to supply a pixel driving voltage to the first node.

Abstract: A light emitting display device includes: a first display area including a first light-emitting element and a first pixel circuit unit; and a second display area including a second light-emitting element disposed to overlap a driving unit and a second pixel circuit unit which drives the second light-emitting element, where the first pixel circuit unit further include a first boost capacitor.

Abstract: A wiring substrate includes: a base substrate; and a plurality of control areas on one side of the base substrate, each of the plurality of control areas extending in a first direction, the plurality of control areas being sequentially arranged in a second direction, and any one of the plurality of control areas including: a plurality of drive circuit pad groups sequentially arranged in the first direction; a plurality of functional element pad groups, each of which being electrically connected with the corresponding drive circuit pad group; a plurality of signal lines, main bodies of which extend in the first direction; and first connection lines, each of which is configured to cascade two drive circuit pad groups adjacent in the first direction, orthographic projections of the first connection lines on the base substrate not overlapping with orthographic projections of the signal lines on the base substrate.

Abstract: A display device includes a display panel including pixels connected to emission lines, a controller configured to receive a control signal, and to generate an emission start signal, a first emission clock signal and a second emission clock signal, and an emission driver configured to provide emission signals to the pixels through the emission lines in response to the emission start signal, the first emission clock signal and the second emission clock signal. The controller is further configured to determine an off period ratio for the pixels in units of two or more frame periods in response to the dimming signal. The control signal may be a dimming signal, a low power mode signal, or another type of signal indicative of operation of the display device.

Abstract: Provided are a display panel, an integrated chip, and a display device. The display panel includes a first display region, a second display region, and a pixel circuit. The pixel circuit includes a first pixel circuit and a second pixel circuit, where the first pixel circuit is connected to a light-emitting element in the first display region, and the second pixel circuit is connected to a light-emitting element in the second display region. The pixel circuit includes a drive transistor and a first presetting module, and a terminal of the first presetting module is connected to the drive transistor, where a control terminal of a first presetting module in the first pixel circuit is configured to receive a first control signal, and a control terminal of a first presetting module in the second pixel circuit is configured to receive a second control signal.

Abstract: A pixel circuit includes a current generator, a switch, and a time controller. The pixel circuit is configured in a display panel. The current generator provides a driving current, and controls the driving current according to a pulse amplitude modulation mechanism. The switch is coupled in series with the current generator and a light-emitting component, and is turned on or off according to a control signal, wherein the control signal is a pulse width modulation signal. The time controller generates the control signal, receives a set voltage, and adjusts a pulse width of the control signal according to a voltage value of the set voltage.

Abstract: A light-emitting device driving circuit is provided. The light-emitting device driving circuit includes a current source, a light-emitting device series and an input-side voltage-stabilizing circuit. The input-side voltage-stabilizing circuit is electrically connected between the current source and the light-emitting device series to provide a driving current. The input-side voltage-stabilizing circuit includes a normally-on transistor, a first resistor and a compensation capacitor. The first resistor is electrically connected to the normally-on transistor. The compensation capacitor is electrically connected to the normally-on transistor and the light-emitting device series.

Abstract: Devices and methods are provided to overdrive or underdrive a display panel to account for display pixel hysteresis due to several frames of pixel history. An electronic device may include an electronic display and processing circuitry. The electronic display includes a number of display pixels. The processing circuitry may generate image data for the display pixels. The processing circuitry may receive a current frame value of the image data targeted for a first display pixel and, based at least in part on the current frame value and a pixel history of the first display pixel—may indicate a gray level for a number of previous frames—generate a compensated value by which to drive the first pixel to overcome pixel hysteresis to reach the desired luminance at an initial response.

Abstract: There are provided display controllers and driving methods related to those described in US Published Patent Application No. 2013/0194250.

Abstract: The disclosure provides a pixel circuit, a pixel driving method, and a display device. The pixel circuit includes a driving module and a light emitting module. The light emitting module includes a first light emitting unit, a first light emitting element, a second light emitting unit, and a second light emitting element.

Abstract: A display substrate, includes: a display region. The display region includes a plurality of sub-pixels disposed on a substrate, a plurality of first signal lines extending in a first direction, and a plurality of data lines extending in a second direction. At least one sub-pixel includes a driving circuit, and the driving circuit includes a plurality of transistors and at least one storage capacitor. The transistor at least includes a first conductive layer and a second conductive layer. The plurality of first signal lines is located in a third conductive layer. The third conductive layer is located on a side of a control electrode of a transistor of the driving circuit away from the substrate.

Abstract: Embodiments of the present disclosure provide an electronic device and a display driving method. The electronic device includes a plurality of device groups and a plurality of driving elements; a first terminal of at least one device group among the plurality of device groups is coupled with a positive signal line, a second terminal of at least one device group among the plurality of device groups is coupled with an output terminal of any one of the plurality of driving elements, and a reference voltage terminal of any one of the plurality of driving elements is configured to be coupled with a reference signal line.

Abstract: A pixel circuit includes a light-emitting element, a driving circuit, a first light-emitting control circuit, a compensation control circuit and a resetting circuit. The resetting circuit is configured to write an initial voltage into the first electrode of the light-emitting element under the control of a first light-emitting control signal, the first light-emitting control circuit is configured to control the first electrode of the light-emitting element to be electrically connected to the first terminal of the driving circuit under the control of a second light-emitting control signal, and the compensation control circuit is configured to control the control terminal of the driving circuit to be electrically connected to the first terminal of the driving circuit under the control of a first scanning signal.

Abstract: A driving circuit, a driving method, a display device, and a display control method are provided. The driving circuit includes multi-stage driving units and an on/off control circuit. Each of the driving units includes an input end and a driving signal output end, and each of the driving units is configured for outputting a corresponding driving signal via the driving signal output end according to an input signal provided by the input end. The input end of a first-stage driving unit is electrically connected to a start signal end. The on/off control circuit is electrically connected to an on/off control end and input ends of the multi-stage driving units, and configured for controlling the electric connection or electric disconnection of the input ends of the multi-stage driving units under the control of an on/off control signal provided by the on/off control end.

Abstract: A timing controller includes: an image input module configured to output respective raw data according to accessed video source data; a data processing module configured to buffer the raw data in one row and splice each row of raw data into display time control data and display luminous control data; a grayscale mapping and dividing module configured to establish a mapping relationship between the display luminous control data and a high grayscale and a mapping relationship between the display time control data and a low grayscale, to output display data; and a timing control module configured to control writing of the display data.

Abstract: A pixel includes a first light source including at least one first light emitting element between a first split electrode and a second power supply; a second light source unit including at least one second light emitting element between a second split electrode and the second power supply; a driving-current generator including a first transistor between a first power supply and the first and second light source units and generating a driving current corresponding to a first data signal; a first switching unit including a first switching element between the driving-current generator and the first light source; and a second switching unit including a second switching element between the driving-current generator and the second light source unit and controlling an electrical connection between the first and second light source units in response to a second data signal.

Abstract: A display panel is provided. The display panel includes a plurality of pixels, a first main data line, a first sub data line, and a first connecting line. The first main data line is electrically connected to pixels arranged in at least two columns. The first sub data line and the first main data line are separated by M columns of pixels, and the first sub data line is electrically connected to pixels arranged in at least two other columns. The first connecting line connects the first main data line and the first sub data line.

Abstract: An object of the present disclosure is to improve flicker by reducing a luminance change according to a change in an image frequency during a variable refresh rate (VRR) operation.

Abstract: A method for displaying a play screen and an electronic device relate to the field of terminal technologies to reduce power consumption of an electronic device. The method includes: determining, by the electronic device based on a preset condition, whether the screen element in the play screen includes a second dynamic element, where the second dynamic element has a second frame rate, and the preset condition includes that: an area proportion of the second dynamic element in the play screen is less than a preset threshold, and the second frame rate is greater than the first frame rate; and when the screen element in the play screen includes the second dynamic element, displaying, by the electronic device, the play screen of the foreground application at the first frame rate.

Abstract: A display device determines a target temperature based on an average luminance of each of the panel blocks, calculates a temperature change amount of each of the panel blocks by multiplying a difference between the target temperature and a previous prediction temperature of each of the panel blocks determined before a reference period by a block temperature coefficient of the panel blocks, and calculates a current prediction temperature of each of the panel blocks by adding the temperature change amount of each of the panel blocks to the previous prediction temperature of each of the panel blocks, the panel blocks include a first panel block and second panel blocks adjacent to the first panel block, and the block temperature coefficient of the first panel block is determined based on the target temperature of the first panel block and the target temperature of each of the second panel blocks.

Abstract: A display device includes a display panel including a plurality of pixels, a current sensor that senses a sensing current that flows through the pixels, and a data compensator. The data compensator calculates a target current from an image frame of input image data using a current deviation for each position of the image frame and a current contribution ratio for each color of the image frame, and that generates a scale factor by comparing the target current and the sensing current. The display device further includes a timing controller that generates output image data by scaling grayscale values of the input image data using the scale factor; and a data driver that provides a data signal corresponding to the output image data to the pixels.

Abstract: A display device is disclosed that includes a display panel, a timing controller, and a data driver. The display panel includes a plurality of pixels. The timing controller is configured to calculate an on-pixel ratio of first image data and correct the first image data into second image data based on the on-pixel ratio. The data driver is configured to generate a data signal based on the second image data and provide the data signal to the pixels. The timing controller calculates the second image data by estimating a temperature of the display panel using the on-pixel ratio and gamma-correcting the first image data in response to the temperature.

Abstract: An electronic device may include processing circuitry configured to generate a first frame of image content and a second frame of image content. The second frame of image content is different from the first frame of image content. The electronic device may also include a display configured to display the first frame of image content at a first refresh rate. In response to receiving the second frame of image content, the electronic device may initially increase the refresh rate before tapering back to the first refresh rate while displaying the second frame of image content.

Abstract: Disclosed are a pixel circuit, a driving method, an electroluminescent display panel and a display apparatus. The pixel circuit includes: a driving control module, a first light emitting control module, a light emitting device and a first capacitor; where the first light emitting control module is coupled between the driving control module and a first electrode of the light emitting device; and the first capacitor is coupled between the light emitting control end and the first electrode of the light emitting device.

Abstract: Various embodiments disclose a method and an apparatus including a display, a memory including information on a number of duty cycles per one refresh period for emitting light by pixels of the display corresponding to each of a plurality of refresh rates of the display, and a processor, wherein the processor is configured to control the electronic device to perform an operation according to a first number of duty cycles based on the display operating at a first refresh rate, and perform an operation according to a second number of duty cycles based on the display operating at a second refresh rate, wherein the first number is less than the second number based on the first refresh rate being higher than the second refresh rate.

Abstract: A display device according to the embodiment of the present disclosure includes: a display panel that includes a display area where a plurality of pixels is disposed and a non-display area disposed around the display area; a gate driver that provides a scan signal and an emission control signal to the display panel; and a controller that drives the display panel in accordance with a refresh rate. The plurality of pixels includes a light emitting element and a pixel circuit that drives the light emitting element. The pixel circuit is driven in sets including at least one refresh period and at least one hold period in low frequency driving. The controller controls dynamically the refresh rate during the at least one set when a gradation of an image changes, and simultaneously, changes and supplies a bias voltage during the at least one hold period.

Abstract: An image display device includes a plurality of driving circuits disposed on a substrate, and a plurality of light emitting elements corresponding to a plurality of pixels respectively. Each of the plurality of driving circuits being configured to provide a driving current to each of the plurality of light emitting elements and to control the driving current by a pulse amplitude modulation and a pulse width modulation. The driving circuit being configured using TFTs.

Abstract: A driving voltage compensation circuit including a compensation circuit and a first switching circuit, the first switching circuit connects a driving element and a light emitting device, and the compensation circuit is connected to the driving element. The circuit operates according to an operational timing, the operational timing including a plurality of cycles, each cycle including at least a first time period and a second time period; during the first time period of each of the plurality of cycles, the first switching circuit is turned on, and the compensation circuit is turned off; the energy storage element releases electrical energy to provide a driving voltage to the driving element; during the second time period, the compensation circuit utilizes the received data voltage to store electrical energy for the energy storage element of the compensation circuit.

Abstract: A novel method for driving a digital display having a plurality of pixel rows includes receiving a frame of data to be written to the display in a predetermined frame time, dividing the frame time into a plurality of time intervals, defining a plurality of row groups, and defining a unique sequence for each row group to display corresponding multi-bit data words and a number of off states on the pixels of the rows of the row groups. The drive sequence of each row is offset with respect to an initial row by a unique predetermined number of off states. The predetermined numbers of off states ensure that the pixel updates of the groups do not overlap.

Abstract: A display device includes: pixels that receive data voltages corresponding to output grayscales; a sensing circuit that senses electrical states of the pixels to provide sensing information; and a grayscale converter that generates the output grayscales with respect to the pixels based on input grayscales and the sensing information, wherein the grayscale converter predicts a temperature of at least one of the pixels based on the sensing information, calculates a current control amount for the at least one of the pixels based on the predicted temperature and the input grayscales, and calculates the output grayscales for the at least one of the pixels based on the current control amount and the input grayscales.

Abstract: Provided is a timing controller. The timing controller includes: M signal output terminals, wherein the M signal output terminals are respectively connected to M signal input terminals corresponding to M source driver chips; the timing controller includes a controller, a timing transmission circuit, and a pull-down circuit. The controller is configured to control the timing transmission circuit and the pull-down circuit, such that the M signal output terminals are connected to ground in a first phase, the M source driver chips are in a low power consumption mode in the case that the M signal input terminals are connected to ground, and the first phase indicates a phase in which the M source driver chips are expected to enter the low power consumption mode.

Abstract: A projection system and method therefore related to a first projection device; a second projection device; at least one spatial modulator; and an electronic processor configured to: receive a two-dimensional video data, generate a first plurality of intensity values of a first color gamut and a second plurality of intensity values of a second color gamut, subtract a luminance threshold from a plurality of pixel values of the second color gamut to yield a plurality of positive pixel values and a plurality of negative pixel values, set respective ones of the plurality of pixel values to predetermined values to obtain a residual of the second color gamut, add the residual to the first color gamut, add maximized pixel values to the first color gamut and the second color gamut to create an output gamut, and blend the output gamut with a native color gamut to generate a blended gamut.

Abstract: A display apparatus includes: a modular display panel including a plurality of display modules; and a timing controller. Each of the plurality of display modules includes: a display panel including a pixel array and subpixel circuits; and a driving unit which drives the subpixel circuits such that inorganic light-emitting elements in the pixel array successively emit light in a first order of multiple row lines or in a second order opposite to the first order. The timing controller provides the driving unit of a first display module with first control signals for causing the inorganic light-emitting elements of the first display module to emit light in the first order, and provides the driving unit of a second display module, which is positioned above or below the first display module, with second control signals for causing the inorganic light-emitting elements of the second display module to emit light in the second order.

Abstract: A pixel including: a light emitting element; a first transistor connected between a first node and a second node, and to generate a driving current to flow from a first power line to a second power line through the light emitting element; a second transistor connected between a data line and the first node; a third transistor connected between the second node and a third node corresponding to a gate electrode of the first transistor; a fourth transistor connected between the third node and a third power line; a fifth transistor connected between the first power line and the first node; a sixth transistor connected between the second node and a fourth node corresponding to a first electrode of the light emitting element; a seventh transistor connected between the fourth node and a fourth power line; and an eighth transistor connected between the fourth node and a fifth power line.

Abstract: A pixel includes a first switching transistor, a second switching transistor, a driving transistor, and a light emitting element. The first switching transistor includes a first terminal to which a bias power supply voltage is applied, a second terminal connected to a first node, and a gate terminal to which a light emitting element initialization signal is applied. The second switching transistor includes a first terminal connected to the first node, a second terminal connected to a second node, and a gate terminal to which the light emitting element initialization signal is applied. The driving transistor includes a first terminal connected to the second node, a second terminal connected to a third node, and a gate terminal. The light emitting element is connected to the driving transistor. The first node is connected to the third node, and the bias power supply voltage is applied to the second and third nodes.

Abstract: A display apparatus includes a display panel including a pixel, a gate driver providing a gate signal to the pixel, a data driver providing a data voltage to the pixel and an emission driver providing an emission signal to the pixel. The pixel includes a driving switching element applying a driving current to the light emitting element, a storage capacitor connected to the driving switching element, a bias capacitor connected to the storage capacitor and receiving a bias gate signal, a threshold voltage compensation switching element connected to an electrode of the driving switching element and a light emitting element initialization switching element connected to an electrode of the light emitting element. A control signal applied to an electrode of the threshold voltage compensation switching element and a control signal applied to an electrode of the light emitting element initialization switching element are generated from different signal generators.

Abstract: A display panel and a driving method thereof are provided. The driving method includes: acquiring a display synchronization signal, and according to it to determine a first backlight synchronization signal including a plurality of second pulses corresponding to a plurality of first pulses in the display synchronization signal; acquiring a display setting frequency greater than a minimum value of refresh rates of frame images, and according to it to determine a unit backlight clock signal, where a duration of the unit backlight clock signal is equal to of a reciprocal of the display setting frequency; and generating a third pulse between some two adjacent second pulses to drive a backlight plate to emit light.

Abstract: A pixel driving circuit and a display panel are provided. The pixel driving circuit includes a data writing module, a data conversion module, and a current driving module. The data writing module is electrically connected to a first node and configured to transmit a data signal to the first node. The data conversion module is electrically connected to the first node, a second node, and a modulation signal source, and configured to generate a current driving control signal, and to output the current driving control signal to the second node. The current driving module is electrically connected to the second node, a light-emitting control wire, and a light-emitting device, and configured to control the light-emitting device to emit light. An effective pulse of the current driving control signal has different pulse widths in different gray-scale states.

Abstract: Reducing blinking pixels in a display includes detecting a first timing of activation of one or more emissive elements of the display, detecting a second timing of sensing pulses from a sensor arranged to detect radiation transmitted through the display, determining, based on the first timing and the second timing, a synchronized timing that staggers the activation of the one or more emissive elements of the display and the sensing pulses from the sensor, and dynamically altering, based on the determined synchronized timing, a subsequent timing of the sensing pulses from the sensor to reduce blinking of at least some of the pixels compared to blinking associated with the synchronized timing.

Abstract: An organic light emitting diode (OLED) display system comprises an OLED array and a power management system that includes at least one voltage generator for the OLED array. A timing microcontroller comprises a decoder/encoder configured to receive HDR pixel data and output display pixel data. A portion of the HDR pixel data is sampled and a luminance index value of the sampled portion is determined, where the luminance index value corresponds to a maximum luminance of the sampled portion. The luminance index value is used to control the at least one voltage generator to reduce power consumption of the OLED display system.