Abstract: Disclosed is integrated circuit panel which detects fault of a driving circuit. The integrated circuit panel includes: a driving circuit array including first and second driving circuits; a data driver configured to output first and second input data signals through first and second data lines, respectively; a switch driver configured to output a switching signal through a switch line; and an error detection driver configured to receive first and second output data signals through first and second test lines, respectively, wherein, in response to the switching signal, the first and second driving circuits are configured to output the first and second output data signals, which are based on the first and second input data signal, through the first and second test lines, respectively, and the error detection driver is configured to detect a fault of the first or second driving circuit based on the first or second output data signal.

Abstract: A liquid crystal display panel and a display device are disclosed. The liquid crystal display panel includes a pixel matrix composed of more than two sub-pixels. Three adjacent sub-pixels located in the same row have different colors, and all sub-pixels located in the same column have the same color. Each data line is connected to at least one pixel group successively. Each pixel group includes three sub-pixels with different colors, which are respectively located on both sides of the data line. In a pixel group, each data line is connected to three sub-pixels in sequence.

Abstract: A pixel circuit and a display device using a pulse width modulation generator are provided. The pixel circuit has a data latch; and a pulse width modulation (PWM) generator, which is electrically coupled to the data latch, a scan line and a counter; wherein, the pulse width modulation generator is based on the pixel data, the scan signal and a counter code generated by the counter to generate a pulse width modulation (PWM) signal. Therefore, the pixel signal can be generated in a voltage and/or current mode according to the PWM signal and connected to the corresponding pixel electrode of the pixel display medium module, so that the period time for driving the display medium by accurately controlling the voltage and/or current to precisely provide grayscale function of the display.

Abstract: The present disclosure provides a display device and a driving method. The display device includes a display panel and a backlight module, where the display panel includes a plurality of display regions, the backlight module includes x light sources, each of the plurality of display regions corresponds to one of the light sources, each of the light sources includes a plurality of light emitting units which emit light of different colors, and x is a positive integer not smaller than 2. The driving method includes, after loading data signals to subpixels in one of the display regions, turning on a light emitting unit corresponding to the one of the display regions and at the same time, loading datap signals to subpixels in a next one of the display regions which is adjacent to the one of the display regions.

Abstract: A signal-processing method for a display device, including: receiving a frame signal; and converting the frame signal into a plurality of sub-frame signals in a number of N corresponding to N different sub-frame duties, wherein N is a positive integer equal to or greater than 2. Therefore, the display device using a drive module with lower bits may have a resolution with higher bits to improve the display quality of the electronic device.

Abstract: An LED panel controlling method is applied to control an LED panel and includes a frame splitting step, a comparing and transmitting step, a laminating step and a controlling step. In the comparing and transmitting step, a plurality of previous datasets of the previous frame are stored in a transmitting module before a plurality of current datasets of the current frames are transmitted to and stored in the transmitting module, and the current datasets are compared to the previous datasets. In the laminating step, the current datasets are laminated with the previous datasets previously stored in the receiving module to form a controlling sequence. In the controlling step, the controlling sequence is received by a driving module to drive the LED row.

Abstract: A downlight apparatus has a main cup housing, a driver circuit, a first LED set, a second LED set and a light guide cup. The driver circuit is contained in the main cup housing for converting an external power to a driving current. The first LED generates a central luminous effect. The light guide cup has a top part and a bottom part. A light output pattern is formed on internal surface of the light guide cup between the top part and the bottom part. The top part receives a light of the second LED set. The light enters the light guide cup and escapes from the light output pattern.

Abstract: An active-matrix digital-drive display system includes an array of pixels. Each pixel has an output device, a serial digital memory responsive to a load timing signal for receiving and storing a multi-bit digital pixel value during an uninterrupted load time period, and a drive circuit responsive to a pulse-width-modulation (PWM) timing signal and to the multi-bit digital pixel value to drive the output device during an uninterrupted output time period. A controller external to the array of pixels provides to each pixel the load timing signal and the multi-bit digital pixel value during the load time period and the PWM timing signal during the output time period. The PWM timing signal has multiple different PWM time periods that are sequentially provided at different times to the pixels. Each PWM time period has a different temporal length corresponding to a bit of the multi-bit digital pixel value.

Abstract: Embodiments of the present disclosure provide a display driving circuit, a driving method thereof, a display driving system and a display apparatus. The display driving circuit includes a processor and a source driver. The processor is electronically connected to the source driver and configured to receive a low voltage differential signal and to output a data signal for sub-pixels of odd-numbered pixel units and a data signal for sub-pixels of even-numbered pixel units among the low voltage differential signal simultaneously to the source driver progressively.

Abstract: A method for controlling a digital display device and a digital display system implementing the method are provided in which a required luminance level for a pixel is controlled according to a store provided for each pixel, the contents of which indicate the number of discrete display update periods during an image refresh period for the pixel for which the pixel is to be illuminated to achieve the required luminance level, the content being read at each update period and the content determining whether the pixel is to be illuminated for that update period, the content being updated at each update period for which the pixel is illuminated to indicate that the number of update cycles for which the pixel is to be illuminated is thereby reduced by one and wherein the content of the store may be updated at any update cycle in response to changes in required pixel luminance level indicated by received image data.

Abstract: A signal processing circuit includes an input gamma adjuster configured to adjust gamma characteristics of an image signal and to output a gamma adjustment image signal, an image signal processor configured to generate a scaling signal corresponding to image characteristics of the gamma adjustment image signal and to convert the gamma adjustment image signal into an intermediate data signal in response to the scaling signal, and an output gamma adjuster configured to convert the intermediate data signal into a data signal on a basis of a first lookup table corresponding to a first gamma curve, a second lookup table corresponding to a second gamma curve, and the scaling signal.

Abstract: Methods for detecting and eliminating a ghosting effect of liquid crystal display (LCD) are disclosed. The ghosting effect detecting method comprises the steps of providing a visual persistency period, providing a maximum color alternation speed of the LCD, obtaining a threshold value by multiplying the human visual persistency period by the maximum color alternation speed, calculating a variation of an intensity level of each of the plurality of pixel components of the LCD and comparing the threshold value and the variation of the intensity level to obtain a comparison result to determine whether the ghosting effect exists in the pixel component.

Abstract: In order to detect a specific codec sequence being used, a signal that is based on a codec sequence is analyzed. The signal is analyzed to determine if there is a pattern in the signal. A pattern of a codec sequence can be a unique pattern of frames, frequencies and/or frequency ranges that are generated based on a specific codec sequence. The pattern is compared to one or more previously stored patterns of codec sequences to see if there is a match. If there is a match, an event is generated. For example, if a known codec sequence that has a poor signal quality is determined to be in use for a voice call, the parties may be notified that the call is likely to be a low quality voice call.

Abstract: In one embodiment, a method a method of displaying an image on a display device is described. The display device includes a plurality of clusters. Each cluster has a plurality of pixels and an independent light source associated therewith. Each of the plurality of clusters are illuminated with their associated independent light source. The plurality of pixels in a cluster are refreshed with bits of gray scale. Simultaneously with the refreshing, the light source associated with the cluster where the plurality of pixels are being refreshed is switched off. When the plurality of pixels have been refreshed, the light source is switched on with a predetermined intensity of light. Each of the clusters are refreshed at a rate that is fast enough to eliminate flicker.

Abstract: The present invention relates to a method and apparatus for generating gray scale adjustment voltages and a panel driver circuit using the same. With the method provided in the invention, said apparatus for generating gray scale adjustment voltages generates a plurality of gray-scale reference voltage groups at a given time interval T0, and provides them for, such as a data driver circuit for adjusting gray scale of pictures by means of the reference gray-scale voltages, wherein values of the gray-scale reference voltages in each gray-scale reference voltage group are different from one another, and the time interval T0 need to be less or equal to a quotient from the displaying time in each frame divided by the product of the number of pixels in the vertical direction of a display screen and the number of gray-scale reference voltage groups.

Abstract: An application control changes a first image displayed with a plurality of pixels composing the entirety or a part of a display section to an image in the first gray level displayed with the plurality of pixels, and thereafter display a second image displayed with the plurality of pixels. Also, the application control device controls an application device such that the numbers of application of the first voltage and the second voltage to each of the plurality of pixels are equal to each other from a state in which each of the plurality of pixels lastly assumes the first gray level before the first image is displayed until a state in which each of the plurality of pixels first assumes the first gray level after the first image is displayed.

Abstract: An object is to provide a display device that achieves low power consumption and an improved quality of moving and still images. A display device comprises: a display panel provided with a plurality of pixels each including sub-pixels with color filters of red, green, and blue, and a sub-pixel for controlling a transmission of white light; a backlight area including light sources of red, green, blue, and white; an image switch circuit that switches the display panel between a moving image mode and a still image mode; and a display control circuit that controls in the moving image mode a luminance of the light sources of red, green, and blue included in the backlight area, and controls in the still image mode a luminance of a light source of white included in the backlight area.

Abstract: A brightness control system enhances a displayed image. The system selectively alters the brightness of a portion of the image to improve the clarity, noticeability, and intelligibility of information provided on the display. When used with a vehicle navigation system, the brightness adjustment system may emphasize vehicle or destination location display, driving directions, route planning information, or other information provided to the driver.

Abstract: A display device includes a display panel having a plurality of source and gate lines and a plurality of pixels at intersection points of the gate lines and source lines, a gate driver configured to output a plurality of gate driving signals for driving the gate lines, a source driver configured to output a plurality of source driving signals for driving the source lines, a gray voltage generator configured to supply a plurality of gray scale voltages to the source driver, and a common voltage generator configured to generate a plurality of common voltages having different levels and to alternately supply one of the generated common voltages in sequence to the pixels per frame, the source driver being configured to output a source driving signal in response to a data signal in accordance with a level of the common voltage supplied by the common voltage generator.

Abstract: An active matrix display may include: a panel including a plurality of scan lines which transmit scan signals, a plurality of data lines which transmit data signals in response to the scan signals from the scan lines, a plurality of pixel circuits which are formed in a plurality of pixels, and each of the pixel circuits include a display element and a driving transistor driving the display element, and a power line which supplies a driving current to the driving transistor; a scan driver selectively transmitting the scan signals to the scan lines; a compensation circuit unit generating a compensation signal for compensating a voltage drop of the power line which results from a change in a total driving current flowing through the panel; and a data driver compensating the data signals using the compensation signal and transmitting compensated data signals to the data lines.

Abstract: A micro-LED display device and modulation scheme for applying image data to an imager. The micro-LED display, including a plurality of micro-LED pixels disposed in rows and columns array, may use a modulation scheme. The method includes using row write actions to write data to said rows of micro-LED pixels; and using spacing of row write actions to create grey scale modulation, wherein one spacing between sequential row write actions is at a first distance while another spacing between sequential row write actions is at a second distance greater than said first distance.

Abstract: A field-sequential display is operated in one of a color mode or a grayscale mode. In the color mode, a video source provides image content in the form of multiple-color image data having a frame rate of X Hz and a display controller uses the multiple-color image data to drive the field-sequential display so as provide multiple-color image content at the field-sequential display. In the grayscale mode, the display controller generates grayscale image data from the multiple-color image data and the display controller then drives the field-sequential display with the grayscale image data at a lower frame rate of Y Hz. While in the grayscale mode, the display controller can take advantage of the enhanced contrast provided by the grayscale image content to reduce or disable backlighting at the field-sequential display. The reduced timing requirements afforded by the lower frame rate, as well as the reduction or elimination of backlighting, can reduce power consumption compared to the color mode.

Abstract: A display device includes: a display section including scan lines, power lines, signal lines, and pixels, each having a light emitting element and a pixel circuit which has a first transistor controlling a current in the light emitting element, and a second transistor writing a voltage on the signal line to the first transistor; and a driver section driving the pixels. Each power line is provided for each unit of pixel rows. The driver section sequentially applies a first pulse signal for inactivating the light emitting element to each of the scan lines in a pixel row unit, and applies one or more second pulse signals for activating the second transistor to at least a scan line corresponding to a pixel row to be inactivated first in the pixel row unit while a non-gray-scale signal is applied to each signal line.

Abstract: Ink rendering techniques are described. In an implementation, an input is recognized by one or more modules that are executable on one or more processors of a computing device as an ink stroke to be rendered by a display device of the computing device. The ink stroke is built by the one or more modules using a strip of triangles and the strip of triangles is sent to a graphics processing unit to render the ink stroke.

Abstract: Disclosed are a display apparatus and a control method thereof, the display apparatus including: a display unit which includes a plurality of pixels with an organic light emitting diode (OLED); a power supply which supplies power to the display unit; an image processor which processes an image signal in accordance with the plurality of pixels; and a controller which divides the frame into a plurality of sub-frames, assigns bit weights to each of the divided sub-frames, and controls the power supply to supply a voltage which is adjusted by the assigned bit weights in accordance with the sub-frames to the display unit.

Abstract: Reference voltages of a reference voltage ensemble are classed into first to (z×S+1)th reference voltage groups, where S is a power of 2 inclusive of 1 and z is a power of 2 plus 1. A decoder includes first to (z×S+1)th sub-decoders provided in association with the first to (z×S+1)th reference voltage groups, and a (z×S+1) input and 2 output type sub-decoder. The first to (z×S+1)th sub-decoders select, from the reference voltage of the first to the (z×S+1)th reference voltage groups, those reference voltages allocated to columns in a two-dimensional array of the reference voltages associated with the values of a first bit group of an input digital signal. The (z×S+1) input and 2 output sub-decoder receives outputs of the first to (z×S+1)th sub-decoders to select the first and second voltages from the reference voltages selected by the first to (z×S+1)th sub-decoders in response to the value of a second bit group of the input digital signal.

Abstract: An active matrix display device has a column driver circuit for providing pixel drive signals to columns of pixels, and comprising current source circuits. Each current source circuit has a supply switch (78) for controlling the time during which the current source supplies current to or drains current from the column. A mapping means (74) derives from a pixel drive level a digital value which represents a time period for the control of the supply switch (78) of each current source circuit. The mapping means (74) implements a single mapping function for use in providing the digital values for all current source circuits. Having a current source circuit for each column facilitates the application of inversion patterns. The conversion of pixel drive levels to values representing time is carried out in a shared manner, so that the required area is kept to a minimum.

Abstract: An AMOLED display panel comprising a plurality of color elements in each pixel with each of the color elements comprising a discrete plurality of illuminating units associated with a plurality of transistors operating in a binary mode. The plurality of illuminating units have different sizes in accordance with 2n size, where n is the illuminating unit's number. n may also be the bit position of the bit line that controls the illuminating unit. The collective luminance of each color element can be digitally controlled by selectively activating a combination of the discrete illuminating units to their nominal luminance. The discrete plurality of illuminating units in each pixel may be directly controlled by RGB pixel data without the requirement for digital analog conversion.

Abstract: A multi-frame overdriving circuit for use in a liquid crystal display including a counting unit and a multi-frame overdriving unit is provided. The counting unit counts a number m of frame periods for which a pixel data corresponding to a pixel keeps a first gray value, wherein m is a positive integer. When the pixel data changes to a second gray value from the first gray value in a first frame period, the multi-frame overdriving unit respectively outputs y multi-frame overdriving pixel data corresponding to the pixel within successive y frame periods starting from the first frame period. The y multi-frame overdriving pixel data are related to the first gray value, the second gray value and the number m of frame periods, wherein y is a positive integer.

Abstract: An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage.

Abstract: Determining video content type of a video displayed on a LCD and triggering adjustment in drive power of the LCD based on the video content type. The video content type indicates relative content motion of the video. A video content type detection module is one or combination of a software and a hardware and directs the LCD to be driven relative slower or faster based upon video content. The module independently or in conjunction with another module identifies an active window from a plurality of windows corresponding to a plurality of applications running on the host device and sets the drive power of the LCD based on speed of a video displayed on the active window. The module may also adapt LCD drive power based upon user input and/or remaining battery life.

Abstract: A method and system providing boundary dispersion to pixel values displayed on a binary spatial light modulator to reduce temporal contouring artifacts. Pixel code values are offset from a nominal value when displayed on the SLM to disperse a large bit transition for a pulse width modulation (PWM) system. The offset value varies as a function of the pixel digital code, the pixel spatial location on the screen, and pixel temporal location in time. The set of offsets applied to pixels is varied over a repeating sequence of 2 displayed frames.

Abstract: A display apparatus includes a first pixel including a first pixel electrode connected to first data and gate lines, a second pixel including a second pixel electrode connected to a second data and gate lines, a third pixel including a third pixel electrode connected to a third data line and the first gate line, a fourth pixel including a fourth pixel electrode connected to a fourth data line and the second gate line, a fifth pixel including a fifth pixel electrode connected to a fifth data line and the second gate line, a sixth pixel including a sixth pixel electrode connected to a sixth data line and the first gate line, a seventh pixel including a seventh pixel electrode connected to a seventh data line and the second gate line, and an eighth pixel including an eighth pixel electrode connected to an eighth data line and the first gate line.

Abstract: A display uses x illuminator systems to produce x primary colors and y overlap colors, which are combinations of primary colors, to illuminate a spatial light modulator in a display system. A first set of n duty cycles for the x primary colors over a frame is provided, wherein the display system can select any one of the duty cycles to produce a desired white point. A second set of n duty cycles of x+y colors over a frame corresponding to the first set of duty cycles is determined, where the second set of duty cycles are generated responsive to a specified desired allocation of the frame to the y overlap colors, such that each of the overlap colors can be displayed from a dark shade to a bright shade while maintaining a constant color point.

Abstract: It is an object to provide a driving method of a display device capable of reducing pseudo contours while increase in the number of sub-frames is suppressed as much as possible. In a driving method of a display device where one frame is divided into a plurality of sub-frames to display a gray scale, the plurality of sub-frames has a plurality of middle-order sub-frames each of which has a middle-degree weighting and is used for an overlapping time gray scale method, at least one high-order sub-frame which has a larger weighting than that of the middle-order sub-frame and is used for a binary code time gray scale method, and at least one low-order sub-frame which has a smaller weighting than that of the middle-order sub-frame and is used for a binary code time gray scale method.

Abstract: A driver circuit for driving at least a pixel of a displayer, including an output stage, a calibration device and a surge suppression device. The output stage is coupled to the pixel and controlled by a pixel signal to switch an output voltage on the pixel between a high level and a low level. The calibration device is coupled between the output stage and the pixel and comprises an input end controlled by a bias voltage to calibrate an equivalent resistance of the calibration device for further calibrating a brightness level of the pixel. The surge suppression device is coupled between the input end of the calibration device and the pixel signal, and is used to suppress surges in the bias voltage which occur due to switching of the output voltage.

Abstract: A color display device including: at least one spatial light modulation element forming a display picture by modulated light obtained by modulating illumination light, a color sequential light generation device changing in a time series the illumination light or the modulated light into multiple groups of different color lights in one frame of a display period of the display picture, a control device controlling the spatial light modulator, and a color sequential light generation device based on the input picture data. The control device controls the spatial light modulator and the color sequential light generation device to change the ratio of the display time of each color of the reflected light time-shared in the display period of the frame depending on the character and/or the set value of the input picture data.

Abstract: A pixel circuit and an organic light-emitting diode (OLED) display using the pixel circuit is provided. The pixel circuit includes: an OLED; a third N-channel metal-oxide semiconductor (NMOS) transistor coupled to a data line and a first scan line and configured to apply a data signal to a first node; a storage capacitor having one terminal coupled to the first node and the other terminal coupled to a second node; a fourth NMOS transistor coupled between a first power and the second node and configured to apply a voltage of the first power to the second node; a first NMOS transistor having a first electrode, a second electrode, and a gate electrode coupled to the second node; and a second NMOS transistor coupled between the second node and the first electrode of the first NMOS transistor and configured to diode-connect the first NMOS transistor.

Abstract: In a display using a time gradation method, as the number of the subframes in one frame period increases, the number of writings of video data to a pixel and the operating quantity of a driver circuit of the display increase so that power consumption increases. In a display device of the invention, one frame period is divided into n subframe periods using a display controller, the subframe periods are made to emit light or not, to express m-bit gradation by the total sum of lighting time in one frame period, and the number of subframe periods n provided in one frame period and the number of gradations m capable of being expressed are changed corresponding to each row arranged in matrix.

Abstract: A method and system for converting color image data (data outputting from element 202) from a, for example, three-dimensional color space format to a format usable by an n-primary display (206), wherein n is greater than or equal to 3. The system (converter 204) may define a two-dimensional sub-space having a plurality of two-dimensional positions, each position representing a set of n primary color values and a third, scaleable coordinate value for generating an n-primary display input signal (signal inputting toi display 206). Furthermore, the system may receive a three-dimensional color space input signal including out-of range pixel data not reproducible by a three-primary additive display, and may convert the data to side gamut color image pixel data suitable for driving the wide gamut color display.

Abstract: Examples of systems and methods are provided for converting an analog input signal to a digital output signal. A system may include a current mode (CM) digital-to-analog converter (DAC) circuit to provide a DAC current. A comparator circuit may be configured to generate a comparator signal in response to an error signal determined based on the DAC current and the analog input signal. A successive approximation register circuit may be configured to generate at least one of a DAC-code signal or the digital output signal, in response to the comparator signal. The DAC-code signal may be used by the CM DAC circuit to control the DAC current.

Abstract: An integrated circuit device includes first to Nth memory blocks disposed along a first direction, a power supply circuit, and a data driver disposed in a second direction with respect to the first to Nth memory blocks. The power supply circuit includes an analog reference power supply voltage output circuit that outputs an analog reference power supply voltage. The analog reference power supply voltage output circuit is disposed between an Mth memory block and an (M+1)th memory block among the first to Nth memory blocks. An analog reference power supply line is provided in an area of the data driver along the first direction.

Abstract: This application is directed to driving methods for electrophoretic displays. The driving methods comprise grey level waveforms which greatly enhance the pictorial quality of images displayed. The driving method comprises: (a) applying waveform to drive each pixel from its initial color state to the full first color then to a color state of a desired level; or (b) applying waveform to drive each pixel from its initial color state to the full second color then to a color state of a desired level.

Abstract: A plasma display device includes an image signal processing circuit having a sequential addressing processing circuit, an alternate addressing processing circuit and an image data selection circuit. The sequential addressing processing circuit includes a sequential addressing array unit for converting an image signal into image data arranged in the order corresponding to a sequential address operation. The alternate addressing processing circuit includes an alternate addressing array unit for converting an image signal into image data arranged in the order corresponding to an alternate address operation. The image data selecting circuit selecting between the sequential and alternate addressing operations based on predicted power consumption.

Abstract: The illumination apparatus includes: a light emitting unit includes scanning lines, data lines crossing the corresponding scanning lines, and light emitting areas connected between the scanning lines and the data lines, where the light emitting areas include a first light emitting area including at least two first organic light emitting devices emitting a first color and a second light emitting area including at least two second light emitting devices emitting a second color different from the first color; and a driving unit non-simultaneously driving the first light emitting area and the second light emitting area to emit light during a frame. The method of driving the illumination apparatus includes individually emitting light from the first and second light emitting areas by respectively applying data signals to the first and second light emitting areas via the data lines connected thereto during a frame.

Abstract: An LCD has a drive power supply structure simplified to simplify manufacturing processes of LCDs and to reduce manufacturing costs thereof. The LCD includes a liquid crystal panel, a drive unit, a controller, a backlight drive unit, and a drive voltage generator. The liquid crystal panel includes image display regions. The drive unit drives gate and data lines in the panel. The controller controls the drive unit using image data and synchronization signals from outside. The drive voltage generator is provided on a system or at least one source printed circuit board on which at least one of the drive unit or the controller is formed and converts a voltage level of a drive power provided from outside to generate drive powers of different voltage levels and provides the drive powers to the drive unit, the controller, and the backlight drive unit.

Abstract: Methods and devices for generating grayscale using digital pulse width modulation between optical states. Grayscale may be generated for each component color using multiple algorithm cycles per display field. Subsets of binary weighted bit values for data values of each component color may be split across algorithm cycles to reduce the number of data comparisons per color per display field. The total number of data comparisons per color per display field may be reduced by half or more.

Abstract: A LCD display device includes a LCD panel including a plurality of LCD units with trapezoid structure, and three sides of the LCD unit all include three liquid crystal molecules (LCM), the LCMs of all of the first side of the LCD unit constitute a first LCM array and form a first display interface, the LCMs of all of the second side constitute a second LCM array and form a second display interface, and the LCMs of all of the third side constitute a third LCM array and form a third display interface. The LCD display device also includes three signal conversion modules configured to convert three display signals into three control signals respectively, and three driving modules configured to drive the three LCM arrays according to the control signals and cause the first, the second, and the third display interface to display corresponding images.

Abstract: A display system includes a driver for operating a panel having a plurality of pixels arranged by a plurality of first lines and at least one second line The driver includes a driver output unit for providing to the panel a single driver output for activating the plurality of first lines, the single driver output being demultiplexed on the panel to activate each first line.

Abstract: A field-sequential display is operated in one of a color mode or a grayscale mode. In the color mode, a video source provides image content in the form of multiple-color image data having a frame rate of X Hz and a display controller uses the multiple-color image data to drive the field-sequential display so as provide multiple-color image content at the field-sequential display. In the grayscale mode, the display controller generates grayscale image data from the multiple-color image data and the display controller then drives the field-sequential display with the grayscale image data at a lower frame rate of Y Hz. While in the grayscale mode, the display controller can take advantage of the enhanced contrast provided by the grayscale image content to reduce or disable backlighting at the field-sequential display. The reduced timing requirements afforded by the lower frame rate, as well as the reduction or elimination of backlighting, can reduce power consumption compared to the color mode.