Abstract: An accessory detachably attached to an electronic apparatus includes an accessory processing unit communicable with an electronic apparatus by a first communication method as communication via a first contact group, and by a second communication method as communication via a second contact group different from the first contact group. The accessory processing unit controls the communication by the second communication method based on information communicated by the first communication method, executes communication via a second contact included in the second contact group in the second communication method, in response to a change in a signal level of a signal via a first contact included in the second contact group from a first signal level to a second signal level, and executes communication by the second communication method based on information on the second signal level included in the information communicated by the first communication method.

Abstract: A light detection device detects an incident position of light. The plurality of pixels are arranged two-dimensionally in a matrix and individually have a first photosensitive portion and a second photosensitive portion. The first circuit connects a plurality of first photosensitive portions to each other for every row. The second circuit connects a plurality of second photosensitive portions to each other for every column. The first reading unit reads signal data through the first circuit. The second reading unit reads signal data through the second circuit. The first circuit includes row switches arranged to switch electrical connection and disconnection between first photosensitive portions adjacent to each other in the same row.

Abstract: The present disclosure relates to an image capturing element, a drive method, and an electronic device capable of speeding up operation mode switching. The image capturing element includes a pixel region in which a plurality of pixels is disposed in a matrix of rows and columns, and a vertical drive circuit that drives the pixels on each row. The vertical drive circuit includes a positive power source and a negative power source that supply electrical power to an output element that outputs a drive signal for driving each pixel, and a control element that controls current flowing between each wire through which electrical power is output from the positive power source or the negative power source and a ground level based on a pulse having a predetermined pulse width at operation mode switching. The present technology is applicable to an image capturing element having a plurality of operation modes.

Abstract: To improve an SN ratio in a solid-state imaging element provided with a capacitance for reducing a noise component. A first capacitance connection circuit connects one end of a first capacitance to a first signal line in a case where a first pixel signal is transmitted via the first signal line. A second capacitance connection circuit connects one end of a second capacitance to a second signal line in a case where a second pixel signal is transmitted via the second signal line. An intercapacitance connection circuit connects one end of each of the first capacitance and the second capacitance in a case where one of the first pixel signal and the second pixel signal is transmitted, and disconnects one end of each of the first capacitance and the second capacitance in a case where both the first pixel signal and the second pixel signal are transmitted.

Abstract: An imaging device includes: a pixel array including pixels including a first pixel and a second pixel, each of the pixels including a photoelectric converter that converts light into charge, the photoelectric converter including a first electrode, a second electrode facing the first electrode, and a photoelectric conversion layer between the first electrode and the second electrode; and an addition circuit that adds together a signal generated in the first pixel and a signal generated in the second pixel.

Abstract: A method for preprocessing camera raw data of an image sensor of a camera. The method includes a step of reading in, a step of setting, a step of reducing, and a step of outputting. In the step of reading in, a raw data signal is read in, which encompasses camera raw data detected by the image sensor at a detection point in time. In the step of setting, a preprocessing algorithm for reducing the resolution of the camera raw data is set, using at least one setting signal. In the step of reducing, the resolution of the camera raw data is reduced, using the preprocessing algorithm set in the step of setting, to obtain a preprocessed camera signal which represents a preprocessed camera image. In the step of outputting, the preprocessed camera signal is output to an image processing unit.

Abstract: In an imaging device, a difference calculation unit calculates a differential signal between charge signals that have been accumulated and are held by first and charge holding units with different timings. A multiple sampling unit performs multiple sampling processing on the differential signal, and an analog digital conversion unit converts a signal that has undergone multiple sampling processing to a digital signal. That is, multiple sampling processing is performed on a differential signal with a higher sparsity than that of an image signal.

Abstract: A solid-state imaging device which, in a voltage mode, simultaneously samples the pixel signal in all the pixels in a signal holding part serving as the pixel signal storage part, reads converted signals corresponding to readout signals held in a first signal holding capacitor and a second signal holding capacitor to a first signal line, reads converted signals corresponding to readout reset signals simultaneously in parallel to the second signal line, and supplies the same as a differential signal to a column readout circuit. Due to this, a sufficiently low parasitic light sensitivity corresponding to the application can be realized, settling error can be suppressed, and pixel fixed pattern noise can be reduced.

Abstract: The present invention relates to a semiconductor device, a solid-state image sensor and a camera system capable of reducing the influence of noise at a connection between chips without a special circuit for communication and reducing the cost as a result. The semiconductor device includes: a first chip; and a second chip, wherein the first chip and the second chip are bonded to have a stacked structure, the first chip has a high-voltage transistor circuit mounted thereon, the second chip has mounted thereon a low-voltage transistor circuit having lower breakdown voltage than the high-voltage transistor circuit, and wiring between the first chip and the second chip is connected through a via formed in the first chip.

Abstract: A CMOS photodiode device for use in a dual-sensitivity imaging pixel contains at least two areas of differential doping. Transistors are provided in electrical contact with these areas to govern operation of signals emanating from the photodiode on two channels, each associated with a different sensitivity to light. A plurality of such photodiodes may be incorporate into a shared arrangement forming a single pixel, in order to enhance the signals.

Abstract: A solid-state image pickup device which is configured not to require transfer of signal charges between pixels performs TDI. An output control section 5 sequentially assigns a pixel signal output processing period to each pixel array group 10 in the order of the vertical direction at an interval of one horizontal processing period H obtained by dividing one frame period T into three. The one frame period T is a period when each pixel array 100 is moved in the vertical direction. An adder 50 sums up a pixel signal held in a signal holding portion 41_X, and a pixel signals held in a signal holding portion 41_R, 41_G, 41_B corresponding to the pixel signal under the control of the output control section 5, and outputs the summation result to an A/D converter 60.

Abstract: The solid-state imaging device includes a D/A converting circuit generating a reference voltage to be used for an A/D conversion. The D/A converting circuit includes: a voltage generating circuit generating an analog voltage according to a digital signal; a buffer circuit (a resistor ladder upper voltage supplying buffer circuit) which buffers the generated analog voltage, the buffer circuit sampling and holding a bias voltage generated inside the buffer circuit, and outputting the buffered analog voltage using the held bias voltage; an analog signal outputting unit (a resistor ladder unit) outputting the reference voltage according to the inputted digital signal, by receiving an output from the buffer circuit; and a pre-charge amplifier which charges a noise-reducing capacitor in conjunction with the sampling and holding by the buffer circuit, the noise-reducing capacitor being connected to the analog signal outputting unit.

Abstract: The present technology relates to an image sensor and a control method for an image sensor which are capable of measuring illuminance of each color in an image sensor. Each of a plurality of pixel units includes a pixel and a reset transistor, and the pixel includes a photoelectric converting unit that performs photoelectric conversion on light of a certain color incident through a color filter and a transfer transistor that transfers charges obtained by the photoelectric conversion of the photoelectric converting unit and is controllable for each color. According to control of the transfer transistor, the charges are read from the photoelectric converting unit through the transfer transistor and the reset transistor, and a voltage corresponding to the charges is supplied to an AD converting unit connected to the reset transistor. The present technology can be applied to, for example, an image sensor that photographs an image.

Abstract: A spatial binning method for re-sampling a binned image generated by pixel binning includes at least the following steps: receiving a raw image; pixel binning the raw image to generate a binned image; and re-sampling the binned image spatially to generate a re-sampled image according to the values and positions of the pixels of the binned image. A spatial binning circuit, comprising: a binning unit for receiving a raw image to generate a binned image; and a re-sampling unit for receiving the binned image and re-sampling the pixels of the binned image according to the values and positions of the pixels of the binned image.

Abstract: An imaging device comprising an imaging optical system, a lens movement mechanism, an imaging element, a first interpolation device, a second interpolation devices, a photographic image generation device, a split image generation device using a first image formed by the outputs of the first phase difference pixels and the first interpolation pixels and a second image formed by the outputs of the second phase difference pixels and the second interpolation pixels to generate a split image, and a display device displaying the photographic image generated by the photographic image generation device, the display device displaying the split image generated by the split image generation device in a display area of the photographic image.

Abstract: A signal sampling circuit includes: a signal output unit configured to output a level signal to an output node in response to a control signal; a signal sampling unit coupled to the output node and configured to sample the level signal in a sampling period; a first current sinking unit configured to sink a constant current from the output node; and a second current sinking unit configured to sink a current from the output node after a time point where the control signal is deactivated.

Abstract: An imaging system includes an A/D converter including a holding unit holding a pixel signal as a voltage level, a comparator comparing the voltage level held with a reference level, a circuit capable of changing the voltage level so as to approach the reference level at first and second rates, wherein the voltage level is changed at the first rate to determine higher bits in accordance with inversion of a relationship between the reference level and the voltage level, after that, the voltage level is changed at the second rate to determine lower bits in accordance with inversion of the relationship between the reference level and the voltage level, and an adjusting unit which adjusts the voltage level during a period until the voltage level is changed at the second rate after determination of the higher bits so that the lower bits and the voltage level hold a linear relationship.

Abstract: Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.

Abstract: In a solid-state image sensing element which includes a pixel array portion in which a plurality of pixels each including a photoelectric converter are arranged two-dimensionally, and readout circuits which read out analog pixel signals from the pixel array portion by column, and in which each of the readout circuits includes an A/D conversion circuit which converts the analog pixel signal from the pixel array portion into a digital pixel signal, and the A/D conversion circuit performs A/D conversion by comparing, by a comparison unit, a signal level of the analog pixel signal from the pixel array portion with a temporally changing reference level, a frequency band characteristic of the comparison unit is switched in accordance with the signal level of the analog pixel signal from the pixel array portion.

Abstract: Disclosed herein is an imaging device including: a plurality of pixels disposed to form a matrix having pixel rows, the pixels including a pixel electrode formed on a silicon substrate for one of the pixels by being separated away from another pixel electrodes formed for one of the other pixels, a photoelectric conversion film formed on the pixel electrode, and an opposite electrode formed on the photoelectric conversion film; and a driving section configured to apply an electric potential to the photoelectric conversion film on each of the pixel rows at least having read timings different from each other with a predetermined timing outside an exposure period of the pixels in a direction opposite to that of an electric potential applied to the photoelectric conversion film during the exposure period of the pixels.

Abstract: A pixel is provided with a photodiode region which includes a photoelectric conversion portion for receiving light and generating electrons, and a charge storage portion for storing electric charge. The pixel is configured in such a manner that an electron exclusion region is provided in the photodiode region with the diameter of a circle having the maximum diameter among circles that can exist in the surface of a region through which electrons can pass in the photodiode region as the width of an electron passage region in the photodiode region, and the width of the electron passage region is smaller than when the electron exclusion region is not provided.

Abstract: An image sensor for reducing a sampling time by shortening a stabilization duration is provided. The image sensor includes a pixel unit, a sampling unit sampling a signal from an output node of the pixel unit, a sinking unit sinking current from the output node of the pixel unit, and a current controller controlling the amount of current in the sinking unit.

Abstract: To reduce the number of capacitative elements on a chip to decrease a surface ratio of a peripheral circuit section including capacitative elements to a pixel array section, while maintaining noise resistance of signals high. There is provided a solid-state imaging device including: a plurality of unit pixels; a plurality of transfer lines; and a plurality of switches, wherein each of the unit pixels includes a photoelectric conversion element and a charge voltage conversion element, and outputs respectively a noise voltage generated when the charge voltage conversion element is reset and a signal-noise sum voltage obtained by adding to the noise voltage a signal voltage generated by photoelectric conversion to the other transfer lines that are connected via the switches to the transfer line to which the pixel group including the unit pixel belongs.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to emitted radiation or light. The image capturing operation includes a first image capturing operation in which the detector is scanned in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in which the detector is scanned in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an initialization operation to initialize the conversion element during a period between the first image capturing operation and the second image capturing operation in accordance with switching from the first scanning area to the second scanning area.

Abstract: A pixel 10 includes a photodiode PD which is provided between a first barrier region 21 forming a first potential barrier B1 and a second barrier region 27 forming a second potential barrier B2, a first floating diffusion region F1 which is provided adjacent to the first barrier region 21, and to which a first electric charge generated in the photodiode PD is transferred, and a second floating diffusion region F2 which is provided adjacent to the second barrier region 27, and into which a second electric charge generated in the photoelectric conversion region PD flows, and in which a part of the flowing-in second electric charge is accumulated. The second potential barrier B2 is lower than the first potential barrier B1.

Abstract: An image sensing device includes a first circuit unit configured to convert an image signal provided from a first pixel into a digital value and generate first image data, a second circuit unit configured to convert an image signal provided from a second pixel into a digital value and generate second image data, and a processing unit configured to receive the first image data and the second image data at a substantially same time and sequentially output the first image data and the second image data according to a predetermined speed.

Abstract: An apparatus and method for forming a digital image are disclosed. The apparatus includes a plurality of pixel sensors and a controller. Each sensor includes a photodiode, a floating diffusion node that can be selectively connected to said photodiode or a reset voltage, and an analog-to-digital converter (ADC) connected to the floating diffusion node, the ADC converting a voltage on the floating diffusion node to a digital value. Each pixel sensor also includes an output circuit that connects the ADC to a bus. The apparatus also includes a controller that causes the ADCs to operate in parallel to convert the voltages on the floating diffusion nodes to the digital values in a time that is less than the time needed for the floating diffusion node to acquire ten electron equivalents of noise. The optional apparatus includes circuitry that allows correlated double sampling to be performed in each sensor.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: A solid-state imaging device includes: a pixel array unit with pixels, each of the pixels including a photoelectric conversion element that generates a charge and a memory that holds the charge; and an AD conversion unit that converts a pixel signal corresponding to the charge output from the pixel into a count value. The pixel transfers the charge held in the memory in the nth frame and sequentially outputs, in the nth+1 frame, a first pixel signal corresponding to the charge held in the memory and a second pixel signal corresponding to a charge generated by the photoelectric conversion element after the previous charge has been transferred to the memory. In the nth+1 frame, the AD conversion unit changes its up/down count direction between the first and second pixel signals to obtain their count values so as to successively perform AD conversion on the first and second pixel signals.

Abstract: The present disclosure provides a solid-state image pickup element, including, a pixel portion in which plural pixels each carrying out photoelectric conversion are disposed in a matrix, and a pixel signal reading portion having a function of reading out pixel signals from the pixel portion to signal lines, and sampling reset levels and signal levels of the pixels, wherein the pixel signal reading portion includes column processing units converting analog signals read out into digital signals in correspondence to a column disposition of the pixels, respectively, and each of the column processing units carries out the sampling for the reset level of the pixel plural times, and averages a result of the sampling after the result of the sampling is integrated in a digital integrating circuit within each of the column processing units.

Abstract: There is provided a solid-state imaging device including a pixel array section having a plurality of unit pixels two-dimensionally arranged therein, the unit pixels including at least a photoelectric conversion section, a charge holding section, a transfer section, and a reset section, and a drive control section which controls driving of the unit pixels in a manner that a voltage as a signal level and a voltage as a reset level are each read out serially per row. The drive control section controls readout of the voltage of the charge holding section in accordance with initialization of the charge holding section performed by the reset section before the charge transfer by the transfer section.

Abstract: An image-pickup apparatus including a detector comprising a detecting unit and a reading circuit, the detecting unit including pixels, each of which including a conversion element, the reading circuit which includes a connecting unit that is electrically connected to a signal wire transferring an electric signal and that electrically connects the signal wire to a node, and which performs a reading operation to output the electric signal from the pixel. A control unit controls an operation of the reading circuit, and a sensing unit senses the end of radiation irradiation based on an output of the reading circuit, which is acquired during the period of an accumulation operation of the detector. The control unit starts establishing the electrical connection between the signal wire and the node through the connecting unit based on the sensed irradiation end, and retains the electrical connection until the start of the reading operation.

Abstract: The claimed subject matter provides systems and/or methods that facilitate mitigating an impact resulting from mismatch between signal chains in a CMOS imaging System-on-Chip (iSoC) sensor. Two-by-two pixel structures can be a basic building block upon which a pixel array is constructed. Further, each two-by-two pixel structure can be associated with a read bus that carries a sampled signal to a top end and a bottom end of a chip. Moreover, multiplexers at either end of the chip can select a subset of the read buses from which to receive a subset of the sampled signals. Accordingly, pixels in a first color plane can be read, processed, etc. on the same side of the chip (e.g., utilizing a common signal chain), while pixels in at least one second color plane can be read, processed, etc. on the other side of the chip (e.g., employing a differing signal chain).

Abstract: A Charge-Coupled Device (CCD) image sensor includes a linear array of photodetectors. The photodetectors in the linear array are arranged into distinct sub-arrays with each sub-array including two or more photodetectors. An output channel is connected to each sub-array of photodetectors. Each output channel includes a horizontal CCD shift register and an output structure connected to an end of the horizontal CCD shift register in a linear arrangement with respect to each other. Each successive output channel is disposed on an alternate side of the linear array. Every other output channel is disposed on an alternate side of the linear array. One or more dark reference pixels can be connected to one or more additional shift register elements in the horizontal CCD shift registers.

Abstract: The present invention relates to a solid-state imaging device, etc., having a structure which enables to obtain an image with higher resolution by correcting pixel data even when any one of row selecting wirings is disconnected. A solid-state imaging device (1) comprises a photodetecting section (10), a signal reading-out section (20), a controlling section (30), and a correction processing section (40). The photodetecting section (10) has M×N pixel portions P1,1 to PM,N two-dimensionally arrayed in M rows and N columns, and each of the pixel portions P1,1 to PM,N includes a photodiode which generates charges of an amount corresponding to an incident light intensity and a reading-out switch connected to the photodiode. Charges generated in each of the pixel portions P1,1 to PM,N are inputted into an integrating circuit Sn through a reading-out wiring LO,n.

Abstract: At a transfer electrode to which a normally low transfer pulse is applied, the time period in which the negative potential is applied is long, and an electric field is applied to a gate insulating film, such that the device's reliability decreases. To overcome this drawback, a negative side potential (VL?) of a normally low vertical transfer pulse (V?3, V?4) is set smaller in the absolute value than a negative side potential (VL) of a normally high vertical transfer pulse (V?1, V?2). Thereby, while the influence of increase in the dark current is being suppressed, the electric field being applied to the gate insulating film is reduced.

Abstract: A solid-state imaging device 1 is provided with a plurality of photoelectric converting portions 3 and first and second shift registers 9, 13. Each photoelectric converting portion 3 has a photosensitive region 15 which generates a charge according to incidence of light and which has a planar shape of a nearly rectangular shape composed of two long sides and two short sides, and a potential gradient forming region 17 which forms a potential gradient increasing along a predetermined direction parallel to the long sides forming the planar shape of the photosensitive region 15, in the photosensitive region, 15. The plurality of photoelectric converting portions 3 are juxtaposed along a direction intersecting with the predetermined direction. The first and second shift registers 9, 13 acquire charges transferred from the respective photoelectric converting portions 3 and transfer them in the direction intersecting with the predetermined direction to output them.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: An imaging system comprises an image sensing apparatus including a pixel array, a row selection unit, and a readout unit; and a supply unit including a plurality of A/D converting units, and a transfer unit. The supply unit supplies a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives signals from the pixels in the pixel array by means of the transfer unit, and does not supply a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives no signals from the pixels in the pixel array by means of the transfer unit, in a 1-line period. The readout unit A/D-converts the signals from the pixels in the pixel array using the A/D converting unit supplied with the power supply voltage by the supply unit, and outputs a digital image signal.

Abstract: A solid-state image sensor includes: a transfer control section configured to control charge transfer from the vertical transfer section to the horizontal transfer section. The transfer control section has a plurality of unit control sections corresponding to the transfer packets. The unit control section has a vertical transfer channel and a plurality of control section electrodes formed over the vertical transfer channel. The control section electrodes include a signal charge accumulating electrode and a transfer inhibiting electrode, which are sequentially formed from a side of the vertical transfer section. The vertical transfer channels are independently connected to a horizontal transfer channel. When stopping the charge transfer from the vertical transfer section to the horizontal transfer section, a high-level voltage is applied to the signal charge accumulating electrode, and a low-level voltage is applied to the transfer inhibiting electrode.

Abstract: An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a pixel to an adjusted saturation voltage to determine if the pixel is saturated. If the pixel is saturated, the signal output from the pixel is replaced with an analog voltage having a maximum value corresponding to a brightest pixel in the image.

Abstract: A solid-state imaging device includes: a plurality of pixel circuits each including a photoelectric conversion element; reading signal lines connected to the pixel circuits; a reference signal output circuit outputting a reference signal whose voltage level varies; a reference signal line connected to the reference signal output circuit; and comparators each having a first input terminal and a second input terminal and each inverting its output depending on a voltage relation of the first input terminal and the second input terminal, wherein the first input terminals of some of the comparators are connected to the reading signal lines and the second input terminals thereof are connected to the reference signal line, and wherein the first input terminals of the other of the comparators are connected to the reference signal line and the second input terminals thereof are connected to the reading signal lines.

Abstract: A imaging-device driving unit, comprising a signal generator, a detector, and a controller, is provided. The imaging-device driving unit drives an imaging device that has a charge-transfer channel. The charge-transfer channel transfers the signal charges at a speed according to a frequency of a channel-driving signal. The signal generator generates one among a normal transfer signal, and a first and second discharge signals. The first discharge signal is the channel-driving signal whose frequency is determined for discharging an electrical charge remaining in the charge-transfer channel and greater than that of the normal transfer signal. The detector detects a remaining power. The controller orders the signal generator to generate the first discharge signal if the electrical charges remaining in the charge-transfer channel should be discharged and the remaining power is less than a threshold.

Abstract: A CMOS image sensor in which each column of pixels is connected to a signal line that is coupled to a current source, and each pixel includes a charge amplifier having a common source configuration arranged such that a charge generated by its photodiode is amplified by the charge amplifier and transmitted to readout circuitry by way of the signal line. In one embodiment the charge amplifier utilizes an NMOS transistor to couple the photodiode charge in an inverted manner to the signal line while converting the charge to a voltage through a capacitor coupled between the signal line and photodiode (i.e., forming a feedback of the NMOS amplifier transistor).

Abstract: A readout system with enhanced dynamic range for an image sensor is constructed with a pixel circuit and a readout circuit. The pixel circuit includes at least a first amplifier with a first gain and a second amplifier with a second gain for amplifying signals from the image sensor. The readout circuit includes at least a first readout sub-circuit and a second readout sub-circuit for corresponding reading output of the first amplifier and output of the second amplifier respectively.

Abstract: The claimed subject matter provides systems and/or methods that facilitate mitigating an impact resulting from mismatch between signal chains in a CMOS imaging System-on-Chip (iSoC) sensor. Two-by-two pixel structures can be a basic building block upon which a pixel array is constructed. Further, each two-by-two pixel structure can be associated with a read bus that carries a sampled signal to a top end and a bottom end of a chip. Moreover, multiplexers at either end of the chip can select a subset of the read buses from which to receive a subset of the sampled signals. Accordingly, pixels in a first color plane can be read, processed, etc. on the same side of the chip (e.g., utilizing a common signal chain), while pixels in at least one second color plane can be read, processed, etc. on the other side of the chip (e.g., employing a differing signal chain).

Abstract: A counter array and an image sensor including the same may be provided. The counter array may include a controller and a plurality of counter units. The controller may output an operation control signal and a direction indication signal. The counter units hold previous output values or may perform a counting operation in response to the operation control signal and may perform an up-count operation or a down-count operation in response to the direction indication signal when performing the counting operation.

Abstract: An image converter tube 2c and a plurality of image sensors CCDs 1 (eight CCDs 1 here) are provided, and the respective CCDs 1 and image positions in the image converter tube 2c are in one-to-one correspondence. By carrying out at least one of a control to make a shift to a different image position after image formation in one and the same image position for a predetermined number of frames, and a control to make a shift to a different image position in an imaging cycle with a predetermined time interval, various image pickup situations can be accommodated without changing the structure of CCDs 1 per se.

Abstract: An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a pixel to an adjusted saturation voltage to determine if the pixel is saturated. If the pixel is saturated, the signal output from the pixel is replaced with an analog voltage having a maximum value corresponding to a brightest pixel in the image.

Abstract: If a horizontal skipping operation is performed and operations are performed on the basis of the signals severally held in a plurality of register circuits in a solid-state imaging apparatus including an AD converting circuit in each column to perform the arithmetic processing of a digitized signal, then the AD converters and the register circuits in the columns to be skipped, that is, not to be read out become the state of not participating in the operations, and there is room for an examination in the aspect of the utilization efficiency of the circuits. A unit for connecting a register circuit in a certain column to a register circuit in another column is provided to the solid-state imaging apparatus.