Abstract: A CCD image sensor comprises photosensitive elements arranged in rows and columns, vertical CCDs each having vertical shift elements associated with respective ones of the photosensitive elements of a corresponding one of the columns, and a horizontal CCD comprising horizontal shift elements. The image sensor further comprises a transition region arranged between the vertical CCDs and the horizontal CCD. The transition region is configured to separate each of a plurality of signal channels provided by respective ones of the vertical CCDs into first and second parallel signal channels and to controllably direct selected ones of the parallel signal channels to the horizontal shift elements of the horizontal CCD in accordance with a designated readout sequence.

Abstract: A shift gate is arranged to be adjacent to a pixel column including a plurality of photosensitive pixels. The shift gate controls a storage time of a signal charge generated in the photosensitive pixels based on a shift pulse signal. The signal charge generated in the photosensitive pixels is transferred to an analog shift register via the shift gate. The analog shift register has a plurality of transfer stages independently driven using a plurality of drive signals. The signal charge generated in the photosensitive pixels is successively transferred by the transfer stages, and detected by an output unit provided at an end portion of the analog shift register so that an output signal is converted. The analog shift register makes an addition of the signal charges in accordance with drive signals when the transfer stages transfer the signal charges.

Abstract: A charge-coupled device image sensor includes (a) a two-dimensional array of pixels having a plurality of rows and columns, the two-dimensional array includes: (i) a plurality of gates arranged as a charge-coupled device; wherein the array further includes a plurality of charge-coupled devices that are arranged to be clocked by one or more common timing signals; (ii) a transition region, electrically connected to the array, having a first and second row of gates in which the second row is electrically mated into a plurality of first and second pairs of gates in which first pairs of gates are clocked by a first common timing signal and second pairs of gates are clocked by a second common timing signal; wherein the first row of gates are all clocked with a third common timing signal; and (b) a horizontal shift register adjacent the second row of gates for receiving charge from the second row of gates.

Abstract: A device for reading information in a set of electronic components connected to a communication bus in order to send that information over the communication bus includes means for reading values held in at least some of the electronic components holding a value to be sent and an arbiter circuit for successively sending the read values over the communication bus. The arbiter circuit includes means for circulating between the electronic components holding a value to be sent a single token authorizing sending of the read values.

Abstract: A solid state imaging device including a plurality of photo diodes disposed in a matrix shape, a vertical transfer unit disposed along each vertical column of the photo diodes, and a horizontal transfer unit in which a predetermined number, two or more, of adjacent vertical transfer units are used as one group to correspond to a unit transfer bit, wherein at least one charge transfer unit corresponding to each group of the vertical transfer unit is provided for each group.

Abstract: A solid-state imaging device is provided and includes: a semiconductor substrate having a two-dimensional array of photoelectric conversion elements, each storing a signal charge in accordance with a received amount of light; a charge transfer path that transfers the signal charge read out of the photoelectric conversion elements toward an output end of the solid-state imaging device; and a branching part having two branches, the branching part receiving the signal charge transferred along the charge transfer path and distributing the signal charge toward one of the two branches alternately. The charge transfer path has an end portion narrowed in channel width and connected to the branching part.

Abstract: A solid state imaging device has a pixel region composed of a matrix of pixel cells each including a photodiode and a charge storage portion. First and second output signal lines are in parallel and adjacent to both the charge storage portions of a first pixel cell and a second pixel cells that are adjacent on a same column. A signal voltage of a signal charge in the charge storage portion of the first pixel cell is output to the first output signal line, whereas a signal voltage of a signal charge in the charge storage portion of the second pixel cell is output to the second output signal line. The respective outputs to the first and second output signal lines are processed in parallel. A conductive layer is disposed between the charge storage portion of the first pixel cell and the second output signal line to suppress capacitive coupling.

Abstract: If a horizontal skipping operation is performed and operations are performed on the basis of the signals severally held in a plurality of register circuits in a solid-state imaging apparatus including an AD converting circuit in each column to perform the arithmetic processing of a digitized signal, then the AD converters and the register circuits in the columns to be skipped, that is, not to be read out become the state of not participating in the operations, and there is room for an examination in the aspect of the utilization efficiency of the circuits. A unit for connecting a register circuit in a certain column to a register circuit in another column is provided to the solid-state imaging apparatus.

Abstract: A solid state imaging device including a plurality of photo diodes disposed in a matrix shape, a vertical transfer unit disposed along each vertical column of the photo diodes, and a horizontal transfer unit in which a predetermined number, two or more, of adjacent vertical transfer units are used as one group to correspond to a unit transfer bit, wherein at least one charge transfer unit corresponding to each group of the vertical transfer unit is provided for each group.

Abstract: Multiple pixels within a pixel array share a common output line. Each output line from the array is connected to one or more storage elements. Each of the storage elements receives a counter signal corresponding to levels of a reference voltage within each of the pixels. When an output line signal reaches a predetermined value, a storage element receiving that predetermined value latches the current value of the counter signal. Outputs from pixels of multiple columns in the array may be time-multiplexed onto the output lines or may form a serial scan chain connected to a single output line.

Abstract: An image sensor includes a plurality of photoelectric converting elements, each of which is provided with an electric charge output port, and a group of channel selection switches that turn on and off between the electric charge output port and a common signal line. A resolution of the image sensor is determined by ON-OFF patterns of a signal used for designating a resolution, at a timing of a rising or falling edge of a signal for setting a timing for designating the resolution during the period that a signal for setting a period for designating the resolution is on.

Abstract: The present invention provides an improved shared amplifier circuitry and method of operation which minimizes offset and column to column fixed pattern noise during a read out operation. The circuit improves the consistency of the pixel to pixel output of the pixel array and increases the dynamic range of the pixel output and saves chip area. This is accomplished by simultaneously sampling and storing charge accumulated signals from a first and a second desired pixel from a respective first and second column. The circuit amplifies the first charge signal and then samples and amplifies the reset signal of the first desired pixel and subsequently outputs the amplified first charge signal and the reset signal. Then the circuit amplifies the second charge signal and the reset signal of the first desired pixel and subsequently outputs the amplified second charge signal and the reset signal.

Abstract: The invention proposes an image sensor comprising a picture capture matrix having N rows and K columns of image dots, a read register at the free end of the K columns. In order to improve the read speed of the matrix, the invention proposes that the horizontal transfer into the read register be continued even while the vertical signals for shifting from one row to the other are operative, without however continuing the horizontal transfer while the transfer gate between columns and horizontal register is open. The unloading time of the horizontal read register therefore overlaps the time reserved for each vertical transfer step, instead of these times being added together. The gain in time, being repeated for each row, will be all the more significant the higher the number of rows. Means are provided for limiting the effect of the column transfer switching operations on the reading of the charges at the output of the read register.

Abstract: A photosensitive imaging apparatus has a linear array of groups of photosensors. In a low-resolution scanning mode, all of the photosensors in each group act together as one large photosensor. In a high-resolution scanning mode, each photosensor in a group acts outputs image-based signals independently. In either mode, the signals output by the photosensors are transferred to one of two output lines, such as for “odd-” and “even-” positioned photosensors or groups of photosensors. The signals on the two lines can then be multiplexed to a single output line. The dual output lines enable fast signal output in either resolution mode.

Abstract: The present invention relates to a system and method for performing rapid and programmable analysis of data. The present invention relates to a reconfigurable detector comprising at least one array of a plurality of pixels, where each of the plurality of pixels can be selected to receive and read-out an input. The pixel array is divided into at least one pixel group for conducting a common predefined analysis. Each of the pixels has a programmable circuitry programmed with a dynamically configurable user-defined function to modify the input. The present detector also comprises a summing circuit designed to sum the modified input.

Abstract: Disclosed herein is an XY-addressing solid-state imaging apparatus including a solid-state imaging device having a plurality of two-dimensionally arranged pixels and a horizontal and vertical scanning circuits for reading pixel signals of the solid-state imaging device; a shift register of at least one of the horizontal and vertical scanning circuits including shift register units serially connected in a large number of stages for transferring information related to scan location by clock and a storing section connected through a storing switch and transmitting switch to each shift register unit; the solid-state imaging apparatus also includes a drive control means for causing the storing section to store a scan start location information in a scan start location setting period before a main scanning so that the scan start location information is transmitted from the storing section in the main scanning to start scanning from a desired scan start location and for effecting the storing of the scan start locati

Abstract: In an image sensor array, as would be used in an input scanner such as in a digital copier, an original image is moved relative to a linear array of photosites. Each photosite includes at least two wide photosensors, each of which extends substantially across the photosite along the array direction, and at least two narrow photosensors, which are arranged next to each other along the array direction. In one embodiment, the wide photosensors include primary-color filters and the narrow photosensors are clear-filtered.

Abstract: A solid-state imaging apparatus, comprising: a semiconductor substrate defining a two-dimensional surface; a multiplicity of photo electric conversion elements arranged in a plurality of rows and in a plurality of lines in a light receiving region of the semiconductor substrate and each accumulating signal electric charges; a vertical electric charge transfer device having a plurality of vertical electric charge transfer channels arranged vertically between rows of the photo electric conversion elements and a plurality of transfer electrodes horizontally arranged over the vertical electric charge transfer channels, wherein the vertical electric charge transfer device transfers the signal electrical charges accumulated by the photo eclectic conversion elements by setting a transfer line transferring vacant signals on an up stream side in a vertical direction of every transfer line transferring the signal electrical charges; reading out parts, each corresponding to each one of the multiplicity of the photo elec

Abstract: A charge-coupled device image sensor includes (a) a two-dimensional array of pixels having a plurality of rows and columns, the two-dimensional array includes: (i) a plurality of gates arranged as a charge-coupled device; wherein the array further includes a plurality of charge-coupled devices that are arranged to be clocked by one or more common timing signals; (ii) a transition region, electrically connected to the array, having a first and second row of gates in which the second row is electrically mated into a plurality of first and second pairs of gates in which first pairs of gates are clocked by a first common timing signal and second pairs of gates are clocked by a second common timing signal; wherein the first row of gates are all clocked with a third common timing signal; and (b) a horizontal shift register adjacent the second row of gates for receiving charge from the second row of gates.

Abstract: A shift gate is arranged to be adjacent to a pixel column including a plurality of photosensitive pixels. The shift gate controls a storage time of a signal charge generated in the photosensitive pixels based on a shift pulse signal. The signal charge generated in the photosensitive pixels is transferred to an analog shift register via the shift gate. The analog shift register has a plurality of transfer stages independently driven using a plurality of drive signals. The signal charge generated in the photosensitive pixels is successively transferred by the transfer stages, and detected by an output unit provided at an end portion of the analog shift register so that an output signal is converted. The analog shift register makes an addition of the signal charges in accordance with drive signals when the transfer stages transfer the signal charges.

Abstract: An active pixel sensor (APS) that includes circuitry to eliminate artifacts in digital images. The APS includes a comparator for comparing a signal level from a pixel to an adjusted saturation voltage to determine if the pixel is saturated. If the pixel is saturated, the signal output from the pixel is replaced with an analog voltage having a maximum value corresponding to a brightest pixel in the image.

Abstract: An image sensor and method thereof. In an example, the image sensor, may include a pixel array including a plurality of unit pixels, each of the plurality of unit pixels having a charge transfer unit for transferring charges accumulated in an optoelectronic converter to a charge detector via a charge transfer driving signal. The example image sensor may further include a row driving unit generating a boosted voltage, the boosted voltage set to a boosted voltage level higher than a power voltage level, the boosted voltage selectively boosted in response to a boosting voltage variable control signal. The row driving unit may selectively apply the charge transfer driving signal to the pixel array. In another example, the method may include selectively adjusting a voltage level of a charge transfer driving voltage and transferring the charge transfer driving voltage to a charge transfer unit for controlling an operation of the charge transfer unit.

Abstract: A physical quantity distribution sensor is disclosed. The sensor comprises: a plurality of sensor/storage sections each having a sensor element for sensing a received physical quantity and a storage element for storing the information of physical quantity sensed by the sensor element; a selector for selecting at least one of the sensor/storage sections; and a plurality of buffers each capable of detecting and supplying the information stored in at least one selected sensor/storage section. This sensor further comprises at least one selection signal transfer line for transferring an output of the selector. Power supply input portions of the buffers are connected to the selection signal transfer line, and the buffers are operated using, as a power voltage, an output of the selector entered into the buffers through the selection signal transfer line.

Abstract: A method for producing electronic video signals representative of a focused moveable image includs the following steps: providing a charge coupled device, masking substantially less than half of the lines of the device to form a masked storage area and a substantially larger unmasked sensing area; disposing the sensing area in the path of the image; providing a shutter for periodically blocking the image from the sensing area; and providing clocking signals to the device to shift sensed lines of the image from the sensing area to the storage area and to clock image representative electronic video signals out of the device.

Abstract: In an image reader, delay circuits are disposed on connection lines connecting an A/D converter with an image data generation circuit, whereby the output timings of the digital electric signals output from the A/D converter differ. Thus, the digital electric signals are not output at the same time from the adjacent output terminals of the A/D converter. Thus, the digital electric signals output from the A/D converter do not make a low to high or high to low transition at the same time and amplifying of EMI is decreased. Therefore, noise can be prevented from being contained in image data generated by the image data generation circuit and the quality of the image read through the image reader can be improved.

Abstract: A solid-state image sensor has a readout architecture that incorporates charge multiplier cells into a horizontal register of a CCD image sensor, and includes a first CCD register adjacent to at least a second CCD register and coupled to the said first register through a charge overflow barrier. A high Dynamic Range readout system results in which the DR is not restricted by the voltage swing limitations on the charge detection node. As the charge is multiplied, the horizontal register structure increases in width and more charge multiplication gates are added per stage. A charge overflow region follows the charge multiplier. In this region the amount of charge that exceeds a certain predetermined threshold is split off into another register. A detection node that has different conversion sensitivity may terminate this register. The process of charge overflow and splitting off may continue for more than two steps.

Abstract: An imager circuit includes an array of pixels, each pixel including a sensor (photodiode) connected to an input terminal of a comparator. The comparators of each pixel row have output terminals connected to a latch. A counter generates a sequence of digital values that are transmitted to a digital-to-analog converter (DAC) and to the latch of each row. The DAC generates a ramp voltage that is transmitted to a second input terminal of each pixel's comparator. The comparators of a selected pixel column are enabled to generate output signals when the ramp voltage equals each pixel's voltage, causing the associated latches to capture the current digital values. The comparators are formed such that each pixel row shares a cascode mirror circuit that detects differential currents in data line pairs connected to each pixel in that row.

Abstract: A charge transfer device having: a semiconductor substrate; a charge transfer path formed in the semiconductor substrate and made of a first conductivity type semiconductor layer; a plurality of charge transfer electrodes formed near above the charge transfer path; and a first pulse signal generator circuit for applying either a first pulse signal train for n-phase (n being an integer larger than 1) driving of charges in the charge transfer path to the charge transfer electrodes or a second pulse signal train for (n+1)-phase driving of charges in the charge transfer path to the charge transfer electrodes.

Abstract: An object of this invention is to implement a radiographic apparatus which can stably obtain a moving image at a high speed by suppressing a voltage variation in GND or power supply line and omitting the standby period for each frame. To achieve this object, during a period after electrical signals from conversion elements (S1-1–S1-3) in one control interconnection (G1) are transferred and read for each row by a driving circuit section (SR1) before electrical signals in the next control interconnection are transferred and read, the read-accessed conversion elements are refreshed for each row, thereby eliminating the necessity for preparing a refresh period in acquiring continuous moving images. In addition, since the conversion elements are refreshed for each row, the dark current (transient current) in the refresh mode can be made small as compared to a case wherein all the conversion elements are refreshed at once. With this arrangement, the voltage variation in GND or power supply line is suppressed.

Abstract: In order to eliminate impairment due to a disconnection and to make driving at high speed possible, a semiconductor device is provided which includes a plurality of pixels, each having a switching element, arrayed two-dimensionally, which includes a plurality of common lines connected to the switching elements arrayed in a direction, and which drives the switching elements. A plurality of driving devices for applying a control signal are connected to the common lines.

Abstract: A solid image pickup apparatus which is not easily susceptible to an influence of an emitted light caused by impact ionization. The solid image pickup apparatus of the present invention includes an output circuit for converting a signal charge outputted from a photoelectric converter into an analog signal and outputting the signal. The output circuit includes a charge-voltage converter for converting the charge transferred from the photoelectric converter into a voltage signal, a plurality of source follower circuits for performing impedance conversion, and a reverse amplification circuit. A gate length of a MOSFET constituting the final-stage source follower circuit in the output circuit is longer than the gate length of the MOSFET of another source follower circuit or the like.

Abstract: An image sensor with a plurality of elements which received images and a plurality of A/D conversion elements. A connection between the A/D converter and the image elements is substantially randomly assigned to avoid fixed pattern noise.

Abstract: In a solid-state image-sensing device, an electric signal output from a photoelectric conversion circuit 100 is accumulated in a capacitor C1, and then a MOS transistor T5 is turned on so that the voltage integrated by the capacitor C1 is sampled in a MOS transistor T10. Thereafter, the electric charge obtained through amplification performed by the MOS transistor T10 flows into a capacitor C2, which performs integration so that a voltage commensurate with the integral of the amount of incident light appears at the capacitor C2.

Abstract: The invention provides a signal processing apparatus having clamp capacitance device for receiving, at one electrode thereof, first and second signals outputted from a signal source, a signal transfer transistor of which one main electrode is connected to an other electrode of the clamp capacitance device, signal accumulating capacitance device connected to an other main electrode of the signal transfer transistor, and reset device for fixing the potential of the signal accumulating capacitance device, wherein the potential of the signal accumulating capacitance device is fixed by the reset device while the first signal is outputted from the signal source and the signal accumulating capacitance device is maintained in a floating state while the second signal is outputted from the signal source, and the signal transfer transistor is controlled in such a manner that the potential of the main electrode of the signal transfer transistor and that of the other main electrode thereof show different saturation operat

Abstract: An image sensor with a plurality of elements which received images and a plurality of A/D conversion elements. A connection between the A/D converter and the image elements is substantially randomly assigned to avoid fixed pattern noise.

Abstract: The present invention is directed to an analog delay line for a color CMOS image sensor which is compatible with MOS fabrication technology. The invention allows for the simultaneous reading of pixel signals from two rows of pixels so that combinations of signals from pixels in different rows may be obtained. The delay line includes a set of storage capacitors on which the pixel signals are stored, and a means for writing the signals from the pixels onto the capacitors in sequence. The stored analog pixel signals may then be read out from the delay line at the appropriate time so that they may be combined with pixel signals from adjacent pixels in different rows. In one embodiment, two delay lines are used, so that pixel signals from a current row can be written into one delay line, while the pixel signals from a previous row are being read out from the other delay line. In another embodiment, a single delay line is used in combination with a single pixel delay circuit.

Abstract: An active pixel sensor (APS) with an electronic shutter is provided that performs an auto exposure function so that all pixels have substantially equal photosensitive time by controlling a photo-electric charge that is generated in accordance with light transmitted to a photo-diode. The APS includes a switching unit that throughputs the photo-electric charge for a prescribed time based on an externally inputted shutter control signal, and an electric charge storing unit that stores the photo-electric-charge from the switching unit for the prescribed time. The electric charge storing unit outputs the stored photo-electric charge to an electric charge amplifying and outputting unit based on an externally inputted electric charge resetting signal. The APS provides uniform screen brightness for a display apparatus by allowing all pixels to use a substantially identical photosensitive (e.g., exposure) time.

Abstract: What is described here is a method of analog signal processing of video signals from picture elements arranged in an array, which are adapted for discrete scanning in terms of time, using a resistive network, the so-called electronic retina, having a two-dimensional field structure including a number of lines m smaller than the number of lines p of the picture element array, wherein the video signals are transmitted from the picture elements in the electronic retina by lines in such a manner that, starting with the first line of picture elements, the video signals are transmitted into the first line of said electronic retina until after the transmission of the video signals from the m-th line of the picture element arrays into the m-th line of said electronic retina the picture elements of the m+1st line of the picture element array are transmitted into the electronic retina, starting again with the first line, until the p-th line of the picture element array is transmitted in a roll-over manner into the

Abstract: A physical quantity distribution sensor is disclosed. The sensor comprises: a plurality of sensor/storage sections each having a sensor element for sensing a received physical quantity and a storage element for storing the information of physical quantity sensed by the sensor element; a selector for selecting at least one of the sensor/storage sections; and a plurality of buffers each capable of detecting and supplying the information stored in at least one selected sensor/storage section. This sensor further comprises at least one selection signal transfer line for transferring an output of the selector. Power supply input portions of the buffers are connected to the selection signal transfer line, and the buffers are operated using, as a power voltage, an output of the selector entered into the buffers through the selection signal transfer line.

Abstract: When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping is generally supplied to an A/D converter as generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal oputput by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

Abstract: In a CCD imager, a charge is accumulated in pixels of an image area representative of the intensity of incident radiation and is subsequently transferred to a store section and then on a row by row basis to an output register by applying suitable drive pulses to drive electrodes. Signal charge in the output register is transferred to a multiplication register by drive pulses applied to drive electrodes to give charge transfer in the direction shown by the arrows. One or more drive pulses applied to the electrodes of the multiplication register are of sufficiently large amplitude to produce high field regions in the register element to cause signal multiplication by impact ionisation. This gives a low noise amplification of the signal charge, the multiplied signal charge being detected at charge detection circuit.

Abstract: The invention relates to a method for reading out the image points of a two-dimensional electronic image sensor, the image being subdivided into at least two different regions (2, 3) and the region of greater interest ROI (2) being read at a scanning rate which is higher than that used for the other region (3). Consequently, the region of interest (2) can be reproduced with a higher temporal resolution while making optimum use of the limited processing capacities. Preferably, the sensitivity of the reading unit is adapted in conformity with the scanning rate of a relevant image point so as to take into account the fact that image points that are read out less frequently collect a light intensity over a prolonged period of time and hence may reach high signal strengths. Regions that are less frequently read out can also be irradiated with a lower radiation intensity by applying appropriate masking. The method is very suitable for the imaging of time-critical processes in medical X-ray applications.

Abstract: A correlated double sampling unit within a CMOS imager employs an image sensor having a plurality of photodetectors arranged in a series of rows and columns with a row addressing circuit, a column addressing circuit, a first sample and hold circuit allocated for each of the columns, a transfer circuit operatively connecting each of the columns to the first sample and hold circuit for each of the columns, and a plurality of second sample and hold circuits, each of the second sample and hold circuits being operatively connected to a subset of the first sample and hold circuits.

Abstract: This invention provides an element having a skimming charge transfer function in an X-Y address type photoelectric conversion device using, e.g., a CMOS sensor, and a photoelectric conversion device, which accumulates photoelectric signal charges produced by a photoelectric conversion element in a control electrode (gate) of a MOS transistor so as to obtain a signal with a high S/N ratio by removing signal components produced by background radiation without using any CCD as an accumulation means of skimming charges, has a skimming electrode for transferring skimming charges of those produced by the photoelectric conversion element, an n+-type region for accumulating the transferred skimming charges, a MOS transistor for reading out potential changes caused by the skimming charges, and a circuit for automatically controlling the amount of skimming charges to be transferred.

Abstract: A CCD solid state imaging device (21), which is comprised of an imaging section (24) formed of a plurality of light receiving portions (22), each serving as a pixel, and of a vertical transfer register (23) corresponding to each column of light receiving portions, first and second storage sections (26A) and (26B) capable of storing a charge from the imaging section (24), a horizontal transfer register (27) and a smear drain region (28), is employed, wherein after a first smear component charge (I) in the vertical transfer register (23) is swept away to the smear drain region , the vertical transfer register is operated at a high speed under such a state that a signal charge of the light receiving portion (22) is not read to the vertical transfer register (23) to store a second smear component charge (II) generated during the high speed transfer in the first storage section (26A), then the signal charge of the light receiving portion (22) is read to the vertical transfer register (23), the same is transferred

Abstract: The first present invention provides a circuit for processing charge detecting signal transferred to a floating diffusion amplifier from a charge coupled device. The circuit comprises: a first node connected to the floating diffusion amplifier; a first enhancement type field effect transistor being connected in series between a first fixed-voltage supply line for supplying a first fixed voltage and an output terminal, and the first enhancement type field effect transistor having a first gate connected to the first node; and a second enhancement type field effect transistor being connected in series between a second fixed-voltage supply line for supplying a second fixed voltage and the output terminal, wherein the second enhancement type field effect transistor has a second gate supplied with a third fixed voltage which is different in potential from the second fixed voltage.

Abstract: This invention provides an element having a skimming charge transfer function in an X-Y address type photoelectric conversion device using, e.g., a CMOS sensor, and a photoelectric conversion device, which accumulates photoelectric signal charges produced by a photoelectric conversion element in a control electrode (gate) of a MOS transistor so as to obtain a signal with a high S/N ratio by removing signal components produced by background radiation without using any CCD as an accumulation means of skimming charges, has a skimming electrode for transferring skimming charges of those produced by the photoelectric conversion element, an n+-type region for accumulating the transferred skimming charges, a MOS transistor for reading out potential changes caused by the skimming charges, and a circuit for automatically controlling the amount of skimming charges to be transferred.

Abstract: When a still image is picked up with an electronic camera utilizing a MOS type solid-state image pickup device, a flashing device is operated under the condition that both an image signal read operation and an electronic shutter operation are not performed, and the MOS type solid-state image pickup device is controlled so that the same exposure time is set to each photoelectric conversion element. Backlight correction can be achieved.

Abstract: A scanning device includes a mode for generating a reproduced image on a standard page size from a large-sized original image. In this mode, the sampling rate of the scanning device in a motion direction is reduced. In addition, the captured image data in the sensor direction is downsampled by some factor. Position data that is generated as the image data is captured is also modified in accordance with the downsampling factor. A reproduced image is then generated from the modified image and position data and printed at a standard resolution.

Abstract: A number of photoelectric conversion elements are disposed in a plurality of rows and columns in a pixel shift layout, and an analog/digital conversion unit is provided per two photoelectric conversion element columns to form a MOS type solid-state image pickup device. It is possible to suppress an increase in the manufacture cost of MOS type solid state image pickup devices with built-in A/D conversion units and improve the integration degree of photoelectric conversion elements.