Abstract: A lens module includes a voice coil motor, a lens received in the voice coil motor, a light emitting element adapted for emitting lights, a prism, and a DLP sensor. The prism faces and inclines towards the light emitting element. The prism is configured to reflect the lights from the light emitting element to the DLP sensor. The voice coil motor is configured to automatically adjust a distance between the lens and the DLP sensor according to a sharpness of the pattern and send electronic signals to the DLP sensor. When the DLP sensor receives the electronic signals, the DLP sensor rotates to change states of the DLP sensor according to the electronic signals and control an amount of the lights reflected into the lens according to the electronic signals thereby forming a pattern with a higher degree of sharpness than the pattern previously captured.

Abstract: A photosensitive circuit and a driving method thereof, a detection device, and a display device are disclosed. The photosensitive circuit includes a reset sub-circuit, a compensation sub-circuit, a photosensitive sub-circuit, and a read sub-circuit. The reset sub-circuit is configured to provide an initial signal to a first node in response to a first control signal; the compensation sub-circuit is configured to compensate a level of the first node in response to a second control signal; the photosensitive sub-circuit is configured to receive incident light, supply a power supply voltage to the second node under control of the level of the first node, generate a sensing electrical signal based on the incident light, and provide the sensing electrical signal to the second node; and the read sub-circuit is configured to output the sensing electrical signal in response to a third control signal.

Abstract: In some embodiments, the present disclosure relates to a method of forming an integrated chip (IC) structure. The method may be performed by forming a first integrated chip die having one or more semiconductor devices within a first substrate, and forming a passivation layer over the first integrated chip die. The passivation layer is selectively etched to form interior sidewalls defining a first opening, and a conductive material is deposited over the passivation layer and within the first opening. The conductive material is patterned to define a conductive blocking structure that laterally extends past the one or more semiconductor devices in opposing directions. The first integrated chip die is bonded to a second integrated chip die having an array of image sensing elements within a second substrate.

Abstract: An image sensor is provided, the image sensor comprising a plurality of photo-diode pixels arranged in a two-dimensional array, an energy harvesting output bus connected to the plurality of photo-diode pixels, an image sensing output bus connected to the plurality of photo-diode pixels, and a plurality of switching buses connected to the plurality of photo-diode pixels to direct an output of a varying percentage of the plurality of photo-diode pixels to either the energy harvesting output bus or the image sensing output bus.

Abstract: A solid-state imaging element including: a sensor substrate in which a photoelectric conversion section is arranged and formed; a circuit substrate in which a circuit for driving the photoelectric conversion section is formed, the circuit substrate being laminated to the sensor substrate; a sensor side electrode drawn out to a surface of the sensor substrate on a side of the circuit substrate and formed as one of a projection electrode and a depression electrode; and a circuit side electrode drawn out to a surface of the circuit substrate on a side of the sensor substrate, formed as one of the depression electrode and the projection electrode, and joined to the sensor side electrode in a state of the circuit side electrode and the sensor side electrode being fitted together.

Abstract: A solid-state imaging device is capable of simplifying the pixel structure to reduce the pixel size and capable of suppressing the variation in the characteristics between the pixels when a plurality of output systems is provided. A unit cell includes two pixels. Upper and lower photoelectric converters and, transfer transistors and connected to the upper and lower photoelectric converters, respectively, a reset transistor, and an amplifying transistor form the two pixels. A full-face signal line is connected to the respective drains of the reset transistor and the amplifying transistor. Controlling the full-face signal line, along with transfer signal lines and a reset signal line, to read out signals realizes the simplification of the wiring in the pixel, the reduction of the pixel size, and so on.

Abstract: A pixel comprising a pinned photodiode (PPD) which generates a photocurrent Iph, a transfer gate connected in series between the PPD and a first node, a low-gain select transistor connected between the first node and a second node, a reset transistor connected between the second node and a reset voltage, a capacitance connected between the second node and a first constant potential, and a source-follower transistor whose source, gate and drain are connected to an output node, the first node and a second constant potential, respectively. When properly arranged, a vertically integrated (3D) global-shutter pinned PPD pixel is provided, which uses an overflow integration capacitor and subthreshold conduction of the reset transistor for increased dynamic range. Global shutter operation is achieved by storing the pixel output on sampling capacitors in another semiconductor layer at the end of integration.

Abstract: A solid-state image sensor includes a pixel formed, upon forming a structure where a photoelectric conversion layer is laminated on a wiring layer constituting a pixel circuit, by forming at least the photoelectric conversion layer and a wiring layer bonding layer on a different substrate from a semiconductor substrate in which the wiring layer is formed, and by bonding the wiring layer bonding film of the different substrate and the wiring layer of the semiconductor substrate together.

Abstract: When a switching portion at which a sequence of video streams to be transmitted is switched from a first sequence to a second sequence having a different frame rate from the first sequence is provided, display control information is inserted into at least encoded image data of a picture corresponding to the switching portion or a packet containing the encoded image data. A reception side performs display control of pictures using the display control information and implements an excellent display.

Abstract: A method and apparatus for coding of syntax elements are disclosed to allow prediction units in P and B slices to share the same syntax coding table. In one embodiment according to the present invention, the method and apparatus coding of syntax elements selectively apply a syntax coding table to encode or decode the syntax element associated with the partition mode of a coding unit of a picture region according to the slice type of the picture region. A first syntax coding table is used to process the syntax element if the slice type is an I mode and a second syntax coding table is used to process the syntax element if the slice type is not an I mode.

Abstract: An image sensor is provided, the image sensor comprising a plurality of photo-diode pixels arranged in a two-dimensional array, an energy harvesting output bus connected to the plurality of photo-diode pixels, an image sensing output bus connected to the plurality of photo-diode pixels, and a plurality of switching buses connected to the plurality of photo-diode pixels to direct output of a varying percentage of the pixels to either the energy harvesting output bus or the image sensing output bus.

Abstract: A method, device, computer program product and a processor readable medium is provided for signaling, in a bitstream representing a LDR picture obtained from an HDR picture. In one embodiment, both a picture/video format of a decoded version of the LDR picture, denoted an output LDR format, and a picture/video format of a decoded version of the HDR picture, denoted an output HDR format is provided. In one embodiment, the method includes encoding in the bitstream a second syntax element which is distinct from the first syntax element and which defines the output HDR format.

Abstract: A pixel cell has a photodiode, a transfer transistor, a reset transistor, an amplifier transistor and a readout circuit block. The photodiode, transfer transistor, reset transistor and amplifier transistor are disposed within a first substrate of a first semiconductor chip for accumulating an image charge in response to light incident upon the photodiode and converting the image charge to an image signal. The readout circuit block is disposed within a second substrate of a second semiconductor chip and the readout circuit block comprises optionally selectable rolling shutter and global shutter readout modes through the use of computer programmable digital register settings. The global shutter readout mode provides in-pixel correlated double sampling.

Abstract: An image sensing device includes: a pixel unit including a first sub-pixel and a second sub-pixel corresponding to a single color; a row control block suitable for controlling exposure times of the first and second sub-pixels differently from one another during an exposure time section, and controlling a first sub-pixel signal and a second sub-pixel signal to be outputted from the first and second sub-pixels during a single row line unit time during a read time section; and an image process block suitable for generating three or more image data which have different exposure times based on the first and second sub-pixel signals.

Abstract: The present invention provides a solid-state imaging device including a first substrate provided with a plurality of photoelectric conversion units thereon, and a second substrate provided with a reading circuit and parallel processing circuits thereon. The solid-state imaging device includes a DC voltage supply wiring configured to supply a DC voltage to the plurality of parallel processing circuits. The DC voltage supply wiring is formed by electrically connecting first conductive patterns provided on the first substrate with second conductive patterns provided on the second substrate.

Abstract: A stacked image sensor and method for making the same are provided. The stacked image sensor includes an upper chip with a pixel array thereon. The second chip includes a plurality of column circuits and row circuits associated with the columns and rows of the pixel array and disposed in respective column circuit and row circuit regions that are arranged in multiple groups. Inter-chip bonding pads are formed on each of the chips. The inter-chip bonding pads on the second chip are arranged linearly and are contained within the column circuit regions and row circuit regions in one embodiment. In other embodiments, the inter-chip bonding pads are staggered with respect to each other. In some embodiments, the rows and columns of the pixel array include multiple signal lines and the corresponding column circuit regions and row circuit regions also include multiple inter-chip bonding pads.

Abstract: The invention provides an imager readout architecture utilizing analog-to-digital converters (ADC), the architecture comprising a band-limited sigma delta modulator (SDM) ADC; and a serpentine readout, which can be configured to allow the band-limited SDM to multiplex between multiple columns by avoiding discontinuities at the edges of a row. SDM ADC image reconstruction artifacts are minimized using a modified serpentine read out methodology, the methodology comprising using primary and redundant slices with the serpentine read out in opposite directions and averaging the slices. Advantageously, the invention can be used to develop a read out integrated circuit (ROIC) for strained layer superlattice imagers (SLS) using sigma delta modulator (SDM) based analog to digital converters (SDM ADC).

Abstract: Spatial or temporal interpolation may be performed upon source video content to create interpolated video content. A video signal including the interpolated video content and non-interpolated video content (e.g. the source video content) may be generated. At least one indicator for distinguishing the non-interpolated video content from the interpolated video content may also be generated. The video signal and indicator(s) may be passed from a video source device to a video sink device. The received indicator(s) may be used to distinguish the non-interpolated video content from the interpolated video content in the received video signal. The non-interpolated video content may be used to “redo” the interpolation or may be recorded to a storage medium.

Abstract: Whether a user of a video camera can discern an unnatural motion or the discernable unnatural motion is permissible is evaluated based on an taken image so as to make a change between mixing of still image shooting driving and maintaining of motion image shooting driving.

Abstract: In an imaging apparatus adding image signals output from a sensor array which receives a light flux through an optical system and performs photoelectric conversion thereon, the sensor array being arranged a plurality of light receiving elements two-dimensionally, the imaging apparatus includes a pixel adding unit that divides the light receiving elements on the sensor array into a plurality of groups with a region including predetermined types of pixels as a group unit, and that adds, for each of the types of pixels, image signals output from the pixels included in four of the groups which are positioned “n” groups away from each other on the sensor array.

Abstract: Two or more imagers having associated frame rates are each configured with a global shutter having an exposure interval less than a frame interval. The exposure interval for a first imager is offset from the exposure interval of a second imager such that the first imager is exposed while the second imager is not exposed. When interleaved, an effective frame rate exceeds the individual frame rates provided by the individual imagers. This interleaved imaging system may be used to recover, at high frame rates, images that are projected from spatial light modulators.

Abstract: An image processing apparatus includes: a normal interpolated image generation unit to generate an image that is interpolated between a plurality of original images reproduced along time series, the image being a normal interpolated image, based on each of the plurality of original images; a high-frequency area extraction unit to extract a high-frequency area having a spatial frequency higher than a predetermined value in each of the plurality of original images; a high-frequency area interpolated image generation unit to generate an image that is interpolated between the plurality of original images, the image being a high-frequency area interpolated image, based on a change in position of the high-frequency area along with an elapse of time on the time series and on each of the plurality of original images; and a combination unit to execute combining processing to combine the normal interpolated image and the high-frequency area interpolated image.

Abstract: A solid-state imaging device includes a plurality of pixels, each of which includes a photoelectric converter section formed on a first substrate to generate and accumulate signal charges corresponding to incident light, a charge accumulation capacitor section formed on the first substrate or a second substrate to temporarily hold the signal charges transferred from the photoelectric converter section, and a plurality of MOS transistors formed on the second substrate to transfer the signal charges accumulated in the charge accumulation capacitor section, connection electrodes formed on the first substrate, and connection electrodes formed on the second substrate and electrically connected to the connection electrodes formed on the first substrate.

Abstract: A method for identifying state of macro block of de-interlacing computing and an image processing apparatus are provided, the method is as follows. A video frame is divided into a plurality of regions, where each of the regions includes a plurality of macro blocks. Then, a basic threshold corresponding to each of the regions is provided according to a position of each of the regions in the video frame, and a first macro block is identified to be a first type macro block or a second type macro block according to the basic threshold corresponding to one of the regions where the first macro block of the macro blocks locates. Then, a corresponding de-interlacing computing step is performed on the first macro block according to an result that the first macro block is identified as the first type macro block or the second type macro block.

Abstract: An image stabilizer has a shooting optical system shooting an object whose principal point moves between first and second principal points in an optical axis direction, an acceleration detector detecting acceleration applied to the image stabilizer and disposed between the first and second principal points in the optical axis direction.

Abstract: An image sensor supporting a normal sampling mode and a 1/N sampling mode for transmitting image data detected by a plurality of unit image sensors and stored in a plurality of latch circuits to a data processor using a plurality of transmission lines, wherein N is a natural number greater than 2, the image sensor including a horizontal address generator configured to generate horizontal addresses corresponding to addresses of the plurality of latch circuits, and to generate, based on the horizontal addresses, a first channel selection control signal and a second channel selection control signal of which activation times at least partially overlap.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: An imaging apparatus includes a control unit and a detector that includes multiple pixels and that performs an image capturing operation to output image data corresponding to radiation or light that is emitted. The image capturing operation includes a first image capturing operation in a first scanning area corresponding to part of the multiple pixels to output image data in the first scanning area and a second image capturing operation in a second scanning area larger than the first scanning area to output image data in the second scanning area. The control unit causes the detector to perform an accumulation operation in the second image capturing operation in a time determined so that an image artifact caused by the scanning area is lower than a predetermined allowable value on the basis of information about the amount of integration of accumulation times in the first image capturing operation.

Abstract: An imaging system comprises an image sensing apparatus including a pixel array, a row selection unit, and a readout unit; and a supply unit including a plurality of A/D converting units, and a transfer unit. The supply unit supplies a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives signals from the pixels in the pixel array by means of the transfer unit, and does not supply a power supply voltage to an A/D converting unit which, of the plurality of A/D converting units, receives no signals from the pixels in the pixel array by means of the transfer unit, in a 1-line period. The readout unit A/D-converts the signals from the pixels in the pixel array using the A/D converting unit supplied with the power supply voltage by the supply unit, and outputs a digital image signal.

Abstract: A digital photographing apparatus capable of performing high-speed continuous shooting and immediately storing data regarding a captured image. The digital photographing apparatus includes an image capture device for generating first data regarding an image generated from light input in response to a signal input by a user, a first data reading unit for reading the first data in units of a plurality of interlaced groups, a data conversion unit for converting the read data into second data, and a display unit for displaying an image generated from light incident on the image capture device. The data conversion unit starts conversion of the read data into the second data when the first data reading unit reads a last group of the first data.

Abstract: A solid-state imaging device includes a pixel array section having unit pixels arranged two-dimensionally in a matrix form. Each of the unit pixels includes a charge generation section configured to generate a signal charge, charge transfer sections configured to transfer the signal charge generated by the charge generation section, and a signal output section configured to generate and output a target signal commensurate with the charge of the signal generated by the charge generation section. The plurality of charge transfer sections are provided for each of the charge generation sections. The plurality of charge transfer sections are connected, on the side opposite to the charge generation section, to the signal output sections in different rows.

Abstract: A moving picture coding method includes: determining a luminance change by determining whether it is possible that a luminance change equal to or greater than a predetermined amount has occurred between the reference coded picture and a current picture; determining a flat region by determining whether a degree of non-uniformity in pixel values in a current block is smaller than a predetermined threshold; and determining a quantization width wherein, when it has been determined that it is possible that the luminance change equal to or greater than the predetermined amount has occurred and that the degree of non-uniformity is smaller than the predetermined threshold, a quantization width is determined to be smaller than a quantization width when it has not been determined to be possible that the luminance change equal to or greater than the predetermined amount has occurred or that the non-uniformity degree is smaller than the predetermined threshold.

Abstract: An image sampling method for an image sensor is provided herein. The image sensor includes a plurality of pixel elements in the intersections of a plurality of rows and a plurality of columns. During either one of the odd field period or the even field period, the pixel elements in the intersections of the odd rows and the odd columns and the pixel elements in the intersection of the even rows and the even columns are sampled. During the other field period, the pixel elements in the intersections of the even rows and the odd columns and the pixel elements in the intersection of the odd rows and the even columns are sampled. The image processing method utilizes the pixel data in a specific block sampled from the pixel elements during one of the odd and the even field periods to interpolate a specific pixel in the specific block.

Abstract: Combo lines having one odd line and one even line are utilized for generating an interlaced preview from an image sensor. Odd combo lines are read out to generate an odd field. Even combo lines are read out to generate an even field. Interpolation is performed on a plurality of odd field lines generated from the plurality of odd combo lines to generate a plurality of odd interpolated lines. Interpolation is performed on a plurality of even field lines generated from the plurality of even combo lines to generate a plurality of even interpolated lines. The interlace preview is generated from the plurality of odd interpolated lines and the plurality of even interpolated lines.

Abstract: A camera for forming an image of a scene that moves relative to the camera and the method of forming that image are disclosed. The camera includes an imaging array having a plurality of CMOS pixel sensors having a plurality of columns and rows, an imaging system, and a controller. The imaging system causes a portion of an image of a scene to be projected on the imaging array such that the image of the scene moves across the imaging array in the column direction. First and second images of the scene are formed at first and second times chosen such that the image of the scene moves a predetermined number of rows of the imaging array between the first and second times. The controller combines pixel values from rows in the first image with rows in the second image that are separated by the predetermined number of rows.

Abstract: The invention provides an adjusting apparatus and a method thereof for adjusting a 3D image constituted by a plurality of interlaced first-eye-viewed image lines and second-eye-viewed image lines to be outputted to a display panel. However, in practice, there is a leakage problem in a pair of glasses for viewing the 3D image. Therefore, the invention solves the leakage problem by matching a plurality of pre-stored leakage values and then generating a proper output with a corrective calculation.

Abstract: The invention provides a new method and apparatus for NTSC and PAL image sensors which employs fusion of adjacent row pixel charge samples to generate image data for a row. A variety of fusion schemes are possible for fusing the pixel signals from the adjacent rows. The rows of pixels are scanned so that each scan takes an odd row signal sample and, in some cases, an adjacent even row signal sample when specified conditions are met. One sampled row of the two adjacent rows integrate an image with a first integration period while the other adjacent row integrates an image with a second integration period.

Abstract: An imaging apparatus includes an imaging element which photoelectrically converts an image formed by an optical system, the imaging element being equipped with a color filter array (CFA) with different spectral transmittances. The apparatus includes a full color data generator which samples photoelectrically converted signals by the imaging element to obtain image signals having luminance information of each color of the CFA and sampling position information, and, when transforming a pattern of the pixel signals into full color data, generates full color data by obtaining weighting coefficients for generation of each color component of the full color data on the basis of a relative relationship between positions of a lattice pattern of the full color data to be generated and position information of the pixel signals.

Abstract: A method for automatically detecting and suppressing cross-color and cross-luma present in a baseband component video signal includes receiving component pixel data of a current pixel, a first previous pixel and a second previous pixel. First, second and third differences are calculated based on the component pixel data of the current, first previous and second previous pixels, and the presence of cross-luma and/or cross-color is determined for the current pixel based on an absolute value of at least one of the first, the second and the third differences. A per pixel count associated with the component pixel data of the current pixel is determined based on the determined presence of at least one of cross-luma and cross-color, and the component pixel data of the current pixel is modified based on the per pixel count.

Abstract: In an XY address type solid-state imager apparatus comprising a solid-state imager having a plurality of pixels two-dimensionally arranged, and horizontal and vertical scanning circuits to read signals of the pixels, the scanning circuits each have a progressive scanning circuit to progressively read pixel signals by a first scanning control signal, and an interlace scanning circuit to read pixel signals with an interlaced manner by a second scanning control signal different from the first scanning control signal, and arbitrarily carries out combining of progressive reading and interlace reading in one frame in accordance with a combination of the respective scanning control signals, and reads pixel signals.

Abstract: A decoder receives a field start code for an entry point key frame. The field start code indicates a second coded interlaced video field in the entry point key frame following a first coded interlaced video field in the entry point key frame and indicates a point to begin decoding of the second coded interlaced video field. The first coded interlaced video field is a predicted field, and the second coded interlaced video field is an intra-coded field. The decoder decodes the second field without decoding the first field. The field start code can be followed by a field header. The decoder can receive a frame header for the entry point key frame. The frame header may comprise a syntax element indicating a frame coding mode for the entry point key frame and/or a syntax element indicating field types for the first and second coded interlaced video fields.

Abstract: Techniques and tools for coding/decoding of digital video, and in particular, for determining, signaling and detecting entry points in video streams are described. Techniques and tools described herein are used to embed entry point indicator information in the bitstream that receivers, editing systems, insertion systems, and other systems can use to detect valid entry points in compressed video.

Abstract: A frame shutter apparatus comprising a controller for controlling multiple groups of pixels and for reading out values corresponding to the charge collected by different groups of pixels at different times. A method of reading out multiple groups of pixels is provided wherein values corresponding to the charge collected by one group of pixels is readout at a different time than the values corresponding to the charge collected by another group of pixels.

Abstract: A solid-state imaging device includes a plurality of pixels, each of which includes a photoelectric converter section formed on a first substrate to generate and accumulate signal charges corresponding to incident light, a charge accumulation capacitor section formed on the first substrate or a second substrate to temporarily hold the signal charges transferred from the photoelectric converter section, and a plurality of MOS transistors formed on the second substrate to transfer the signal charges accumulated in the charge accumulation capacitor section, connection electrodes formed on the first substrate, and connection electrodes formed on the second substrate and electrically connected to the connection electrodes formed on the first substrate.

Abstract: First pixels and second pixels are arranged in an LCD of a digital camera. Image light from the first pixel is diffused by a diffusing filter. Image light from the second pixel is deflected by a prism and directed in an oblique direction. When the LCD is viewed from a forward direction, only a captured image generated by the first pixels is observed. When the LCD is viewed from the oblique direction, the captured image, and camera information generated by the second pixels are observed in a state that they overlap each other.

Abstract: The solid-state image pickup device of the invention includes: a plurality of optoelectronic transducers arranged in an array; a plurality of vertical transfer sections each for reading charges from optoelectronic transducers and vertically transferring the read charges; a horizontal transfer section; a charge detection section for converting the horizontally transferred charges to signal voltages and the like; and a control section. The control section outputs signals so as to obtain either a signal corresponding to the sum of charges from an optoelectronic transducer belonging to one column and belonging to one of alternately selected rows and an optoelectronic transducer belonging to a column adjacent to the one column and belonging to a row other than the alternately selected rows, or a signal corresponding to the sum of charges from optoelectronic transducers belonging to a same column, every predetermined even number of continuous rows of optoelectronic transducers.

Abstract: Various embodiments of the invention comprise imaging systems and methods for an interlaced scan of an image sensor array. An exemplary method is described in which an image sensor array is exposed to light for a period of time to generate voltage levels representative of array pixels. The voltage levels of a first field of the array are scanned, the first field comprising a number of row-pairs of the array. The voltage levels of a second field of the array are also scanned, the second field comprising a different set of row-pairs interlaced with the row-pairs of the first field. A set of image data from the first field and a set from the second field are generated. Various row-pairs may be averaged in generating the sets of image data. Additionally, exemplary imaging systems are described with various configurations for scanning an image sensor array in interlaced mode.

Abstract: An image sensing apparatus has an image sensing device. The image sensing device includes a photoelectric conversion element that photoelectrically converts an optical image to acquire image data, and a readout control unit that reads out, in accordance with a supplied readout rule, the image data acquired by the photoelectric conversion element. The image sensing device also includes an image scaling ratio selection unit that selects the scaling ratio of the image to be output, a readout scheme selection unit that selects, in accordance with the selected image scaling ratio, the readout scheme of the image data to be read out from the photoelectric conversion element by the readout control unit, and a readout rule supply unit that supplies, to the readout control unit, a readout rule corresponding to the readout scheme selected by the readout scheme selection unit.

Abstract: Pixels are two-dimensionally arranged into rows and columns in an image sensing region of a solid-state image sensing device, and divided into a plurality of vertical blocks. A vertical signal line is connected to each pixel column. A voltage read out from a pixel is A/D-converted and held in a holding circuit. A vertical block selection circuit outputs a vertical block selection signal in response to a horizontal sync pulse. An intra-block line selection circuit selects one pixel row in one block or simultaneously selects a plurality of pixel rows in one block, in accordance with the selection signal and a signal for setting the number of lines to be selected. A pulse selector circuit supplies a pixel driving pulse signal to a pixel row selected by the intra-block line selection circuit.

Abstract: An encoder/decoder uses “self-referencing” frames. For example, a second B-field in a current frame references the first B-field from the current frame in motion compensated prediction. Allowing the first B-field in a frame to act as a reference for the second B-field in the frame allows more accurate prediction of the second B-field, while also preserving the temporal scalability benefits of having B-fields in the current frame.