Abstract: A circuit for converting the format of image data, the motion of the image data being smooth, includes a memory (16) to which moving image data in the NTSC format is written; a memory controller (14) retrieving respective signals, from the memory (16), required for producing image data of an odd field and an even field in the PAL format; line-interpolating circuits (73) and (74) converting retrieved image data into first image data and second image, respectively, both image data having the line frequency of the PAL format; a frame-interpolating circuit (75) outputting the image data of the odd field in the PAL format by mixing image data of the odd field of the first image data and image data of the odd field of the second image data at a predetermined mixing ratio, and outputting the image data of the even field in the PAL format by mixing image data of the even field of the first image data and image data of the even field of the second image data at a predetermined mixing ratio; and a coefficient-generatin

Abstract: A video decoder receives an entry point key frame comprising first and second interlaced video fields and decodes a first syntax element comprising information (e.g., frame coding mode) for the entry point key frame at a first syntax level (e.g., frame level) in a bitstream. The first interlaced video field is a predicted field, and the second interlaced video field is an intra-coded field. The information for the entry point key frame can be a frame coding mode (e.g., field interlace) for the entry point key frame. The decoder can decode a second syntax element at the first syntax level comprising second information (e.g., field type for each of the first and second interlaced video fields) for the entry point key frame.

Abstract: An image sensing apparatus has an image sensing device. The image sensing device includes a photoelectric conversion element that photoelectrically converts an optical image to acquire image data, and a readout control unit that reads out, in accordance with a supplied readout rule, the image data acquired by the photoelectric conversion element. The image sensing device also includes an image scaling ratio selection unit that selects the scaling ratio of the image to be output, a readout scheme selection unit that selects, in accordance with the selected image scaling ratio, the readout scheme of the image data to be read out from the photoelectric conversion element by the readout control unit, and a readout rule supply unit that supplies, to the readout control unit, a readout rule corresponding to the readout scheme selected by the readout scheme selection unit.

Abstract: An integrated system comprises a light valve and an image sensor for image display and image capture. The image sensor and the light valve share a common dual-function lens by positioning the light valve and image sensor at locations offset from the optical axis of the dual-function lens.

Abstract: An image sensor includes a plurality of photoelectric converting elements, each of which is provided with an electric charge output port, and a group of channel selection switches that turn on and off between the electric charge output port and a common signal line. A resolution of the image sensor is determined by ON-OFF patterns of a signal used for designating a resolution, at a timing of a rising or falling edge of a signal for setting a timing for designating the resolution during the period that a signal for setting a period for designating the resolution is on.

Abstract: An image processing device is provided. The image processing device includes a first shift register connected to a line for reading out an image signal that selects a line where a signal in response to carriers accumulated in an accumulation state for generating carriers in the photo diode in response to received light is read out, regarding each line of the matrix by scanning a plurality of lines in a direction that is perpendicular to each line of a matrix and is designated, a second shift register connected to a line for clearing an image signal where the residual carriers in the solid-state image-pickup element are discharged from the solid-state image-pickup element, and an output circuit that outputs a reset signal to the first shift register when a direction of scanning lines of the matrix is changed.

Abstract: The present invention provides a method for displaying a digital image on a portable digital apparatus having a recording medium, a display panel, a zoom button, and a location move button. The method includes displaying an original image stored in the recording medium on the entire display area of the display panel; displaying a thumbnail image obtained by reducing the display size of the original image on part of the display area of the display panel; displaying within the thumbnail image a window mark indicating the portion of the original image being displayed on the entire display area; enlarging or reducing the displayed portion of the original image and the window mark according to signals from the zoom button; and changing the location of the displayed portion of the original image and the location of the window mark within the thumbnail image, according to signals from the location move button.

Abstract: The invention relates to an electronic imaging system such a video camera or digital camera, whose thickness or size is reduced while performance degradation is reduced as much as possible. The system comprises a zoom lens system comprising a first G1, a second G2, a third G3 and a fourth lens group G4 and an aperture stop S, and an electronic image pickup device located on its image side I and covered with a cover glass CG. The image of a subject is formed on the photoreceptive surface of the electronic image pickup device for conversion into electric signals. The system satisfies the following conditions (1) and (2). a?4 ?m??(1) F>a??(2) Here a is the horizontal pixel pitch in ?m of the electronic image pickup device and F is the F-number of the zoom lens system at its wide-angle end.

Abstract: An image-processing device and a processing method thereof are provided. The device includes a solid-state image-pick up device, a signal-processing unit that processes an output from the solid-state image-pick up device into an image signal, and an output circuit installed in the solid-state image-pick up device for outputting a valid signal to the signal-processing unit showing whether the output from the solid-state image-pick up device is valid or not in response to its operation. When valid image data is sent from the solid-state image-pick up device, the validity of the image data is provided to the signal-processing unit by activating the valid signal. When an exposure state (an accumulation state) corresponding to an opened shutter occurs, the invalidity of the image data is provided to the signal-processing unit by deactivating the valid signal.

Abstract: The invention provides a new method and apparatus for NTSC and PAL image sensors which employs fusion of adjacent row pixel charge samples to generate image data for a row. A variety of fusion schemes are possible for fusing the pixel signals from the adjacent rows. The rows of pixels are scanned so that each scan takes an odd row signal sample and, in some cases, an adjacent even row signal sample when specified conditions are met. One sampled row of the two adjacent rows integrate an image with a first integration period while the other adjacent row integrates an image with a second integration period.

Abstract: An image processing device and method are provided. In a method of reading an image signal from a solid-state image-pickup element where a plurality of unit pixels including a transistor for detecting a light signal and a photo diode are arranged in a matrix, shift data applied to a line for reading out an image signal, which outputs a signal for selecting a line for reading out an image signal, is output to a shift register connected to a line for reading out an image signal, when the number of lines between line for reading out an image signal and line for clearing an image signal are equal to or less than the number of lines in the matrix and the condition for picking an image up is changed.

Abstract: A system (100) and method for outputting data from a detector (104). The novel system (100) includes a first controller (118) that samples the detector (104) at a first rate, a memory (112) for storing the sampled data, and a second controller (120) that outputs data from the memory (112) at a second rate. In a illustrative embodiment, the first rate is symmetrical from field to field, while the second rate is asymmetrical from field to field.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: A method for operating a spatial-resolution opto-electronic sensor device is provided. In order to produce a computed image of the surroundings, the sensor surface is activated as a sequence of n-tuples of pairs from activation intervals and assigned subsets of sensor elements in such a way that, within an n-tuple, n subsets of sensor elements are activated during n activation intervals under different lighting conditions for the surroundings caused by appropriate control of the lighting source, and fields recorded within an n-tuple are processed with one another in a data-processing device.

Abstract: A frame shutter apparatus comprising a controller for controlling multiple groups of pixels and for reading out values corresponding to the charge collected by different groups of pixels at different times. A method of reading out multiple groups of pixels is provided wherein values corresponding to the charge collected by one group of pixels is readout at a different time than the values corresponding to the charge collected by another group of pixels.

Abstract: A pixel clock is switched to a high speed for reading culled pixel data from a CCD or switched to a low speed for reading all pixels from the CCD when picking up an image of an object, so that a main memory stores a first field initially read from the CCD and an RPU reads the first field from the main memory in synchronization with reading of a subsequent second field for executing a series of image processing in real time. The main memory stores the processed data. A CPU reads the processed data from the main memory, compresses the processed data and thereafter stores the same in a storage medium. Thus provided is an image processing circuit capable of increasing a frame rate for finder display and efficiently executing image processing at a high speed.

Abstract: There are provided a solid state image pickup device in which the accumulation time of each pixel when an electronic shutter operation is performed is constant, and a high shutter speed can be set, a driving method therefor, and a camera. A solid state image pickup device (20) having means 3, 4, 7, and 11 which simultaneously perform reading operation of one row and an electronic shutter operation for the other row in a one-pixel period P is constituted.

Abstract: Conventionally, it is difficult to design the logic of a Gray code counter that can be used in interlaced counting. Even though interlaced counting is possible with a Gray code counter, the number of simultaneously changing bits increases greatly depending on the number of counts skipped at a time. To overcome these problems, a Gray code counter according to the present invention has a consecutively counting Gray code counter that counts in increments or decrements of one, and an output value converter circuit that converts the Gray code data output from the consecutively counting Gray code counter into a Gray code corresponding to decimal counts as obtained by counting with (2 raised to a particular power minus 1) counts skipped at a time.

Abstract: A structure of an image sensor for sensing the light of an image impinging thereupon and for translating the image into a standard television format is disclosed. The structure comprises a plurality of first and second light detecting elements (22, 23) arranged in rows and columns and half as many rows and columns as scan lines of a television format for generating respective analog signals in proportion to the intensity of the light impinging respectively on each of the first and second light detecting elements (22, 23), wherein the first and second light detecting elements in each row are alternately disposed and activated by first read lines RDOn (n=1 . . . 256) to generate odd field signals, and wherein the first and second light detecting elements (22, 23) of two adjacent rows disposed in a zigzag or serrated manner are activated by second read lines RDEn (n=1 . . . 256) to generate even field signals.

Abstract: A solid-state image pickup apparatus includes a timing signal feeding section for outputting signals assigned to a preliminary pickup mode as well as signals assigned to an actual pickup mode that follows the preliminary pickup mode. In the preliminary pickup mode, signal charges read out of photodiodes are mixed and read out via a horizontal transfer path as if they were reduced in the horizontal direction, thereby increasing a substantial transfer rate. A signal processor includes a preliminary pickup processing circuit. The preliminary pickup processing circuit performs calculations with digital data derived from the mixed signal charges. As a result, the representative primary colors R (red), G (green) and B (blue) of a plurality of signal charges are produced from the mixed, reduced signals by approximation or within a preselected horizontal range. A luminance signal and chrominance signals are then produced from the above colors R, G and B.

Abstract: An image sensor with a light reader circuit coupled to a pixel array. The light reader circuit retrieves a first image and a second image generated by the pixel array. The image sensor may also include a memory controller and/or data interface that transfers the first and second images to an external device in an interleaving manner.

Abstract: A solid-state imaging device includes a plurality of sensor portions, and a vertical shift register corresponding to each of a series of sensor portions. A transfer electrode of the vertical shift register is formed of a first electrode and a second electrode which are repeatedly provided corresponding to the respective series of sensor portions and also formed continuously between the sensor portions adjacent to each other in the vertical direction. A signal charge is read out from each of the sensor portions through a portion below a read gate portion of the first electrode between sensor portions a located in the vertical direction.

Abstract: In order to select an image pickup area and execute an image pickup operation, or to perform an interlace operation, or to vary an image pickup frequency for one image pickup sensor, there is provided an image pickup apparatus constructed by a 2-dimensional solid state image pickup sensor in which pixel data instructed by horizontal and vertical shift registers is accessed and read out and a timing generator to drive the 2-dimensional solid state image pickup sensor. With respect to horizontal and vertical shift pulses which are supplied from the timing generator and drive horizontal and vertical shift registers of the 2-dimensional solid state image pickup sensor, periods of the horizontal shift pulses and/or the vertical shift pulses are made variable.

Abstract: An electronic camera according to the present invention includes: an image pickup part for picking up a subject image to produce image data; a processing part for processing the image data outputted from the image pickup part to produce a quickview image for monitor display and also produce image data for record on a recording medium; and a monitor part for displaying the quickview image. The processing part commences displaying the quickview image on the monitor part prior to the production of the image data for record. This processing allows the display of the quickview image to be commenced without waiting for completion of the production of the image data for record. Therefore, it is possible to shorten the time lag occurring at displaying the quickview image, thereby improving the convenience of the electronic camera.

Abstract: In order to select an image pickup area and execute an image pickup operation, or to perform an interlace operation, or to vary an image pickup frequency for one image pickup sensor, there is provided an image pickup apparatus constructed by a 2-dimensional solid state image pickup sensor in which pixel data instructed by horizontal and veritical shift registers is accessed and read out and a timing generator to drive the 2-dimensional solid state image pickup sensor. With respect to horizontal and vertical shift pulses which are supplied from the timing generator and drive horizontal and vertical shift registers of the 2-dimensional solid state image pickup sensor, periods of the horizontal shift pulses and/or the vertical shift pulses are made variable.

Abstract: A frame/field converter circuit addition-processes image data constituting respective fields in a ratio corresponding to an image pickup mode or the like and outputs the resulting image data. As a result of this, it is possible to perform addition processing on image data constituting respective fields in an optimum ratio corresponding to an image pickup mode or the like and output the resulting image data. This makes it possible to improve the frequency characteristic and S/N ratio of the image and thereby enhance the quality of the displayed image. A contour compensation circuit performs contour compensation processing with respect to the frequency band of the image data in correspondence with the zoom magnification. As a result of this, it is possible to mitigate the level of the return noises generated in correspondence with the zoom magnification and thereby prevent the deterioration of the frequency characteristic and S/N ratio of the image to thereby enhance the quality of the image.

Abstract: A signal charge in an amplifying type solid-state imaging device of a capacitor load charge system can be detected efficiently. The amplifying type solid-state imaging device is composed of a plurality of pixel transistors, a load capacitor for accumulating signal charges of an amount corresponding to light incident on the pixel transistor, an operational amplifier having a first input terminal connected with the load capacitor element and a second input terminal to which a bias voltage is applied, a detection capacitor element connected in parallel to the operational amplifier and a reset switch for resetting the detection capacitor element.

Abstract: A system and method for optically, serially transmitting data to a remote device using an interlaced display device. The data bits to be transmitted are ordered so that the bits are received in proper temporal order by the remote device. At least one of the data bits can be transmitted using the even-numbered horizontal scan lines of the interlaced display device. If all of the data bits can not be transmitted using the even-numbered horizontal scan lines of a usable transmission area, then at least one of the data bits can be transmitted using the odd-numbered horizontal scan lines of the interlaced display device. The binary data bits can be represented by illuminated and non-illuminated horizontal scan lines. An optical detector in the remote device can be used to receive the pulses of light, representing the data bits to be transmitted, from the horizontal scan lines.

Abstract: An XY-address solid-state image pickup apparatus comprises a pixel array made up a plurality of pixels two-dimensionally arranged and horizontal and vertical scanning circuits for reading the signal from the pixel array. Each scanning circuit comprises a plurality of unit stages cascaded, each unit stage comprising a plurality of first shift register units cascaded and a single second shift register unit which is associated with the plurality of first shift register units and which is driven by a clock different from the clock that drives the plurality of first shift register units. Each unit stage further comprises a first switch and a second switch. The input to the first unit of the first shift register units is also fed to the second shift register unit via the first switch. The output of the second shift register unit is fed to each of the plurality of first register units within the unit stage via the second switch.

Abstract: A solid-state CCD image pick-up device includes optoelectric transducing elements corresponding to pixels vertically and horizontally arrayed in a matrix forming column linear arrays defining a column direction and at least one vertical charge transfer path associated with a corresponding adjacent column linear array. Pixel signals are vertically transferred from the column linear arrays to the vertical charge transfer paths such that gate signals occurring at predetermined times are applied to gate electrodes of the vertical charge transfer paths to permit the pixel signals to be scan read by a horizontal charge transfer path. Switching elements are provided for transfer gate electrodes and a drive circuit sequentially generates drive signals for groups of gate electrodes during periods in which the switching elements are rendered conductive to allow a full frame scan read to be performed by supplying a predetermined number of timing signals to the gate electrodes.

Abstract: A solid-state image pickup device includes an array of rows and columns of pixels, a vertical scanning circuit having vertical scanning circuit units disposed to correspond to alternate pixel rows in the vertical direction, a horizontal scanning circuit for taking a pixel signal out of pixel rows being currently selected by the vertical scanning circuit, and selected-row changeover switch section consisting of a pair of first and second switches for transferring an output of one vertical scanning circuit unit to a preceding pixel row and a succeeding one of a certain row corresponding to this unit. A select signal is derived from the unit during two successive horizontal scanning periods, causing the first switch to turn on and the second one to turn off within a first horizontal scanning period, and also causing, during the following horizontal scanning period, the second switch to turn on and the first one to turn off.

Abstract: A signal charge in an amplifying type solid-state imaging device of a capacitor load charge system can be detected efficiently. The amplifying type solid-state imaging device is composed of a plurality of pixel transistors, a load capacitor for accumulating signal charges of an amount corresponding to light incident on the pixel transistor, an operational amplifier having a first input terminal connected with the load capacitor element and a second input terminal to which a bias voltage is applied, a detection capacitor element connected in parallel to the operational amplifier and a reset switch (33) for resetting the detection capacitor element.

Abstract: A 3-phase charge-coupled imaging device is operated in the interlace mode. During integration, voltages are applied to the clock electrodes such that charge is integrated below the same set of electrodes each time. The signal charges of the first field are formed in that 3/4 portion of the charge in each picture element is augmented by 1/4 portion of the charge of the preceding picture element, while the signal charges of the second field are formed in that the 3/4 portion is augmented by 1/4 portion of the charge generated in the following picture element. These summations may be carried out in the sensor itself in that the charge packages are shifted to the left and right during integration. The flicker which is usually the result of interlacing is very strongly reduced in this way.

Abstract: A solid-state imaging device includes a two-dimensional array of photodetectors, a TG scanner outputting a selection pulse for reading out signal charges stored in the photodetectors, an interlace circuit receiving the selection pulse from said TG scanner and converting the selection pulse to a field storage mode operation pulse or to a frame storage mode operation pulse, and an interlace switching circuit receiving the pulse from said interlace circuit and switching the array of photodetectors between the field storage mode and the frame storage mode. The switching between the frame storage mode and the field storage mode is controlled by an external control signal. Therefore, the solid-state imaging device can select an optimum interlace system according to background conditions and the brightness and size of objects imaged.

Abstract: An apparatus for interpolating pixels using correlated dual sample-hold processing for detecting and removing dark current occurring during the feed through period to thereby improve the resolution of a 3-panel type video camera includes first and second composite delay elements for selectively delaying respective ones of signals corresponding to R, G and B channels to permit selected delay of a pair of the signals by 1/2 pitch delays of 1/3 pitch delays during interlacing for interpolating pixels. A method for signal processing using selected pitch delay values is also disclosed.

Abstract: A solid-state imaging apparatus capable of changing a vertical resolution (MTF) without damaging the dynamic resolution. A CCD drive circuit 6 for driving a CCD image sensor 2 of an imaging section 3 is controlled by a control section 7 to independently vary effective charge storage periods of respective photoelectric conversion of the CCD image sensor 2 with respect to photoelectric conversion of odd columns and photoelectric conversion elements of even columns and to add and mix, every field, image pick-up charges obtained by respective adjacent photoelectric conversion elements of odd and even columns to read them out. A CCD drive circuit 6 for driving a CCD image sensor 2 of an imaging section 3 may also be controlled by a control section 7 to carry out control of the electronic shutter function of the CCD image sensor 2, and to control the effective charge storage periods of respective photoelectric conversion elements in a manner caused to interlock with the electronic shutter function.

Abstract: A solid-state imaging device which can generate finite difference data of images at different times. There are provided with photoelectrical converting sections each of which includes photodiodes disposed in a matrix array and receives incident light to generate signal charges. A signal charge difference generating section generates a signal charge difference at different times from the signal charges generated in the photoelectrical converting section. A signal charge difference transfer section transfers the signal charge difference generated as an output of the device.

Abstract: A method for driving an interline transfer type CCD imager by reading out a signal charge accumulated in one of first and second light receiving pixels to corresponding one of first and second accumulation regions. Part of the signal charge is transferred to the other one of the first and second accumulation regions which is disposed adjacently to the one of the accumulated regions. Another signal charge accumulated in the other one of the first and second light receiving pixels is read out so as to add the other signal charge to the part of the signal charge. Thereafter, the remaining part of the signal charge is transferred to the adjacent other one of the first and second accumulation regions.

Abstract: The semiconductor image sensor element comprises a transistor gate potential well 102, a virtual potential well 100 adjacent the transistor gate potential well 102, a clear gate barrier 104 adjacent the virtual potential well 100, a clear drain 30 adjacent the clear gate barrier 104, and a charge sensor 28 for sensing charge levels in the transistor gate potential well 102. The charge levels are responsive to light incident on the device. Charge is stored in the virtual potential well 100 during charge integration. After charge integration, the charge is transferred into the transistor gate potential well 102 from the virtual potential well 100 for charge detection by the charge sensor 28. After charge detection, the charge is transferred from the transistor potential well 102 to the clear drain 30.

Abstract: System and method to achieve high resolution and sensitivity from scanned focal plane array detectors without generating objectionable articfacts by scanning a scene in alternate odd and even channels at a predetermined scanning rate to provide a plurality of equally time spaced samples in each channel, offsetting the samples in the even channels relative to the odd channels to be time spaced intermediate adjacent samples of the odd channels, forming a plurality of odd TV lines, each of the odd lines composed of the samples from a different one of the odd channels and the interstices between the samples in each of the odd lines being composed of a sample which is a function of the samples abutting each of the interstices in the odd lines, forming a plurality of even TV lines, each of the even lines composed of the samples from a different one of the even channels and the interstices between the samples in each of the even lines being composed of a sample which is a function of the samples abutting each of the