Charges Transferred To Opposed Registers Patents (Class 348/316)
  • Patent number: 6005617
    Abstract: Using a common area sensor to build a high resolution electronic camera requires a large sensor chip with an incumbent high cost. Using a line sensor results in slow imaging and therefore limited applications. An electronic camera using a small sensor chip with high speed imaging is therefore provided. A two-dimensional imaging device that is narrower than an area sensor subscans the imaging plane of the lens system by means of a scanning device. The charge transfer register of the two-dimensional imaging device is driven by an X clock generator in the opposite direction and at the same speed as the subscanning speed, thereby achieving TDI operation and high speed image capturing.
    Type: Grant
    Filed: March 10, 1997
    Date of Patent: December 21, 1999
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takeshi Shimamoto, Yoshihiro Yokoyama
  • Patent number: 5995247
    Abstract: A method of input scanning an image using a detector comprising an array of radiation sensors, the method comprising1) exposing the radiation sensors to radiation from the image over a plurality of sampling periods, and for each respective sampling period:2) obtaining a single data value from each radiation sensor;3) summing the data values obtained during the sampling period;4) determining a peripheral response value in accordance with the sum obtained in step 3), wherein the peripheral response value for each sampling period is determined independently of the peripheral response values for the other sampling periods; and5) modifying the data values in accordance with the peripheral response value obtained in step 4).
    Type: Grant
    Filed: July 31, 1997
    Date of Patent: November 30, 1999
    Assignee: Fujifilm Electronic Imaging Ltd.
    Inventor: Grahame Bradburn
  • Patent number: 5946034
    Abstract: A charge/voltage conversion device of a CCD type charge transfer read register comprises a read diode and a read amplifier, wherein the read amplifier comprises a first amplification stage enabling the conversion, into current variations (.DELTA.I), of the voltage variations (.DELTA.Vg) collected at the terminals of the read diode and a second amplification stage enabling a reading to be made of said current variations. The disclosed device can be applied especially to photosensitive devices enabling the conversion of a light image into an electrical signal.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: August 31, 1999
    Assignee: Thomson-CSF Semiconducteurs Specifiques
    Inventor: Jean-Alain Cortiula
  • Patent number: 5923370
    Abstract: A fast frame interline transfer charge coupled device imaging sensor includes an imaging section and an storage section. The imaging section includes a plurality of interline transfer registers, each interline transfer register containing a plurality of interline register elements. The imaging section further includes an interline clocking structure, the interline clocking structure including polycrystalline silicon buss lines used as gate electrodes, the polycrystalline silicon buss lines being connected to a metal strapping network, the interline clocking structure causing charge to be transferred between interline register elements of each interline transfer register based on interline clocking signals. The storage section is coupled to the imaging section. The storage section includes a plurality of storage registers, each storage register containing a plurality of storage register elements. The storage section further includes a storage discharge structure and a storage clocking structure.
    Type: Grant
    Filed: October 8, 1996
    Date of Patent: July 13, 1999
    Assignee: Dalsa, Inc.
    Inventors: Michael Miethig, Charles Russell Smith, Eric Charles Fox, Michael George Farrier
  • Patent number: 5920346
    Abstract: In a two-dimensional CCD image sensor, vertical transfer channels (6) are arranged to receive charge packets from a matrix array of photodiodes (1), and row electrodes (3) are connected to the vertical transfer channels for shifting the charge packets row by row along the vertical transfer channels. A horizontal transfer channel (14) has stages for receiving charge packets from corresponding vertical transfer channels (6). Each stage of the horizontal transfer channel is formed with first and second sets of a storage region (A1; A2) and two barrier regions (B1, C1; B2, C2) each. For each stage, a group of first, second, third and fourth adjoining electrodes (27, 28, 29, 30) is provided, the first and second electrodes being connected to receive a first phase clock pulse and the third and fourth electrodes being connected to receive a second, opposite phase clock pulse.
    Type: Grant
    Filed: October 22, 1996
    Date of Patent: July 6, 1999
    Assignee: NEC Corporation
    Inventor: Yasutaka Nakashiba
  • Patent number: 5874993
    Abstract: A solid state image sensor architecture that utilizes drain structures at one or more locations on a shift register, as set by the design, allowing the user to select which charge packets are needed to represent the image and draining the remaining packets. Since the used packets are drained, there is no need to provide clock cycles to output charge packets that are not used while in the low resolution mode. Clocking can be stopped after the needed number of cycles without leaving charge packets in the shift register without the possibility of corrupting subsequent image information by charge packets that have not been removed. Additionally, the reduction in clock cycles decreases the time required to process the current information, and allows the system to operate at higher speeds.
    Type: Grant
    Filed: April 21, 1995
    Date of Patent: February 23, 1999
    Assignee: Eastman Kodak Company
    Inventors: Antonio S. Ciccarelli, Herbert J. Erhardt, Martin Potucek
  • Patent number: 5867215
    Abstract: An image sensing device having an array of photodetectors capable of generating electron/hole pairs from incident photons, with multiple charge coupled devices organized in a tandem well design that employs multiple storage wells per pixel. The wells use thresholds to control the overflow of charge from one well to the next and are arranged such that a first charge coupled device having a plurality of cells is operatively coupled to the photodetectors by first transfer means for placing charge accumulated within the photodetectors from generated electron/hole pairs within the first charge coupled device, and a second charge coupled device having a plurality of cells being operatively coupled to the first charge coupled device by second transfer means for removing charge exceeding a predetermined threshold within the first charge coupled device and placing charge exceeding the predetermined threshold within the second charge coupled device.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: February 2, 1999
    Assignee: Eastman Kodak Company
    Inventor: Martin C. Kaplan
  • Patent number: 5847757
    Abstract: A driving method for a solid-state image sensing device includes the steps of: transferring signal charges generated at pixels (12) arranged in odd rows in the column upward direction through vertical transfer paths (13) each arranged for each column; temporarily accumulating the upward transferred signal charges for one field at a first accumulation region (14) and transferring the accumulated signal charges row by row in sequence for each field period through other vertical transfer paths (18) to a first horizontal path (16); transferring the upward transferred signal charges in the horizontal row direction row by row through the first horizontal transfer path (16); transferring signal charges generated at pixels (12) arranged in even rows in the column downward direction through the same vertical transfer paths (13); temporarily accumulating the downward transferred signal charges for one field at a second accumulation region (15) and transferring the accumulated signal charges row by row in sequence for e
    Type: Grant
    Filed: February 23, 1996
    Date of Patent: December 8, 1998
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobusuke Sasano, Kenichi Arakawa, Tomoaki Iizuka, Miho Kobayashi, Hideki Motoyama, Tetsuo Yamada
  • Patent number: 5784101
    Abstract: A color linear image sensor is constituted by forming a plurality of linear image sensors on a single wafer, each linear image sensor including a photoelectric conversion unit for converting light from an object into an electrical signal, a plurality of charge transfer units for transferring the signal converted into the electrical signal by the photoelectric conversion unit to an output unit, and color filters which are formed on the photoelectric conversion unit to color-separate the light from the object. A plurality of lines of photoelectric conversion units are arranged in each linear image sensor. At least one charge transfer unit is arranged between the photoelectric conversion units to synthesize output signals from the plurality of lines of photoelectric conversion units and to transfer the output signals from the photoelectric conversion units to the next photoelectric conversion unit. An accumulation unit temporarily stores the output signals from the photoelectric conversion units.
    Type: Grant
    Filed: January 31, 1995
    Date of Patent: July 21, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shizuo Hasegawa
  • Patent number: 5777672
    Abstract: In a CCD type photosensitive device, the charges produced in two consecutive columns of pixels are transferred into different reading registers: the charges from the first column are loaded into the first register and the charges from the second column travel through the first register to be loaded into the second register. The two reading registers are controlled by independent potentials during the step for the loading of these registers. The device makes it possible to increase the efficiency of the transfer between the two reading registers, especially when the registers are of the type working in a two-phase mode.
    Type: Grant
    Filed: April 19, 1994
    Date of Patent: July 7, 1998
    Assignee: Thomson Composants Militaires et Spatiaux
    Inventors: Yvon Cazaux, Louis Brissot, Bruno Gili
  • Patent number: 5737098
    Abstract: A technique and structure is used for producing high resolution color images using a monochrome area charge-coupled device (CCD) 64 and a sequential color illumination scheme. The monochrome CCD 64 comprises a plurality of semiconductor storage cells 76, the semiconductor storage cells 76 being configured in an array having vertical columns 74 and horizontal rows 79. The entire CCD 64 is exposed to a first color image. The charge packets 82 stored in two adjacent horizontal rows as a result of the exposure are then shifted into a third horizontal row. The CCD 64 is then exposed to a second color image. The charge packets 82 stored in the first horizontal row as a result of the second exposure are then shifted into the second horizontal row. The CCD 64 is then exposed to a third and final color image. The CCD output is digitized and stored in a frame. The color information of a particular location on the CCD array 64 is derived by utilizing a simple set of equations.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: April 7, 1998
    Assignee: Loral Fairchild Corporation
    Inventor: Michel Sayag
  • Patent number: 5715002
    Abstract: A CCD type charge-transfer photosensitive device (Z1) comprises a photosensitive zone (Z2) formed by at least one line of pixels and designed for the conversion, into electrical charges, of the photons coming from an image and a non-photosensitive zone designed to remove the charges generated in the photosensitive zone and comprising a read register (RL) consisting of transfer stages (ET), the charges generated in a pixel of the photosensitive zone (Z1) being collected in a transfer stage of the read register, wherein the read register (RL) is formed by Q elementary sub-registers Rj (j=1, 2, . . . , Q), each elementary sub-register being formed by a whole number Mj of transfer stages (ET) enabling the transfer of the charges from the first-order stage up to the M order stage, M possibly being different for two different elementary sub-registers, and a read diode located in the M order transfer stage so as convert the variations of charges collected at the terminals of the diode into voltage variations.
    Type: Grant
    Filed: April 2, 1996
    Date of Patent: February 3, 1998
    Assignee: Thomson-CSF Semiconducteurs Specifiques
    Inventor: Jean-Alain Cortiula
  • Patent number: 5696555
    Abstract: A camera-integrated video recorder in which a camera portion and a recorder portion are disposed in a single casing is arranged in such a manner that a grip portion having a viewfinder and a control portion for controlling the recorder portion is rotatably and detachably fastened to the casing. The grip portion acts as a remote control device for remote-controlling the camera portion and the recorder portion when it has been detached from the casing. The casing has an image transmission circuit for transmitting monitor image information to the viewfinder in the grip portion.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: December 9, 1997
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazunori Kashimura
  • Patent number: 5693946
    Abstract: A Bi-Linear CCD Array is used to locate the centroid of a charge cloud produced by an MCP stack. Preferably, an anode comprises a checkerboard-like structure of x- and y- conductive pads. The x-pads are connected in columns and feed charge into x-charge buckets via a FET pass gate. The y-pads are connected in rows and feed charge into y- charge buckets via an FET gate. A conductive area collects charge that misses the x- or y- pads and is used to sense the arrival of a charge cloud. The x- and y-charge buckets, under the influence of x- and y-shift circuitry, pass their charge to x- and y-charge amplifiers. X- and y- counters keep track of the number of x- and y- shifts that occur before x- and y-detectors, connected to the x- and y-charge amplifier outputs respectively, locate the x- and y-bucket containing the most charge. Latching the x- and y-counter values when the respective x- and y-peaks occur captures the centroid coordinates of the charge cloud.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: December 2, 1997
    Assignee: Trustees of Boston University
    Inventors: James Squire Vickers, Supriya Chakrabarti
  • Patent number: 5652622
    Abstract: Described is a new high performance CCD image sensor technology which can be used to build a versatile image sensor family with the sensors that have high resolution and high pixel density. The described sensor architectures are based on a new charge super sweep concept which was developed to overcome such common problems as blooming and the image smear. The charge super sweep takes place in very narrow vertical channels located between the photosites similar to the Interline Transfer CCD devices. The difference here is that the charge is never stored in these regions for any significant length of time and is swept out using a new resistive gate traveling wave sweeping technique, The charge super sweep approach also allows the fast charge transfer of several lines of data from the photosites located anywhere in the array into the buffer storage during a single horizontal blanking interval.
    Type: Grant
    Filed: June 29, 1994
    Date of Patent: July 29, 1997
    Inventor: Jaroslav Hynecek
  • Patent number: 5600369
    Abstract: A method of detecting electromagnetic radiation imparted onto a matrix of photosensitive photomos networks in which pixels of each photomos network are simultaneously exposed to electromagnetic radiation source for a predetermined period of time. Thereafter, transfer signals are applied to each photomos pixel and accumulated charges corresponding to the strength of the radiation imparted onto the pixels are transferred in a columnwise fashion to the end of each column of the photomos networks. The charges are summed at the end of the columns and placed in a reading register. The charges in the reading register of each photomos network are summed and a signal is output corresponding to the strength of the electromagnetic radiation imparted onto the photomos network.
    Type: Grant
    Filed: May 2, 1995
    Date of Patent: February 4, 1997
    Assignee: Thomson Composants Militaires Et Spatiaux
    Inventors: Yvon Cazaux, Jean-Louis Coutures, Pierre Dautriche, Gilles Boucharlat
  • Patent number: 5539536
    Abstract: A linear sensor for sampling vertically opposed pixels of a plurality of vertically arranged sensor rows substantially at a time. A plurality of horizontal transfer registers and a plurality of shift gates are provided to oppose the plurality of sensor rows. A vertical transfer register is provided at one end of the plurality of horizontal transfer registers. In the vertical transfer register, the signal charges which have been transferred by the plurality of horizontal transfer registers are transferred sequentially in vertical direction. A charge/voltage converter unit is provided at the output of the vertical transfer register. The signal charges accumulated in the vertically opposed pixels are sequentially transferred to the charge/voltage converter unit in a repetitive manner.
    Type: Grant
    Filed: March 18, 1993
    Date of Patent: July 23, 1996
    Assignee: Sony Corporation
    Inventors: Yasuhito Maki, Motoaki Abe, Tadakuni Narabu, Hideo Nomura
  • Patent number: 5500674
    Abstract: In a method of driving a solid-state image sensor having an effective pixel area formed of a plurality of pixels in an array having M pixels in the vertical direction and N pixels in the horizontal direction, a scanning pixel area formed of m pixels in the vertical direction and n pixels in the horizontal direction (where M>m, N.gtoreq.n) is established within the effective pixel area, and charges stored in the pixels in the scanning pixel area are transferred by vertical CCDs driven by a first scanning pulse to a horizontal CCD and the charges transferred to the horizontal CCD are transferred by the horizontal CCD driven by a second scanning pulse to an output portion of the horizontal CCD.
    Type: Grant
    Filed: January 9, 1995
    Date of Patent: March 19, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Satoshi Takase, Takuya Imaide, Toshiro Kinugasa, Ryuji Nishimura
  • Patent number: 5500675
    Abstract: In the method of driving a solid-state image sensing device, for each vertical blanking (VBL), the signal charges of a first pixel group composed of photosensitive pixels of odd ordinal numbers counted in the vertical direction of the photosensitive region and the signal charges of a second pixel group composed of photosensitive pixels of even ordinal numbers counted in the same way are reversed in the vertical transfer direction, so that the signal charges of the first and second pixel groups can be outputted from the same charge detecting circuit for each field. Further, unnecessary accumulated charges in the pixel groups in the photosensitive region are cleared off in response to an accumulated charge clear pulse.
    Type: Grant
    Filed: February 14, 1994
    Date of Patent: March 19, 1996
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kenichi Arakawa, Nobusuke Sasano, Tomoaki Iizuka, Miho Kobayashi, Tetsuo Yamada, Hideki Motoyama
  • Patent number: 5497192
    Abstract: A video signal processing apparatus for correcting vibration effects in a video camera that has a CCD image pickup device having a number of lines greater than the number of lines of the standard NTSC television system. The lines used to generate the image are shifted during the vertical blanking interval to correct for vibrations of the video camera, and the overflow charges which are caused by transferring the CCD image pickup device at a high speed during the blanking period are absorbed into a semiconductor drain element arranged in parallel with the horizontal transfer register of the CCD image pickup device. Defective pixels in the image pickup device are compensated by storing the addresses of defective pixels and interpolating at those positions, during vibration correction the addresses of the defective pixels are shifted to correspond to the amount of vibration correction.
    Type: Grant
    Filed: February 28, 1995
    Date of Patent: March 5, 1996
    Assignee: Sony Corporation
    Inventor: Shigeki Ishizuka
  • Patent number: 5440343
    Abstract: An electronic imaging system is provided that records both motion and still video images. In a motion mode of operation, the electronic imaging system records NTSC resolution images at a standard thirty frame per second rate. In a still mode of operation, the electronic imaging system records megapixel resolution still images at a much lower frame rate. The electronic imaging system utilizes an electronic image sensor that incorporates column selective "charge clearing" structures and column selective "charge parking" structures. The charge clearing structures are used to selectively discard the signal charge from certain color pixels. The charge parking structures are used to sum the charge from multiple vertical pixels. The architecture of the electronic image sensor also allows different image aspect ratios to be provided for the motion and still modes described above.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: August 8, 1995
    Assignee: Eastman Kodak Company
    Inventors: Kenneth A. Parulski, Eric G. Stevens, Robert H. Hibbard
  • Patent number: 5432551
    Abstract: The present invention is directed toward an image sensor array comprising a plurality of pixels. Each pixel includes a photodiode and a CCD channel region. An overflow drain region is provided adjacent the CCD channel region for extraction of excess charges. An insulated gate read-out transfer electrode is further provided above the CCD channel region and a portion of the substrate between the CCD channel region and the photodiode. Three different potentials are applied to the read-out transfer electrode for respectively storing charge in the photodiode, extracting excess charge from the photodiode while allowing signal charge to remain in the photodiode, and reading out signal charge from the photodiode.
    Type: Grant
    Filed: November 13, 1992
    Date of Patent: July 11, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Yoshiyuki Matsunaga
  • Patent number: 5414467
    Abstract: The present invention is directed to a charge transfer device formed on a semiconductor substrate which comprises a channel region formed on the semiconductor substrate, at least a set of transfer gate electrodes formed adjacent to each other and insulated from each other, the set of transfer gate electrode formed over the channel region through an insulating film, clock means for providing the transfer gate electrode with multiple clock pulses, and a plurality of resistors provided between each of the transfer gate electrodes and the clock means, the resistors having respective values corresponding to capacitances of the transfer gate electrodes. Therefore, a transfer efficiency of signal charges can be improved without reducing a maximum amount of signal charges handled by a vertical register.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: May 9, 1995
    Assignee: Sony Corporation
    Inventor: Eiji Komatsu
  • Patent number: 5400071
    Abstract: Column direction transfer sections provided every photosensitive element trains are such that the transfer direction of the odd columns and that of the even columns are opposite to each other. A conversion section for reversing the transfer order is connected to at least one final transfer stage of the column direction transfer sections, and charges transferred are thus transported to row direction transfer sections. Thus, it is possible to transfer and output, in the same direction, signal charges transferred in directions opposite to each other every columns to the two row direction transfer sections in such a manner that those signal charges are distributed thereto. For this reason, the number of transfer stages of each row direction transfer section can be reduced to one half, the dimension every stage can be twice larger than that of the prior art, and the operating frequency can be also reduced to one half.
    Type: Grant
    Filed: November 29, 1991
    Date of Patent: March 21, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tetsuo Yamada
  • Patent number: 5398063
    Abstract: A focusing position detecting device of this invention comprises a CCD image sensor including a light receiving section in which an image of a subject which is formed by an image forming optical system and is an object of focusing position detection is projected on a plurality of picture elements, a shift register for transferring charges read out from the picture elements in synchronism with a charge transfer clock, and an output section for sequentially storing charges transferred by the shift register, a picture element readout circuit for supplying a picture element readout signal to the CCD image sensor and reading out charges stored in the picture elements to the shift register, a sampling circuit for sampling the charges stored in the output section to derive a luminance signal for each of the picture elements, a focusing position deriving circuit for deriving the focusing position of the image forming optical system from the luminance signal sampled by the sampling circuit, and a reset circuit for res
    Type: Grant
    Filed: July 2, 1992
    Date of Patent: March 14, 1995
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Motokazu Yamana
  • Patent number: 5387935
    Abstract: A solid state imaging device having a horizontal transfer register formed of a plurality of transfer sections for alternately transferring a signal charge of the same pixel in the horizontal direction wherein a signal charge can be distributed between respective transfer sections in consideration of the amount of signal charges handled by the respective transfer section. In a first horizontal transfer register (4) having transfer sections (4a) and (4b), a control gate section (5) that distributes signal charges between the respective transfer sections (4a) and (4b) has on its one region a potential barrier section (13) formed along the horizontal transfer direction.
    Type: Grant
    Filed: September 21, 1993
    Date of Patent: February 7, 1995
    Assignee: Sony Corporation
    Inventor: Atsushi Kobayashi
  • Patent number: 5381177
    Abstract: A CCD delay line comprises of first, second and third transfer regions which are formed in a semiconductor substrate. Output portions of the second and third transfer regions are connected to a differential amplifier. The output terminal of the differential amplifier is connected to input sources of the first and second transfer regions. The third transfer region is able to carry at most 30% of maximum amount of charge which the first and second transfer regions can carry. A signal is supplied from a signal source through a clamp circuit to an input gate electrode of the first transfer region. Bias changing means independently change one of an input bias voltage supplied to the input gate electrode of the first transfer region and a reference bias voltage supplied to an input gate electrode of the second transfer region.
    Type: Grant
    Filed: March 30, 1993
    Date of Patent: January 10, 1995
    Assignee: Sony Corporation
    Inventors: Katsunori Noguchi, Tetsuya Kondo
  • Patent number: 5379068
    Abstract: Solid state imaging devices include an image sensor having a two-dimensional matrix of picture elements arranged horizontally and vertically. A vertical scanning circuit selects horizontal lines of picture elements within the two-dimensional matrix in a predetermined order for reading the picture elements. A horizontal scanning circuit coupled with a plurality of vertical lines joining vertically spaced ones of the picture elements serves to select picture elements in the horizontal lines selected by the vertical scanning circuit to output image signals therefrom. The horizontal scanning circuit is operative to scan the picture elements of the selected horizontal lines through one side of the two-dimensional matrix in a first horizontal direction to output a normal image signal.
    Type: Grant
    Filed: April 28, 1993
    Date of Patent: January 3, 1995
    Assignee: Sony Corporation
    Inventor: Masaharu Hamasaki
  • Patent number: 5379067
    Abstract: A CCD linear sensor. A photosensor row has photosensitive regions. Read-out gate electrodes and shift registers are formed on opposite sides of the photosensor row. A channel separating region is formed along the center of the photosensor row for separating each of the photosensitive region into two photosensitive portions. Charges accumulated in the photosensitive portions are read-out dividedly in both directions through the read-out gate electrodes to the shift registers. In the CCD linear sensor, the length of charge transfer path is reduced, therefore, charge reading-out time can be reduced.
    Type: Grant
    Filed: March 31, 1993
    Date of Patent: January 3, 1995
    Assignee: Sony Corporation
    Inventor: Hisanori Miura
  • Patent number: 5291294
    Abstract: A charge coupled device imager has an imaging section comprising a plurality of photoelectric converting sections and a plurality of horizontal charge transfer sections arranged in a matrix configuration divided into two sections. Each of the photoelectric converting sections is surrounded with a channel stop region for isolating each other and a readout gate region. Signal charges in the imaging section are transferred by the horizontal charge transfer sections in opposite horizontal directions according to the raster scanning direction of television signal, so that the horizontal charge transfer sections in an unit cell are not elongated in the vertical direction and transfer frequency is lowered. As a result of the horizontal transfer in the imaging section, the photoelectric converting sections can be arrayed with high density in horizontal direction to achieve high horizontal resolution.
    Type: Grant
    Filed: February 3, 1992
    Date of Patent: March 1, 1994
    Assignee: Sony Corporation
    Inventor: Isao Hirota
  • Patent number: 5286990
    Abstract: A virtual phase image sensor has majority carriers supplied to a virtual gate 24 by a conductor 32 overlying the image sensor, the virtual gate 24 and the conductor 32 each in contact with a conductive channel stop region 30.
    Type: Grant
    Filed: July 1, 1992
    Date of Patent: February 15, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 5283450
    Abstract: A solid state image sensing device comprising first and second horizontal shift registers of two-phase drive system, a smear drain region disposed in an opposing relation to a first storage section of the second horizontal shift register to which the first phase drive pulse of the second horizontal shift register is applied and a channel stop region disposed in an opposing relation to a second storage section of the second horizontal shift register to which the second phase drive pulse is applied, wherein a smear component is drained to the smear drain region, and a hole component is drained to the channel stop region for thereby reducing a dark current of the second horizontal shift register to about that of the first horizontal shift register. Therefore, a dark current in the horizontal shift register of the solid state image sensing device can be reduced.
    Type: Grant
    Filed: April 13, 1992
    Date of Patent: February 1, 1994
    Assignee: Sony Corporation
    Inventor: Kouichi Harada