Abstract: A display controller includes a first chip and a second chip. The first chip is configured to control a display device. The second chip is externally coupled to the first chip, and configured to be a random access memory and. The first chip is further configured to provide a first supply power to the second chip and to access the second chip during the controlling of the display device.

Abstract: An array substrate and a manufacturing method thereof, a motherboard and a display device are disclosed. The array substrate has a display region and a non-display region, and includes a base substrate, and a plurality of signal lines and at least one transfer electrode that are on the base substrate. The plurality of signal lines extend from the display region to the non-display region along a first direction, at least one of the plurality of signal lines includes a first trace in the display region and a second trace in the non-display region, the second trace includes at least two sub-traces disconnected from each other, a sub-trace, close to the display region, of the at least two sub-traces of the second trace is directly connected with the first trace, and every two adjacent sub-traces of the second trace are electrically connected with each other.

Abstract: A display panel includes: a silicon-based substrate, a driving layer, a first electrode layer, an organic light emitting layer, a second electrode layer and a plurality of pads. The display signal access pad is configured to access the display signal during a display phase, the test signal access pad at least includes a first group of test phase access pads, and the first group of test phase access pads includes a first pad and a second pad, the first pad is electrically connected with the electrode ring, and the second pad is electrically connected with the silicon-based substrate.

Abstract: A lead wiring line is provided in a frame region to extend therein while intersecting with a frame-shaped dam wall, is formed of a same material and in a same layer as each of a plurality of display wiring lines in which a first metal layer, a second metal layer, and a third metal layer are layered in sequence, is electrically connected to the plurality of display wiring lines on a display region side, and is electrically connected to a terminal on a terminal portion side. The third metal layer is provided to cover a side surface of the first metal layer, and a side surface and an upper face of the second metal layer.

Abstract: Disclosed is a display substrate, including: a base including a display region and a peripheral region; sub-pixels in the display region; data lines in at least the display region and extending in a first direction and electrically connected to the sub-pixels; gate lines in at least the display region and extending in a second direction intersecting with the first direction, and electrically connected to the sub-pixels; pads in the peripheral region; data leads in the peripheral region and electrically connected to the data lines and the pads; a gate driver circuit in the peripheral region and electrically connected to the gate lines; gate drive lines in the peripheral region and electrically connected to the gate driver circuit; gate leads in the peripheral region and extending in the first direction, which are electrically connected to the gate drive lines and the pads and located between the data leads.

Abstract: A transparent display panel with driving electrode regions, circuit wiring regions, and optically transparent regions is provided. The driving electrode regions are arranged into an array in a first direction and a second direction. An average light transmittance of the circuit wiring regions is less than ten percent, and an average light transmittance of the optically transparent regions is greater than that of the driving electrode regions and the circuit wiring regions. The first direction intersects the second direction. The circuit wiring regions connect the driving electrode regions at intervals, such that each optically transparent region spans among part of the driving electrode regions. The transparent display panel includes first signal lines and second signal lines extending along the circuit wiring regions, and each circuit wiring region is provided with at least one of the first signal lines and at least one of the second signal lines.

Abstract: The present disclosure provides a display substrate and a display device. A display substrate provided by an embodiment of the present disclosure includes: a display region and a peripheral region surrounding the display region; the display region includes: a plurality of gate lines, a plurality of data lines, and a plurality of pixel units, and each of the plurality of pixel units includes a driving transistor and a pixel electrode that are connected to each other; the peripheral region includes: signal lines and at least one electrostatic discharge structure for performing electrostatic discharge on the signal lines, and the electrostatic discharge structure includes a comb-shaped sixth electrostatic discharge pattern and a seventh electrostatic discharge pattern.

Abstract: A touch display device includes a backlight module (2) comprising a backlight iron frame (22); and a liquid crystal touch display panel (1) arranged on a light-emitting side of the backlight module; the liquid crystal touch display panel includes a touch electrode (11); and a compensation electrode (R) arranged on a side of the touch electrode facing the backlight module. The compensation electrode and the backlight iron frame are electrically connected with a ground signal terminal; and the touch electrode and the compensation electrode constitute a capacitor (C), a product of a capacitance value of the capacitor and a resistance value of the compensation electrode is smaller than a pulse width of a touch signal applied on the touch electrode, and an order of magnitude of the product is smaller than an order of magnitude of the pulse width of the touch signal.

Abstract: A display device comprises a substrate, a data link line, a power link line, and a dummy pattern. The substrate includes a display area in which pixels are arranged and a non-display area outside the display area. The data link line is positioned in the non-display area to deliver a predetermined signal to the pixels. The power link line is spaced apart from the data link line at a predetermined distance in the non-display area and delivers a predetermined power to the pixels. The dummy pattern is positioned between the data link line and the power link line in the non-display area.

Abstract: An array substrate, a manufacturing method thereof, and a display device are provided. The array substrate includes a display area and a non-display area in which a peripheral circuit is provided. The peripheral circuit includes a test area, a bonding area, and a cutting area. The test area is provided with a test signal line for providing a test signal. The bonding area is adjacent to the display area, and the bonding area and the test area are electrically connected through signal leads. The cutting area is disposed between the test area and the bonding area. After a cutting process is completed in the cutting area, a cutting opening is formed on each signal lead. A position of the cutting opening of at least one signal lead is different from positions of the cutting openings of other signal leads in height along an extending direction of the signal leads.

Abstract: The present disclosure provides a display substrate, including: a display area and a bonding area positioned on a side of the display area, the bonding area includes a plurality of bonding sub-areas arranged at intervals, the bonding sub-areas are arranged along a direction in which an edge of the display area extends and configured for bonding a chip-on-film, where a first antistatic layer is further arranged on the bonding area, at least a part of the first antistatic layer is positioned between adjacent ones of the bonding sub-areas, and the first antistatic layer is electrically coupled to a reference signal terminal. The present disclosure further provides a display device.

Abstract: An array substrate, a display panel, and a display device. The array substrate includes a substrate having a display region and a non-display region surrounding the display region. The display region includes a plurality of signal lines extending along a first direction. The non-display region includes at least three repair lead wires, and welding terminals connected to the repair lead wires in a one-to-one corresponding manner. The signal lines form overlapping regions together with an orthographic projection of at least one repair lead wire on the substrate.

Abstract: An electrostatic protection structure able to discharge static electricity of either polarity from a functional circuit including signal lines includes a discharge electrode and a plurality of electrostatic protection units electrically coupled to the discharge electrode. Each electrostatic protection unit includes a first TFT and a second TFT. The first TFT includes first gate, source, and drain, the second TFT includes second gate, source, and drain. The first gate and the first drain are electrically connected to one signal line. The first source is electrically connected to the second drain, the first drain is electrically connected to the second source, the second gate is electrically connected to the discharge electrode, and the second gate is electrically connected to the second drain.

Abstract: A display substrate and a display apparatus are provided, the display substrate includes: a base substrate including a display area and a peripheral area surrounding the display area; a plurality of sub-pixel units in the display area; a plurality of data lines in the display area and electrically coupled to the plurality of sub-pixel units; a plurality of data transmission lines in the peripheral area on at least one side of the display area and electrically coupled to the plurality of data lines; a plurality of first pads and a plurality of second pads located between the plurality of first pads and the plurality of data transmission lines; a plurality of third pads between the plurality of first pads and the plurality of second pads; and a plurality of multiplexers between the plurality of second pads and the plurality of third pads.

Abstract: A display device includes: a substrate including a first pixel area, a second pixel area having a smaller area than the first pixel area and connected to the first pixel area, and a peripheral area surrounding the first pixel area and the second pixel area; a first pixel provided in the first pixel area and a second pixel provided in the second pixel area; a first line connected to the first pixel and a second line connected to the second pixel; a dummy part disposed in the peripheral area, overlapping at least one of the first line and the second line and providing a parasitic capacitance that compensates for a difference in a load value between the first line and the second line; and a power supply line provided in the first and second pixel areas. The dummy part includes an insulating layer having at least one contact hole.

Abstract: A display device includes a display region and a non-display region. First lines are between the substrate and the first insulating layer in the non-display region. Second lines are on a first insulating layer in the non-display region and are alternately disposed with the first lines. A second insulating layer is over the second lines and has a surface unevenness formed by the first and second lines. Third lines are over the second insulating layer and intersect the first lines and the second lines. First insulating patterns are on the second insulating layer and serve to planarize the surface unevenness. The first insulating patterns are between at least adjacent third lines in a plan view.

Abstract: According to an embodiment, an electronic device may include: a housing including a first surface and a second surface facing away from the first surface; a display at least partially accommodated in the housing and viewable through the first surface; a conductive layer disposed between the display and the second surface and including a first opening; a support disposed between the second surface and the conductive layer and including a conductive portion; and a wireless communication circuit electrically connected to the conductive layer, and configured to transmit and/or receive a signal through an antenna including at least a portion of the conductive layer surrounding the first opening.

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a base substrate; a signal transmission line on the base substrate; at least one electrostatic discharging device and an electrostatic discharging signal line coupled to each other and located at a non-display region of the base substrate. The at least one electrostatic discharging device is configured to discharge static electricity generated in the array substrate. The signal transmission line is coupled with the at least one electrostatic discharging device through at least two branch circuits.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate includes a base substrate, and a transistor, an anti-static wire, a first anti-static resistor and a first ground bonding pad on the base substrate, wherein a first terminal of the first anti-static resistor is electrically connected to a first end of the anti-static wire, a second terminal of the first anti-static resistor is electrically connected to the first ground bonding pad, and the first anti-static resistor is at a different layer from a layer at which the anti-static wire is located and a layer at which the first ground bonding pad is located, and is at a same layer as an active layer of the resistor.

Abstract: This application relates to an electrostatic discharge (ESD) protection structure of a display panel, and a display apparatus. The ESD protection structure includes: a driving chip configured to send a driving signal; a plurality of signal lines arranged in a display area, where the display area is equally divided into a first signal line area and a second signal line area, each of the plurality of signal lines located in the first signal line area is coupled with a positive polarity switch, each of the plurality of signal lines located in the second signal line area is coupled with a negative polarity switch, and the positive polarity switch and the negative polarity switch are electrically connected to the driving chip; and ESD protection circuits, each including a forward diode and a backward diode.

Abstract: A sensor is provided and includes a first control line; a first signal line; a first auxiliary line; a first detection electrode; a first detection switch connected to the first detection electrode, the first control line and the first signal line; and a first shielding electrode connected to the first auxiliary line, wherein the first shielding electrode is located to overlap the first signal line via an insulating film.

Abstract: A display panel and a display apparatus are disclosed. The display panel comprises: a plurality of signal lines extending in a first direction; at least one first reference voltage bus which extends in a second direction intersecting the first direction; and a plurality of electrostatic discharge units divided into a plurality of electrostatic discharge unit groups, wherein the plurality of electrostatic discharge unit groups are arranged in the second direction and each of the plurality of electrostatic discharge unit groups comprises at least two electrostatic discharge units arranged in the first direction, wherein at least one of the plurality of signal lines is electrically connected to the first reference voltage bus through at least one of the plurality of electrostatic discharge units.

Abstract: A display panel, methods for manufacturing and detecting the display panel and a display device are provided. The display panel includes: a substrate, including a display region and a circuit region; multiple signal line terminals in the circuit region, coupled with signal lines respectively; multiple switch elements in the circuit region, first terminals of the switch elements are coupled with the signal line terminals respectively; multiple leads located in the circuit region and on a side of the signal line terminals distal to the display region, spaced apart from each other along a first direction, extending along a second direction, first ends of the leads are coupled with the second terminals of the switch elements respectively, second ends of the leads in the second direction extend to an edge of the substrate, each switch element is configured to connect or disconnect the first terminal and the second terminal thereof.

Abstract: A display device includes a display panel including panel pads adjacent to the side surface of a display panel; connection pads disposed on the side surface of the display panel and connected to the panel pads; and a circuit board disposed on the side surface of the display panel and including lead signal lines directly bonded to the connection pads, wherein the connection pads include a first connection pad, a second connection pad disposed on the first connection pad, and a third connection pad disposed on the second connection pad, and the first connection pad is in contact with corresponding one of the panel pads, and the third connection pad is directly bonded to corresponding one of the lead signal lines.

Abstract: A shift register and a gate driver circuit are provided. The shift register includes an input unit, an output unit, an electrostatic discharge unit and a reset unit. The input unit provides an input signal. The output unit is coupled to the input unit and a gate output terminal. The output unit outputs an output signal through the gate output terminal according to the input signal. The electrostatic discharge unit is coupled to the output unit. After the gate output terminal outputs the output signal, the electrostatic discharge unit pulls down a voltage of the gate output terminal according to a low gate voltage. The reset unit is coupled to the input unit and the output unit. After the electrostatic discharge unit pulls down the voltage of the gate output terminal, the reset unit resets a voltage of a bootstrap node.

Abstract: An array substrate, an electroluminescent display panel, and a display device are disclosed. The array substrate includes: a base substrate, and a first signal line, an insulating layer and a second signal line provided sequentially on the base substrate in a direction perpendicular to the base substrate; wherein the first signal line has a first portion and a second portion, the first portion has a resistance higher than a resistance of the second portion, and at least a part of the first portion is overlapped with the second signal line, and the second portion is non-overlapped with the second signal line.

Abstract: A display panel including a gate driver on array (GOA) circuit region is provided. The GOA circuit region includes cascaded n-staged GOA circuit units and N high-frequency clock signal lines; each of the staged GOA circuit units is electrically connected to one of the N high-frequency clock signal lines through a signal connection line; the display panel further includes at least two compensation unit groups, which are positioned in a region where the N high frequency clock signal lines are positioned. By setting a compensation unit in the region where the high-frequency clock signal lines are positioned, a problem of a wider GOA region is solved.

Abstract: An array substrate includes: a signal supply unit configured to supply a signal; a plurality of position detection electrodes; a plurality of position detection wiring line; a plurality of scanning wiring lines; a plurality of pixel regions; a scanning connection wiring line having one end side connected to the signal supply unit and another end side connected to the scanning wiring lines, the scanning connection wiring line being arranged passing through some of the pixel regions included in the plurality of pixel regions; and an auxiliary position detection wiring line having at least one end side and another end side each connected to the position detection wiring lines, the auxiliary position detection wiring line being disposed in the pixel regions, of the plurality of pixel regions, not provided with the scanning wiring lines.

Abstract: A display panel includes a first substrate which includes a display device and a second substrate which is disposed on the first substrate. The second substrate covers a base layer, a color filter layer, a first sealing layer, a color control layer, a step compensating layer, and a second sealing layer. The base layer includes a display area and a non-display area adjacent to the display area. The color filter layer overlaps the display area in a plan view, and is disposed under the base layer. The first sealing layer covers the color filter layer. The color control layer overlaps the display area in the plan view, and is disposed under the first sealing layer. The step compensating layer overlaps the non-display area in the plan view, and is disposed under the base layer. The second sealing layer covers the color control layer and the step compensating layer.

Abstract: An organic EL device includes a substrate including a light-emitting element, a mounting terminal, and a protective film that is provided on the light-emitting element and that has an opening portion overlapping with the mounting terminal in plan view. The substrate has recessed portion that communicates with the opening portion.

Abstract: An array substrate includes a base substrate and a GND trace. The GND trace is disposed along an edge of the substrate, and the GND trace includes a plurality of conductive line segments separated from each other and a connection structure disposed on a side of the GND trace away from the base substrate. The connection structure electrically connects the conductive line segments.

Abstract: A pixel array substrate includes a substrate, a plurality of data lines, a plurality of scan lines, a plurality of sub-pixels, and a first and a second auxiliary lines. The plurality of sub-pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The first auxiliary line and the plurality of scan lines belong to a first conductive layer. The second auxiliary line and the plurality of data lines belong to a second conductive layer. The first auxiliary line is located between two scan lines. A first end of the first auxiliary line is connected to one of the two scan lines. A second end of the first auxiliary line is separated from the other one of the two scan lines. The second auxiliary line is electrically connected to the first auxiliary line at the second end through a conductive via.

Abstract: An array substrate and a manufacturing method thereof are provided. A plurality of groups of bonding terminals are formed on a substrate, a first electrostatic protection wire is formed on a marginal region of the substrate, and a second electrostatic protection wire is formed to connect the bonding terminals and the first electrostatic protection wire.

Abstract: The disclosure provides a display apparatus and a data driving integrated circuit thereof for removing the interference patterns caused by radio wave interference. In the disclosure, a data driving integrated circuit includes a gamma voltage generating circuit, power terminals for receiving power voltages of the gamma voltage generating circuit. The data driving integrated circuit couples dummy terminals to the power terminals, so as to decrease the equivalent impedance of the power terminals through a parallel connection between the I/O ESD protection circuits. Therefore, the DC offset of the power voltages caused by the radio wave interference may be decreased.

Abstract: A thin film transistor substrate allowing an increase in proportionate size of the display area includes gate driving units, signal test pads, a first function line, and a first-stage gate output signal line in a surrounding non-display area, the display area having pixels. The gate driving units include a first-stage gate driving unit with an output terminal electrically connected to one row of pixels. The first function line has a first function but can also multiplex as a connecting line between the first-stage gate output signal line and one test pad. The first-stage gate output signal line is electrically insulated from the first function line during the first function of the first function line but is electrically connected to the first function line when multiplexed.

Abstract: A display panel and a display device are disclosed in the present disclosure. The display panel may include an active area and a non-active area located at a periphery of the active area. The active area may be provided with a plurality of signal lines. The non-active area may be provided with a plurality of conductive pads and a plurality of electrostatic discharge bodies. An end of each electrostatic discharge body may be connected to the active area via a corresponding signal line. The each electrostatic discharge body may be at least partially overlapped by and connected to a corresponding conductive pad.

Abstract: Disclosed is a display device. The display device includes a display panel, which includes a display area and a non-display area surrounding the display area, and a panel driver connected to the display panel in the non-display area of the display panel. The display panel includes an outer substrate configured to include a gate line and a data line that intersect with each other, an inner substrate coupled to a bottom of the outer substrate, and a reflection reduction member formed on the outer substrate to overlap at least one selected from the gate line and the data line, and configured to reduce a reflectivity of external light by a line.

Abstract: To prevent an electrostatic damage on a display device formed with a driving circuit. Protective circuits are provided not only at input terminal parts, but also at intermediate parts of a circuit or at the ends of wiring lines. Otherwise, the protective circuits are provided at the ends of the wiring lines and at the places immediately before and after the input terminals, respectively, and then the circuit is interposed therebetween. Further, the protective circuits are provided around a circuit with a large current consumption.

Abstract: The present application provides a low-leakage static electricity releasing circuit, a display panel and a display device. T1, T2 and T3 that are connected in series are taken as a first group. T4, T5 and T6 that are connected in series are taken as a second group. The first group and the second group serve as releasing paths for static electricity with negative voltages and static electricity with positive voltages, respectively. When one of the groups releases the static electricity, the other group has small current leakage. This reduces the affection of a static electricity releasing circuit on the voltage of a signal line due to the current leakage, and is applicable to static electricity releasing for foldable areas of a flexible, foldable display screen.

Abstract: An array substrate includes a base substrate, a plurality of gate lines extending in a row direction on the base substrate, a plurality of data lines extending in a column direction intersecting the row direction on the base substrate, and a plurality of pixel groups in rows and columns, each including two sub-pixels side by side in the row direction. Each of the rows of pixel groups is connected to two respective ones of the gate lines, and the two sub-pixels of each pixel group in the row of pixel groups are respectively connected to different ones of the two respective gate lines. The data lines and the columns of pixel groups are alternately arranged in the row direction, and the two sub-pixels of each of the plurality of pixel groups are connected to a corresponding one of the plurality of data lines directly adjacent to the pixel group.

Abstract: An array substrate includes a base substrate, at least one first signal line and at least one second signal line disposed at a first side of the base substrate, and at least one electrostatic discharge (ESD) protection device disposed at the first side of the base substrate. Each ESD protection device includes a first electrode coupled to one first signal line, a second electrode coupled to one second signal line, and an insulating medium disposed between the first electrode and the second electrode. An orthographic projection of the first electrode on the base substrate at least partially overlaps with an orthographic projection of the second electrode on the base substrate, and the ESD protection device is configured to discharge electrostatic charges on one of the first signal line and the second signal line that are coupled to the ESD protection device to the other one.

Abstract: An array substrate includes switching components, pixel electrodes connected to the switching components, a common electrode disposed to overlap the pixel electrodes via an insulator, first lines connected to the switching components, second lines connected to the switching components and extending while crossing the first lines, first protection circuits connected to the first lines, respectively, second protection circuits connected to the second lines, respectively, a first common line connected to the first lines via the first protection circuits, and a second common line connected to the second lines via the second protection circuits. The second common line is connected to the first common line directly or indirectly and not being connected to the common electrode.

Abstract: An array substrate includes: a base substrate; and a display region in which a signal line is provided and a fanout region provided on the base substrate, the fanout region including a first fanout line layer in which a first fanout line is provided, a second fanout line layer in which a second fanout line is provided, and one or more spacer layers between the first fanout line layer and the second fanout line layer; the signal line is connected to the first fanout line or the second fanout line; and the spacer layers are made of an insulating material; wherein an orthographic projection of the first fanout line on the base substrate and an orthographic projection of the second fanout line on the base substrate are at least partially overlapped with each other. A method of manufacturing an array substrate and a display device are also provided.

Abstract: According to an embodiment, an electronic device may include: a housing including a first surface and a second surface facing away from the first surface; a display at least partially accommodated in the housing and viewable through the first surface; a conductive layer disposed between the display and the second surface and including a first opening; a support disposed between the second surface and the conductive layer and including a conductive portion; and a wireless communication circuit electrically connected to the conductive layer, and configured to transmit and/or receive a signal through an antenna including at least a portion of the conductive layer surrounding the first opening.

Abstract: An electrostatic feedback display array, an active driving method, and a circuit. The array includes a substrate, an insulation layer on the substrate, a passivation layer on the insulation layer, a dielectric layer on the passivation layer, an inductive TFT and a driving TFT in the insulation layer. The passivation layer has an LED and electrically connects to a first electrode of the LED. The dielectric layer has a second electrode. The source of the inductive TFT electrically connects to the second electrode. The driving TFT has a source electrically connected to the first electrode device, and a gate electrically connected to a source of inductive TFT. The invention utilizes TFTs to control a touch electrostatic feedback switch, integrates electrostatic feedback, capacitance sensing and display functions, realizes boundary perceptible haptic feedbacks, avoids direct connection and harmful consequences of high voltage source to the human body, and improve safety.

Abstract: The present disclosure provides a display device. The display device includes a substrate, a pixel array, a circuit bridge structure, a first trace region, a second trace region, and a display film layer. The pixel array is located on the substrate. The circuit bridge structure is located at one side of the pixel array. The first trace region is located between the pixel array and a first side of the circuit bridge structure. The second trace region is located at a second side opposite to the first side. The display film layer is located on the pixel array, and an orthogonal projection of the display film layer on the substrate is spaced apart from an orthogonal projection of the circuit bridge structure on the substrate.

Abstract: An in-cell type liquid crystal panel is disclosed containing: an in-cell type liquid crystal cell provided with a liquid crystal layer including liquid crystal molecules homogeneously aligned in the absence of an electric field, a first transparent substrate and a second transparent substrate sandwiching the liquid crystal layer, and a touch sensing electrode unit related to touch sensor and touch-driven functions disposed between the first transparent substrate and the second transparent substrate; and a pressure-sensitive adhesive layer attached polarizing film disposed, via a first pressure-sensitive adhesive layer and without interposing a conductive layer, to the first transparent substrate side on the viewing side of the in-cell type liquid crystal cell; wherein the pressure-sensitive adhesive layer attached polarizing film contains a first polarizing film, an anchor layer, and a first pressure-sensitive adhesive layer; the anchor layer includes a conductive polymer; and the first pressure-sensitive adh

Abstract: The present disclosure relates to a detection circuit. The detection circuit includes a first input circuit and a second input circuit. The first input circuit has multiple first switch units, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. The second input circuit has multiple second switch units connected in a cascade arrangement, each of which being disposed in a one-to-one correspondence with one of multiple first signal lines. A second terminal of the second switch unit in a previous stage is connected to a first terminal of the second switch unit in the next adjacent stage. The first terminal of the second switch unit of a first stage is connected to a second terminal of a corresponding first signal line. The second terminal of the second switch unit of a last stage is connected to a first detection terminal.

Abstract: An in-cell type liquid crystal panel is disclosed containing: an in-cell type liquid crystal cell provided with a liquid crystal layer including liquid crystal molecules homogeneously aligned in the absence of an electric field, a first transparent substrate and a second transparent substrate sandwiching the liquid crystal layer, and a touch sensing electrode unit related to touch sensor and touch-driven functions disposed between the first transparent substrate and the second transparent substrate; and a pressure-sensitive adhesive layer attached polarizing film disposed, via a first pressure-sensitive adhesive layer and without interposing a conductive layer, to the first transparent substrate side on the viewing side of the in-cell type liquid crystal cell; wherein the pressure-sensitive adhesive layer attached polarizing film contains a first polarizing film, an anchor layer, and a first pressure-sensitive adhesive layer; the anchor layer includes a conductive polymer; and the first pressure-sensitive adh

Abstract: A display substrate includes a switching element disposed in a display region that is electrically connected to a gate line, a data line, and a first electrode in a peripheral region adjacent to the display region that includes a first conductive pattern formed from a first conductive layer that includes a same material as the gate line, a first line connecting part disposed in the peripheral region that includes the first conductive pattern, a second conductive pattern that overlaps the first conductive pattern and formed, an organic layer that partially exposes the second conductive pattern, and a third conductive pattern electrically connected to the second conductive pattern that contacts the partially exposed second conductive pattern, and a fourth conductive pattern that electrically connects the first conductive pattern of the pad part and the third conductive pattern of the first line connecting part.