Having Tunnel Junction Effect Patents (Class 360/324.2)
  • Patent number: 9112140
    Abstract: According to one embodiment, a magnetoresistive effect element includes: a nonmagnetic layer; a stacked structure body; and a detection layer. The stacked structure body is provided on the nonmagnetic layer. The stacked structure body includes: a reference layer; an oscillation layer; and an intermediate layer. The reference layer is provided on the nonmagnetic layer. A magnetization of the reference layer is fixed. The oscillation layer is provided on the reference layer. A magnetization of the oscillation layer is substantially parallel to the magnetization of the reference layer and is variable. The intermediate layer is provided between the reference layer and the oscillation layer. The detection layer is provided on the nonmagnetic layer apart from the stacked structure body.
    Type: Grant
    Filed: January 17, 2014
    Date of Patent: August 18, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoki Hase, Masayuki Takagishi, Hitoshi Iwasaki
  • Patent number: 9099188
    Abstract: A STT-MRAM comprises apparatus, and method of operating a double-MTJ magnetoresistive memory and a plurality of magnetoresistive memory element having a first recording layer which has an interface interaction with an underneath dielectric functional layer and having a second recording layer which has no interface interaction with an underneath dielectric functional layer. The energy switch barrier of the first recording layer is reduced under an electric field applying along a perpendicular direction of the functional with a proper voltage on a digital line from a control circuitry; accordingly, the magnetization of the first recording layer is readily reversible in a low spin-transfer switching current while the magnetization of the second recording layer is readily reversible in a high spin-transfer switching current, enabling two separate bits recording in a double MTJ stack.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: August 4, 2015
    Inventor: Yimin Guo
  • Patent number: 9099642
    Abstract: Spin transfer torque memory elements and memory devices are provided. In one embodiment, the spin transfer torque memory element includes a first portion including CoFeB, a second portion including CoFeB, an intermediate portion interposed between the first and second portions, a third portion adjoining the second portion opposite the intermediate portion, and a fourth portion adjoining the third portion opposite the second portion. The intermediate portion includes MgO. The third portion includes at least one of Ag, Au, Cr, Cu, Hf, Mo, Nb, Os, Re, Ru, Ta, W, and Zr. The fourth portion includes at least one alloy of Co, Fe, Pd, and Pt.
    Type: Grant
    Filed: December 3, 2014
    Date of Patent: August 4, 2015
    Assignee: SONY CORPORATION
    Inventors: Hiroyuki Ohmori, Masanori Hosomi, Kazuhiro Bessho, Yutaka Higo, Kazutaka Yamane, Hiroyuki Uchida, Tetsuya Asayama
  • Patent number: 9099124
    Abstract: A tunneling magnetoresistance (TMR) device, like a magnetic recording disk drive read head, has a nitrogen-containing layer between the MgO barrier layer and the free and/or reference ferromagnetic layers that contain boron. In one embodiment the free ferromagnetic layer includes a boron-containing layer and a trilayer nanolayer structure between the MgO barrier layer and the boron-containing layer. The trilayer nanolayer structure includes a thin Co, Fe or CoFe first nanolayer in contact with the MgO layer, a thin FeN or CoFeN second nanolayer on the first nanolayer and a thin Co, Fe or CoFe third nanolayer on the FeN or CoFeN nanolayer between the FeN or CoFeN nanolayer and the boron-containing layer. If the reference ferromagnetic layer also includes a boron-containing layer then a similar trilayer nanolayer structure may be located between the boron-containing layer and the MgO barrier layer.
    Type: Grant
    Filed: September 28, 2014
    Date of Patent: August 4, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: James Mac Freitag, Zheng Gao
  • Patent number: 9093639
    Abstract: This invention describes a novel tunnel magnetoresistive (TMR) deposition process that can enhance the signal-to-noise ratio (SNR) of a TMR reader. A method of manufacturing a tunnel magnetoresistive sensor includes providing a substrate; forming a first portion of a magnetic tunnel junction (MTJ) structure on the substrate; forming a second portion of the MTJ structure on the substrate; forming a tunnel barrier layer of the MTJ structure between the first portion and the second portion; heating the first portion of the MTJ structure before forming the tunnel barrier layer or after forming at least a portion of the tunnel barrier layer; and cooling the tunnel barrier layer.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: July 28, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Christian Kaiser, Qunwen Leng, Mahendra Pakala
  • Patent number: 9082436
    Abstract: The embodiments disclosed generally relate to a magnetic recording head having three magnetoresistive effect elements. The structure comprises a first magnetoresistive effect element on a lower magnetic shield layer. Additionally, two lower electrodes are disposed on the two sides of the first magnetoresistive effect element. A second magnetoresistive effect element is disposed on a lower electrode while a third magnetoresistive effect element on another lower electrode. An upper magnetic shield layer is disposed between the second magnetoresistive effect element and the third magnetoresistive effect element. The upper magnetic shield also serves as an electrode of the first magnetoresistive effect element.
    Type: Grant
    Filed: February 5, 2014
    Date of Patent: July 14, 2015
    Assignee: HGST NETHERLANDS B.V.
    Inventors: Hideki Mashima, Nobuo Yoshida, Iwata Norihiro, Tsutomu Yasuda
  • Patent number: 9070866
    Abstract: According to one embodiment, a magnetoresistive effect element includes a first ferromagnetic layer, a tunnel barrier formed on the first ferromagnetic layer, and a second ferromagnetic layer formed on the tunnel barrier layer. The tunnel barrier includes a nonmagnetic oxide having a spinel structure. Oxides forming the spinel structure are combined such that a single phase is formed by a solid phase in a component ratio region including a component ratio corresponding to the spinel structure and having a width of not less than 2%.
    Type: Grant
    Filed: August 7, 2013
    Date of Patent: June 30, 2015
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Makoto Nagamine, Daisuke Ikeno, Katsuya Nishiyama, Katsuaki Natori, Koji Yamakawa
  • Patent number: 9065041
    Abstract: The present invention suppresses short circuits of a magnetic memory cell and a deterioration of the characteristics of a magnetic layer. A magnetic memory cell includes: a data storage layer; a tunnel barrier layer formed on the data storage layer; a reference layer formed on the tunnel barrier layer so as to cover a part of the tunnel barrier layer; and a metallic oxide layer formed on the tunnel barrier layer without covering the reference layer. The metallic oxide layer contains an oxide of a material of a contact part of the reference layer with the tunnel barrier layer.
    Type: Grant
    Filed: January 28, 2013
    Date of Patent: June 23, 2015
    Assignee: Renesas Electronics Corporation
    Inventors: Eiji Kariyada, Katsumi Suemitsu
  • Patent number: 9053800
    Abstract: There is provided a memory element having a layered structure, including a memory layer having magnetization perpendicular to a film face in which a magnetization direction is changed corresponding to information, and including a Co—Fe—B magnetic layer and at least on non-magnetic layer; the magnetization direction being changed by flowing a current in a lamination direction of the layered structure to record the information in the memory layer, a magnetization-fixed layer having magnetization perpendicular to the film face that becomes a base of the information stored in the memory layer, and an intermediate layer that is formed of a non-magnetic material and is provided between the memory layer and the magnetization-fixed layer, further including a laminated structure where an oxide layer, the Co—Fe—B magnetic layer and the non-magnetic layer are laminated is formed.
    Type: Grant
    Filed: November 19, 2012
    Date of Patent: June 9, 2015
    Assignee: Sony Corporation
    Inventors: Kazutaka Yamane, Masanori Hosomi, Hiroyuki Ohmori, Kazuhiro Bessho, Yutaka Higo, Tetsuya Asayama, Hiroyuki Uchida
  • Patent number: 9053720
    Abstract: A magnetically stable, read sensor uses low-coercivity magnetic material without seed layers in side shields for longitudinal biasing in order to improve micro-magnetic read width of the sensor. The sensor is formed between an upper and lower shield and includes a symmetric pair of abutting side shields adjacent to the sides of the sensor. In one configuration the side shields are partially covered by a layer of high magnetic moment material that extends along a bottom surface and side surface of the side shields and is contiguous and conformal with the layer of insulating material, but does not cover the backside of the sensor. The high moment layer focuses flux at the sensor sides and also improves the micro-magnetic read width. The side shields include a multiplicity of horizontal ferromagnetic layers that are antiferromagnetically coupled to each other and magnetically coupled to the upper shield.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: June 9, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Yewhee Chye, Kunliang Zhang, Min Li
  • Patent number: 9048413
    Abstract: The present disclosure describes a semiconductor MRAM device and a manufacturing method. The device reduces magnetic field induction “interference” (disturbance) phenomenon between adjacent magnetic tunnel junctions when data is written and read. This semiconductor MRAM device comprises a magnetic tunnel junction unit and a magnetic shielding material layer covering the sidewalls of the magnetic tunnel junction unit. The method for manufacturing a semiconductor device comprises: forming a magnetic tunnel junction unit, depositing an isolation dielectric layer to cover the top and the sidewall of the magnetic tunnel junction unit, and depositing a magnetic shielding material layer on the isolation dielectric layer.
    Type: Grant
    Filed: June 10, 2014
    Date of Patent: June 2, 2015
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventor: Xian Cheng Zeng
  • Patent number: 9040178
    Abstract: A TMR sensor that includes a free layer having at least one B-containing (BC) layer made of CoFeB, CoFeBM, CoB, COBM, or CoBLM, and a plurality of non-B containing (NBC) layers made of CoFe, CoFeM, or CoFeLM is disclosed where L and M are one of Ni, Ta, Ti, W, Zr, Hf, Tb, or Nb. One embodiment is represented by (NBC/BC)n where n?2. A second embodiment is represented by (NBC/BC)n/NBC where n?1. In every embodiment, a NBC layer contacts the tunnel barrier and NBC layers each with a thickness from 2 to 8 Angstroms are formed in alternating fashion with one or more BC layers each 10 to 80 Angstroms thick. Total free layer thickness is <100 Angstroms. The free layer configuration described herein enables a significant noise reduction (SNR enhancement) while realizing a high TMR ratio, low magnetostriction, low RA, and low Hc values.
    Type: Grant
    Filed: September 22, 2008
    Date of Patent: May 26, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Tong Zhao, Hui-Chuan Wang, Yu-Chen Zhou, Min Li, Kunliang Zhang
  • Patent number: 9036308
    Abstract: Various embodiments may be generally directed to a magnetic sensor constructed with a decoupling layer that has a predetermined first morphology. A magnetic free layer can be deposited contactingly adjacent to the decoupling layer with the magnetic free layer configured to have at least a first sub-layer having a predetermined second morphology.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: May 19, 2015
    Assignee: Seagate Technology LLC
    Inventors: Mark William Covington, Mark Thomas Kief, Wonjoon Jung
  • Patent number: 9034491
    Abstract: A magnetic element may generally be configured at least with a magnetic stack having a multilayer barrier structure disposed between first and second ferromagnetic layers. The multilayer barrier structure can have a binary compound layer disposed between first and second alloy layers with the binary compound having a metal element and a second element where at least one alloy layer has the metal element and a third element dissimilar from the second element.
    Type: Grant
    Filed: November 30, 2012
    Date of Patent: May 19, 2015
    Assignee: Seagate Technology LLC
    Inventors: Vijay Karthik Sankar, Mark William Covington
  • Patent number: 9030784
    Abstract: A magnetic head including a magnetoresistive junction and an oxide layer. The magnetoresistive junction includes a pinned layer, a free layer, and a barrier layer residing between the pinned and free layer. The magnetoresistive junction includes at least one side having a smooth profile. The oxide layer is on the at least one side. The oxide layer is less than one nanometer thick at the free layer.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: May 12, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Guanxiong Li, Xiaozhong Dang, Mahendra Pakala, Yong Shen
  • Patent number: 9013837
    Abstract: A magnetoresistive element according to an embodiment includes: a magnetoresistance effect film including: a first magnetic film; a second magnetic film; and an intermediate film of a nonmagnetic material disposed between the first magnetic film and the second magnetic film, at least one of the first magnetic film and the second magnetic film being formed of a material expressed as AxB1?x(65 at %?x?85 at %) where A is an alloy containing Co and at least one element selected from Fe and Mn, and B is an alloy containing Si or Ge, a Si concentration in the at least one of the first magnetic film and the second magnetic film decreasing and a Ge concentration increasing as a distance from the intermediate film increases.
    Type: Grant
    Filed: March 12, 2014
    Date of Patent: April 21, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Naoki Hase, Masayuki Takagishi, Susumu Hashimoto, Shuichi Murakami, Yousuke Isowaki, Masaki Kado, Hitoshi Iwasaki
  • Patent number: 9003640
    Abstract: A method for fabricating a magnetic recording transducer is described. The method includes providing a pinned layer for a magnetic element. The portion of the magnetic transducer including the pinned layer is transferred to a high vacuum annealing apparatus before annealing the magnetic transducer. The portion of the magnetic recording transducer is annealed in the high vacuum annealing apparatus. A tunneling barrier is provided after the step of annealing the part of the magnetic recording transducer. A free layer for the magnetic element is also provided.
    Type: Grant
    Filed: February 4, 2013
    Date of Patent: April 14, 2015
    Assignee: Western Digital (Fremont), LLC
    Inventors: Chando Park, Qunwen Leng, Mahendra Pakala
  • Patent number: 9000546
    Abstract: A spin-wave waveguide includes a ferromagnetic thin film resembling a wire in shape. A part of the ferromagnetic thin film, large in film thickness, is formed at one end of the ferromagnetic thin film, and a part of the ferromagnetic thin film, small in film thickness, and a part of the ferromagnetic thin film, large in film thickness, are alternately formed on the same plane, for at least not less than one cycle. A part of the ferromagnetic thin film, large in film thickness, is formed at the other end of the ferromagnetic thin film, wherein an insulating film, and an electrode film are stacked in this order on the ferromagnetic thin film in the part of the ferromagnetic thin film, large in film thickness.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: April 7, 2015
    Assignee: Hitachi, Ltd.
    Inventors: Kenchi Ito, Masaki Yamada, Susumu Ogawa
  • Patent number: 8988822
    Abstract: A spin transfer oscillator with a seed/SIL/spacer/FGL/capping configuration is disclosed with a composite seed layer made of Ta and a metal layer having a fcc(111) or hcp(001) texture to enhance perpendicular magnetic anisotropy (PMA) in an overlying (A1/A2)X laminated spin injection layer (SIL). Field generation layer (FGL) is made of a high Bs material such FeCo. Alternatively, the STO has a seed/FGL/spacer/SIL/capping configuration. The SIL may include a FeCo layer that is exchanged coupled with the (A1/A2)X laminate (x is 5 to 50) to improve robustness. The FGL may include an (A1/A2)Y laminate (y=5 to 30) exchange coupled with the high Bs layer to enable easier oscillations. A1 may be one of Co, CoFe, or CoFeR where R is a metal, and A2 is one of Ni, NiCo, or NiFe. The STO may be formed between a main pole and trailing shield in a write head.
    Type: Grant
    Filed: October 5, 2012
    Date of Patent: March 24, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Min Li, Yuchen Zhou
  • Patent number: 8984741
    Abstract: A method for manufacturing a magnetic read sensor allows for the construction of a very narrow trackwidth sensor while avoiding problems related to mask liftoff and shadowing related process variations across a wafer. The process involves depositing a plurality of sensor layers and forming a first mask structure. The first mask structure has a relatively large opening that encompasses a sensor area and an area adjacent to the sensor area where a hard bias structure can be deposited. A second mask structure is formed over the first mask structure and includes a first portion that is configured to define a sensor dimension and a second portion that is over the first mask structure in the field area.
    Type: Grant
    Filed: April 27, 2012
    Date of Patent: March 24, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Yi Zheng, Guomin Mao, Hicham M. Sougrati, Xiaozhong Dang
  • Patent number: 8988835
    Abstract: Various embodiments relate to an apparatus having a sensor with an active tunnel magnetoresistive region, magnetic shields flanking the tunnel magnetoresistive region, and gaps between the active tunnel magnetoresistive region and the magnetic shields. The active tunnel magnetoresistive region includes a free layer, a tunnel barrier layer and a reference layer. At least one of the gaps includes an electrically conductive layer having a refractory material. Other embodiments relate to an apparatus having a sensor with an active tunnel magnetoresistive region, magnetic shields flanking the tunnel magnetoresistive region, and gaps between the tunnel magnetoresistive region and the magnetic shields. The active tunnel magnetoresistive region includes a free layer, a tunnel barrier layer and a reference layer. At least one of the gaps includes an electrically conductive layer having a modified region at a media facing side thereof, the modified region being at least one of nonconductive and mechanically hardened.
    Type: Grant
    Filed: October 14, 2013
    Date of Patent: March 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Biskeborn, Calvin S. Lo
  • Patent number: 8982514
    Abstract: According to one embodiment, a magnetic oscillator includes a layered film and a pair of electrodes. The layered film includes a first ferromagnetic layer, an insulating layer stacked on the first ferromagnetic layer, and a second ferromagnetic layer stacked on the insulating layer. The pair of electrodes is configured to apply a current to the layered film in a direction perpendicular to a film surface of the layered film. Regions having different resistance area products are provided between the first ferromagnetic layer and the second ferromagnetic layer.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tazumi Nagasawa, Kiwamu Kudo, Rie Sato, Koichi Mizushima
  • Patent number: 8978240
    Abstract: A CPP-GMR spin valve having a composite spacer layer comprised of at least one metal (M) layer and at least one semiconductor or semi-metal (S) layer is disclosed. The composite spacer may have a M/S, S/M, M/S/M, S/M/S, M/S/M/S/M, or a multilayer (M/S/M)n configuration where n is an integer?1. The pinned layer preferably has an AP2/coupling/AP1 configuration wherein the AP2 portion is a FCC trilayer represented by CoZFe(100-Z)/FeYCo(100-Y)/CoZFe(100-Z) where y is 0 to 60 atomic %, and z is 75 to 100 atomic %. In one embodiment, M is Cu with a thickness from 0.5 to 50 Angstroms and S is ZnO with a thickness of 1 to 50 Angstroms. The S layer may be doped with one or more elements. The dR/R ratio of the spin valve is increased to 10% or greater while maintaining acceptable EM and RA performance.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: March 17, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Min Li, Moris Dovek, Yue Liu
  • Patent number: 8981508
    Abstract: A magnetic field sensor having a support with a top side and a bottom side, whereby a Hall plate is provided on the top side of the support and the Hall plate comprises a carbon-containing layer.
    Type: Grant
    Filed: December 10, 2013
    Date of Patent: March 17, 2015
    Assignee: Micronas GmbH
    Inventor: Joerg Franke
  • Patent number: 8975091
    Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.
    Type: Grant
    Filed: September 9, 2014
    Date of Patent: March 10, 2015
    Assignee: Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Min-Hwa Chi, Mieno Fumitake
  • Patent number: 8962348
    Abstract: A method for forming a MTJ in a spintronic device is disclosed and includes a thin seed layer that enhances perpendicular magnetic anisotropy (PMA) in an overlying laminated layer with a (Co/Ni)n composition. The seed layer is preferably NiCr, NiFeCr, Hf, or a composite thereof. Furthermore, a magnetic layer such as CoFeB may be formed between the laminated layer and a tunnel barrier layer to serve as a transitional layer between a (111) laminate and (100) MgO tunnel barrier. There may be a Ta insertion layer between the CoFeB layer and laminated layer to promote (100) crystallization in the CoFeB layer. The laminated layer may be used as a reference layer, dipole layer, or free layer in a MTJ. Annealing between 300° C. and 400° C. may be used to further enhance PMA in the laminated layer.
    Type: Grant
    Filed: September 20, 2013
    Date of Patent: February 24, 2015
    Assignee: Headway Technologies, Inc.
    Inventors: Guenole Jan, Witold Kula, Ru Ying Tong, Yu Jen Wang
  • Patent number: 8953284
    Abstract: In one embodiment, a magnetic head includes a lower shield layer positioned at a media-facing surface of the magnetic head, at least two magnetoresistive (MR) elements positioned above the lower shield layer, each MR element extending in an element height direction away from the media-facing surface of the magnetic head, back wiring layers positioned above at least one lower layer of each of the MR elements at a position away from the media-facing surface of the magnetic head in the element height direction, wherein the back wiring layers are configured to electrically communicate with the MR elements and configured to separately extract signals from each MR element during a read operation, and an upper shield layer positioned above the MR elements that is configured to electrically communicate with the MR elements.
    Type: Grant
    Filed: November 20, 2013
    Date of Patent: February 10, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Hideki Mashima, Nobuo Yoshida, Masashi Hattori, Tutomu Yasuda
  • Patent number: 8952434
    Abstract: In a method of forming a magnetic pattern, a lower electrode layer is formed on a substrate. An insulating interlayer is formed on the lower electrode layer. The insulating interlayer is partially removed to form an opening. A first pinned layer pattern filling the opening is formed. A second pinned layer, a tunnel barrier layer, a free layer and an upper electrode layer are formed on the insulating interlayer and the first pinned layer pattern. The upper electrode layer, the free layer, the tunnel barrier layer and the second pinned layer are patterned to form a second pinned layer pattern, a tunnel barrier pattern, a free layer pattern and an upper electrode. The second pinned layer pattern covers an upper surface of the first pinned layer pattern.
    Type: Grant
    Filed: June 7, 2012
    Date of Patent: February 10, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Kyung-Tae Nam
  • Patent number: 8946837
    Abstract: According to one embodiment, a semiconductor storage device is disclosed. The device includes first magnetic layer, second magnetic layer, first nonmagnetic layer between them. The first magnetic layer includes a structure in which first magnetic material film, second magnetic material film, and nonmagnetic material film between the first and second magnetic material films are stacked. The first magnetic material film is nearest to the first nonmagnetic layer in the first magnetic layer. The nonmagnetic material film includes at least one of Ta, Zr, Nb, Mo, Ru, Ti, V, Cr, W, Hf. The second magnetic material film includes stacked materials, including first magnetic material nearest to the first nonmagnetic layer among the stacked materials, and second magnetic material which is same magnetic material as the first magnetic material and has smaller thickness than the first magnetic material.
    Type: Grant
    Filed: January 10, 2014
    Date of Patent: February 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Daisuke Watanabe, Katsuya Nishiyama, Toshihiko Nagase, Koji Ueda, Tadashi Kai
  • Patent number: 8947835
    Abstract: The invention provides a tunneling magnetoresistance (TMR) read sensor with a long diffusion path and ex-situ interfaces in a sense layer structure. The sense layer structure comprises a first sense layer preferably formed of a ferromagnetic Co—Fe film, a second sense layer preferably formed of a ferromagnetic Co—Fe—B film, and a third sense layer preferably formed of a ferromagnetic Ni—Fe film. The sense layer structure has a long diffusion path (defined as a total thickness of the first and second sense layers) and ex-situ interfaces for suppressing unwanted diffusions of Ni atoms. Alternatively, the sense layer structure comprises a first sense layer preferably formed of a ferromagnetic Co—Fe film, a second sense layer preferably formed of a ferromagnetic Co—Fe—B film, a third sense layer preferably formed of a ferromagnetic Co—Fe—B—Hf film, and a fourth sense layer preferably formed of a ferromagnetic Ni—Fe film.
    Type: Grant
    Filed: December 22, 2011
    Date of Patent: February 3, 2015
    Assignee: HGST Netherlands B.V.
    Inventor: Tsann Lin
  • Patent number: 8941195
    Abstract: In a method for fabricating a semiconductor device, a conductive layer is formed on a substrate, where the substrate has a bottom layer formed thereon. A magnetic tunnel junction layer is formed on the conductive layer. The magnetic tunnel junction layer is patterned using an etching gas containing oxygen. An insulating layer is formed by oxidizing the conductive layer exposed outside the patterned magnetic tunnel junction layer using the etching gas.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: January 27, 2015
    Assignee: SK Hynix Inc.
    Inventors: Min Suk Lee, Bo Kyoung Jung
  • Patent number: 8921126
    Abstract: A process for manufacturing a TMR sensor is disclosed wherein the blocking temperature of the AFM layer in the TMR sensor has been raised by inserting a magnetic seed layer between the AFM layer and the bottom shield. This gives the device improved thermal stability, including improved SNR and BER.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: December 30, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Junjie Quan, Kunliang Zhang, Min Li, Hui-Chuan Wang
  • Patent number: 8922956
    Abstract: In certain embodiments, a tunneling magneto-resistive (TMR) sensor includes a sensor stack positioned between a seed layer and a cap layer. The seed layer includes a first buffer layer that includes a non-magnetic nickel alloy. In certain embodiments, a sensor stack includes a top and bottom shield and a seed layer positioned adjacent to the bottom shield. The seed layer has a first buffer layer that includes a nickel alloy.
    Type: Grant
    Filed: June 3, 2011
    Date of Patent: December 30, 2014
    Assignee: Seagate Technology LLC
    Inventors: Bin Lu, Qing He, Mark Covington, Yunhao Xu, Wei Tian
  • Patent number: 8920947
    Abstract: Perpendicular magnetic anisotropy and Hc are enhanced in magnetic devices with a Ta/M1/M2 seed layer where M1 is preferably Ti, and M2 is preferably Cu, and including an overlying (Co/Ni)X multilayer (x is 5 to 50) that is deposited with ultra high Ar pressure of >100 sccm to minimize impinging energy that could damage (Co/Ni)X interfaces. In one embodiment, the seed layer is subjected to one or both of a low power plasma treatment and natural oxidation process to form a more uniform interface with the (Co/Ni)X multilayer. Furthermore, an oxygen surfactant layer may be formed at one or more interfaces between adjoining (Co/Ni)X layers in the multilayer stack. Annealing at temperatures between 180° C. and 400° C. also increases Hc but the upper limit depends on whether the magnetic device is MAMR, MRAM, a hard bias structure, or a perpendicular magnetic medium.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: December 30, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Kunliang Zhang, Min Li, Yuchen Zhou
  • Patent number: 8922953
    Abstract: A dual current-perpendicular-to-the-plane magnetoresistive (CPP-MR) sensor has an antiparallel-free (APF) structure as the free layer and uses the top and bottom shields as reference layers. The free layer is an APF structure that has the two free layers (FL1 and FL2) biased into a “spin-flop” state. In this state, the magnetic bias field from side biasing layers is great enough to stabilize the magnetizations of FL1 and FL2 to have a relative orientation preferably about 90 degrees and symmetrically positioned on either side of the magnetic bias field. The side biasing layers may be formed of soft magnetic material to also function as side shields and the top shield may be ferromagnetically coupled to the side shields, with the magnetization of the top shield being opposite that of the magnetization of the bottom shield.
    Type: Grant
    Filed: July 15, 2014
    Date of Patent: December 30, 2014
    Assignee: HGST Netherlands B.V.
    Inventor: Jeffrey R. Childress
  • Patent number: 8913350
    Abstract: A method and system for providing a magnetic element and a magnetic memory utilizing the magnetic element are described. The magnetic element is used in a magnetic device that includes a contact electrically coupled to the magnetic element. The method and system include providing pinned, nonmagnetic spacer, and free layers. The free layer has an out-of-plane demagnetization energy and a perpendicular magnetic anisotropy corresponding to a perpendicular anisotropy energy that is less than the out-of-plane demagnetization energy. The nonmagnetic spacer layer is between the pinned and free layers. The method and system also include providing a perpendicular capping layer adjoining the free layer and the contact. The perpendicular capping layer induces at least part of the perpendicular magnetic anisotropy in the free layer. The magnetic element is configured to allow the free layer to be switched between magnetic states when a write current is passed through the magnetic element.
    Type: Grant
    Filed: August 10, 2009
    Date of Patent: December 16, 2014
    Assignee: Grandis, Inc.
    Inventors: Steven M. Watts, Zhitao Diao, Xueti Tang
  • Patent number: 8913351
    Abstract: According to one embodiment, a magnetoresistance effect element includes first and second shields, a stacked body and a hard bias unit. The stacked body includes first and second magnetic layers, an intermediate layer and a first Ru layer. A magnetization of the first magnetic layer is changeable. A magnetization of the second magnetic layer is changeable. The intermediate layer is nonmagnetic. The first Ru layer is provided between the first shield and the first magnetic layer. A thickness of the first Ru layer is not less than 1.5 nanometers and not more than 2.5 nanometers. The hard bias unit is provided between the first shield and the second shield. A first direction from the first shield toward the second shield intersects a second direction from the stacked body toward the hard bias unit.
    Type: Grant
    Filed: February 18, 2014
    Date of Patent: December 16, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Susumu Hashimoto, Masayuki Takagishi, Shuichi Murakami, Yousuke Isowaki, Naoki Hase, Hitoshi Iwasaki
  • Patent number: 8907436
    Abstract: Provided are magnetic memory devices with a perpendicular magnetic tunnel junction. The device includes a magnetic tunnel junction including a free layer structure, a pinned layer structure, and a tunnel barrier therebetween. The pinned layer structure may include a first magnetic layer having an intrinsic perpendicular magnetization property, a second magnetic layer having an intrinsic in-plane magnetization property, and an exchange coupling layer interposed between the first and second magnetic layers. The exchange coupling layer may have a thickness maximizing an antiferromagnetic exchange coupling between the first and second magnetic layers, and the second magnetic layer may exhibit a perpendicular magnetization direction, due at least in part to the antiferromagnetic exchange coupling with the first magnetic layer.
    Type: Grant
    Filed: July 2, 2013
    Date of Patent: December 9, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: SeChung Oh, Ki Woong Kim, Younghyun Kim, Whankyun Kim, Sang Hwan Park
  • Patent number: 8907666
    Abstract: A scissor style magnetic sensor having a novel hard bias structure for improved magnetic biasing robustness. The sensor includes a sensor stack that includes first and second magnetic layers separated by a non-magnetic layer such as an electrically insulating barrier layer or an electrically conductive spacer layer. The first and second magnetic layers have magnetizations that are antiparallel coupled, but that are canted in a direction that is neither parallel with nor perpendicular to the air bearing surface by a magnetic bias structure. The magnetic bias structure includes a neck portion extending from the back edge of the sensor stack and having first and second sides that are aligned with first and second sides of the sensor stack. The bias structure also includes a tapered or wedged portion extending backward from the neck portion.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: December 9, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Quang Le, Simon H. Liao, Shuxia Wang, Guangli Liu, Yongchul Ahn
  • Patent number: 8895323
    Abstract: A method for forming MRAM (magnetoresistive random access memory) devices is provided. A bottom electrode assembly is formed. A magnetic junction assembly is formed, comprising, depositing a magnetic junction assembly layer over the bottom electrode assembly, forming a patterned mask over the magnetic junction assembly layer, etching the magnetic junction assembly layer to form the magnetic junction assembly with gaps, gap filling the magnetic junction assembly, and planarizing the magnetic junction assembly. A top electrode assembly is formed.
    Type: Grant
    Filed: December 14, 2012
    Date of Patent: November 25, 2014
    Assignee: Lam Research Corporation
    Inventor: Joydeep Guha
  • Patent number: 8896973
    Abstract: A magnetic head according to an embodiment includes: a spin-torque oscillator comprising a first ferromagnetic layer, a second ferromagnetic layer, a third ferromagnetic layer provided on the opposite side of the second ferromagnetic layer from the first ferromagnetic layer, a first nonmagnetic layer provided between the first ferromagnetic layer and the second ferromagnetic layer, a second nonmagnetic layer provided between the second ferromagnetic layer and the third ferromagnetic layer, a first electrode provided on a surface on the opposite side of the first ferromagnetic layer from the first nonmagnetic layer, and a second electrode provided on a surface on the opposite side of the third ferromagnetic layer from the second nonmagnetic layer. Magnetization precession is induced in each of the first through third ferromagnetic layers when current is applied between the first and second electrodes.
    Type: Grant
    Filed: October 19, 2012
    Date of Patent: November 25, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tazumi Nagasawa, Hirofumi Suto, Kiwamu Kudo, Rie Sato, Koichi Mizushima, Tao Yang
  • Patent number: 8896971
    Abstract: Various apparatus and associated method embodiments are generally directed to a magnetic stack positioned on an air bearing surface (ABS) and biased to a predetermined magnetization by a bias magnet. The bias magnet can be separated from the magnetic stack and at least one magnetic shield by a self-aligned magnetic insulating feature that is comprised of first and second insulating layers.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: November 25, 2014
    Assignee: Seagate Technology LLC
    Inventor: Thomas Roy Boonstra
  • Patent number: 8881378
    Abstract: A method is described to improve performance of a magneto-resistive (MR) sensor under conditions of high areal density. The free layer is partially etched away, the removed material being replaced by a magnetic flux guide structure that reduces the free layer's demagnetization field. This in turn reduces the stripe height of the sensor so that the resolution and the read-back signal are enhanced without increasing noise and instability.
    Type: Grant
    Filed: August 22, 2011
    Date of Patent: November 11, 2014
    Assignee: Headway Technologies, Inc.
    Inventors: Yuchen Zhou, Joe Smyth, Min Li, Glen Garfunkel
  • Patent number: 8865481
    Abstract: A semiconductor device includes a magnetic tunnel junction (MTJ) storage element configured to be disposed in a common interlayer metal dielectric (IMD) layer with a logic element. Cap layers separate the common IMD layer from a top and bottom IMD layer. Top and bottom electrodes are coupled to the MTJ storage element. Metal connections to the electrodes are formed in the top and bottom IMD layers respectively through vias in the separating cap layers. Alternatively, the separating cap layers are recessed and the bottom electrodes are embedded, such that direct contact to metal connections in the bottom IMD layer is established. Metal connections to the top electrode in the common IMD layer are enabled by isolating the metal connections from the MTJ storage elements with metal islands and isolating caps.
    Type: Grant
    Filed: February 4, 2014
    Date of Patent: October 21, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: Xia Li, Xiaochun Zhu, Seung Hyuk Kang
  • Patent number: 8861136
    Abstract: A spin conduction element includes a main channel layer having a first electrode, a second electrode, a third electrode, a fourth electrode, a fifth electrode, and a sixth electrode, and extending in a first direction. Spins are injected into the main channel layer from a second ferromagnetic layer constituting the second electrode and a fourth ferromagnetic layer constituting the fourth electrode, and a spin current is detected as a voltage in a third ferromagnetic layer constituting the third electrode.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: October 14, 2014
    Assignee: TDK Corporation
    Inventors: Tomoyuki Sasaki, Tohru Oikawa, Hayato Koike
  • Patent number: 8860155
    Abstract: The present disclosure relates to a magnetic tunnel junction (MTJ) device and its fabricating method. Through forming MTJ through a damascene process, device damage due to the etching process and may be avoided. In some embodiments, a spacer is formed between a first portion and a second portion of the MTJ to prevent the tunnel insulating layer of the MTJ from being damaged in subsequent processes, greatly increasing product yield thereby. In other embodiments, signal quality may be improved and magnetic flux leakage may be reduced through the improved cup-shaped MTJ structure of this invention.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: October 14, 2014
    Assignee: Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Chi Min-Hwa, Mieno Fumitake
  • Patent number: 8861120
    Abstract: According to one embodiment, a magnetic medium includes at least one recording layer including a first magnetic layer, a second magnetic layer and a non-magnetic layer. The first magnetic layer is form of a first magnetic material having a first magnetic anisotropy. The second magnetic layer is made of a second magnetic material having a second magnetic anisotropy different from the first magnetic anisotropy. The non-magnetic layer is made of a non-magnetic material and between the first and second magnetic layers, the first magnetic layer and the second magnetic layer being coupled such that directions of magnetization of the first and second magnetic layers are opposed to each other.
    Type: Grant
    Filed: August 10, 2012
    Date of Patent: October 14, 2014
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tao Yang, Hirofumi Suto, Tazumi Nagasawa, Kiwamu Kudo, Rie Sato, Koichi Mizushima
  • Patent number: 8860159
    Abstract: A spintronic electronic apparatus having a multilayer structure. The apparatus includes a substrate, having disposed in succession upon the substrate; a bottom interface layer; a pinned layer; a tunneling barrier; a free layer; and a top interface layer, wherein the apparatus operates as a non-resonant magnetic tunnel junction in a large amplitude, out-of-plane magnetization precession regime having weakly current dependent, large diode volt-watt sensitivity when external microwave signals that exceed a predetermined threshold current and have a frequency that is lower than a predetermined level excite the magnetization precession.
    Type: Grant
    Filed: October 20, 2011
    Date of Patent: October 14, 2014
    Assignee: The United States of America as represented by the Secretary of the Army
    Inventors: Thomas J. Meitzler, Elena N. Bankowski, Michael Nranian, Ilya N. Krivorotov, Andrei N. Slavin, Vasyl S. Tyberkevych
  • Patent number: 8853807
    Abstract: Magnetic devices and methods of fabricating the same are provided. According to the magnetic device, a tunnel barrier pattern is interposed between a first magnetic pattern and a second magnetic pattern. An edge portion of the tunnel barrier pattern is thicker than a central portion of the tunnel barrier pattern. The central portion of the tunnel barrier pattern has a substantially uniform thickness.
    Type: Grant
    Filed: May 24, 2012
    Date of Patent: October 7, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jongpil Son, Sangbeom Kang
  • Patent number: 8852761
    Abstract: Provided is a magnetic anisotropy multilayer including a plurality of CoFeSiB/Pt layers used in a magnetic random access memory. The magnetic anisotropy multilayer includes a first Pt/CoFeSiB layer, and a second Pt/CoFeSiB layer formed on the first Pt/CoFeSiB layer.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: October 7, 2014
    Assignee: Korea University Foundation
    Inventors: Young Keun Kim, You-Song Kim, Byong-Sun Chun, Seung-Youb Han, Jang-Roh Rhee