Abstract: A data object has a lock and a condition indicator associated with it. Based at least partly on detecting a first setting of the condition indicator, a reader stores an indication that the reader has obtained read access to the data object in an element of a readers structure and reads the data object without acquiring the lock. A writer detects the first setting and replaces it with a second setting, indicating that the lock is to be acquired by readers before reading the data object. Prior to performing a write on the data object, the writer verifies that one or more elements of the readers structure have been cleared.

Abstract: A hard disk drive includes a magnetic writer and a magnetic recording medium, which includes data tracks with user data sections positioned between servo wedges. The servo wedges each can include multiple servo sectors. The hard disk drive also includes circuitry programmed to cause the magnetic writer to write user data to the multiple servo sectors in multiple servo wedges.

Abstract: A method of and system for handling latency issues encountered in producing real-time entertainment such as games of skill synchronized with live or taped televised events is described herein. There are multiple situations that are dealt with regarding latencies in receiving a television signal with respect to real-time entertainment based on the unfolding games played along with the telecasts. Systemic delays, arbitrarily imposed delays of a broadcast signal and variances in the precise broadcast times of taped television programs have to be equalized so as to provide fair entertainment.

Abstract: An analog-to-digital conversion circuit includes a first comparator, a second comparator and a counter circuit. The first comparator compares an analog signal with a ramp signal. The second comparator compares the analog signal with the ramp signal plus a predetermined offset. When a signal level of the ramp signal is less than a signal level of the analog signal, the counter circuit counts a number of clock cycles of a first clock signal to generate a first portion of a digital signal. When the signal level of the ramp signal plus the predetermined offset is greater than the signal level of the analog signal, the counter circuit counts a number of clock cycles of a second clock signal to generate a second portion of the digital signal. A frequency of the first clock signal is less than a frequency of the second clock signal.

Abstract: The present disclosure describes aspects of constant-density writing for magnetic storage media. In some aspects, a constant-density writer delays transitions between bits within write data to enable constant-density writing. The write data has an initial bit period based on a constant clock signal, which is generated based on the rotation of a media disk. The constant-density writer modifies the write data to generate phase-delayed write data, which has a bit period that is greater than or equal to the initial bit period. To realize this bit period, the constant-density writer changes write phases of bit transitions within the write data. The constant-density writer can also insert stretch bits, filter single-bit transitions, and mitigate glitches within the phase-delayed write data.

Abstract: Receivers, controller units for receivers and related methods are provided. One receiver includes an adjustable sample provider providing samples of an input signal using an adjustable sample timing and a feedback path providing a feedback signal to the adjustable sample provider based on a timing error. The feedback path includes a loop filter providing sample timing information to the adjustable sample provider and a replacement value provider providing a replacement sample timing information replacing the sample timing information when an input signal does not fulfil a predetermined requirement for a feedback-based sample timing adaptation. The replacement value provider provides the replacement sample timing information considering a timing error information over a longer time period when compared to a time period considered by the loop filter for a provision of the sample timing information.

Abstract: Systems and methods are disclosed for phase locking multiple clocks of different frequencies. In certain embodiments, an apparatus may be configured to downsample a first clock having a first frequency and a second clock having a second frequency into downsampled clocks having the same frequency. The apparatus may adjust a frequency of the second clock so that the downsampled clocks are phase aligned. The apparatus may reset counters of the divider circuits that perform the downsampling so align them to a counter for the first clock. A counter for the second clock may also be reset to align with the counter for the first clock. The synchronized clocks may be applied in data storage operations, such as self-servo writing operations, where the first clock may be a read clock and the second clock may be a write clock.

Abstract: The present disclosure relates to phase measurement circuitry operable based on a first clock signal having an intended clock frequency F1 and a second clock signal having an intended clock frequency F2, the circuitry comprising: a delay line configured to receive the first clock signal, the delay line comprising a plurality of delay units each configured to cause a propagation delay, and the plurality of delay units connected in series along the length of the delay line and defining a series of positions therebetween through which signal edges of the first clock signal propagate over time; an edge detector configured to sample the delay line at successive sample times based on the second clock signal and to record at each sample time the position of a given signal edge of the first clock signal along the delay line; and a phase angle determiner configured to determine a phase angle per delay unit based on successive recorded said positions.

Abstract: A recording device, a control device, a recording method, a recording tape cartridge, and a data recording and reproducing system capable of accurately positioning a data recording and reproducing head are obtained. A recording device includes a recording unit that records information on linearity of a servo signal recorded on a magnetic tape included in a recording tape cartridge on an RFID tag included in the recording tape cartridge.

Abstract: According to one embodiment, a magnetic disk device includes a magnetic disk section and a control section. The magnetic disk section includes a magnetic disk, a magnetic head, and a preamplifier. The control section included a processing section configured to cause the preamplifier to execute processing of generating the recording current used by a write head to write data to the magnetic disk, and processing of receiving an output reproduced from the magnetic disk by a read head, and configured to control the magnetic disk section. In the preamplifier, processing of reading data from the magnetic disk is executed by the read head in parallel with processing of writing data transferred from the control section to the magnetic disk by means of the write head.

Abstract: A measurement apparatus for providing digital data to a controller, including an Analog-to-Digital Converter (ADC) configured to transform an analog signal into a modulated digital data stream; an event detector configured to generate event indication data based on an event related to the analog signal or the digital data; and a communication interface configured to combine the modulated digital data stream and the event indication data into one or more communication frames, and to transmit the one or more communication frames to the controller.

Abstract: Apparatuses, systems and methods associated with a trigger management device for managing triggering of sensors within measurement equipment are disclosed herein. In embodiments, a trigger management device may include trigger circuitry coupled to a sensor, the trigger circuitry to determine an amount of delay from trigger transmission to data capture for the sensor, and transmit a trigger to the sensor, the trigger to cause the sensor to capture sensor data. The trigger management device may further include encoder circuitry coupled to one or more encoders, the one or more encoders to indicate positions of one or more actuators or motors, the encoder circuitry to capture encoder data from the one or more encoders at a time that is the amount of delay after transmission of the trigger, wherein the encoder data indicates current positions of the one or more actuators or motors. Other embodiments may include circuitry to manage and/or transmit encoder and other data to multiple devices.

Abstract: Systems and methods are disclosed for hardware-based read sample averaging in a data storage device. In one example, a read channel circuit including a buffer memory is configured to receive a read instruction to read a selected sector, obtain detected sample values for the selected sector, and determine whether the read instruction corresponds to a re-read operation for the selected sector based on determining whether there are stored samples for the selected sector already stored to a locked buffer entry of the buffer memory. When there are stored sample values stored to the locked buffer entry, the example read channel circuit determines the re-read operation is occurring, and performs read sample averaging based on the detected sample values and the stored sample values to produce averaged sample values. Other examples and configurations are also described.

Abstract: According to one embodiment, a magnetic disk device includes a magnetic disk including at least one servo zone that includes a first data storage track with a first servo pattern having a first frequency and a second data storage track with a second servo pattern having a second frequency, wherein the first data storage track is located closer to an outer diameter of the magnetic disk than the first data storage track and the first frequency is greater than the second frequency; a magnetic head that faces the magnetic disk; and a zone servo switching unit that switches a servo pattern frequency employed to position the magnetic head in a radial direction based on a radial position of the magnetic head.

Abstract: Various embodiments of the present technology comprise a method and system for motor control. Various embodiments of the present technology may comprise a control circuit that computes an adjusted rotational speed to compensate for a clock signal that deviates from an ideal (expected) clock signal value.

Abstract: According to an embodiment, the magnetic disk device includes a disk medium and a control circuit. The disk medium includes a first region including a first track. The control circuit controls a write operation of first data to the first track, executes error correction coding of the first data during the write operation. The control circuit makes first determination on whether the written first data is protected by an error correction code. The control circuit sets a second track in a location adjacent to the first track in accordance with a result of the first determination.

Abstract: In a receiver a method for extracting first and second signals from a single signal includes receiving the single signal, generating a recovered first signal by extracting and phase locking the first signal with respect to the phase of a local clock, decoding over a decode frame time the data representing an encoded phase difference at the start of the decode frame time, generating a phase difference between the first signal and the second signal as a function of data representing phase difference from a current decode frame time and data representing an encoded phase difference from an immediately prior decode frame time, subtracting the generated phase difference from the phase of the recovered first signal, and generating a recovered second signal by phase locking a signal at the second frequency at the recovered second phase.

Abstract: A numerical control method at least controls a spindle motor of a machine tool so as to perform machining in accordance with machining conditions. In the method, vibration occurring in a tool is acquired with a vibration acquisition unit, and the machining on a workpiece performed by a machining control unit is stopped when vibration having a predetermined amplitude or greater occurs in the tool. Based on state data indicating the state of the spindle motor at that time, multiple compensation plans for compensating the state of the spindle motor in order to suppress vibration occurring in the tool are calculated. The thus calculated multiple compensation plans are displayed on a display unit together with the state of the spindle motor at the time of occurrence of vibration having the predetermined amplitude or greater in the tool.

Abstract: A data storage device is disclosed comprising a disk comprising servo data, a spindle motor configured to rotate the disk, and a head actuated over the disk. A position error signal (PES) is generated based on the servo data, and the head is actuated over the disk based on the PES. While swinging a speed of the spindle motor, the swinging is disabled based on the PES.

Abstract: A self servo-write process in performed on two or more recording surfaces simultaneously. In a dual-stage servo system, a first fine positioning servo system that includes a first microactuator independently controls the position of a first read/write head over a first recording surface of a hard disk drive, while a second fine positioning servo system that includes a second microactuator independently controls the position of a second read/write head over a second recording surface of the hard disk drive.

Abstract: In one implementation, the disclosure provides a system including a first circuit to compute a timing error based on a received error signal and an estimated interference signal and a timing loop filter to output a frequency offset and a phase shift based on the timing error received as input. The system also includes a phase accumulator to accumulate at least a phase shift to generate a sample index and phase and an interpolation filter to generate samples of a side track signal using the sample index and phase.

Abstract: Embodiments of this application provide a method for obtaining a phase detection signal in a clock recovery circuit and a phase detector, configured to obtain a correct phase detection signal. A phase detector obtains sampling sequences sent by an analog to digital converter ADC, where the sampling sequences are obtained by the ADC by sampling, an electrical signal received by the ADC, and the electrical signal carries a pre-configured training sequence; the phase detector calculates a correlation between the sampling sequences and a comparison sequence, to determine a first location and a second location, where the first location and the second location are locations of a starting point of the training sequence in the sampling sequences; and the phase detector obtains a phase detection signal based on a difference parameter of the first location and the second location.

Abstract: The invention relates to a method for controlling at least one actuator (16, 18) for a chassis of a motor vehicle, in which at least one sensor (10, 12, 14) of the motor vehicle determines values of at least one measurement variable for sensing an environment of the motor vehicle, wherein the determined values are preprocessed, wherein only the values needed to control the at least one actuator (16, 18) are transmitted from a control device (4) associated with the sensor to a control device (6) associated with the actuator and are temporally filtered by the control device (6) associated with the actuator, and wherein the control device (6) associated with the actuator uses the temporally filtered values to provide actuating signals for the at least one actuator (16, 18).

Abstract: Apparatus, methods, and systems are disclosed for performing bit error correction on a data stream. In some aspects, the described systems and methods may include a plurality of memory devices, a first interface, and a field programmable gate array. The field programmable gate array may include a memory controller and a plurality of re-programmable gates. At least one of the re-programmable gates may be configured as a read-only memory (ROM) to store a syndrome decode memory table, wherein the syndrome decode memory table may be configured to perform bit error correction on the data stream being read and/or written to at least one memory device of the plurality of memory devices via the first interface.

Abstract: Systems and methods are disclosed for detection of a servo sector on a data storage medium. A circuit may be configured to sample a signal, and determine preamble sample values from the sample values that correspond to a preamble pattern. When a preamble is detected, the circuit may continue to perform preamble detection, as well as determine signal reading parameters to apply during a servo timing mark (STM) search state based on the preamble sample values. In response to locating the STM, the circuit may generate an indication that the STM is located. In response to not locating the STM, the circuit may extend an STM search timeout period when the preamble pattern is still detected, or increment an STM search counter when the preamble pattern is not detected. The circuit may exit the STM search state when the STM search counter exceeds the STM search timeout period.

Abstract: Systems, methods, and circuitries for synchronizing a first phase locked loop (PLL) with a second PLL are provided. In one example a PLL system includes a first PLL configured to generate a first signal; a second PLL configured to generate a second signal; and phase calculation circuitry. The phase calculation circuitry is configured to calculate a phase of the first signal at a given time; and provide the calculated phase to the second PLL for use by the second PLL in synchronizing a phase of the second with the phase of the first signal.

Abstract: A magnetic disc device according to an embodiment has a head, a position detector, and a filter unit. The position detector detects position information of the head on the basis of servo information. The filter unit performs filtering of an estimated frequency estimated by a quadratic adaptive digital filter that performs self-adaptation for a transfer function on the basis of positional difference information between position information and target position information of the head and adjusts all filter coefficients included in the transfer function on the basis of the estimated frequency.

Abstract: A storage apparatus includes a storage disk including a plurality of tracks each of which includes a plurality of sectors, a head configured to write data in and read data from the storage disk, and a controller. The controller is configured to control the head to carry out reading of a group of data units from target sectors in a target track of the storage disk, the group of data units being associated with a command received from an external device, determine whether or not the target sectors include one or more defective sectors based on result of the reading, and control the head to write the group of data units in physically consecutive non-written sectors of the target track or another track, when the target sectors are determined to include the defective sectors.

Abstract: A data storage device is disclosed comprising a disk comprising servo data, and an actuator configured to actuate a head over the disk. A servo controller is configured to generate digital control values at a first sample rate based on the servo data and transmit the digital control values over a serial interface to a driver circuit. The driver circuit is configured to generate predictive oversampled control values at a second sample rate higher than the first sample rate based on at least two of the digital control values received from the servo controller, apply the predictive oversampled control values to a digital-to-analog converter (DAC) to generate an analog control signal, and apply the analog control signal to the actuator.

Abstract: A method of and system for handling latency issues encountered in producing real-time entertainment such as games of skill synchronized with live or taped televised events is described herein. There are multiple situations that are dealt with regarding latencies in receiving a television signal with respect to real-time entertainment based on the unfolding games played along with the telecasts. Systemic delays, arbitrarily imposed delays of a broadcast signal and variances in the precise broadcast times of taped television programs have to be equalized so as to provide fair entertainment.

Abstract: A semiconductor structure includes stack structures. Each of the stack structures comprises a first conductive material, a chalcogenide material over the first conductive material, a second conductive material over the chalcogenide material, and a first dielectric material between the chalcogenide material and the first conductive material and between the chalcogenide material and the second conductive material. The semiconductor structure further comprises a second dielectric material on at least sidewalls of the chalcogenide material. The chalcogenide material may be substantially encapsulated by one or more dielectric materials. Related semiconductor structures and related methods are disclosed.

Abstract: An alternation voltage- or current generator comprises a first switch driving output network whose frequency can be tuned. The tunable network comprises a first Inductor that is coupled with a first capacitor. A second inductor and/or at least a second capacitor and/or at least a series circuit of a third inductor and a third capacitor which is coupled via at a second switch to the network. The second switch is controlled by a controlled delay (PWM) which is synchronized by a sign change of current and/or voltage in the network.

Abstract: The present disclosure includes apparatuses and methods for estimating an error rate associated with memory. A number of embodiments include sensing data stored in a memory, performing an error detection operation on the sensed data, determining a quantity of parity violations associated with the error detection operation, and estimating an error rate associated with the memory based on the determined quantity of parity violations.

Abstract: A precompensation circuit can include: a rising edge interpolator circuit configured to generate a phase shifted rising edge data signal; a falling edge interpolator circuit configured to generate a phase shifted falling edge data signal; a multiplexer circuit coupled with the rising edge interpolator circuit and with the falling edge interpolator circuit to multiplex the phase shifted rising edge data signal and the phase shifted falling edge data signal into an output data signal responsive to a select signal; and a control circuit coupled with the select input of the multiplexer circuit to control production of the output data signal, wherein the control circuit is further coupled with both the rising edge interpolator circuit and the falling edge interpolator circuit to change the select signal to the multiplexer circuit at times determined by both the phase shifted rising edge data signal and the phase shifted falling edge data signal.

Abstract: According to one embodiment, a magnetic disc has N (N is an integer of 2 or more) zones divided in a radial direction, and servo patterns different in servo pattern frequency are recorded in the individual zones. The relationship that the zone width of a K-th (K is an integer of 1 or more and N?1 or less) zone from the outer radial side of the magnetic disc is larger than the zone width of the K+1-th zone adjacent to the K-th zone on the inner diameter side applies to all the K-th zones in which K is 1 or more and N?1 or less.

Abstract: Systems and methods are disclosed for head delay calibration and tracking multi-sensor magnetic recording (MSMR) systems. In certain embodiments, an apparatus may comprise a first reader and a second reader configured to simultaneously read from a single track of a data storage medium, the first reader offset from the second reader such that the first reader and the second reader detect a same signal pattern offset in time. The apparatus may further comprise a circuit configured to determine a relative offset between the first reader and the second reader, including setting a fixed delay for a first signal from the first reader, setting a second delay for a second signal from the second reader, and adjusting the second delay to align the second signal to the first signal using a timing loop, with the first signal used as a reference signal.

Abstract: A model identification system includes an analog to digital converter (ADC). The ADC includes a conversion circuit configured to receive a first analog signal and generate a first digital signal including samples having a first rate by sampling the first analog signal at the first rate. The ADC further includes a first digital signal processing (DSP) circuit configured to generate a second digital signal including samples having a second rate less than the first rate based on the second digital signal and a first sampling matrix. The first sampling matrix is a block diagonal matrix including a plurality of diagonal blocks, each diagonal block is a row vector including a plurality of elements.

Abstract: To encourage viewer participation, games, contests and social interactions are able to be synchronized with programming such as television shows or commercials utilizing a second screen such as a cell phone, iPad® or laptop computer. The programming is able to be television programming, Internet programming (e.g. a video displayed on a webpage or mobile device) or any other programming. The gaming is able to be any game such as a game of skill or chance, for example, a scavenger hunt or a treasure hunt.

Abstract: A method of and system for handling latency issues encountered in producing real-time entertainment such as games of skill synchronized with live or taped televised events is described herein. There are multiple situations that are dealt with regarding latencies in receiving a television signal with respect to real-time entertainment based on the unfolding games played along with the telecasts. Systemic delays, arbitrarily imposed delays of a broadcast signal and variances in the precise broadcast times of taped television programs have to be equalized so as to provide fair entertainment.

Abstract: A method of and system for handling latency issues encountered in producing real-time entertainment such as games of skill synchronized with live or taped televised events is described herein. There are multiple situations that are dealt with regarding latencies in receiving a television signal with respect to real-time entertainment based on the unfolding games played along with the telecasts. Systemic delays, arbitrarily imposed delays of a broadcast signal and variances in the precise broadcast times of taped television programs have to be equalized so as to provide fair entertainment.

Abstract: An apparatus determines that phase errors have exceeded a threshold when reading data previously recorded to a heat-assisted recording medium. In response to the phase errors exceeding the threshold, remedial action is taken to prevent loss of data due changes in power applied to heat the heat-assisted recording medium when recording.

Abstract: The embodiments disclose a method and apparatus for automatic gain control. The apparatus comprises a first gain controlled element, a second gain controlled element, a first gain control device, a second gain control device and a first simulator. The first gain controlled element and the second gain controlled element each has a signal input, a gain control input and a signal output. The first gain controlled element and the second gain controlled element are coupled in series and one or more power elements coupled between the first gain controlled element and the second gain controlled element. The signal input of the first gain controlled element constitutes an input of the automatic gain control apparatus. The first gain control device has a pre-detection input which is coupled to the signal input of the first gain controlled element and an output which drives the gain control input of the first gain controlled element.

Abstract: In an illustrative example, a device includes an operational amplifier of an active bandpass filter circuit. The device further includes an adjustable resistance device configured to adjust a center frequency associated with the active bandpass filter circuit. The device further includes an adjustable capacitance device configured to adjust the center frequency and a bandwidth associated with the active bandpass filter circuit.

Abstract: A compression engine may be designed for more efficient error checking of a compressed stream, to include adaptation of a heterogeneous design that includes interleaved hardware and software stages of compression and decompression. An output of a string matcher may be reversed to generate a bit stream, which is then compared with an input stream to the compression engine as a first error check. A final compressed output of the compression engine may be partially decompressed to reverse entropy code encoding of an entropy code encoder. The partially decompressed output may be compared with an output of an entropy code generator to perform a second error check. Finding an error at the first error check greatly reduces the latency of generating a fault or exception, as does performing computing-intensive aspects of the compression and decompression with software instead of specialized hardware.

Abstract: A quantum-state-refresh module of a memory system is configured to detect an error in an entangled qubit state stored therein by performing a redundant measurement of syndrome values corresponding to a quantum stabilizer code, with the redundant measurement being based on a block error-correction code. The quantum-state-refresh module includes a plurality of measurement sub-modules, each configured to measure a respective syndrome value or a respective parity value corresponding to the entangled qubit state. The total number of the measurement sub-modules is smaller than the codeword length of the block error-correction code, and the initial approximation of the punctured syndrome values is replaced in the decoding process by erasure values.

Abstract: A noise analysis apparatus has a plurality of digital filters and a noise analysis unit. The plurality of digital filters have mutually different filtering characteristics and filter a same input signal to output a plurality of output signals, respectively. The noise analysis unit detects presence or absence of a noise in the input signal, based on the plurality of output signals. More specifically, the noise analysis unit detects the presence or absence of the noise in the input signal, based on whether or not values of the plurality of output signals coincide with each other.

Abstract: In one embodiment, a computer-implemented method for simulating a defect signal in a time based servo system includes determining a start position for a spike, determining an end position for the spike, determining a servo channel, determining an amplitude of the spike, initiating an acquire lock process, creating the spike in the determined servo channel from the determined start position to the determined end position, and storing servo data including at least a portion thereof generated during the spike. The spike has the determined amplitude. In another embodiment, a computer program product for generating defect signals in a storage system includes a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se. The program instructions are executable by a controller to perform the foregoing method.

Abstract: A heat-assisted magnetic recording (HAMR) device includes transducer head comprising a heat source and a writer. The HAMR device further includes a power controller configured to selectively power on and off the heat source independent of current flowing through a write coil of the writer based on a position of the transducer head relative to an adjacent rotating media.

Abstract: A recording head is configured to write and read data sectors to and from a recording medium, such as a heat-assisted recording medium. A read channel is coupled to the recording head. Phase-locked loop (PLL) circuitry of the read channel is configured to detect a change in a phase error at a location of the data sector. The phase error change may be indicative of a mode-hop that occurred while writing the data sector to the medium. The PLL circuitry is configured to determine a phase offset using the phase error. A controller is configured to effect re-reading of the data sector location using the phase offset to recover the data sector location.

Abstract: The present disclosure includes apparatuses and methods for estimating an error rate associated with memory. A number of embodiments include sensing data stored in a memory, performing an error detection operation on the sensed data, determining a quantity of parity violations associated with the error detection operation, and estimating an error rate associated with the memory based on the determined quantity of parity violations.