Data Clocking Patents (Class 360/51)
  • Patent number: 9019645
    Abstract: A system for providing an accumulated phase to an interpolator of a read channel, the interpolator configured to provide a digital clock signal. A frequency accumulator is configured to generate a frequency offset based on a difference between the digital clock signal and a desired clock signal. A zero phase start module is configured to, during a zero phase start, output an incremental phase jump. A phase accumulator is configured to generate the accumulated phase based on the difference between the digital clock signal and the desired clock signal, and, during the zero phase start, the incremental phase jump output by the zero phase start module, or the frequency offset generated by the frequency accumulator or a predetermined frequency offset.
    Type: Grant
    Filed: July 8, 2014
    Date of Patent: April 28, 2015
    Assignee: Marvell International Ltd.
    Inventors: Hongxin Song, Qiyue Zou, Michael Madden
  • Publication number: 20150109698
    Abstract: According to one embodiment, a computer program product for dropout detection in a read channel includes a computer readable storage medium having program code embodied therewith, the embedded program code being readable and/or executable by a processor to execute dropout detection on a block of signal samples to detect one or more dropout events employing a set of decisions provided by a detector executing a detection algorithm, determine an approximate location for each of the one or more detected dropout events, statistically characterize the one or more detected dropout events to calculate one or more dropout profiles, and selectively filter the block of signal samples during a duration of each of the detected dropout events. Other computer program products, systems, and methods for detecting dropouts are presented in more embodiments.
    Type: Application
    Filed: December 23, 2014
    Publication date: April 23, 2015
    Inventors: Roy D. Cideciyan, Robert A. Hutchins, Thomas Mittelholzer, Sedat Oelcer
  • Patent number: 9013818
    Abstract: A disk drive is disclosed comprising a disk, and a head actuated radially over the disk, wherein the head comprises a read element separated from a write element by a reader/writer gap. A disk-locked clock is synchronized to a rotation of the disk, wherein the disk-locked clock comprises a plurality of clock cycles, and the reader/writer gap spans a first number of the clock cycles comprising an integer of the clock cycles plus a fraction of one of the clock cycles. The fraction of one of the clock cycles is measured when the head is positioned at a first plurality of radial locations across the disk, and a second plurality of radial locations is estimated where the fraction substantially equals a full one of the clock cycles.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: April 21, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventors: Zhenyu Sun, Teik Ee Yeo
  • Patent number: 9013819
    Abstract: Systems and techniques relating to control of magnetic recording devices are described. Such devices can contain a recording medium including magnetic data positions, servo sync marks (SSMs), and phase tracking fields (PTFs) arranged between first and second SSMs. A described technique includes producing, based on a read head's waveform from the recoding medium, a servo detect pulse indicating a SSM detection; producing, based on the waveform, a servo detect pulse that indicates a SSM detection; producing, responsive to the servo detect pulse, calibration pulses, each of the calibration pulses corresponding to a read head's passage over one of the PTFs; and controlling, responsive to the calibration pulses, adjustments of a phase of a write clock signal to align the write clock signal with at least a portion of the data positions, the adjustments being based on groups of samples of the waveform that respectively correspond to the PTFs.
    Type: Grant
    Filed: June 23, 2014
    Date of Patent: April 21, 2015
    Assignee: Marvell International Ltd.
    Inventors: Qiyue Zou, Supaket Katchmart, Gregory Burd
  • Patent number: 9001445
    Abstract: A data processing system includes a number of analog to digital converters operable to sample analog signals obtained from a magnetic storage medium to yield digital signals, multiple sync mark detectors operable to search for a number of different sync marks in the digital signals, and a sync mark detector output comparator operable to compare an output of each of the sync mark detectors to identify detection errors.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: April 7, 2015
    Assignee: LSI Corporation
    Inventors: Rui Cao, Haitao Xia, Lu Lu
  • Patent number: 8988802
    Abstract: A readback signal from a first reader and a readback signal from a second reader are received, the first reader and the second reader configured to read two-dimensional data from at least one track of a recording media. A quality metric of the second reader is measured based on the readback signal. It is determined if the quality metric for the second reader is above a threshold. If the quality metric is above the threshold, the first reader and the second reader are used to read the data.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: March 24, 2015
    Assignee: Seagate Technology LLC
    Inventors: Mehmet Fatih Erden, Scott Warmka, Barmeshwar Vikramaditya, Ralph William Cross
  • Patent number: 8988807
    Abstract: A hard disk drive has disks with data sector preambles that allow for inter-track interference. The same data sector preamble is used for all data sectors in a track but the preamble in each track is different from the preamble in radially adjacent tracks. In a first embodiment each preamble includes a synchronization field (SF) and synchronization mark (SM) that are the same in each track but different from the SF and SM in radially adjacent tracks. Only two unique SFs and two unique SMs are required, with the two SFs and two SMs alternating in radially adjacent tracks. In a second embodiment the preambles are “integrated”, meaning that the preamble is a sequence of bits that does not include separate dedicated fields, like SF and SM. The preamble bit sequences are decoded using matched filters to provide bit synchronization and start-of-data information.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 24, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Jonathan Darrel Coker, Richard Leo Galbraith, Weldon Mark Hanson, Travis Roger Oenning, Srinivasan Surendran
  • Patent number: 8988808
    Abstract: The present disclosure includes systems and techniques relating to synchronization for writing to a recording medium. According to an aspect, an apparatus includes: circuitry configured to measure a timing difference based on a servo detect pulse and a write pulse, wherein the servo detect pulse comes from a detection of servo data from a recording medium including pre-defined data positions, and wherein the write pulse comes from a write clock signal used with the recording medium; and circuitry configured to control an adjustment to a phase of the write clock signal based on the timing difference to align the write clock signal with at least a portion of the pre-defined data positions.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: March 24, 2015
    Assignee: Marvell International Ltd.
    Inventors: Qiyue Zou, Supaket Katchmart, Gregory Burd
  • Publication number: 20150077878
    Abstract: One embodiment includes a method. The method includes sending data from a buffer to a tape drive, and allocating buffer space when a wrap turn is anticipated. The write data is accumulated in the buffer space during the wrap turn. The buffer space is released after the write data accumulated in the buffer space has been transferred to the tape drive.
    Type: Application
    Filed: November 25, 2014
    Publication date: March 19, 2015
    Inventors: Atsushi Abe, Takashi Ashida, Setsuko Masuda, Yutaka Oishi
  • Patent number: 8982681
    Abstract: A method and device for determining frequency error to extend the pull-in range of a timing recovery circuit for a storage device such as an optical disc drive. A code associated with a storage format of the storage device is detected, and the distance between occurrences of the code is determined. The calculated distance is compared with the expected distance to determine the difference. Based on the difference, the frequency error is determined.
    Type: Grant
    Filed: November 7, 2013
    Date of Patent: March 17, 2015
    Assignee: Marvell International Ltd.
    Inventors: Jingfeng Liu, Mats Oberg
  • Patent number: 8982491
    Abstract: A hard disk drive has disks with data sector preambles that allow for inter-track interference. The same data sector preamble is used for all data sectors in a track but the preamble in each track is different from the preamble in radially adjacent tracks. In a first embodiment each preamble includes a synchronization field (SF) and synchronization mark (SM) that are the same in each track but different from the SF and SM in radially adjacent tracks. Only two unique SFs and two unique SMs are required, with the two SFs and two SMs alternating in radially adjacent tracks. In a second embodiment the preambles are “integrated”, meaning that the preamble is a sequence of bits that does not include separate dedicated fields, like SF and SM. The preamble bit sequences are decoded using matched filters to provide bit synchronization and start-of-data information.
    Type: Grant
    Filed: September 19, 2013
    Date of Patent: March 17, 2015
    Assignee: HGST Netherlands B.V.
    Inventors: Jonathan Darrel Coker, Richard Leo Galbraith, Weldon Mark Hanson, Travis Roger Oenning, Srinivasan Surendran
  • Patent number: 8976477
    Abstract: The disclosure is directed to a system and method of generating soft-orthogonal syncmarks for at least a first set of tracks and a second set of tracks. Random pairs of sync patterns are searched to identify one or more pairs where the sync patterns of each pair exhibit delta-like autocorrelation and small cross-correlation with each other and with preamble portions of the tracks. Then a pair of sync patterns is selected from the one or more identified pairs, where the selected pair includes sync patterns that are distinguishable from the user data portions of the tracks at least partially based upon a data characteristic of the user data portions of the tracks. The selected pair of sync patterns is then used to generate a first syncmark for the first set of tracks and a second syncmark for the second set of tracks.
    Type: Grant
    Filed: March 6, 2014
    Date of Patent: March 10, 2015
    Assignee: LSI Corporation
    Inventors: Eui Seok Hwang, George Mathew, Xiufeng Song
  • Publication number: 20150062742
    Abstract: A method according to one embodiment includes reading and/or writing data to a magnetic medium using a head having an array of transducers. An axis of the array is defined between opposite ends thereof, and is tilted at an angle greater than 0° from a line oriented perpendicular to an intended direction of tape travel thereacross during the reading and/or writing. The method further includes at least one of: introducing, by a controller, a timing offset to at least one servo channel to compensate for offset in servo readback signals introduced by the tilt of the head, introducing, by the controller, a timing offset to at least some read channels to compensate for offset in readback signals introduced by a tilt of the head, and introducing, by the controller, a timing offset to at least some write channels to enable writing of transitions that are readable by a non-tilted head.
    Type: Application
    Filed: October 29, 2014
    Publication date: March 5, 2015
    Inventors: Robert G. Biskeborn, Calvin S. Lo
  • Patent number: 8964327
    Abstract: A tape drive receives multiple write requests for data pieces and a synchronization request corresponding to the write requests from a device, performs a synchronization process, and returns a completion status of the synchronization request. The tape drive includes a write controller that stores data pieces transferred from the device in the buffer, according to a first write request, receives a first synchronization request and then a subsequent write request for at least one data piece, and returns the completion status when processing for the first synchronization request is completed and the subsequent write request is received with a command queuing function.
    Type: Grant
    Filed: May 17, 2012
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Atsushi Abe, Katsuhiko Hagiwara
  • Patent number: 8947811
    Abstract: A disk drive is disclosed comprising a head actuated over a disk, wherein data is written to the disk comprising a first periodic pattern, a payload, and a second periodic pattern. The data is first read from the disk to generate a first read signal, and the first read signal is sampled asynchronously to generate first asynchronous signal samples. The first asynchronous signal samples representing the first periodic pattern are processed to measure a first phase, and the first asynchronous signal samples representing the second periodic pattern are processed to measure a second phase. A first phase error is generated based on a difference between the first phase and the second phase. The first asynchronous signal samples representing the payload are adjusted in response to the first phase error to generate first adjusted asynchronous signal samples.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: February 3, 2015
    Assignee: Western Digital Technologies, Inc.
    Inventor: James P. R. McFadyen
  • Patent number: 8947810
    Abstract: Techniques are provided for performing bit-locked operations on media. A first control signal is received from a first source, and a second control signal is generated at a second source in response to receiving the first control signal. The media is accessed according to the second control signal. One or more synchronization markers are located during the accessing of the media, and bit-level synchronization between the second source and the media is achieved based, at least partially, on the one or more synchronization markers. A control operation is performed on the media with bit-level synchrony between the second source and the media.
    Type: Grant
    Filed: March 10, 2014
    Date of Patent: February 3, 2015
    Assignee: Marvell International Ltd.
    Inventors: Gregory Burd, Qiyue Zou, Michael Madden, Kar Shing Chiu, Vincent Wong
  • Publication number: 20150022917
    Abstract: A file system to controls access to a tape library that selectively loads and unloads a plurality of cartridges from a plurality of slots to a drive for transmitting to the file system archived data retrieved from a particular cartridge. The file system includes a cache and receives a request from a requestor to access the tape library, estimates a first data transfer rate from an anticipated tape library operation completion duration and from a capacity of cached data to be transmitted from the cache to the requestor, initiates access to the tape library, and adapts the first data transfer rate to a second data transfer rate to transmit the capacity of the cached data to the requestor throughout the anticipated tape library operation completion duration.
    Type: Application
    Filed: May 29, 2014
    Publication date: January 22, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Takashi Ashida, Tohru Hasegawa, Hiroshi Itagaki, Shinsuke Mitsuma, Terue Watanabe
  • Patent number: 8929015
    Abstract: One embodiment includes a method for writing data to a tape in a tape drive while data successively accumulated in the buffer of a file system is transferred to the tape drive. The method includes detecting a wrap turn when data is being written to the tape; allocating buffer space including a storage capacity exceeding the amount of data to be stored in the buffer during the wrap turn; successively accumulating write data in the buffer space instead of the buffer during the wrap turn; resuming the accumulation of write data in the buffer after the wrap turn has been completed; and releasing the buffer space after the write data accumulated in the buffer space has been transferred to the tape drive.
    Type: Grant
    Filed: April 10, 2014
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Atsushi Abe, Takashi Ashida, Setsuko Masuda, Yutaka Oishi
  • Patent number: 8929013
    Abstract: A storage system with pattern dependent write includes a magnetic write head, a magnetic storage medium, a read channel operable to process write data to be recorded on the magnetic storage medium by the magnetic write head, and a preamplifier operable to receive the write data and an associated clock from the read channel, to generate a pattern dependent write control signal based on a pattern in the write data and on the clock, and to set a write current level through the magnetic write head to a number of different current levels based on the pattern dependent write control signal.
    Type: Grant
    Filed: November 21, 2013
    Date of Patent: January 6, 2015
    Assignee: LSI Corporation
    Inventors: Angelo R. Mastrocola, David W. Kelly, Ross S. Wilson, Jason P. Brenden
  • Publication number: 20150003221
    Abstract: Apparatus and method for recovering data from a multi-channel input signal, such as but not limited to a readback signal from a bit patterned medium (BPM) having a plurality of subtracks. In accordance with some embodiments, a single input single output (SISO) equalizer is adapted to generate equalized outputs responsive to alternating subchannels of the multi-channel input signal. A detector is adapted to generate estimates of data symbols represented by the input signal responsive to the equalized outputs. A switching circuit is adapted to switch in different equalizer coefficients for use by the SISO equalizer for each of the alternating subchannels in the input signal.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventors: Sundararajan Sankaranarayanan, Raman Venkataramani, Rishi Ahuja
  • Patent number: 8922926
    Abstract: Various embodiments provide a recording medium. The recording medium may include a dedicated servo layer for providing servo information. The dedicated servo layer may include a plurality of tracks. A first track may include a first servo signal. A second track may include a second servo signal. The first servo signal and the second servo signal may include a plurality of common transitions. The transitions may be provided at a pre-determined frequency.
    Type: Grant
    Filed: November 21, 2012
    Date of Patent: December 30, 2014
    Assignee: Agency for Science, Technology Research
    Inventors: Jingliang Zhang, Lin Thi Lin, Zhimin Yuan, Bo Liu
  • Patent number: 8922927
    Abstract: A method for inhibiting cycle slip in a tape drive having at least three channels that each utilizes a corresponding numerically controlled oscillator includes establishing a reference clock that is based on an output of the numerically controlled oscillators for at least two of the channels, comparing the output of the numerically controlled oscillator for one of the three channels with the reference clock to determine a first channel phase delta value for the one channel, and generating an error signal for the one channel if the channel phase delta value exceeds a threshold phase delta value for the one channel.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 30, 2014
    Assignee: Quantum Corporation
    Inventors: James P. Peng, Jaewook Lee, Jerry Hodges, Turguy Goker
  • Publication number: 20140362463
    Abstract: Aspects of the disclosure pertain to an apparatus for detecting timing errors including an analog to digital converter circuit, a diversity loop detector and a timing error calculation circuit. The analog to digital converter circuit is operable to convert an input signal into a series of digital samples. The diversity loop detector is operable to apply a data detection algorithm to a plurality of signals derived from the series of digital samples at different phase offsets, to select one of the phase offsets, and to yield a detected output with the selected phase offset. The timing error calculation circuit is operable to calculate a timing error of the analog to digital converter circuit based at least in part on the selected phase offset.
    Type: Application
    Filed: July 13, 2013
    Publication date: December 11, 2014
    Inventors: Bruce Wilson, Yang Han, Yu Kou, Rui Cao
  • Patent number: 8908311
    Abstract: A data storage device is disclosed comprising a head actuated over a disk comprising a plurality of data sectors. During a first revolution of the disk, write data is first encoded into a codeword spanning at least a first data sector and a second data sector and a first part of the codeword is written to the first data sector. During a second revolution of the disk, the write data is second encoded into the codeword and a second part of the codeword is written to the second data sector.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: December 9, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: Steven R. Vasquez
  • Patent number: 8902529
    Abstract: An oscillator is disclosed comprising a first crystal operable to generate a first oscillating signal at a first frequency, and a second crystal coupled to the first crystal and operable to generate a second oscillating signal at a second frequency higher than the first frequency. The oscillator further comprises a DC restore circuit operable to generate a third oscillating signal comprising a substantially fifty percent duty cycle in response to the second oscillating signal.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: December 2, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventor: George J. Bennett
  • Publication number: 20140340780
    Abstract: Sliding-window based data processing includes receiving an analog signal, converting the analog signal to a series of digital samples synchronous to a sampling clock, performing a first discrete Fourier transform on a first portion of the series of digital samples, performing a second discrete Fourier transform on a second portion of the series of digital samples, performing a third discrete Fourier transform on a third portion of the series of digital samples, generating a first series of zero phase start values by calculating a zero phase start value based on the first discrete Fourier transform in a sliding-window at a series of time increments across the servo preamble, storing the zero phase start values, and averaging the stored zero phase start values at the end of the servo preamble.
    Type: Application
    Filed: May 16, 2013
    Publication date: November 20, 2014
    Applicant: LSI Corporation
    Inventors: Xun Zhang, Mark D. Thornley, Dahua Qin, Haitao Xia
  • Patent number: 8884795
    Abstract: A reception device and corresponding method for maintaining a high dynamic range of an AD converter circuit and preventing excessive input to the AD converter circuit is disclosed. For example, a reception device includes a variable gain amplifier circuit that amplifies an input analog signal with a gain controlled by a predetermined control signal, an analog-to-digital converter circuit an overload detector circuit with the same frequency characteristic as the analog-to-digital converter circuit. The overload detector circuit outputs a signal according to a comparison between a level of a signal input to the analog-to-digital converter circuit and a predetermined threshold. The signal that lowers the gain of the variable gain amplifier circuit more greatly is selected out of the signal from the overload detector circuit and another signal, and the gain of the variable gain amplifier circuit is controlled on the basis of the selected signal.
    Type: Grant
    Filed: August 8, 2013
    Date of Patent: November 11, 2014
    Assignee: Sony Corporation
    Inventors: Yoshihisa Takaike, Hideki Yokoshima, Yuya Kondo, Tomohiro Matsumoto
  • Patent number: 8885283
    Abstract: A disk drive is disclosed comprising a head actuated over a disk having a plurality of data tracks. A vibration is detected, and a write operation is configured to write a first plurality of blocks and a second plurality of blocks to a target data track based on the detected vibration. The first plurality of blocks are written to the target data track during a first revolution of the disk, and the second plurality of blocks are written to the target data track during a second revolution of the disk.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: November 11, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Alain Chahwan, Jianguo Zhou, Wei Xi
  • Patent number: 8879185
    Abstract: Systems, methods, apparatus, and techniques are provided for controlling synchronization of a write clock. A frequency offset is estimated based, at least partially, on a location of the servo synchronization marker to produce the frequency offset estimate. A phase correction value and a frequency correction value associated with the write clock are obtained, and a data clock timing control signal is produced based on the frequency offset estimate, the phase correction value, and the frequency correction value. The data clock timing control signal is applied to a phase interpolator to modify a phase of the write clock.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: November 4, 2014
    Assignee: Marvell International Ltd.
    Inventors: Qiyue Zou, Gregory Burd, Michael Madden
  • Publication number: 20140320995
    Abstract: A method, apparatus and a data storage device are provided for implementing data frequency and data bits per sector (BPS) calibration for data written on a recordable surface including non-circular disk tracks of a storage device. A sector based BPS profile is created for data sectors on the recordable surface. The sector based BPS profile is used for modifying a number of data clock cycles based upon longer or shorter data sectors; and data clock frequency is dynamically adjusted based upon velocity jitter.
    Type: Application
    Filed: April 30, 2013
    Publication date: October 30, 2014
    Applicant: HGST Netherlands B.V.
    Inventors: Abhishek Dhanda, Toshiki Hirano, Tetsuo Semba, Satoshi Yamamoto
  • Patent number: 8873181
    Abstract: A system includes a detection module, an adjustment module, a phase shifter module, and a write module. The detection module: samples a sensor signal to generate a digital signal; based on the digital signal, detects a pattern of first bit islands on media; and based on the pattern, determines a phase error of the digital signal. The adjustment module generates a second clock signal based on the phase error and a first clock signal. The second clock signal is synchronized with start or end times of the first bit islands. The phase shifter module, based on a predetermined value, adjusts a phase of the second clock signal. The detection module samples the sensor signal based on the second clock signal with the adjusted phase. The write module, based on the second clock signal prior to being phase adjusted, writes data to the first bit islands or second bit islands.
    Type: Grant
    Filed: March 27, 2014
    Date of Patent: October 28, 2014
    Assignee: Marvell International Ltd.
    Inventors: Qiyue Zou, Xueshi Yang, Gregory Burd
  • Patent number: 8873180
    Abstract: Embodiments of the invention can be manifested as methods for converting analog waveforms into digital sampled signals. In at least one such embodiment, the method includes (i) sampling, based on a sampling-clock signal, an analog waveform received from a transmission channel to generate a digital sampled signal, (ii) generating a digital target signal by applying a specified reference data pattern to a model of the transmission channel, and (iii) adjusting the sampling-clock signal by comparing the digital sampled signal to the digital target signal. Embodiments of the invention can also be manifested as apparatuses that convert analog waveforms into digital sampled signals.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: October 28, 2014
    Assignee: LSI Corporation
    Inventors: Yu Liao, Haotian Zhang, Haitao Xia
  • Publication number: 20140313609
    Abstract: One embodiment includes a method for writing data to a tape in a tape drive while data successively accumulated in the buffer of a file system is transferred to the tape drive. The method includes detecting a wrap turn when data is being written to the tape; allocating buffer space including a storage capacity exceeding the amount of data to be stored in the buffer during the wrap turn; successively accumulating write data in the buffer space instead of the buffer during the wrap turn; resuming the accumulation of write data in the buffer after the wrap turn has been completed; and releasing the buffer space after the write data accumulated in the buffer space has been transferred to the tape drive.
    Type: Application
    Filed: April 10, 2014
    Publication date: October 23, 2014
    Applicant: International Business Machines Corporation
    Inventors: Atsushi Abe, Takashi Ashida, Setsuko Masuda, Yutaka Oishi
  • Patent number: 8867159
    Abstract: A read module includes a clock that generates a clock signal. The clock signal oscillates at a frequency. A converter receives a read signal and samples the read signal based on the clock signal. The read signal includes first data read from a rotating storage medium. The estimation module, subsequent to a center of the rotating storage medium moving from a first location to a second location, estimates an offset distance or an offset angle. The offset distance is between the first location and the second location. The offset angle is between a first line and a second line. The first line extends between a location of the first data on the rotating storage medium and the second location. The second line extends between the first location and the second location. The adjustment module adjusts the frequency of the clock signal based on the offset distance or the offset angle.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: October 21, 2014
    Assignee: Marvell International Ltd.
    Inventor: Michael Madden
  • Patent number: 8867158
    Abstract: Data format that allows for format-efficient data storage, particularly on bit-patterned media. The data format allows for variations in the data storage device, such as reader-to-writer gap variations. A medium can also have at least a pair of a synchronization field and a quiet field with a length greater than a length of the synchronization field. These can be implemented in a bit patterned media system.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: October 21, 2014
    Assignee: Seagate Technology LLC
    Inventors: Jimmie Ray Shaver, Barmeshwar Vikramaditya
  • Patent number: 8861114
    Abstract: A method for reading a current track of data from a storage device includes using a first read head to read the current track of data and at least a first portion of at least one adjacent track of data, using at least a second read head to read at least a portion of the current track of data and at least a second portion of the at least one adjacent track of data, and decoding the data read from the current track, including processing signals from the first read head and the at least a second read head, to at least partly remove, from the signal from the first read head, contributions from the first portion of the at least one adjacent track of data. The decoding may include deriving expressions relating contributions from the current and adjacent tracks, and solving the expressions using least-mean-square analysis.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: October 14, 2014
    Assignee: Marvell International Ltd.
    Inventor: Gregory Burd
  • Patent number: 8861119
    Abstract: Misalignment of a transducer head over a bit-patterned media (BPM) may cause a bit to experience conflicting magnetization forces from the writer, resulting in improperly written data and stored data corruption. The likelihood of data corruption is reduced when a write transition is performed when the write sync margin is increased or maximized. Therefore, a write precompensation system may calculate time shift information for adjusting the timing of an individual write current transition at the transducer that compensates for write sync margin degradation due to any or all of skew angle of the transducer, track misregistration, and write field curvature.
    Type: Grant
    Filed: January 29, 2013
    Date of Patent: October 14, 2014
    Assignee: Seagate Technology LLC
    Inventor: Harry S. Edelman
  • Patent number: 8861111
    Abstract: A servo system includes a first equalizer circuit operable to filter digital servo data samples derived from a first read head to yield first equalized data, a second equalizer circuit operable to filter digital servo data samples derived from a second read head to yield second equalized data, a first interpolator operable to interpolate the first equalized data to yield a number of first interpolated outputs at different phases, a second interpolator operable to interpolate the second equalized data to yield a number of second interpolated outputs at different phases, and a phase tracking and signal combining circuit operable to select and combine most closely aligned signals from the first interpolated outputs and the second interpolated outputs to yield a combined servo data signal.
    Type: Grant
    Filed: April 2, 2014
    Date of Patent: October 14, 2014
    Assignee: LSI Corporation
    Inventors: Yu Liao, Jeffrey P. Grundvig, Richard Rauschmayer
  • Patent number: 8854757
    Abstract: Systems and methods for data processing, and more particularly to estimating or calculating interference between tracks on a storage medium.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: October 7, 2014
    Assignee: LSI Corporation
    Inventors: George Mathew, Jongseung Park, Erich F. Haratsch, Bruce A. Wilson
  • Publication number: 20140268400
    Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for performing loop feedback in a data processing system.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: LSI Corporation
    Inventors: Jianzhong Huang, Yu Kou, Haitao Xia, Seongwook Jeong
  • Patent number: 8837068
    Abstract: A servo system includes multiple interpolators operable to interpolate equalized data for multiple signal paths in a two dimensional magnetic recording system to yield interpolated signals at different phases, scaling circuits operable to scale the interpolated signals by adaptive scaling factors, a signal combining circuit operable to combine the scaled signals, a phase tracking circuit operable to select one of the phases of the combined signal, and an error gradient circuit operable to adapt the adaptive scaling factors.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: September 16, 2014
    Assignee: LSI Corporation
    Inventors: Yu Liao, Jeffrey P. Grundvig, Jin Lu, Richard Rauschmayer
  • Patent number: 8824092
    Abstract: The relative trajectory of a transducer head over bit-patterned media (BPM) may be skewed with respect to a down-track direction on the media (i.e., skew error). In order to resolve the skew error, the presently disclosed technology measures the skew error without adding additional patterning on the media. A detector circuit detects a sequential series of data bits on a storage media. The sequential series of data bits alternate between at least two tracks on the storage media. The sequential series of data bits are sent to a timing circuit, which sets a time stamp indicating when each data bit is received using, for example, a delay chain or a voltage ramp. A time elapsed between receiving a first data bit, a second data bit, and a third data bit is tracked. Transducer head skew is adjusted based on a signal containing the time elapsed between the bits.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: September 2, 2014
    Assignee: Seagate Technology LLC
    Inventors: Sundeep Chauhan, Barmeshwar Vikramaditya
  • Patent number: 8824075
    Abstract: A system and method for recording data to a perpendicular magnetic recording media having a highly ordered granular structure. The method includes the synchronization of write frequency and write phase to the granular structure of the magnetic media optimize performance of the magnetic data recording system by minimizing bit error rate.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: September 2, 2014
    Assignee: HSGT Netherlands B.V.
    Inventors: Michael Konrad Grobis, Manfred E. Schabes
  • Patent number: 8817405
    Abstract: A magnetic recording hard disk drive has a servo clock that provides a varying frequency to the sync mark detector as a function of the radial position of the head as it crosses a servo section. The varying frequency compensates for circumferential misalignment of the sync marks in the servo sections. As the head moves radially across the tracks in a servo section during a seek, the frequency of the servo clock is continually adjusted based on the known radial velocity of the head and the known sync mark circumferential misalignment. The sync mark misalignment as a function of radius is measured as part of a calibration process, typically during disk drive manufacturing. The adjusted frequency adjusts the sample rate at which the sync mark detector samples the incoming sync marks.
    Type: Grant
    Filed: October 24, 2013
    Date of Patent: August 26, 2014
    Assignee: HGST Netherlands B.V.
    Inventors: Abhishek Dhanda, Toshiki Hirano, Tetsuo Semba
  • Patent number: 8817404
    Abstract: The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for improving performance and/or resource utilization based upon channel characteristics.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: August 26, 2014
    Assignee: LSI Corporation
    Inventors: Shu Li, Jun Xiao, Fan Zhang
  • Patent number: 8817402
    Abstract: An apparatus having a controller and a preamplifier is disclosed. The controller may be configured to generate information on a serial bus coupled to a preamplifier interface. The preamplifier may be configured to (i) generate a count value in response to a clock signal synchronized to a recording medium and (ii) generate a plurality of tag signals based on the information and the count value. The tag signals may gate a read operation and a write operation of the preamplifier.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: August 26, 2014
    Assignee: LSI Corporation
    Inventors: Ross S. Wilson, Richard Rauschmayer
  • Patent number: 8810942
    Abstract: A motor drive device has a driver circuit generating an output current for a motor and a control circuit controlling the drive circuit. The control circuit, when switching the driver circuit from a PWM-driving state to a linear-driving state, controls the timing of the switching such that the path of the output current does not change between before and after the switching, and in addition, in the middle of the switching, switches the driver circuit to a high-output-impedance state momentarily.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: August 19, 2014
    Assignee: Rohm Co., Ltd.
    Inventor: Yoshito Otaguro
  • Patent number: 8810943
    Abstract: Methods and apparatus are provided for detecting a sync mark in a storage system, such as a hard disk drive. A sync mark is detected in a storage system by obtaining one or more branch metrics from a data detector in the storage system; generating one or more sync mark metrics using the one or more branch metrics from the data detector; and identifying the sync mark based on the sync mark metrics. An input data set is optionally compared with a plurality of portions of a sync mark pattern to yield corresponding comparison values and the comparison values can be summed to obtain at least one result. A sync mark found signal is asserted based upon the at least one result.
    Type: Grant
    Filed: December 27, 2012
    Date of Patent: August 19, 2014
    Assignee: LSI Corporation
    Inventors: Shaohua Yang, Yoon L. Liow, Wu Chang, Xuebin Wu
  • Patent number: 8786979
    Abstract: Systems and techniques relating to control of magnetic devices are disclosed. A described technique includes receiving a waveform via a head about a recording medium which includes data tracks and servo regions, detecting a servo region based on the waveform becoming an alternating signal, which is indicative of the head's path over discrete radially arranged magnetic strips in the servo region; performing a frequency synchronization of a read clock based on the detection to establish a frequency lock; performing a phase synchronization of the read clock to align a phase of the read clock with respect to acquired samples of the alternating signal; performing a synchronization of a write clock based on a write of a test sequence to the medium, the write clock being responsive to the frequency lock and the read clock; and writing, using the synchronized write clock, data to the medium for servo control.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: July 22, 2014
    Assignee: Marvell International Ltd.
    Inventors: Gregory Burd, Qiyue Zou, Xueshi Yang
  • Patent number: 8780476
    Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide clock generation systems that include: a first clock multiplier circuit, a second clock multiplier circuit, a modulus accumulator circuit, and a data clock phase control circuit. The first clock multiplier circuit is operable to multiply a reference clock by a first multiplier to yield a first domain clock, and the second clock multiplier circuit is operable to multiply the reference clock by a second multiplier to yield a second domain clock. The modulus accumulator circuit is operable to yield a value indicating a fractional amount of the second domain clock that an edge of the second domain clock is offset from a trigger signal. The data clock phase control circuit is operable to phase shift the second domain clock by a phase amount corresponding to the fractional amount.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: July 15, 2014
    Assignee: LSI Corporation
    Inventor: Jeffrey P. Grundvig