Data Clocking Patents (Class 360/51)
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Publication number: 20100142078Abstract: Various embodiments of the present invention provide systems and methods for low overhead disk wobble compensation. As an example, a method for performing synchronous wobble compensation processing is disclosed. The method includes providing a medium that includes a servo data region and a user data region. The servo data region includes a clock recovery pattern and a location pattern. A detectable pattern is written to the user data region a known number of bit periods from the location pattern. The detectable pattern is read back, and a fractional processing delay is calculated. Based at least on the fractional processing delay and a known number of bit periods from the location pattern to the end of the servo data region, a wobble compensation pattern is written an integral number of bit periods from the location pattern.Type: ApplicationFiled: December 4, 2008Publication date: June 10, 2010Inventors: Viswanath Annampedu, Terence Karanink, Xun Zhang, Jeffrey P. Grundvig
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Patent number: 7733588Abstract: A phase error reduction system includes a control module, a phase-locked loop (PLL) module, and a harmonic removal module. The control module generates source timestamps for a plurality of synchronization marks in a source signal using a clock and generates a plurality of target tirnestamps. The PLL module determines phase errors between the source timestamps and the target timestamps and minimizes the phase errors. The harmonic removal module removes harmonics of the phase errors using a weighted moving average filter (MAF). The harmonic removal module comprises a repetitive feed forward (RFF) module that includes an amplifier the scales the phase errors, a delay buffer that generates RFF commands to reduce the phase errors, and a summing module. The MAF filters the RFF commands. The summing module provides sums of the phase errors scaled by the amplifier and the RFF commands filtered by the weighted MAF to the delay buffer.Type: GrantFiled: January 4, 2006Date of Patent: June 8, 2010Assignee: Marvell International Ltd.Inventor: Edward Ying
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Patent number: 7733590Abstract: Optimal synchronization mark/address mark construction. These marks can generally be referred to as sync marks. A novel means is presented by which sync marks can be generated for use within a variety of communication systems including HDD systems. The sync marks generated hereby have a largest possible minimum distance measurement that ensures highly accurate detection of the transition between the data portion and the preamble portion of information that is processed. Various types of distance measurement criteria can be employed, including a Euclidean distance measurement or a Hamming distance measurement, when selecting the sync mark from among a plurality of possible sync marks.Type: GrantFiled: June 21, 2006Date of Patent: June 8, 2010Assignee: Broadcom CorporationInventor: Ravi Motwani
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Patent number: 7733591Abstract: The invention includes apparatus and methods that allow a data storage device perform an enhanced data recovery procedure (DRP) that includes obtaining a new digital sampling of the voltages for the failing unit of data by re-reading the analog signal and converting it to digital form using an analog-to-digital conversion (ADC) using a fixed phase clock signal. The data samples are re-interpolated using a programmable delay line. The digital values representing the voltages are stored a buffer so that the data can be processed repeatedly using varying parameters as part of the data recovery procedure. Optionally the samples stored in the buffer can be processed in the reverse direction (from end of sector to beginning of sector) without requiring modification of the standard Viterbi detector since it inherently works on data processed in either direction.Type: GrantFiled: December 18, 2006Date of Patent: June 8, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Kraig Bottemiller, Richard Leo Galbraith, Weldon Mark Hanson, Travis Roger Oenning, Michael Joseph Ross, Fuminori Sai
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Patent number: 7733592Abstract: Frequency error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving frequency error information of a signal relevant to a phase locked loop with respect to each channel; combining the received error signal information and generating a combined error signal, weighting the received error signal information from each channel, for example with reliability information. The combined frequency error signal is applied to at least one channel phase locked loop.Type: GrantFiled: October 11, 2007Date of Patent: June 8, 2010Assignee: International Business Machines CorporationInventors: Robert Allen Hutchins, Jens Jelitto, Sedat Oelcer
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Publication number: 20100134913Abstract: According to one embodiment, a frequency control apparatus includes an eccentric component storage module, a frequency correction amount calculating module, and an oscillator control module. The eccentric component storage module stores in advance an eccentric component calculated by a discrete Fourier transform of the number of clock signals measured for each servo frame. The frequency correction amount calculating module calculates the number of clock signals corresponding to the servo frame based on the eccentric component stored in the eccentric component storage module and calculates a frequency correction amount corresponding to the servo frame based on the number of clock signals. The oscillator control module controls the operation of a frequency oscillator such that a frequency for oscillating a clock signal in the frequency oscillator is adjusted according to the frequency correction amount calculated by the frequency correction amount calculating module.Type: ApplicationFiled: September 28, 2009Publication date: June 3, 2010Applicant: FUJITSU LIMITEDInventors: Tatsuhiko Kosugi, Takeyori Hara, Toru Ikeda, Susumu Yoshida
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Patent number: 7729074Abstract: A method includes: producing a bit detection signal in response to a plurality of islands located in a plurality of zones of a bit patterned media, processing the bit detection signal to produce a synchronization signal, wherein the processing is dependent on characteristics of the islands in the zone containing the plurality of islands, and using the synchronization signal to control timing of writing to the bit patterned media. The synchronization signal can also be used to control timing of reading from the bit patterned media.Type: GrantFiled: June 28, 2007Date of Patent: June 1, 2010Assignee: Seagate Technology LLCInventors: Raman Chatapuram Venkataramani, Sundararajan Sankaranarayanan, Mehmet Fatih Erden
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Patent number: 7729075Abstract: An improved mass storage system having a read channel adapted to store in a FIFO memory digitized analog samples of data symbols read from a disk, the buffered digitized samples being processed by digital circuitry that may be operated at a slower speed than the maximum symbol rate from the disk. In one embodiment, the read channel has an analog portion that processes analog signals from a read head and includes an ADC for converting the processed analog signals into digital samples in response to a first clock; a FIFO storing therein the digital samples in response to the first clock and reading out the stored digital samples in response to a second clock; and a detector, in response to the second clock, detecting the digital samples from the FIFO into digital data. The maximum frequency of the first clock is less than the maximum frequency of the second clock.Type: GrantFiled: October 31, 2007Date of Patent: June 1, 2010Assignee: Agere Systems Inc.Inventor: Nils Graef
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Patent number: 7720139Abstract: One embodiment of an equalizer circuit has an FIR filter 116 in the asynchronously oversampled domain with a filter coefficient adaptation module that adapts the filter coefficients to the transfer function of a data read channel. Applications include tape drives, drives for optical and magnetic discs as well as receivers. The filter adaptation is performed on the basis of an error signal delivered by a slicer 128 which operates on synchronous samples after timing recovery and sample reconstruction.Type: GrantFiled: July 28, 2005Date of Patent: May 18, 2010Assignee: Hewlett-Packard Development Company, L.P.Inventor: Rafel Jibry
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Publication number: 20100118428Abstract: Techniques are described for providing media-referenced timing for operations on a data storage medium. In particular, Phase-Locked Loop (PLL) synchronization fields may be interspersed within data fields of the medium and may be read to obtain timing measurements. The PLL fields are illustratively pre-recorded at predetermined intervals on the medium and have a fixed number of dots of the bit patterned medium between the PLL fields.Type: ApplicationFiled: November 7, 2008Publication date: May 13, 2010Inventors: BRUCE DOUGLAS BUCH, MEHMET FATIH ERDEN, BARMESHWAR VIKRAMADITYA
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Publication number: 20100118426Abstract: A write clock control system comprises a clock controller that determines a phase offset based on a phase difference between a write clock signal and a media pattern corresponding to a given timing synchronization field being read, and a phase interpolator that produces an updated write clock signal by updating the phase of the write clock signal in accordance with control signals that are based on the phase offset signal.Type: ApplicationFiled: November 7, 2008Publication date: May 13, 2010Inventors: Barmeshwar Vikramaditya, Bruce Douglas Buch, Mehmet Fatih Erden, Mathew P. Vea
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Publication number: 20100118429Abstract: A technique is described for reducing overhead in a magnetic medium utilizing interspersed timing synchronization fields. In particular, a reader reads timing synchronization fields interspersed within data fields of the medium to obtain timing measurements. The reader is separated from a writer by a distance greater than a distance of the reader to traverse a select timing synchronization field. As such, the writer may perform a direct current (DC) write to the medium to suspend transitional write operations while the reader is reading the select timing synchronization field, and/or while the writer is over a unipolar field (e.g., a timing synchronization field).Type: ApplicationFiled: November 7, 2008Publication date: May 13, 2010Inventors: BARMESHWAR VIKRAMADITYA, BRUCE DOUGLAS BUCH, JON KARSTEN KLARQVIST
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Publication number: 20100118427Abstract: Clock synchronization techniques are described for data storage media, particularly for the tolerances of efficient use of bit patterned media (BPM) capacity. In particular, techniques are described where position of a read-write head and timing of a write and/or read clock is determined within a fraction of a dot of the underlying media. The techniques obviate the requirement for the fields conventionally written preceding a data sector to provide bit synchronization and symbol framing (sector synchronization fields).Type: ApplicationFiled: November 7, 2008Publication date: May 13, 2010Inventors: Bruce Douglas Buch, Mathew P. Vea
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Patent number: 7715138Abstract: A disk drive is disclosed comprising a disk having a plurality of servo sectors defining a plurality of servo tracks that form a plurality of servo zones. The disk drive further comprises a head actuated radially over the disk for generating a read signal, and control circuitry including a timing circuit. The timing circuit is initialized with a nominal center frequency that approximates an average servo data rate out of the plurality of servo zones. The timing circuit is synchronized to the read signal to generate synchronous read signal samples. A servo sync mark is detected from the synchronous read signal samples, and the servo zone the head is reading is estimated after detecting the servo sync mark.Type: GrantFiled: November 20, 2007Date of Patent: May 11, 2010Assignee: Western Digital Technologies, Inc.Inventor: Hanan Kupferman
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Publication number: 20100110573Abstract: A hard disk drive that includes a head that is coupled to a disk. The disk drive further includes a comparator circuit that is coupled to the head. The comparator circuit receives a synchronization signal and a write clock. The comparator generates a write error signal if a comparison of the synchronization and write clock signals exceeds a threshold. The write error signal can inhibit a write operation or cause a rewrite of data.Type: ApplicationFiled: October 30, 2008Publication date: May 6, 2010Applicant: Samsung Electronics Co., Ltd.Inventor: Yawshing Tang
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Publication number: 20100110574Abstract: A system includes a hard disk controller module configured to control a hard disk. A read channel device is in communication with the hard disk controller module via a read bus and a write bus. The read channel device includes a loopback circuit configured to selectively loop back the write bus to the read bus. The read channel is configured to generate a write clock for the hard disk controller module to write data on the write bus. The read channel is configured to generate a read clock for the hard disk controller module to read the data on the read bus. The write clock is independent of the read clock.Type: ApplicationFiled: January 11, 2010Publication date: May 6, 2010Inventor: Pantas Sutardja
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Patent number: 7710673Abstract: A phase locking apparatus is disclosed which, includes a phase error information detecting device to detect phase error information indicating the phase error. The device has a phase position determining device to determine, based on run length limited information, whether or not phase positions of a first and second value from among sampling values constituting synchronous data are under a reverse phase condition in effect when only one of the first and the second values is in excess of a predetermined threshold, and a phase error information calculating device to calculate the phase error information in each of two cases determined, one with the reverse phase condition found to be in effect and the other without effect.Type: GrantFiled: May 8, 2006Date of Patent: May 4, 2010Assignee: Sony CorporationInventors: Toshiyuki Nakagawa, Seigo Taniguchi
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Patent number: 7692887Abstract: An apparatus and method for determining a head parameter value (e.g., head resistance) of a resistive head. A test head current is supplied to the head during a head parameter measurement interval using the same current sources that supply a bias current to the head during an operating (read operation) interval. The determined head parameter value is latched for use in setting the control loop gain for a control loop that controls the current sources during the operating interval.Type: GrantFiled: September 13, 2006Date of Patent: April 6, 2010Assignee: Agere Systems Inc.Inventors: Daniel J. Dolan, Jr., Hao Fang, Jeffrey A. Gleason, Ross S. Wilson
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Publication number: 20100079891Abstract: A method for writing data to a tape at multiple rates for simultaneously creating data tracks having differing linear data densities, according to one embodiment, includes passing a tape over a head, the head having an array of writers thereon; receiving incoming data; mapping the data to a two dimensional array corresponding to the array of writers; clocking some of the mapped data to a first writer in the array of writers at a first rate; and clocking some of the mapped data to a second writer in the array of writers at a second rate different than the first rate.Type: ApplicationFiled: September 29, 2008Publication date: April 1, 2010Inventors: Robert Glenn Biskeborn, Larry LeeRoy Tretter
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Patent number: 7688534Abstract: A method of writing servo data onto a disk is disclosed. A spindle motor spins the disk, and a back electromotive force (BEMF) signal is measured from the spindle motor. A repeatable phase error (RPE) is extracted from the BEMF signal to generate an adjusted BEMF signal. A servo write clock is synchronized in response to the adjusted BEMF signal, and the servo data is written to the disk using the servo write clock. In one embodiment, the servo data comprises spiral seed patterns that are processed to write concentric servo sectors to the disk.Type: GrantFiled: December 11, 2008Date of Patent: March 30, 2010Assignee: Western Digital Technologies, Inc.Inventor: Mark R. McCornack
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Publication number: 20100073801Abstract: A magnetic recording device includes: a magnetic recording medium including a write-synchronization region and a data region; a correction-value-storage unit configured to store therein a phase-correction value for correcting a phase of the write clock; a reading unit configured to read out a signal from the magnetic recording medium; a write-clock generator configured to generate the write clock based on a write-reproduction signal which is a signal read out from the write-synchronization region by the reading unit; a phase-correction unit configured to correct the phase of the write clock generated by the write-clock generator based on the phase-correction value stored in the correction-value-storage unit; and a data acquisition unit configured to acquire data included in a data-reproduction signal which is a signal read out from the data region by the reading unit based on a clock that is generated by correcting the phase by the phase-correction unit.Type: ApplicationFiled: July 29, 2009Publication date: March 25, 2010Applicant: FUJITSU LIMITEDInventor: Akihiro Itakura
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Publication number: 20100073800Abstract: Provided are a method, servo channel, and tape drive for recovering servo information from a synchronous servo channel. An interpolator reads samples of a servo signal obtained from a servo reader at a rate of one servo sample per clock interval, to produce up to M interpolated servo samples per clock interval. A first buffer buffers interpolation time instants at which the interpolator generates interpolated servo samples. The interpolated servo samples are buffered in a second buffer and the interpolated servo samples are outputted from the second buffer to a correlator to produce correlation signal samples.Type: ApplicationFiled: September 23, 2008Publication date: March 25, 2010Applicant: International Business Machines CorporationInventors: Giovanni Cherubini, Robert Allen Hutchins, Jens Jelitto
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Patent number: 7684139Abstract: A read channel and method using that read channel are disclosed. The read channel comprises an analog to digital converter which asynchronously samples at a fixed rate an analog signal formed by reading a data track, where that data track was written to a data storage medium at a symbol rate and an interpolator interconnected with the analog to digital converter. The read channel further comprises a fractionally-spaced equalizer, where the interpolator provides an interpolated signal to the fractionally-spaced equalizer at an interpolation rate, where that interpolation rate is greater than the symbol rate. The fractionally-spaced equalizer forms a synchronous equalized signal. The read channel further comprises a gain control module interconnected with the fractionally-spaced equalizer, and a sequence detector interconnected with the gain control module.Type: GrantFiled: July 1, 2008Date of Patent: March 23, 2010Assignee: International Business Machines CorporationInventors: Evangelos S. Eleftheriou, Robert A. Hutchins, Glen A. Jaquette, Jens Jelitto, Sedat Oeloer
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Patent number: 7684138Abstract: Embodiments in accordance with the present invention relate to detecting a micro-relief that exists on surfaces of a magnetic disk. A phase or frequency of a read signal obtained when data written to a minute projection or a minute concavity on a recording surface of a magnetic disk is read out, differs from that of a read signal obtained when data written to a flat recording surface is read out. The phase progresses in the minute projection, whereas the phase is delayed in the minute concavity. A micro-relief is detected by measuring a deviation value of this frequency, and then defect registration is performed. Embodiments in accordance with the present invention are configured to detect a minute projection whose level does not cause TA. Embodiments in accordance with the present invention may also be configured to provide a highly reliable magnetic disk drive by controlling the flying height in response to a state of a minute projection and that of a minute concavity.Type: GrantFiled: November 30, 2006Date of Patent: March 23, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Nobuhito Kitamura, Hitoshi Yoshida
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Patent number: 7679852Abstract: Apparatus and methods are disclosed that adjust the phase of a read/write clock signal. The read/write clock signal may be used in a data storage apparatus to regulate reading/writing on a data storage media. An apparatus includes an adjustment circuit that adjusts phase of an edge of a read/write clock signal based on the timing of information that is read from a data storage media. Another apparatus includes a servo circuit and a read/write channel circuit. The servo circuit generates a leading edge transition of a servo gate signal in response to a signal indicating that a read/write transducer is approaching a start of a servo wedge. The read/write channel circuit generates a trailing edge transition of the servo gate signal in response to occurrence of a defined time delay following the transducer reading a servo address mark from the servo wedge.Type: GrantFiled: June 28, 2007Date of Patent: March 16, 2010Assignee: Seagate Technology LLCInventors: Jimmie Ray Shaver, Robert William Warren, Jr.
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Patent number: 7675702Abstract: Methods according to some embodiments include writing servo patterns on a data storage medium including a plurality of timing patterns in response to phase correction values generated using a phase correction value (PCV) kernel having a length that is less than the number of timing patterns on the data storage medium.Type: GrantFiled: May 23, 2007Date of Patent: March 9, 2010Assignee: Seagate Technology LLCInventors: Charles R. Watt, Xiao Zhang, John W. Vanlaanen
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Patent number: 7675703Abstract: A system and method accurately clocks write data to the discrete data blocks in a patterned media disk drive. The precise time intervals between successive timing marks in the data tracks are measured by a timing mark detector that counts the integer number of write clock cycles between successive timing marks and the fractional part of a write clock cycle by detecting the phase difference between a timing mark and a reference signal. The resulting timing error is output to a write clock compensator. The write clock is capable of generating equally spaced primary phases and phases intermediate the primary phases. The compensator includes a phase rotator that controls which write clock phase is selected for output. The value in a phase register of the compensator is used to control the phase rotator to advance or retard the write clock phase, and thus to adjust its frequency and phase so as to be synchronized for writing to the data blocks.Type: GrantFiled: June 8, 2007Date of Patent: March 9, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventors: Thomas R. Albrecht, David Timothy Flynn, Richard Leo Galbraith, Michael Anthony Moser, Bruce Alexander Wilson, Xiao Z. Wu
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Patent number: 7675699Abstract: A patterned-media magnetic recording disk has data islands arranged into concentric data tracks and the data tracks arranged into radially-spaced annular zones, with each zone having an inside-diameter (ID) perimeter and an outside-diameter (OD) perimeter and at least one annular nondata region near one of its perimeters. Each zone includes generally radially-directed synchronization (sync) marks that extend from the zone ID perimeter to the zone OD perimeter so as to extend into the annular nondata region or regions of the zone. In the disk drive that uses the patterned-media disks the read head and write head have an effective radial offset relative to one another, so the write head may be on a data track near a zone perimeter when the read head is located in a nondata region. The read head detects the sync marks that extend into the nondata region so that the write head can be synchronized with the data islands in the data track.Type: GrantFiled: September 7, 2007Date of Patent: March 9, 2010Assignee: Hitachi Global Storage Technologies Netherlands B.V.Inventor: Thomas R. Albrecht
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Patent number: 7675701Abstract: Detection capability of a servo timing mark (STM) is improved. Long STM is configured by pseudo-STM forming part of an AGC/PLL pattern and intrinsic STM. When a system can not recognize the intrinsic STM, it keeps a state that a sector detection window is opened, and is operated in a long STM detection mode to recognize the long STM, thereby generates an STM detection signal. After the STM detection signal has been generated, an STM detection window is closed, and the system is operated in an intrinsic STM detection mode. Since the long STM has longer bit length than the intrinsic STM, it has high discriminating power with respect to other bit patterns. Therefore, even if the sector detection window is remained to be in an opened state, bit strings of data sector, address information in a servo sector or the like is not falsely recognized.Type: GrantFiled: November 15, 2006Date of Patent: March 9, 2010Assignee: Hitachi Global Storage Technologies Netherlands, B.V.Inventors: Hideki Ohzeki, Noboru Yoshida, Kazuyuki Ishibashi, Tetsuo Ueda, Isao Yoneda, Toshiaki Wada
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Patent number: 7667915Abstract: According to one embodiment, a disk drive is provided which has a head amplifier having a function of, at a data recording time, outputting AC pattern data to a write head prior to the recording of the write data to allow it to be recorded on a write splice section on a disk medium. The write head records an AC signal pattern of a high frequency on the write splice section on the disk medium according to an output timing of a write gate and then write data is recorded with a preamble as a header.Type: GrantFiled: November 20, 2006Date of Patent: February 23, 2010Assignee: Kabushiki Kaisha ToshibaInventor: Masakazu Abe
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Patent number: 7667911Abstract: A self servo writing disk controller detects a plurality of spiral sync marks and a plurality of spiral bursts corresponding to one of a plurality of servo spirals from a read signal from the read/write head. A timing reference signal is generated based on timing of at least one of the plurality of the spiral sync marks. A position error signal is generated based on timing of at least one of the plurality of spiral sync marks and a magnitude of at least one of a plurality of spiral bursts. The timing reference signal and the position error signal are used by the disk drive for timing and positioning in self writing initial servo wedges to the disk.Type: GrantFiled: September 14, 2006Date of Patent: February 23, 2010Assignee: Broadcom CorporationInventor: King Wai Thomas Lau
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Patent number: 7663831Abstract: The present invention relates to a reproducing apparatus which, in a case where a burst error has occurred, corrects an error preceding a synchronization pattern detected thereafter to have less errors. A bit slip judging section 81 in a bit slip correcting section 53 calculates a bit slip correction amount and a bit slip correction position on the basis of phase error signals detected by a phase error detecting section 51, synchronization pattern signals detected by a synchronization detecting section 52, reproduced clocks and detected data. A FIFO control section 82 controls a FIFO buffer 83 on the basis of the bit slip correction amount and the bit slip correction position, to perform bit slip correction. As a result, in the case where a burst error has occurred, an error preceding a synchronization pattern detected thereafter is corrected, whereby an error reduction can be implemented. The present invention is applicable to a reproducing apparatus.Type: GrantFiled: November 10, 2004Date of Patent: February 16, 2010Assignee: Sony CorporationInventors: Kenichi Hayashi, Masaki Endo, Tomohiro Ohama
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Patent number: 7656604Abstract: A disk drive is disclosed comprising a disk including a plurality of spiral tracks, wherein each spiral track comprises a high frequency signal interrupted by a sync mark at a sync mark interval, and a head actuated over the disk. The spiral tracks are demodulated by reading a spiral track to generate a spiral track crossing signal g(xn), where xn is a time in a demodulation window, and determining a position error signal (PES) by determining a time-shift L that maximizes a correlation between g(xn) and a function that estimates a nominal spiral track crossing signal having the time-shift of L.Type: GrantFiled: December 10, 2007Date of Patent: February 2, 2010Assignee: Western Digital Technologies, Inc.Inventors: Jiangang Liang, Siri S. Weerasooriya, Charles A. Park
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Publication number: 20100020429Abstract: A method includes: writing data to a bit-patterned media at times determined by a clock having a period that is offset from a bit island period by a fixed offset to create one insertion or one deletion approximately within a predetermined number of bit islands, reading the data, and correcting the read data using error correction. An apparatus that implements the method is also provided.Type: ApplicationFiled: July 24, 2008Publication date: January 28, 2010Applicant: Seagate Technology LLCInventors: Deepak Sridhara, Ching He, Arvind Sridharan, Raman Venkataramani
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Patent number: 7649705Abstract: For performing a retry in a data storage device, a spin jitter value corresponding to a desired sector of a disc is determined. A read timing is adjusted according to the spin jitter value of the desired sector. A retry of a data read is performed for the desired sector with the adjusted read timing. Thus, the present invention accounts for eccentricity of the disc as indicated by the spin jitter value during retry of the data read operation.Type: GrantFiled: March 8, 2005Date of Patent: January 19, 2010Assignee: Samsung Electronics Co., Ltd.Inventor: Jin-Wan Jun
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Patent number: 7646555Abstract: A system includes a hard disk controller (HDC) module that controls a hard disk and a read channel (RC) device that communicates with the HDC module via a read bus and a write bus. The RC device includes a loopback circuit that selectively loops back the write bus to the read bus. The RC device generates a write clock for the HDC module to write data on the write bus and a read clock for the HDC module to read the data on the read bus, wherein the write clock is independent of the read clock.Type: GrantFiled: July 5, 2006Date of Patent: January 12, 2010Assignee: Marvell World Trade Ltd.Inventor: Pantas Sutardja
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Patent number: 7646559Abstract: A control system includes a write head that writes servo data on a rotating medium. A control module signals the write head to write a servo test track on the rotating medium and subsequent to a reference servo track. The reference servo track is written prior to an interrupt event. The control module detects a position of the servo test track relative to the reference servo track and signals the write head to write a new servo track based on the position after the interrupt event.Type: GrantFiled: September 26, 2007Date of Patent: January 12, 2010Assignee: Marvell International Ltd.Inventors: Man Cheung, Pantas Sutardja
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Patent number: 7646557Abstract: A method of generating a clock signal from a moving medium includes detecting movement of at least one mark that moves synchronously with the medium. A generally sinusoidal output signal corresponding to movement of the mark is produced. The generally sinusoidal output signal is interpolated to provide a clock signal having a higher frequency than said generally sinusoidal output signal. The interpolation dynamically adjusts the phase of the interpolated output clock signal to correct for errors in the phase of said output signal. In one embodiment, servo tracks are written to a magnetic disk using a servo pattern signal, the phase of the servo pattern signal being adjusted relative to a clock signal. In another aspect, timing errors in a servo track writer are characterised.Type: GrantFiled: July 5, 2006Date of Patent: January 12, 2010Assignee: Xyratex Technology LimitedInventors: Keith R. C. Brady, Gregory M. Quick, Paul H. R. Jolly, Paul A. Levin, Ian P. McGuire
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Patent number: 7643235Abstract: Timing recovery and synchronization for data communication is utilized. A pilot sequence of signals can be selected to improve recovery of a phase offset and a frequency offset in a communication system. Sampling instances can further be adjusted based on pilot sequences within a user data portion.Type: GrantFiled: September 28, 2006Date of Patent: January 5, 2010Assignee: Seagate Technology LLCInventors: Mehmet Fatih Erden, Erozan Mehmet Kurtas, Mark Edward Re
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Patent number: 7639446Abstract: According to one embodiment, a servo write module is configured to write radial servo patterns on the disk media using a first spiral servo pattern of the spiral servo patterns as a base pattern for tracing, to detect a shift amount of a sync mark position in each of other spiral servo patterns with respect to a sync mark position in the first spiral servo pattern, and to adjust, when the base pattern is switched from the first spiral servo pattern to a second spiral servo pattern of the spiral servo patterns, a phase of the servo write clock based on the detected shift amount corresponding to the second spiral servo pattern.Type: GrantFiled: October 9, 2008Date of Patent: December 29, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Seiji Mizukoshi, Hideo Sado, Toshitaka Matsunaga, Shouji Nakajima
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Patent number: 7630155Abstract: A magnetic storage apparatus has a reproducing head to reproduce information from a perpendicular magnetic recording medium that is recorded with servo information, eccentricity correction data and read/write data. The apparatus further has a filter part to filter a reproduced output of the reproducing head by filtering the servo information which has a differentiated waveform by a non-differentiating characteristic and by filtering the eccentricity correction data and the read/write data which have rectangular waveforms by a differentiating characteristic, a demodulating part to demodulate the servo information, the eccentricity correction data and the read/write data that are filtered by the filter part, and a servo system to carry out a control process including an eccentricity control based on the servo information and the eccentricity correction data that are demodulated.Type: GrantFiled: June 23, 2006Date of Patent: December 8, 2009Assignee: Fujitsu LimitedInventors: Tsugito Maruyama, Sumio Kuroda
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Patent number: 7630161Abstract: According to one embodiment, a servo writing apparatus that writes a multi-spiral servo pattern to a disk medium is disclosed. The apparatus has a servo controller that generates a servo clock determining a head seek start timing, a servo pattern generator that generates a sector index pulse determining the interval at which a multi-spiral servo pattern is written to the disk medium, a clock phase difference measuring unit that measures a phase difference between the servo clock and the sector index pulse, and a controller that adjusts the measured phase difference.Type: GrantFiled: December 20, 2007Date of Patent: December 8, 2009Assignee: Kabushiki Kaisha ToshibaInventors: Shouji Nakajima, Masahide Yatsu, Hideo Sado, Katsuki Ueda, Toshitaka Matsunaga, Seiji Mizukoshi, Shinichirou Kouhara
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Publication number: 20090296255Abstract: A magnetic storage medium such as a BPM includes a plurality of magnetic dots for writing and reproducing data disposed in a magnetically separated manner so as to be spaced a predetermined distance in a down-track direction and a plurality of tracks concentrically disposed so that the magnetic dots are disposed in a magnetically separated manner. In the BPM, a phase-adjusting track is disposed in an arbitrary track among the tracks. On the phase-adjusting track, phase detection dots disposed in a down-track direction to allow writing and reproduction of phase detection data and blank bits providing a predetermined phase difference in a down-track direction to next successive phase-detecting dots are alternately disposed in a successive manner.Type: ApplicationFiled: March 20, 2009Publication date: December 3, 2009Applicant: FUJITSU LIMITEDInventor: Nobuhide Aoyama
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Patent number: 7616395Abstract: There is provided an information reproduction apparatus that can suppress degradations in the qualities of reproduced data and timing from due to interpolation errors when performing interpolation timing recovery, and that can avoid degradation in the stability of the system due to an increase in the timing recovery loop delay. An information reproduction apparatus (100) for reproducing data and timing from an analog signal including data information and timing information is provided with an expected value generator (106) for outputting plural expected values, and a maximum likelihood detector (107) for outputting data that corresponds to a sequence of the highest likelihood with an output sequence of an A/D converter among the plural expected value sequences, at the timing of a second clock.Type: GrantFiled: August 15, 2005Date of Patent: November 10, 2009Assignee: Panasonic CorporationInventor: Akira Yamamoto
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Publication number: 20090268331Abstract: A hard disk drive includes a housing including a base member and a cover member, a spindle motor disposed in the housing, a data storage disk disposed on the spindle motor, an actuator disposed in the housing to move a read/write head to a position on the data storage disk, a clock signal providing unit disposed on the data storage disk to provide a clock signal of the data storage disk, a position signal providing unit disposed on the actuator to provide a position signal of the actuator, and first and second windows disposed in the housing to correspond to the clock signal providing unit and the position signal providing unit.Type: ApplicationFiled: April 29, 2009Publication date: October 29, 2009Applicant: Samsung Electronics Co., LtdInventors: Kyung-ho KIM, Dong-ho Oh, Ha-yong Kim, Sung-joon Han, Kwong-jo Jung
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Patent number: 7609469Abstract: An apparatus includes a bit patterned magnetic storage media, a write transducer positioned adjacent to the bit patterned magnetic storage media, a write driver coupled to the write transducer to deliver write pulses to the write transducer, an optical sensor for producing a bit pattern signal, and a timing recovery circuit for producing a synchronization signal in response to the bit pattern signal, wherein the timing of the write pulses is adjusted in response to the synchronization signal.Type: GrantFiled: June 29, 2007Date of Patent: October 27, 2009Assignee: Seagate Technology LLCInventors: Edward Charles Gage, Venkata Sailaja Chilaka, Chubing Peng, Mark Edward Re
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Patent number: 7609468Abstract: A disk controller that controls data transfer between a storage device and a host system is provided. The disk controller includes logic having a state machine that controls de-assertion of a read gate signal based on sector size and/or whether a data segment is split or non-split. The read gate signal is de-asserted at programmable times, based on data sector size. The state machine interfaces with a register whose settings indicate to the state machine that next time when the state machine starts executing from an idle state it should process a second half of a split sector. The state machine also uses a register that to extend assertion of the read gate signal. It is noteworthy that the read gate signal is controlled on a positive and negative edge of a write clock signal.Type: GrantFiled: April 6, 2005Date of Patent: October 27, 2009Assignee: Marvell International Ltd.Inventors: Daniel R Pinvidic, Wayne C. Datwyler, Hunardi Hudiono
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Patent number: 7602568Abstract: A hard disk drive system includes a control module that generates a phase offset signal for a repeatable run out (RRO) field of a servo wedge based on an RRO phase of the RRO field and a data phase of data in at least one other servo wedge field of a previously written wedge. A read/write channel module adjusts a clock phase based on the phase offset signal.Type: GrantFiled: July 11, 2008Date of Patent: October 13, 2009Assignee: Marvell International Ltd.Inventor: Supaket Katchmart
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Patent number: 7599140Abstract: A determining unit determines whether a clock signal is oscillated with an oscillation amplitude equal to or greater than a predetermined value. An output control unit outputs the clock signal to an output destination when the determining unit determines that the clock signal is oscillated with the oscillation amplitude equal to or greater than the predetermined value.Type: GrantFiled: May 23, 2006Date of Patent: October 6, 2009Assignee: Fujitsu LimitedInventor: Isao Tsuyama
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Publication number: 20090244760Abstract: A magnetic storage control apparatus for controlling a magnetic storage apparatus that uses a recording medium having a plurality of reference signals on its track and having a data area between the reference signals. The apparatus includes: a measurement section that reproduces the reference signal in a predetermined track of the recording medium and measures, for each data area, the time for a head to scan the data area to obtain a measurement value; a calculation section that calculates a setting value concerning the frequency of a recording clock used in data recording based on the measurement values of a plurality of data areas obtained by the measurement section; and a generation section that generates the recording clock based on the measurement values obtained by the measurement section and setting value calculated by the calculation section.Type: ApplicationFiled: March 28, 2009Publication date: October 1, 2009Applicant: FUJITSU LIMITEDInventors: Toshikazu KANAOKA, Akihiro Itakura