Abstract: A system including a read channel device and a loopback circuit. The read channel device communicates with a hard disk controller module via a read bus and a write bus. The loopback circuit is configured to selectively loop back the write bus to the read bus. The read channel device is configured to generate a write clock for the hard disk controller module to write data on the write bus. The read channel device is configured to generate a read clock for the hard disk controller module to read the data on the read bus. The write clock is independent of the read clock.

Abstract: According to one embodiment, an apparatus for controlling a head includes a transmitting module and a controller. The transmitting module is configured to transmit a write signal to a magnetic head having a spin torque oscillator at the time of recording data. The controller is configured to supply a drive signal that has a level higher than the ordinary level for a prescribed effective time, to the spin-torque oscillator in response to an input write gate that instructs the recording of data. During a period other than prescribed effective time, the controller supplies a drive signal having the ordinary level to the spin-torque oscillator.

Abstract: The present disclosure includes apparatus, systems and techniques relating to detecting sync marks. In some implementations, an apparatus includes phase locking circuitry that includes a phase calculator to identify a phase of sampled data, and a phase-locked loop to generate an output signal and phase-lock the generated output signal with the calculated phase of the sampled data to produce a phase-locked signal. The apparatus includes detector circuitry to receive phase information of the phase-locked output signal. The detector circuitry includes a detector to generate a stream of decision bits for the sampled data with each bit in the stream being associated with a different phase. The detector circuitry includes an output selector to select at least one bit from the stream based on the received phase information of the phase-locked output signal.

Abstract: A synchronizing apparatus, which controls, by a PLL circuit, a sampling clock to be used to sample input data and synchronizes a phase of the sampling clock with a target phase that is desirable for sampling the input data, includes: phase error detection means for detecting a phase error from sampling data and the sampling clock, the sampling data being sampled from the input data at timing of the sampling clock; frequency error detection means for detecting, based on a differential coefficient obtained as a result of detecting the phase error, a frequency error; and frequency correction means for correcting a frequency of the sampling clock such that the detected frequency error becomes close to zero by adding a frequency correction value to an integral term of a loop filter of the PLL circuit, the frequency correction value being calculated based on the frequency error.

Abstract: A hard disk controller (HDC) of a hard disk drive (HDD) includes a read module, a clock generator module, and a write module. The read module reads servo spirals from a magnetic medium of the HDD via a read head of the HDD and generates read signals. The clock generator module generates a spiral clock having a first frequency based on the read signals and generates based on the spiral clock R write clocks having R frequencies, respectively, that are different than the first frequency, where R is an integer greater than 1. The write module writes via a write head of the HDD a first servo wedge on a first one of R zones of the magnetic medium using a first one of the R write clocks and a second servo wedge on a second one of the R zones using a second one of the R write clocks.

Abstract: A device includes a data path configured to transfer data from a read channel device to a host. A read gate delay module is configured to receive a first read gate signal, to output a second read gate signal to the read channel device based on the first read gate signal, and selectively delay a transition of the second read gate signal between an asserted state and a non-asserted state based on a data sector size of a data segment and positive and negative edges of a write clock.

Abstract: Methods, systems, and apparatus, including computer program products are described for calibrating servos, and in some implementations, calibrating spiral servos for use in self-servo-write SSW processes. In one aspect, a method is provide that includes rotating a machine readable medium, and detecting a spiral on the machine readable medium. Detecting a spiral on the machine readable medium includes detecting magnitudes of the spiral and a timing mark, storing a timestamp from a clock signal that corresponds to the timing mark of the spiral, determining a peak of the spiral from the magnitudes, and locking the clock signal to the peak of the spiral using the timestamp.

Abstract: An alternative time interval is taken of a timing based servo band to determine lateral position of a servo read head. The servo band is arranged in a sequence bursts with non-parallel servo stripes in sequentially adjacent sub-frames of a linear tape. The timing intervals comprise at least a first time interval (A) between a first pair of non-parallel servo stripes of a sub-frame; and an alternative time interval (C) between a pair of non-parallel servo stripes intermediate the first time intervals (A), the alternative interval servo stripes of sequentially adjacent sub-frames comprising a second servo stripe of the first pair, and a first servo stripe of a sequentially succeeding first pair. Position signals are ratios involving the first and second time intervals.

Abstract: Timing based servo bursts of servo frames, in which the frames are arranged to be symmetric with the same number of servo stripes in each burst of a frame, are synchronized by shifting selected bits. For example, servo frames are arranged with four servo bursts with an equal number of servo stripes in each burst, the servo frames comprising two symmetric sub-frames, each sub-frame comprising two bursts of servo stripes that are parallel to each other within a burst, and the bursts are non-parallel with respect to each other; each servo burst is arranged to comprise at least one reference servo stripe; and each servo burst is arranged to comprise at least one shifted servo stripe, wherein the shift is in the same longitudinal direction with respect to at least one reference servo stripe for each burst of a frame and the opposite longitudinal direction for bursts of sequentially adjacent frames.

Abstract: A frequency adjustment system comprises an offset estimation module and a frequency adjustment module. The offset estimation module estimates a distance between data written to a rotating storage medium and a first center location about which the rotating storage medium rotates, the data having been previously written to the rotating storage medium relative to a second center location that is different than the first center location. The frequency adjustment module adjusts a sampling frequency at which the data is read from the rotating storage medium based on the distance between the data and the first center location.

Abstract: A method for recovering a position and clock period from an input bi-phase encoded digital signal such as an SPDIF signal counts the intervals between phase changes of the input digital signal to derive the longest interval between the phase changes. The longest interval indicates the position and period length of a preamble portion of sub-frames of the signal and is stored, and a signal indicating the position of the longest interval between phase changes and an indication of the clock period of the input digital signal is provided.

Abstract: The present invention is designed to support plural servo patterns by setting a portion of the information of the servo pattern as a detection pattern, comparing the demodulated pattern of the portion of the information with the detection pattern, and controlling an operation timing of a test according to a result of the comparison.

Abstract: A magnetic storage control apparatus for controlling a magnetic storage apparatus that uses a recording medium having a plurality of reference signals on its track and having a data area between the reference signals. The apparatus includes: a measurement section that reproduces the reference signal in a predetermined track of the recording medium and measures, for each data area, the time for a head to scan the data area to obtain a measurement value; a calculation section that calculates a setting value concerning the frequency of a recording clock used in data recording based on the measurement values of a plurality of data areas obtained by the measurement section; and a generation section that generates the recording clock based on the measurement values obtained by the measurement section and setting value calculated by the calculation section.

Abstract: Methods for writing servo fields on a rotatable data storage disk using reference patterns on the data storage disk include generating a clock signal, reading a reference pattern signal from a surface of the disk, generating a phase error signal in response to a phase offset between the clock signal and the reference pattern signal, subtracting a timing control value from the phase error to provide an adjusted phase error, generating a frequency control signal in response to the adjusted phase error, and adjusting the frequency of the clock signal. The timing control value is generated in response to the phase error signal and the frequency control signal.

Abstract: A method of operating a servo track writer includes writing a clock pattern signal to a magnetic recording medium of a head disk assembly, reading the clock pattern signal written to the magnetic recording medium and dividing a frequency of a read clock pattern signal, and supplying a clock pattern signal having a divided frequency to a spindle motor for rotating the magnetic recording medium.

Abstract: Method and apparatus for detecting a reference pattern in a transmitted bit sequence. A duration of a search window used to detect the reference pattern is adaptively adjusted in relation to a previous detection of the pattern. This is preferably carried out by using a first search window to initially detect the pattern, and then adjusting the first search window to provide a second search window to subsequently detect the pattern. Preferably, the search window is an elapsed period of time during which a transducer is swept adjacent a storage medium to detect the reference pattern. Servo data are preferably written as a sequence of adjacent spiral servo patterns, and the reference pattern is preferably detected each time to determine the relative location of the most recently written spiral. Preferably, a larger search window is used for initial spirals and a smaller search window is used for subsequently written spirals.

Abstract: When writing a hard disk pattern on a substrate applied with a resist by scanning an electron beam on the substrate while rotating a rotation stage, writing is started with respect to each radial direction position of each area based on a predetermined encoder pulse for each radial direction position among those generated according to the rotational angle of the rotation stage that occurs after a predefined encoder pulse that occurs ahead in a rotational direction of a radial direction position whose write start position in a circumferential direction in each area arrives first at the writing position as the rotation stage rotates and ahead of the write start position in the circumferential direction with respect to each radial direction position, and after a predetermined time from the predetermined encoder pulse.

Abstract: Systems and methods are provided for correcting write synchronization of a magnetic storage device with respect to magnetic storage media and its corresponding writable magnetic bits, or dots. In particular, these systems and methods involve using time-shifting principles to calibrate the magnetic storage devices to correct slow drifts of reader-writer timing. It is to be appreciated that time-shifting techniques can be applied in a variety of manners. For example, the very dots on the media can be positioned in time-shifted fashion. In another example, the writing to the dots can be time-shifted.

Abstract: Systems and methods for detecting and designing enhanced disk sync marks using correlation detection are disclosed. The enhanced sync marks provide better noise immunity and higher detection rates over traditional Viterbi-based detection schemes even with a shorter sync mark length. The disk sync mark may provide optimal noise immunity for a particular target polynomial or a plurality of common target polynomials. The minimum Euclidean distance between a candidate sync mark and a plurality of right-shifted versions of the candidate sync mark is computed and compared with other candidate sync marks. The sync mark with the largest minimum Euclidean distance is then selected as the optimal mark. Systems and methods are also disclosed for detecting and designing a disk sync mark using correlation detection when the polarity of the disk is unknown or time-varying.

Abstract: Timing recovery optimization using disk clock. A novel means is presented to perform and provide control of the sampling frequency of a signal that is read from a disk within a hard disk drive (HDD). Two separate, yet somewhat cooperating control loops are employed to provide feedback control of the sampling frequency of the signal that is read from disk. A timing recovery loop and a disk clock loop operate in conjunction with one another according to some desired manner (which can be predetermined or adaptive) to ensure that the sampling of the signal is performed to a very accurate degree. In one implementation, the timing recovery loop governs the sampling rate until the disk clock loop has locked, from which time either the disk clock loop govern the sampling or some combination of the signals provided from the two loops govern the sampling.

Abstract: An embodiment of the present invention is a technique for timing recovery. A frequency acquisition loop locks a voltage controlled oscillator (VCO) clock of a multi-band VCO to a reference clock. The frequency acquisition loop generates first and second feedback clocks from the VCO clock. A data lock phase loop generates a driving signal corresponding to a phase error signal from interleaved partial response signal (PRS) samples based on the second feedback clock. The driving signal controls the multi-band VCO in a data phase lock mode. A lock detect controller detects a frequency lock condition in a frequency lock mode and a data lock condition in the data phase lock mode based on the first feedback clock and the reference clock.

Abstract: Approaches for estimating the operating radius of a head in a hard-disk drive. These approaches may be used in a constant or approximately constant density servo scheme. Statistics, which describe the proportion of high frequency values to low frequency values in a readback signal read by the read/write head of a persistent storage medium, such as a hard-disk drive (HDD), are maintained. An estimated location for the read/write head using the statistics is determined. The estimated location may be expressed as an estimated operating radius, which is an estimated distance from the center of the magnetic-recording medium to a current position of the read/write head. Based on the estimated location of the read/write head, an estimated clock frequency for a readback channel to use in reading the servo data stored on the magnetic recording medium is determined. The readback channel reads the servo data using the estimated clock frequency.

Abstract: A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery.

Abstract: Provided is an apparatus and method of adjusting reference clock frequency in a disk drive. The reference clock frequency adjustment method includes; measuring each servo sector detection time interval, generating an error signal by subtracting initially set reference time interval information between servo sectors from the measured servo sector detection time interval information, and adjusting the reference clock frequency using the error signal such that a constant number of reference clock pulses are generated in each servo sector detection time interval regardless of variation in each servo sector detection time interval.

Abstract: Various embodiments of the present invention provide systems and methods for performing data equalization. For example, various embodiments of the present invention provide data equalization circuits that include an equalization circuit and a transition adjustment circuit. The equalization circuit receives a series of at least two original data bits and replaces at least one of the two original data bits with an equalization pattern including two or more equalization bits. The original data bits correspond to an original data clock, and the two or more equalization bits correspond to an equalization data clock. The transition adjustment circuit is operable to modify an occurrence of a transition from one logic state to another logic state within the equalization pattern on a sub-equalization data clock basis.

Abstract: Systems and techniques to calibrate a control loop include, in at least one implementation, a system including the control loop configured to generate a clock signal and lock the clock signal to timing marks detected on a machine readable medium, a repetitive error correction module configured to receive a predicted phase and a corrected phase error for the clock signal, generate a predicted repetitive phase disturbance using the predicted phase and the corrected phase error for the clock signal, and calibrate a phase error to compensate for variations in repetitive phase errors in the clock signal using the predicted repetitive phase disturbance; and a servo track generator configured to generate servo tracks using the clock signal.

Abstract: A method for dynamic spiral ISR scheduling determines a dynamic delay with spiral to spiral spacing information of a disk, so as to ensure that the sum of a primary ISR time and a secondary ISR time does not exceed the wedge to wedge time. The ISR time may be scheduled to start after a delay for the sum of a static delay and the dynamic delay from an edge. A system for dynamic spiral ISR scheduling uses a dynamic delay determining unit to determine a dynamic delay, and an ISR scheduling unit to schedule the start of a secondary spiral set ISR based on a sum of the dynamic delay and a static delay.

Abstract: A method of timing control for servo-data detection in a disk drive. The method includes retrieving a plurality of servo sectors arranged discretely in a circumferential direction of a disk and measuring time intervals between servo sectors. The method also includes determining in which zone of a plurality of preset zones each of the measured time intervals is included. Moreover, the method also includes determining variations in time intervals from the zones of a plurality of previous time intervals, and modifying timing for servo-sector detection if variations in time intervals are within a preset range.

Abstract: Aspects of the present embodiment are related to a power supply voltage supply circuit and the disk apparatus that are capable of reducing power consumption in data writing and reading. The power supply voltage supply circuit includes a data processing unit writing data onto a disk medium and/or reading data from the disk medium=having a plurality of zones assigned a cylinder number, a data input-output unit transmitting data to the data processing unit at a transfer rate in accordance with the zones, a power supply voltage supply unit supplying a voltage to the data input-output unit and a control unit controlling the power supply voltage supply unit in order to supply the voltage in accordance with the transfer rate.

Abstract: A method for writing data to a tape at multiple rates for simultaneously creating data tracks having differing linear data densities, according to one embodiment, includes passing a tape over a head, the head having an array of writers thereon; receiving incoming data; mapping the data to a two dimensional array corresponding to the array of writers; clocking some of the mapped data to a first writer in the array of writers at a first rate; and clocking some of the mapped data to a second writer in the array of writers at a second rate different than the first rate.

Abstract: Various embodiments of the present invention provide systems and methods for controlling access to a magnetic storage medium. As one example, a method for controlling access to a storage medium is disclosed that includes calculating a point to point error amount, and generating a incremental error value based at least in part on the point to point error amount. The incremental error value is applied incrementally across a defined number of clock cycles.

Abstract: The transfer of data from a host computer to a recordable disk in a disk drive operating on the host computer is managed. A buffer for temporarily storing data to be transferred between the host computer and the recordable disk is maintained, wherein the buffer comprises a plurality of host segments and a plurality of disk segments, and wherein each of the host segments and disk segments have a sector count value associated therewith. In a case where the transfer of data corresponds to a host segment, the host segment is selected from the plurality of host segments in the buffer. In a case where the transfer of data corresponds to a disk segment, the disk segment is selected from the plurality of disk segments in the buffer. In a case where a host segment is selected, the sector count value of the selected host segment is adjusted. In a case where a disk segment is selected, the sector count value of the selected disk segment is adjusted.

Abstract: A disk drive is disclosed comprising a disk having a plurality of servo sectors defining a plurality of servo tracks that form a plurality of servo zones. The disk drive further comprises a head actuated radially over the disk for generating a read signal, and control circuitry operable to execute a seek operation. A fixed rate clock is generated, and a disk locked clock is generated and synchronized to the servo data rate of the servo zone the head is over. The disk locked clock is used to generate a servo timing window relative to a circumferential location of the head and the servo sectors. The control circuitry seeks the head from the first servo zone to the second servo zone, and switches to the fixed rate clock to generate the servo timing window while the head transitions from the first servo zone to the second servo zone.

Abstract: A control module for a rotating storage medium includes a data wedge format table (DWFT). The control module also includes a buffer control module that has a DWFT queue that includes X entries from the DWFT and one of X first servo information for each of the X entries. X is a positive integer. A disk formatter module that compares the one of X first servo information with second servo information that is based on a current position of a read/write device in relation to the rotating storage medium.

Abstract: A magnetic storage medium such as a BPM includes a plurality of magnetic dots for writing and reproducing data disposed in a magnetically separated manner so as to be spaced a predetermined distance in a down-track direction and a plurality of tracks concentrically disposed so that the magnetic dots are disposed in a magnetically separated manner. In the BPM, a phase-adjusting track is disposed in an arbitrary track among the tracks. On the phase-adjusting track, phase detection dots disposed in a down-track direction to allow writing and reproduction of phase detection data and blank bits providing a predetermined phase difference in a down-track direction to next successive phase-detecting dots are alternately disposed in a successive manner.

Abstract: A technique is described for write synchronization phase calibration for storage media (e.g., bit patterned media). In one embodiment, a calibration write clock signal may be generated at a frequency offset from a nominal dot frequency of a bit patterned storage media. A periodic signal that was written to the media synchronous to the calibration write clock signal may then be read and mixed with a reference periodic signal at the nominal dot frequency to obtain a difference signal. This difference signal may be demodulated to determine a phase correction for write synchronization to the media.

Abstract: Among other disclosed subject matter, a magnetic disk controller can include an index detecting unit to detect an index of the magnetic disk, an error check code generating unit to, after the index detecting unit detects the index, generate a first error check code for first write data based on the first write data and a first physical address of a first sector subsequent to the detected index, and a writing control unit to cause the first error check code generated by the error check code generating unit, the first write data and the first physical address to be written into a second sector subsequent to the first sector.

Abstract: A read circuit for providing multi-bit disk data to a disk controller in correspondence to analog data from a disk head, includes a low frequency clock generator whose phase is adjustable in response to a detection of the synchronization marker in the analog disk data. A high frequency clock is phase-locked to the output of the disk head, and synchronizes operation of an A/D converter and a bit detector which produces a verified single-bit based on the A/D output. A serial-to-parallel converter converts the single bit output from the bit detector to a parallel output, and the parallel output is latched to multi-bit disk data for use by the disk controller in accordance with a low frequency clock. The low frequency clock is generated by a clock generator from the high frequency clock with a phase that is adjustable in response to the synchronization mark detector.

Abstract: A controller and a method for interfacing with a storage medium. Access to a buffer memory via a multi-channel bus is arbitrated. DWFT (Data Wedge Format Table) entries stored in the buffer memory are read and cached in a DWFT cache memory. Data is transferred to and from the storage medium through a storage medium interface. The storage medium interface accesses the sectors of the storage medium based on their physical locations, as defined by the cached DWFT entries. The multi-channel bus includes a DWFT channel to which DWFT cache circuitry is connected. In a DWFT tenure, the DWFT cache circuitry reads the DWFT entries stored in the buffer memory, and caches the DWFT entries in the DWFT cache memory.

Abstract: Provided are a method, servo channel, and tape drive for recovering servo information from a synchronous servo channel. An interpolator reads samples of a servo signal obtained from a servo reader at a rate of one servo sample per clock interval, to produce up to M interpolated servo samples per clock interval. A first buffer buffers interpolation time instants at which the interpolator generates interpolated servo samples. The interpolated servo samples are buffered in a second buffer and the interpolated servo samples are outputted from the second buffer to a correlator to produce correlation signal samples.

Abstract: Approaches for estimating the operating radius of a head in a hard-disk drive. These approaches may be used in a constant or approximately constant density servo scheme. Statistics, which describe the proportion of high frequency values to low frequency values in a readback signal read by the read/write head of a persistent storage medium, such as a hard-disk drive (HDD), are maintained. An estimated location for the read/write head using the statistics is determined. The estimated location may be expressed as an estimated operating radius, which is an estimated distance from the center of the magnetic-recording medium to a current position of the read/write head. Based on the estimated location of the read/write head, an estimated clock frequency for a readback channel to use in reading the servo data stored on the magnetic recording medium is determined. The readback channel reads the servo data using the estimated clock frequency.

Abstract: According to an aspect of the embodiment, in a magnetic recording apparatus having a magnetic recording medium of a patterned media system, a voltage generated between both terminals of a magnetic field generating coil in a case that a DC current is supplied to a recording element of a magnetic head is measured by a voltage measuring circuit in order to perform accurate recording at the center of each of magnetic body regions sectioned with non-magnetic body regions. Based on the measured voltage, a change in coil inductance in passage of the magnetic head over a magnetic body region and a non-magnetic body region in a patterned media is detected by a voltage change detecting circuit. A write clock signal which synchronizes with the change in coil inductance is generated by a clock signal generating circuit.

Abstract: A technique is described for reducing overhead in a magnetic medium utilizing interspersed timing synchronization fields. In particular, a reader reads timing synchronization fields interspersed within data fields of the medium to obtain timing measurements. The reader is separated from a writer by a distance greater than a distance of the reader to traverse a select timing synchronization field. As such, the writer may perform a direct current (DC) write to the medium to suspend transitional write operations while the reader is reading the select timing synchronization field, and/or while the writer is over a unipolar field (e.g., a timing synchronization field).

Abstract: A timing detector adapted for timing recovery on a read-channel is disclosed to improve signal quality of an input signal and maintain a small loop latency. The timing detector selects bits within the input signal that are high quality for timing recovery and discards bits that are low quality. The selected bits are used to synchronize phase and frequency of a bit sampler with a read-back analog signal. High-pass and low-pass analysis filters may split the input signal into high-frequency and low-frequency sub-bands and equalizers may re-shape the sub-bands. High-pass and low-pass synthesis filters may construct an output signal from the high-frequency and low-frequency sub-bands. Scaling factors may correct for signal and disturbance variations in the sub-bands. A comparator may eliminate sampled bits within the detector signal that have a magnitude less than a threshold and assign a common magnitude to sampled bits that meet or exceed the threshold.

Abstract: A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery.

Abstract: A system in one embodiment includes a global PLL circuit comprising multiple inputs, each input being for receiving an error signal associated with an individual channel; and a delay compensation circuit coupled to the global PLL circuit. A method in one embodiment includes receiving multiple error signals, each error signal being associated with an individual channel; applying one or more delay compensation signals to the error signals; and outputting phase error output signals for each of the channels.

Abstract: A hard disk drive with a patterned disk that has a plurality of data fields. Each data field includes a sync field and a plurality of sync marks. Data is written onto the patterned disk in accordance with a write clock. The write clock is generated and synchronized by the sync field and the sync marks. The sync marks are dispersed throughout the data field so that the write clock is resynchronized as data is written onto the field.

Abstract: Systems and methods for detecting a disk sync mark are provided. The systems and methods for detecting the disk sync mark rely on a detecting the disk sync mark on at least one timing interval. A window of data read bits from a particular disk sector are examined to determine whether they match the disk sync mark. The disk sync mark may be differentiated from expected versions of the disk sync mark using a calculated set of thresholds.

Abstract: A servo control system includes an input that receives spiral signals generated by reading spirals that are prewritten on a magnetic medium. The servo control system further includes a control module that generates spiral correction values for the spirals based on the spiral signals and that determines positions of the spirals based on the spiral correction values.

Abstract: A phase interpolator is provided that, in one implementation, includes an output node, a plurality of phase input circuits, and a plurality of switches corresponding to the plurality of phase input circuits. Each phase input circuit is operable to receive a given phase signal. Each switch is in communication with a given phase input circuit and is operable to couple a given phase signal to the output node.