Abstract: A method and integrated circuit renders a shunt structure non-conductive during a power up event or noise event for and in addition, during an electrostatic discharge event, keeps the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a shunt structure, such as a transistor, is interposed between a power node and a ground node. Circuitry is operative during a power up event or noise event, to render the shunt structure non-conductive for a period of time during the power up event or during the noise event (when power is applied). Second circuit is operative, during an electrostatic discharge event, to keep the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a plurality of resistor/capacitors (RC) circuits are utilized wherein the RC circuits have different time constants.

Abstract: An electronic device includes a power input pin receiving a voltage from an external power supply, a load, and a surge suppression unit connected between the power input pin and the load. The surge suppression unit includes a first transistor, a voltage divider circuit and a capacitor. The first transistor includes a control end, a first conducting end connected to the power input pin, and a second conducting end connected to the load. The voltage divider circuit includes a common node connected to the control end, one end of the voltage divider circuit connected between the first conducting end and the power input pin, and the other end of the voltage divider circuit connected to ground. One end of the capacitor is connected between the second conducting end and the load, and the other end of the capacitor is connected to the control end.

Abstract: The present invention relates to a protective circuit to provide over voltage protection for an ASD. The protective circuit provides the benefits of fewer components with lower power ratings than existing protective circuits. The protective circuit may be incorporated directly in the ASD for continuous protection or mounted externally and connected to the ASD under operating conditions that require the circuit. This flexibility for mounting the protective circuit allows the capacitor of the protective circuit to be sized either in relation to capacitive elements on the DC bus within the ASD or according to external capacitance observed at the output of the ASD. In addition, the circuit is only operative during an overvoltage condition allowing for power ratings lower than would be required for continuous operation.

Abstract: This document discusses among other things apparatus and methods for reducing ESD damage to buffer circuits. In an example, an output buffer can include an output, a first transistor configured to couple the output to a high logic supply rail, a second transistor configured to couple the output node to a low logic supply rail, pre-driver logic configured to drive a gate of the first transistor and a gate of the second transistor, and a first resistor configured to reduce electrostatic discharge (ESD) induced current between the first transistor and the pre-driver logic.

Abstract: An inrush current protection circuit for charging a load to a target voltage, in which the inrush current protection circuit includes a first charging circuit and a second charging circuit. The first charging circuit charges a load to a first stage voltage, and there is a voltage difference existing between the target voltage and the first stage voltage. The second charging circuit charges the load form the first stage voltage to the target voltage, in which the first charge circuit charges slower than the second charging circuit.

Abstract: An arc flash detector includes a light sensor, a light attenuating filter in communication with the light sensor, a housing disposed to support the light attenuating filter and the light sensor, and a logic circuit in communication with the light sensor. The logic circuit is disposed to receive an output of the light sensor and disposed to produce an output signal responsive to a predetermined intensity of light received by the light sensor. The light attenuating filter is disposed to reduce the intensity of light received by the light sensor. The housing is also disposed to retain the light sensor and the light attenuating filter at a fixed orientation.

Abstract: A power conditioning circuit for conditioning power supplied by a power source at a nominal frequency over conductors in a polyphase system includes first and second phase conductors. First and second inductors are connected in series between the first and second phase conductors and first and second phase output lines, wherein all of the power supplied by the power source to the first and second phase output lines flows through the first and second inductors. An inductance of each of the first and second inductors increases when power at frequencies greater than the nominal frequency flows through the first and second phase conductors, thereby blocking power at frequencies greater than the nominal frequency from reaching the first and second phase output lines.

Abstract: A transient voltage suppressor may include a silicon controlled rectifier (SCR) having an anode coupled to Vcc. The SCR may include a PNP transistor (Q2) and an NPN transistor (Q3), the PNP transistor having a base in common with a collector of the NPN transistor and the PNP transistor having a collector in common with a base of the NPN transistor. The TVS may further include a Zener diode having an anode and cathode, wherein the anode is directly coupled to the base of the NPN transistor and/or the cathode is directly coupled to the base of the PNP transistor, and an additional NPN transistor (Q1). The cathode of the SCR may be directly coupled to a base of the additional NPN transistor, and a collector and emitter of the additional NPN transistor may be directly coupled in series between VCC and ground.

Abstract: A system comprises a package with top and bottom surfaces, a plurality of high-power transient voltage suppressors arranged within the package, and a robust lead frame. Each of the transient voltage suppressors has first and second major surfaces substantially perpendicular to the top and bottom surfaces of the package. The lead frame comprises leads connected to the major surfaces of the transient voltage suppressors. Each of the leads has a thickness greater than about 0.015 inches (or 0.381 mm) in a mounting portion, in order to dissipate heat from the transient voltage suppressors and to resist vibration-induced stress on the package.

Abstract: A surge protector for protecting telecommunications related equipment and other associated sensitive electrical components from over-voltage transient occurring on tip/ring conductors of communication lines coupled thereto includes a printed circuit board and surge protection circuits mounted on the printed circuit board. The surge protection circuits are interconnected between incoming tip and ring terminals defining an unprotected side and outgoing tip and ring terminals defining a protected side. Each of the surge protection circuits has a first set of steering diodes, a pair of series-connected voltage clamping devices, and a second set of steering diodes. Input side connector devices are coupled to the respective incoming tip and ring terminals for connecting to incoming telecommunication lines. Output side connector devices are coupled to the respective outgoing tip and ring terminals for connecting to customers' electrical equipment to be protected.

Abstract: A portable electronic device includes an audio file playing unit and a surge protector device connected to the audio file playing unit. The surge protector device includes a protector module connected to an audio file playing unit and a processor module connected to the protector module and the audio file playing unit. The processor module detects electric surges in the audio file playing unit and controls the protector module to filter the detected electric surges when the audio file playing unit plays audio files.

Abstract: Present invention relates to an electrostatic discharge protection circuit for a transistor circuit having electrostatic discharge protection circuits coupled to an input and to an output terminal. The protection circuits comprise delay means having a predetermined delay time and switchable connecting means connected between said input terminal and a control terminal of said transistor circuit. The delay means are configured for activating said switchable connecting means for said predetermined delay time in response to an electrostatic discharge at said input terminal.

Abstract: A system for protecting metal oxide semiconductor field effect transistor (MOSFET) output drivers within an integrated circuit (IC) from an electrostatic discharge (ESD) includes a first MOSFET output driver and a second MOSFET output driver positioned within a common IC diffusion material. The system includes a contact ring coupled to the common IC diffusion material and arranged along an outer edge of a perimeter surrounding the MOSFET output drivers. A centroid of each MOSFET output driver is common with a centroid of the perimeter surrounding both MOSFET output drivers. Each MOSFET output driver has a value of substrate resistance (Rsub) that initiates bipolar snapback in the MOSFET output driver at which an ESD event occurs. The value of Rsub depends upon a composite distance from the centroid of each MOSFET output driver to the contact ring.

Abstract: A Power over Ethernet electrostatic discharge protection circuit has a first diode with an anode coupled to a positive power port and a cathode coupled to an ESD protection port. A second diode has an anode coupled to ground and a cathode coupled to the positive power port. A third diode has an anode coupled to a negative power port and a cathode coupled to the ESD protection port.

Abstract: A high-power modulation system includes drive circuitry that receives input signals from the signal source via a series of transformers. The drive circuitry amplifies the input signals and provides the resulting amplified signals to the high-power switch. The switch includes a series of stacked switching elements, each with a control terminal, first and second current-handling terminals, and feedback path extending between the first current-handling terminal and the control terminal. The feedback paths work in concert to turn the switches on and off together to prevent excessive voltage from developing across one or a subset of the switching elements. The feedback path includes a resistor that dampens the bandwidth of the feedback path to reduce turn-off and turn-on ringing and oscillation. The damping resistor may be coupled in series with a diode that holds charge against the control terminal of the switching element.

Abstract: The present invention discloses a circuit with ESD protection and high voltage conversion for a switching regulator. It mainly comprises a non-overlap circuit, a power P-type MOS device, a parasitic diode, a digital logic AND gate, a pair of resistance and capacitance, a power N-type MOS device, an ESD N-type MOS device, a Lx pin and an ESD protection cell. The present invention can effectively decrease the on-resistance of MOS device and then improve the circuit efficiency.

Abstract: A surge protection apparatus or method for opening a surge path upon failure of a surge protection element as a short. The surge protection device may include a switch controlled by a solenoid or other switch controlling component that changes a position of the switch if the surge protection element fails as a conductive element. A first position of the switch is configured to allow transmittal of a signal from a signal connection, through the surge protection element, and to a ground connection. A second position of the switch is configured to prevent transmittal of a signal from the signal connection, through the surge protection element, and to the ground connection. A delay may be added between the changing of the switch position after the surge protection element fails as a conductor. Visual or other notifiers may indicate when the switch is in the second position.

Abstract: Transient overvoltage suppression circuit prevents voltage surges from damaging an attached load. The suppression circuit includes a transistor connected in series with a low-side or return line of the load. A control circuit monitors the voltage on the input line (i.e., high-side) and in response to a detected voltage transient turns the transistor OFF to isolate the load from the transient voltage.

Abstract: Disclosed is a smart ground bonding method for facilities, wherein an electric wire is connected between a first facility and a second facility, a first surge protection device is connected between the first facility and the electric wire, a second surge protection device is connected between the electric wire and the second facility, and wherein ground terminals of the first and second surge protection devices are bonded to metal boxes of the first and second facilities and sides of the bonded metal boxes are connected to the ground. The present invention can form potential differences between all lines of facilities such that they correspond to an equipotential to a ground, blocking a surge current passing through the facilities and basically preventing damage due to a lightning surge.

Abstract: In a surge protection circuit in a three-phase four-wire circuit, a first three-phase three-wire surge module includes terminals respectively coupled to a first phase R, a second phase S, a third phase T, and a fifth phase E. A single-phase two-wire surge module includes terminals respectively coupled to one phase R among the first phase R, the second phase S, and the third phase T, to a fourth phase N, and to the fifth phase E. The second three-phase three-wire surge module includes terminals respectively coupled to the two phases S and T among the first phase R, the second phase S, and the third phase T, to the fourth phase N, and to the fifth phase E. The two phases S and T are not coupled to the single-phase two-wire surge module.

Abstract: A semiconductor integrated circuit includes: an output pad from which an output signal is outputted; an output signal line connected with the output pad; a first pad configured to function as a ground terminal or a power supply terminal; a first wiring connected with the first pad; an output driver connected with the output pad and configured to generate the output signal; an ESD protection device connected with the output signal line and having a function to discharge surge applied to the output pad; and a first trigger MOS transistor used as a trigger device. The output driver includes: a first protection target device connected between the output signal line and the first interconnection; and a first resistance element connected between the first protection target device and the first interconnection.

Abstract: An electrical ground transient eliminator assembly for attenuating high frequency transients and protecting a continuous attenuator circuit of the assembly from overheating due to excessive transients generated on an electrical load is provided. The electrical ground transient eliminator assembly includes a continuous attenuator circuit, which is electrically coupled in parallel to a relay. The assembly includes three lead wires, which are interconnectable to an earth ground line, a neutral line and a load ground of a system that has an electrical load coupled to external AC power lines.

Abstract: A scope unit 2 including a control unit 3 and an insertion portion 4 is attached to a main unit 1 via a scope connector 5. An optical adaptor 8 is attached to a tip of the insertion portion 4. The CCD 31, HICs 32, 33, and the thermistor 34 are attached to the tip of the insertion portion 4. A liquid crystal module 36 is attached to the optical adaptor 8. A barrier circuit 64 limits energy supplied to these components in a circuit disposed in the scope unit 2. By disposing the barrier circuit 64 in the scope connector 5, the portion extending from the barrier circuit 64 to, i.e., the control unit 3, the insertion portion 4, and the optical adaptor 8 are of the explosion-proof construction. Thus, these can be used in a hazardous explosive location. Thus, an endoscope apparatus that can be used in combustible gas or dust can be provided.

Abstract: A CMOS IC according to the invention includes a discharging circuit for preventing electrostatic breakdown from occurring. The discharging circuit includes a discharging NMOSFET Qe, which couples a gate terminal node Vgp continuous to the gate of an outputting PDMOS transistor Qo and the gate of a discharging NMOSFET Qe via a capacitor Ce, and connects the drain of the discharging NMOSFET Qe to a gate terminal node Vgp continuous to the gate terminal of the outputting PDMOS transistor Qo. The discharging circuit 300 also includes a pull-down resistor disposed between the gate of the discharging NMOSFET Qe and the ground for preventing the discharging NMOSFET Qe from operating in a steady state condition. The CMOS IC according to the invention makes the discharging NMOSFET Qe trigger to operate by the potential change at the node corresponding to the potential change of the power supply line, when a surge caused by static electricity and such is applied to the power supply line.

Abstract: An integrated circuit includes an input/output pad for signal exchange with an external circuit, an electrostatic discharge (ESD) protection unit coupled to the input/output pad and configured to form an ESD path between a first voltage line and a second voltage line, a first drive transistor coupled between the first voltage line and the input/output pad, a first driving control unit coupled to a gate of the first drive transistor and configured to control the first drive transistor, a first dummy drive transistor coupled between the first voltage line and the input/output pad, and a first auxiliary driving control unit configured to supply the first voltage to a gate of the first dummy drive transistor in a normal operation mode, and float the gate of the first dummy drive transistor in a non-operation mode in which no power is supplied.

Abstract: The objective of the present invention is to provide a power converter capable of not only boosting the voltage but also shutting-off the flowing current, by switching only the switch element. The power converter 1, comprises a first input-output portion 3, a second input-output portion 5, a first capacitor C1, a second capacitor C2 electrically connected with the first capacitor C1 in serial, a first current control block B1, a second current control block B2, a third current control block B3, a fourth current control block B4, and a switching controller 7 operable to switch certain current control blocks, wherein the current flowing direction is opposite to each other between a first current control element B1a (B2a, B3a, B4a) and a second current control element B1b (B2b, B3b, B4b) which compose the current control block B1 (B2, B3, B4).

Abstract: The invention relates to an ESD protection device comprising: a first contact (10) and a second contact (20), and an electrical node (12); a bipolar transistor (6) having a base, an emitter, and a collector, the base and emitter forming a base-emitter junction, the base and collector forming a base-collector junction, the emitter being connected to the first contact (10), the collector being connected to the second contact (20), the base being connect to the electrical node (12); a first diode (1) connected between the electrical node (12) and the first contact (10), the first diode (1) comprising a first junction arranged in the same direction as the base-emitter junction, and—a second diode (2) connected between the electrical node (12) and the second contact (20), in anti-series with the first diode (1) on a path from the first contact (10) to the second contact (20), the second diode (2) comprising a second junction arranged in the same direction as the base-collector junction, wherein the bipolar transis

Abstract: A switch mode power supply (15) employs a rectifier (20), a converter (50) and converter driver (60). The rectifier (20) generates a rectified supply voltage (VRS) based on an in-line voltage (VLN), and the converter driver (60) generates one or more driving voltages (VDR) to facilitate a conversion by the converter (50) of the rectified supply voltage (VRS) to a DC bus voltage (VDC) based on the driving voltage(s) (VDR). The converter (50) may include a transient voltage suppression device (52) to suppress the rectified supply voltage (VRS) in response to an abnormal line condition of the switch mode power supply (15), and the converter driver (60) may include a free-oscillating suppression device (61) to suppress the one or more driving voltages (VDR) in response to a free-oscillating condition of the converter driver (60).

Abstract: A component of an electrical system capable of operation at any of two or more different nominal normal operating voltages is protected from a transient overvoltage condition by an apparatus having at least one phase-to-ground array of surge protection devices (SPDs) connected in series with one another to define a series of tap points on opposite sides of the SPDs and having at least two sets of electrical conductors for coupling the electrical system to a user-selectable one of the tap points which corresponds to a desired one of the nominal operating voltages. An array of capacitors connected electrically in series with one another is connected between each of the tap points and a monitoring circuit to provide impedance for dropping each nominal operating voltage to a suitable voltage for powering the monitoring circuit with low energy loss.

Abstract: A surge protection circuit may include a tuned circuit board with traces designed to provide a surge protected and RF isolated DC path while propagating RF signals through the PCB dielectric with microstrip lines. The surge protection circuit utilizes high impedance RF decoupling devices such as quarterwave traces or inductors which isolate the multistage DC protection scheme which may include a gas discharge tube, serial surge impeding devices such as inductors and/or resistors, a decoupled air/spark gap device and a Zener diode junction.

Abstract: An overvoltage protection element, with a housing, at least one overvoltage-limiting component in the housing, two connecting elements for electrical connection of the overvoltage protection element to the path to be protected, and an electrically conducting disconnection element in electrically conductive contact with the first connecting element at one end and with a solder connection to the overvoltage-limiting component at another end, the solder connection separating when a temperature threshold of the overvoltage-limiting component is exceeded so that a resulting disconnection point, formed electrically isolates it.

Abstract: An integrated circuit protected against electrostatic discharges, including: first and second supply rails; first and second intermediary rails normally connected to the first and second supply rails; inverters formed of a P-channel MOS transistor series-connected to an N-channel MOS transistor, the sources of the P-channel and N-channel MOS transistors being respectively connected to the first and second supply rails and the bodies of the P-channel and N-channel transistors being respectively connected to the first and second intermediary rails; a positive overvoltage detector between the first and second supply rails; and a switch for connecting the first and second intermediary rails to the second and first supply rails when a positive overvoltage is detected.

Abstract: Improved over-voltage protection apparatus and associated methods useful in e.g., telecommunications applications. In one embodiment, the over voltage protection apparatus comprises a gas discharge tube, common mode inductor, coupled inductor, secondary over-voltage protection device, filter circuitry, coupled inductor and common mode inductor. In one embodiment the over voltage protection apparatus comprises a gas discharge tube, common mode inductor, coupled inductor, secondary over-voltage protection device and filter circuitry. The arrangement of said inductive components being optimally connected in such a manner as to provide a high impedance circuit for all surge events to the gas discharge tube, so as to protect the filtering circuitry. Methods for the manufacture of the filter protection apparatus so as to be maximally independent of component tolerances are also disclosed.

Abstract: A surge preventing circuit of a local area network (LAN) connector is suitable for being coupled to a plurality of transformers disposed in the local area network connector. The surge preventing circuit includes a conjugate coil module and a surge absorbing element. The conjugate coil module has at least one conjugate coil. The conjugate coil has a first input terminal, a second input terminal, a first output terminal, and a second output terminal. The first input terminal and the second input terminal of the conjugate coil are coupled to the center tapped terminal of the respective transformer, respectively. A first terminal of the surge absorbing element is connected to ground, and a second terminal is coupled to the first output terminals and the second output terminals.

Abstract: A filter device reduces reflections on power lines from the motor drive to AC motors by providing a differential mode choke in series with a common mode choke both shunted by resistances tailored to the characteristic impedance of the power cable for differential mode and common mode reflections respectively. By treating both common mode based and differential mode based reflections, superior transient control and motor drive performance may be obtained.

Abstract: An integrated circuit, design structures and methods of forming the integrated circuit which includes a signal pad ESD coupled to an I/O signal pad and a power supply ESD coupled to a source VDD. The signal pad ESD and the power supply ESD are integrated in a single ESD structure.

Abstract: Integrated circuit (20) comprising several different voltage rails (V5 to V1) and an on-chip ESD protection circuit. The ESD protection circuit comprises at least one group (21, 22, 23) of ESD clamp devices (C1-C4). The ESD clamp devices (C1-C4) are arranged in a ladder-configuration. This ladder-configuration is characterized in that there is one of the ESD clamp devices interposed between each of the power rails (V5 to V1) and the respective power rail having a next lower voltage. Due to this arrangement an ESD current path is defined between each one of the power rails and the power rail having the next lower voltage. The ESD clamp devices (C1-C4) are off under normal power operation of the integrated circuit (20).

Abstract: An ESD clamp circuit applied to a power amplifier is provided. The ESD clamp circuit includes a first line, a second line, a first circuit, a second circuit, an ESD detecting unit, a buffer unit, and an ESD clamp unit. The first line is coupled to the output terminal of the power amplifier. The first circuit is coupled to the first line. The second circuit is coupled to the first circuit. The ESD detecting unit is coupled to the first circuit and the second line. The buffer unit is coupled to the second circuit, the second line and the ESD detecting unit. The ESD clamp unit is coupled to the buffer unit, the first line and the second line. Therefore, at normal operation mode, the problem of signal loss caused by the leakage current of ESD clamp circuit can be avoided.

Abstract: Apparatus, systems, and methods are disclosed that operate to boost an electrical potential of a control terminal of a transistor from a signal on an input terminal of the transistor to render a channel in the transistor more conductive. Additional apparatus, systems, and methods are disclosed.

Abstract: The present invention provides an ESD protection device having at least one diode in a well of a first conductivity type formed in a substrate of a second conductivity type. The circuit further includes a guard-band of the first conductivity surrounding at least a portion of the diode, thus forming an NPN transistor between the diode cathode, the substrate and the guard-band.

Abstract: The integrated circuit may include at least one electronic protection circuit for protecting against at least one electrostatic discharge and being able to discharge the overvoltage current generated by the electrostatic discharge. The electronic protection circuit includes a controlled short-circuiting switch embodied in CMOS technology including a CMOS technology TRIAC or a CMOS technology thyristor arranged in anti-parallel with a CMOS technology diode, and a triggering circuit for controlling the short-circuiting switch.

Abstract: A quick response mechanism for a switching power system includes a detector and an adjustor connected to the detector. The detector is configured to directly monitor the drop of the output voltage of the switching power system so that a quick response could be immediately triggered when a load transient occurs. The adjustor is configured to adjust the duration of the quick response, thereby preventing the output voltage from undershoot or ringback.

Abstract: An arrester includes at least one elongate outer first housing made of an electrically insulating material, a pair of electrical terminals at opposite ends of the first housing, an array of electrical components arranged in the first housing that form a series path between the terminals, and a voltage grading arrangement for providing a substantially uniform voltage gradient along the arrester, wherein the voltage grading arrangement includes (i) an elongated outer second housing, and (ii) capacitor circuitry arranged in the outer second housing, and wherein the outer second housing is arranged external to the outer first housing.

Abstract: The present invention relates to a protection circuit and method of protecting a semiconductor circuit against a temporary excessive voltage on a supply line, wherein a first trigger signal is generated in response to a detection of an excessive voltage on the supply line and a clamp element (M1) is activated by applying a boosted second trigger signal at a voltage higher than the first trigger signal to a control terminal of the clamp element (M1) in response to said first trigger signal, to thereby generate a low resistive path between said supply line and a lower reference potential. Thereby, the clamp element (M1) is activated with a higher voltage and can thus be made smaller in width. Because the clamp element is smaller, a remote trigger circuit can be sized tighter and faster.

Abstract: A protection circuit for protecting an electronic circuit against EMC disturbances and/or negative transient overvoltage pulses comprises a switch in series between a power supply and the electronic circuit to be protected; a comparator for comparing a first operating parameter with a second operating parameter and producing a comparison signal, the comparison signal being used as a control signal for controlling opening and closing of the switch; and a delay circuit adapted for delaying closing of the switch. A corresponding method is also provided.

Abstract: An apparatus and method is disclosed for providing an electrostatic discharge protection circuit for compound semiconductor devices and circuits. The electrostatic discharge protection circuit comprises a first terminal and a second terminal. The electrostatic discharge protection circuit further comprises a transistor shunt element that is operably coupled between the first terminal and the second terminal; the transistor shunt element is capable of providing a bi-directional discharge path between the first terminal and the second terminal. The electrostatic discharge protection circuit further comprises a shut-off element that is operably coupled with the second terminal; the shut-off element is capable of keeping the transistor shunt element turned-off.

Abstract: A protection device includes: a serial element unit that includes a first switching element and a resistive element, one end being connected to a control terminal of a protection-target switching element, the other end being connected to a first voltage line, the protection-target switching element including a first terminal connected to the first voltage line, a second terminal connected to a second voltage line and an inductor unit, and the control terminal, the protection-target switching element switching a conduction state at the normal time to a non-conduction state between the first terminal and the second terminal when an off-voltage is applied to the control terminal; a capacitance provided at the protection-target switching element and has a predetermined capacitance value; and a controller that performs control such that the first switching element is in a conduction state if the protection-target switching element is put into a non-conduction state.

Abstract: The present invention pertains to a closed loop over-voltage protection for audio/video connection interfaces of devices especially of mobile devices.

Abstract: In a level conversion circuit mounted in an integrated circuit device using a plurality of high- and low-voltage power supplies, the input to the differential inputs are provided. In a level-down circuit, MOS transistors that are not supplied with 3.3 V between the gate and drain and between the gate and source use a thin oxide layer. In a level-up circuit, a logic operation function is provided.

Abstract: The present invention provides a unit with a built-in control circuit capable of cost reduction. The unit of the present invention is an unit with built-in control circuit comprising a ground line, a control circuit including a plurality of terminals to be connected to an IC-chip, and a plurality of protect elements connected to the terminal and the ground line.