Stack Patents (Class 361/301.4)
  • Patent number: 10297386
    Abstract: There are provided a multilayer ceramic capacitor and a board having the same. The multilayer ceramic capacitor includes: three external electrodes disposed to be spaced apart from one another on a mounting surface of a ceramic body; first internal electrodes each including first and second lead portions connected to the outermost external electrodes, respectively; and second internal electrodes each including a third lead portion connected to the middle external electrode, in which a first region in which the first internal electrodes are laminated is disposed in a central portion of the ceramic body in a width direction of the ceramic body, and second regions in which the first and second internal electrodes are alternately laminated are disposed on both sides of the intervening first region in the width direction of the ceramic body.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: May 21, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Sang Soo Park, Min Cheol Park
  • Patent number: 10283268
    Abstract: A multilayer capacitor includes a capacitor body including a first capacitance forming region and a second capacitance forming region disposed to face each other with a connection region of a predetermined thickness in which an internal electrode is not formed disposed therebetween, a thickness of the first capacitance forming region being greater than a thickness of the second capacitance forming region. The first capacitance forming region includes first and second internal electrodes. The second capacitance forming region includes a third and fourth internal electrodes. The connection region includes at least one dummy electrode disposed to have a shorter average distance to the first capacitance forming region than to the second capacitance forming region.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: May 7, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Cheol Park, Young Ghyu Ahn
  • Patent number: 10283272
    Abstract: A multilayer ceramic capacitor having inner electrodes containing at least one metal selected from Cu, Ag, Pd, Pt, Rh, Ir, Ru, and Os in an amount of 0.1 atom % or more that is dissolved in Ni and Sn to form a solid solution. The percentage of Sn with respect to the total amount of Ni and Sn in near-surface regions each located at a depth of 2 nm from a surface of the inner electrode in contact with an adjacent ceramic dielectric layer is 1.4 or more atom %, and X?Y?1.0, where X represents the atomic percentage of Sn in the near-surface regions and Y represents the atomic percentage of Sn in mid-thickness regions of the inner electrodes. A method for producing a multilayer ceramic capacitor includes annealing the ceramic multilayer body to increase, in the inner electrodes, the percentage of Sn in the near-surface regions.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: May 7, 2019
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Akitaka Doi, Shinichi Yamaguchi, Shoichiro Suzuki
  • Patent number: 10276304
    Abstract: A power capacitor unit for high-pressure applications is provided. The power capacitor unit includes a housing, a plurality of capacitor elements connected to each other and arranged inside the housing, a dielectric liquid (L), a solid electrical insulation system arranged to electrically insulate each capacitor element, a busbar, a plurality of fuse wires, each fuse wire having a first end connected to a respective capacitor element and a second end connected to the busbar (B), wherein the capacitor elements, the solid electrical insulation system, and the fuse wires are immersed in the dielectric liquid (L). Each fuse wire has a plurality of first sections that are in physical contact with the electrical insulation system, and wherein each fuse wire has a plurality of second sections without physical contact with the solid electrical insulation system.
    Type: Grant
    Filed: October 10, 2016
    Date of Patent: April 30, 2019
    Assignee: ABB Schweiz AG
    Inventors: Matthias Baur, Biswajit Singh, Christoph Schlegel, Esbjörn Eriksson, Heinz Lendenmann, Moritz Boehm, Lise Donzel, Felix Bandalo
  • Patent number: 10249431
    Abstract: An electronic component includes a first outer electrode, a second outer electrode, a third outer electrode, and a fourth outer electrode which are provided to correspond to four corners of a second main surface; a fifth outer electrode which is provided on the second main surface; a multilayer body; a first inductor which includes a first end portion and a second end portion; and a first surface mounted electronic component which is mounted on the multilayer body and which includes a sixth outer electrode and a seventh outer electrode. The first end portion is electrically connected to the first outer electrode. The second end portion is electrically connected to the second outer electrode and the sixth outer electrode. The seventh outer electrode is electrically connected to the fifth outer electrode.
    Type: Grant
    Filed: March 6, 2017
    Date of Patent: April 2, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kosuke Ishida, Katsufumi Sasaki
  • Patent number: 10249438
    Abstract: A multilayer ceramic capacitor includes a ceramic body in which a plurality of dielectric layers are layered in a width direction, an active part including a plurality of first and second internal electrodes alternately exposed to opposing end surfaces of the ceramic body with the dielectric layer interposed therebetween to form capacitance, an upper cover part provided on an upper surface of the active part, a lower cover part provided on a lower surface of the active part and having a thickness greater than that of the upper cover part, and first and second external electrodes formed to cover opposing end surfaces of the ceramic body, wherein a ratio of the cube root of the volume of the active part to the thickness of the lower cover part is between 1.4 and 8.8.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: April 2, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Man Su Byun, Young Ghyu Ahn, Ho Yoon Kim, Jae Yeol Choi, Soo Hwan Son
  • Patent number: 10242794
    Abstract: A composite electronic component includes a body having first and second external electrodes disposed on outer surfaces thereof and including a dielectric body; first and second electrodes disposed in the dielectric body and electrically connected to the first and second external electrodes, respectively; a third electrode disposed on the body and electrically connected to the first external electrode; an electrostatic discharge (ESD) layer disposed on the third electrode; and a fourth electrode disposed on the ESD discharge layer and electrically connected to the second external electrode.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: March 26, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Ho Yoon Kim
  • Patent number: 10225935
    Abstract: A power conversion device includes an input conversion module, an output conversion module, a filtering module and a controlling module, which are installed on a main board. The main board includes a first edge, a second edge, a third edge and a fourth edge. The first edge and the second edge are opposed to each other. The third edge and the fourth edge are opposed to each other. A first part of the input conversion module is located near the first edge and the third edge. A second part of the input conversion module is near the first edge and the fourth edge. An airflow channel is formed between the first part and the second part. The output conversion module is near the second edge. The filtering module is near the second edge. The controlling module is arranged between the first part and the third edge.
    Type: Grant
    Filed: April 12, 2017
    Date of Patent: March 5, 2019
    Assignee: DELTA ELECTRONICS (THAILAND) PUBLIC COMPANY LIMITED
    Inventors: Tie Chen, Youzhun Cai, Keting Fang, Chengfeng Yu
  • Patent number: 10199168
    Abstract: A laminated ceramic electronic component provided with a component main body formed by alternatively laminating multiple dielectric ceramic layers and multiple internal electrode layers, and external electrodes disposed on the end faces where the internal electrode layers of the component main body are exposed, wherein at least a part of the multiple internal electrode layers exposed on the end faces of the component main body are provided with end-face electrode portions that connect the adjacent internal electrode layers, the connecting portions are present between the end-face electrode portions and the dielectric ceramic layers that contact with the end-face electrode portions, and the external electrodes are disposed so that the end-face electrode portions are covered.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: February 5, 2019
    Assignee: TDK CORPORATION
    Inventors: Koichi Yamaguchi, Keisuke Ishida, Makoto Endo, Shimpei Tanabe
  • Patent number: 10192682
    Abstract: The composite electronic component includes: a multilayer capacitor; an electrostatic discharge (ESD) protecting element; and first to fourth conductive resin layers, The multilayer capacitor includes: a capacitor body including dielectric layers and a plurality of first and second internal electrodes alternately disposed with respective dielectric layers interposed therebetween; first and second external electrodes connected to exposed portions of the first internal electrodes; and third and fourth external electrodes connected to exposed portions of the second internal electrodes. The ESD protecting element includes: a discharge portion disposed on the first surface of the capacitor body to be connected to the first to fourth external electrodes; and a protective layer. The first to fourth conductive resin layers are formed on the first to fourth external electrodes, respectively, and extend to portions of a first surface of the protective layer, respectively.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: January 29, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Heung Kil Park, Jong Hwan Park
  • Patent number: 10186381
    Abstract: A composite electronic component includes an electronic element and a resistance element in a height direction. The electronic element includes an electronic element body, and first and second external electrodes separated from each other in a length direction. The resistance element includes a base portion, a resistor disposed on an upper surface of the base portion, a protective film and first and second upper surface conductors. The first and second upper surface conductors are separated from each other in the length direction and the resistor is between the first and second upper surface conductors. The protective film covers the resistor. Dimensions in the height direction from the upper surface of the base portion to exposed surfaces of a pair of end portions in the length direction of the protective film are smaller than a dimension in the height direction from the upper surface of the base portion to an exposed surface of the protective film in the center portion.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: January 22, 2019
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kazuo Hattori, Isamu Fujimoto, Shinichiro Kuroiwa
  • Patent number: 10178770
    Abstract: A high density multi-component package is provided. The package has at least two electronic components wherein each electronic component comprises a first external termination and a second external termination. At least one first adhesive is between adjacent first external terminations of adjacent electronic components. At least one second adhesive is between the adjacent electronic component and at least two adjacent electronic components are connected serially. The first adhesive and second adhesive are independently selected from a high temperature conductive adhesive and a high temperature insulating adhesive.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: January 8, 2019
    Assignee: KEMET Electronics Corporation
    Inventors: James A Burk, John Bultitude, Galen Miller
  • Patent number: 10170249
    Abstract: The present invention provides a substrate assembly includes at least two ceramic layers, at least two layers of one or more electrodes, at least one high dielectric constant layer, two or more holes, electrically conductive structures formed in the two or more holes, and the electrically conductive structure is physically connected to at least one of the electrodes, thereby forming a set, wherein each of the sets if physically separated from at least one of the other sets. A process includes cutting ceramic sheets, removing material from the ceramic sheets to form holes, depositing a metallic material into the holes, depositing the metallic material to form electrodes, selectively depositing a thin layer of high dielectric constant material, and firing the ceramic sheets, the metallic material, the high dielectric constant material layer, and the electrodes.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: January 1, 2019
    Assignee: International Business Machines Corporation
    Inventor: Lei Shan
  • Patent number: 10170242
    Abstract: A composite electronic component composed of a composite body including a capacitor and an electrostatic discharge (ESD) protection device coupled to each other. The capacitor includes a ceramic body in which a plurality of dielectric layers and internal electrodes are stacked with a respective dielectric layer therebetween. The ESD protection device includes first and second electrodes disposed on the ceramic body, a discharging part disposed between the first and second electrodes, and a protective layer disposed on the first and second electrodes and the discharging part. An input terminal disposed on a first end surface of the composite body and is connected to internal electrodes and the first and second electrodes. A ground terminal formed on a second end surface of the composite body and is connected to internal electrodes and the first and second electrodes.
    Type: Grant
    Filed: July 18, 2017
    Date of Patent: January 1, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Hwan Kim, Dae Bok Oh, Jae Young Park, Ichiro Tanaka, Chang Ho Lee
  • Patent number: 10128043
    Abstract: A chip-type electronic component 1a mounted on a board includes a chip element assembly 2 having an upper surface, a lower surface, and a side surface; inner electrodes 3a, 3b, and 3c formed inside the chip element assembly 2; and a cover layer 5 that is formed with an insulation material having a lower permittivity than the chip element assembly 2 and is so provided as to cover at least part of the side surface of the chip element assembly 2. With this structure, unnecessary stray capacitance between the inner electrodes 3a, 3b, and 3c formed inside the chip element assembly 2 and other electrode members arranged outside the cover layer 5 in a direction orthogonal to a thickness direction of the chip element assembly 2 can be reduced, whereby the chip-type electronic component 1a capable of realizing the desired characteristics can be provided.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: November 13, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yosuke Matsushita
  • Patent number: 10117333
    Abstract: A multilayer ceramic capacitor includes a stacked body including a stack of a plurality of dielectric layers and a plurality of internal electrodes, and a pair of external electrodes. In the stacked body, a width dimension is greater than a thickness dimension, a length dimension preferably is about 0.4 mm or less, a width dimension preferably is about 0.15 mm or more and about 0.35 mm or less, a thickness dimension preferably is about 0.2 mm or less, and each of the internal electrodes is made of Cu or Ag as a main component and has a width dimension that is about 60% or more of the width dimension of the stacked body.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: October 30, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Eiji Teraoka
  • Patent number: 10115527
    Abstract: A system that incorporates teachings of the subject disclosure may include, for example, a fabricated thin film capacitor formed by depositing a first dielectric layer on a first electrode layer utilizing a first process that is performed at a first temperature, depositing a second dielectric layer on the first dielectric layer utilizing a second process that forms a randomly-oriented grain structure for the second dielectric layer, depositing a third dielectric layer on the second dielectric layer utilizing a third process that is performed at a second temperature and that forms a columnar-oriented grain structure for the third dielectric layer where the second temperature is higher than the first temperature, and depositing a second electrode layer on the third dielectric layer to form the thin film capacitor. Other embodiments are disclosed.
    Type: Grant
    Filed: March 9, 2015
    Date of Patent: October 30, 2018
    Assignee: BlackBerry Limited
    Inventors: Marina Zelner, Susan Nagy, Andrew Vladimir Claude Cervin
  • Patent number: 10115524
    Abstract: In a width direction of a ceramic laminate, one end portion of a first internal electrode and one end portion of a second internal electrode each include metal phases of a Ni region, a Ni—O region, and a Ni—O—Mg region disposed in this order from a first internal electrode side and a second internal electrode side, respectively, to a first side surface of the ceramic laminate. The other end portion of the first internal electrode and the other end portion of the second internal electrode each include metal phases of a Ni region, a Ni—O region, and a Ni—O—Mg region disposed in this order from the first internal electrode side and the second internal electrode side, respectively, to a second side surface of the ceramic laminate.
    Type: Grant
    Filed: May 4, 2017
    Date of Patent: October 30, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Hiroaki Sugita
  • Patent number: 10109420
    Abstract: A manufacturing method for a multilayer capacitor includes alternately laminating dielectric layers and conductor layers including less than 50 included in a first arrangement and a second arrangement different from the first arrangement when viewed from a lamination direction to form a laminate in which at least one pair of the conductor layers adjacent to each other with the dielectric layer interposed therebetween are included in the first or second arrangement, pressing the laminate to stretch the conductor layers in a direction perpendicular or substantially perpendicular to the lamination direction, pressing the laminate to bend the conductor layers in the lamination direction, and forming first and second outer electrodes on laminate surfaces such that the first outer electrode is connected to the conductor layers included in the first arrangement and the second outer electrode is connected to the conductor layers included in the second arrangement.
    Type: Grant
    Filed: November 3, 2017
    Date of Patent: October 23, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Masaki Tsukida, Hiroshi Masai
  • Patent number: 10103218
    Abstract: A metal-insulator-metal capacitor (MIM cap) includes a dielectric layer disposed over a substrate three contacts. A stacked structure of first and second metal layers separated by high-k dielectrics is disposed over the substrate and contacts. Three vias are formed through the structure to expose each of the three contacts. Selective etching is used to create gaps between the various metal layers at the location of the vias and these gaps are filled with an insulator. The vias are then filled with metal and the MIM cap is constructed such that the metal of the first via is electrically connected to the second metal layers and the metal of the second via is electrically connected to the first metal layers.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: October 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Effendi Leobandung
  • Patent number: 10090107
    Abstract: A multilayer electronic component and a method of manufacturing the same are provided. The multilayer electronic component includes a body including a multilayer structure in which first internal electrode patterns and second internal electrode patterns different from the first internal electrode patterns are alternately stacked and containing a dielectric material. First and second side parts are disposed on respective outer surfaces of a first pair of opposing outer surfaces of the body. First and second external electrodes are disposed on respective outer surfaces of a second pair of opposing outer surfaces of the body, and the first and second external electrodes are electrically connected to the first and second internal electrode patterns, respectively. The first internal electrode patterns are exposed to the outer surfaces of the first pair of outer surfaces of the body on which the first and second side parts are disposed.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: October 2, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yong Min Hong, Ki Pyo Hong
  • Patent number: 10090109
    Abstract: A monolithic ceramic capacitor includes a plurality of first and second inner electrodes in a ceramic body. A direction in which the first and second inner electrodes are stacked is a stacking direction, a direction perpendicular or substantially perpendicular to the stacking direction in the ceramic body is a length direction, and a direction perpendicular or substantially perpendicular to the stacking direction and the first direction is a width direction. The ceramic body includes an effective portion, a first outer layer portion, a second outer layer portion, a first side portion, and a second side portion. A ratio A/B is about 0.04 or less when a dimension of each of the first side portion and the second side portion in the width direction is A and a dimension of the effective portion in the stacking direction is B.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: October 2, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada
  • Patent number: 10079104
    Abstract: A capacitor includes an outer electrode extends over first and second main surfaces from exposed portions of inner electrodes on a first side surface and exposed portions of the inner electrodes on a second side surface. An outermost layer of the outer electrode includes a Cu-plated layer.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: September 18, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Yasuyuki Shimada
  • Patent number: 10079096
    Abstract: In a planar view of a ceramic capacitor that has low ESL and is embeddable into a substrate, lengths of first and second external electrodes are L1, lengths from portions of the first and second external electrodes farthest from a capacitor main body to portions closer to the capacitor main body by about 40% of a thickness of the first or second external electrode in a laminating direction are L2, a ratio L2/L1 is about 80% or more and about 90% or less. In the planar view, a length of a third external electrode is L3, a length from a portion of the third external electrode farthest from the capacitor main body to a portion closer to the capacitor main body by about 40% of a thickness of the third external electrode in the laminating direction is L4, a ratio L4/L3 is about 80% or more.
    Type: Grant
    Filed: May 30, 2017
    Date of Patent: September 18, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Kazunori Usui
  • Patent number: 10079101
    Abstract: A multilayer ceramic capacitor includes a ceramic body having a plurality of dielectric layers stacked therein, and first and second internal electrodes alternately disposed with at least one among the plurality of dielectric layers interposed therebetween. The first internal electrodes include first and second lead portions exposed to a mounting surface of the ceramic body, and disposed to be spaced apart from each other in a length direction of the ceramic body. The second internal electrodes include a third lead portion exposed to the mounting surface of the ceramic body, and disposed between the first and second lead portions in the length direction of the ceramic body.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: September 18, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyo Kwang Lee, Jin Kim, Young Ghyu Ahn, Chang Su Kim
  • Patent number: 10074483
    Abstract: A ceramic electronic component includes a laminated body including ceramic layers and conductor layers stacked alternately; and first and second external electrodes provided on portions of the laminated body. Each of the first and second external electrodes includes a sintered metal layer provided on the laminated body, a conductive resin layer covering the sintered metal layer, and a plated layer covering the conductive resin layer. The maximum length of the sintered metal layer provided on the second principal surface is shorter than the maximum length of the sintered metal layer provided on each of the first and second side surfaces.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: September 11, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Kazuki Kurokawa, Hirobumi Adachi
  • Patent number: 10026556
    Abstract: An electronic component includes an element body having a pair of end surfaces opposing each other and a side surface adjacent to the pair of end surfaces, and an external electrode disposed on at least the end surface. The external electrode includes a conductive resin layer located on at least the end surface. A first thickness of the conductive resin layer located on a central region of the end surface is greater than a second thickness of the conductive resin layer located on a peripheral region of the end surface.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: July 17, 2018
    Assignee: TDK CORPORATION
    Inventors: Norihisa Ando, Atsushi Takeda, Hideki Kaneko
  • Patent number: 10008329
    Abstract: A length in a third direction of a first connection portion is smaller than a length in the third direction of a first main electrode portion. A length in the third direction of a second connection portion is smaller than a length in the third direction of a second main electrode portion. A thickness in a first direction of an inner layer portion is smaller than each of the length in the third direction of the first connection portion and the length in the third direction of the second connection portion and smaller than each of a gap from a second side surface to the first connection portion in the third direction and a gap from the second side surface to the second connection portion in the third direction. The second side surfaces oppose each other in the third direction perpendicular to the first direction.
    Type: Grant
    Filed: January 14, 2016
    Date of Patent: June 26, 2018
    Assignee: TDK CORPORATION
    Inventors: Toru Onoue, Ken Morita
  • Patent number: 10002714
    Abstract: The present invention relates to a dielectric element such as a thin-film capacitor including a dielectric film. The dielectric film contains a main component represented by the general formula (Ba1-xCax)z(Ti1-yZry)O3 wherein 0<x?0.500, 0<y?0.350, and 0.900?z?0.995. The dielectric film includes a layer containing columnar crystal grains and a layer containing spherical crystal grains, and contains as a sub-component at least one of divalent metal elements and trivalent metal elements.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: June 19, 2018
    Assignee: TDK CORPORATION
    Inventors: Saori Takeda, Masahito Furukawa, Masanori Kosuda, Shirou Ootsuki, Yasunori Harada
  • Patent number: 9997295
    Abstract: An electronic component includes an electronic element including two outer electrodes on surfaces thereof and a board terminal including a board main body and two mounting electrodes. The board main body has electrical insulating properties and a first principal surface. The two mounting electrodes are disposed on the first principal surface and electrically coupled to the two outer electrodes, respectively. The electronic element is mounted on the first principal surface side. The two outer electrodes are partially disposed outside an outer edge of the board terminal when viewed from the first principal surface side. The height from an end of each of the two outer electrodes opposite the board terminal to an end of the board terminal opposite the electronic element is not greater than a larger dimension of the width of the electronic element and the width of the board terminal.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: June 12, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Yukihiro Fujita, Tadateru Yamada, Hirobumi Adachi
  • Patent number: 9997297
    Abstract: A multilayer electronic component includes an element body having internal electrode layers and dielectric layers. These are substantially parallel to a plane including a first axis and a second axis and are alternately laminated along a third axis direction. Side surfaces oppositely facing in the first axis direction are respectively equipped with an insulating layer. End surfaces facing each other in the second axis direction are respectively equipped with an external electrode. End portions in the first axis direction of the internal electrode layers are recessed from end portions in the first axis direction of the dielectric layers to an inner side along the first axis direction. The retraction distances are varied at a predetermined range in each layer of the internal electrode layers.
    Type: Grant
    Filed: September 14, 2016
    Date of Patent: June 12, 2018
    Assignee: TDK CORPORATION
    Inventors: Keisuke Okai, Hirobumi Tanaka
  • Patent number: 9984824
    Abstract: A multilayer ceramic capacitor includes a laminated body and first and second external electrodes respectively on both end surfaces of the laminated body. When regions where first internal electrodes or second internal electrodes are not present are regarded as side margin portions in a cross section of the laminated body as viewed from the laminating direction, the side margin portions include multiple side margin layers, and the content of Si in the side margin layer closest to the internal electrode is lower than that in the side margin layer other than the side margin layer closest to the internal electrode.
    Type: Grant
    Filed: July 15, 2016
    Date of Patent: May 29, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Hideaki Tanaka, Daiki Fukunaga, Koji Moriyama
  • Patent number: 9978525
    Abstract: A multilayer ceramic electronic component includes: a capacitor set including a plurality of multilayer ceramic capacitors connected in series and accommodated in an insulation case while exposing external electrodes provided on both end portions thereof; and a pair of metal terminals connected to the external electrodes exposed outside of the insulation case, respectively. One end portion of the capacitor set is elastically supported by one of the pair of metal terminals.
    Type: Grant
    Filed: September 22, 2015
    Date of Patent: May 22, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Heung Kil Park
  • Patent number: 9978519
    Abstract: A multilayer ceramic electronic component includes a ceramic body having an end surface and a side surface adjacent to thereto such that the end surface and the side surface meet at an edge. The ceramic body has a plurality of internal electrodes with adjacent pairs of the internal electrodes being separated by a respective ceramic layer. An external electrode containing a metal, an inorganic component and voids is electrically connected to at least some of the internal electrodes and both covers the end surface and extends over the edge onto the side surface to form an extending-around portion which extends at least 50 ?m onto the side surface as measured in a direction perpendicular to the edge and ends at a leading edge remote from the edge. A portion of the extending-around area which extends 50 ?m from the leading edge towards the edge has an average occupancy area ratio which is at least 25 but not greater than 75.
    Type: Grant
    Filed: March 16, 2016
    Date of Patent: May 22, 2018
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Takashi Omori, Seiji Koga, Jun Ikeda
  • Patent number: 9972439
    Abstract: A ceramic electronic component includes a ceramic body; internal electrodes disposed in the ceramic body; external electrodes disposed on outer surfaces of the ceramic body and electrically connected to the internal electrodes; and tin plating layers disposed on the external electrodes.
    Type: Grant
    Filed: October 22, 2015
    Date of Patent: May 15, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyoung No Lee, Kyu Ha Lee, Seung Hee Yoo, Eun Joo Choi, Jun Hyeong Kim, Byung Jun Jeon
  • Patent number: 9972441
    Abstract: Resolution means: The multilayer ceramic capacitor includes an effective dielectric portion and cover layers. The effective dielectric portion includes dielectric ceramic layers and internal electrode layers that are alternately stacked. The cover layers are made of ceramic material and disposed on top and bottom surfaces of the effective dielectric portion. The cover layers include ceramic particles, which constitute the majority of the cover layers, and include glass particles. Some of the glass particles are present in gaps, which are formed between the ceramic particles.
    Type: Grant
    Filed: November 26, 2015
    Date of Patent: May 15, 2018
    Assignee: KYOCERA CORPORATION
    Inventor: Shota Mukoyama
  • Patent number: 9942988
    Abstract: A circuit board includes a base substrate, a busbar disposed on a mounting surface of the base substrate; and an electronic component disposed on the mounting surface and including a plurality of terminals. At least one of the terminals is soldered to a component connecting end portion extending from the busbar. The base substrate has an opening into which the component connecting end portion is inserted. A first insertion portion is provided in the component connecting end portion. The terminal is inserted through the first insertion portion. The busbar is fixed to the base substrate so that the component connecting end portion is inserted into the opening with a soldering surface positioned closer to a rear surface of the base substrate than the component mounting surface. The soldering surface is on a side of the component connecting end portion where the terminal inserted through the first insertion portion protrudes.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: April 10, 2018
    Assignee: TDK Corporation
    Inventors: Kazuharu Kitatani, Yasunobu Noguchi
  • Patent number: 9941050
    Abstract: A multilayer ceramic capacitor has a capacitor body of laminate structure and a pair of external electrodes, and shaped roughly as a rectangular solid defined by length L, width W, and height H. This multilayer ceramic capacitor is such that the width W and height H meet the condition of “1.10?H/W?1.70.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: April 10, 2018
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Kazuyuki Koide, Takahisa Fukuda
  • Patent number: 9934906
    Abstract: An electrical ceramic capacitor, in particular a multilayer ceramic capacitor, comprising a ceramic body including a stack of parallel metallic layers of opposing polarity separated by a dielectric material arranged in an active zone of the ceramic body enclosed between outer surfaces, wherein at one or more surfaces a shock-absorbing region is arranged.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: April 3, 2018
    Assignee: BIOTRONIK SE & Co. KG
    Inventors: Singjang Chen, Daniel Loranger
  • Patent number: 9922766
    Abstract: A ceramic electronic component includes a dielectric layer and an electrode layer. The dielectric layer contains barium titanate and yttrium. The dielectric layer contains dielectric particles and Y—Ti segregation particles. An area ratio occupied by the Y—Ti segregation particles is 1.3% or less on a cross section of the dielectric layer.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: March 20, 2018
    Assignee: TDK CORPORATION
    Inventors: Masayuki Sato, Yosuke Konno, Shunichi Yuri, Takashi Morita, Tsutomu Odashima, Yasuhiro Ito
  • Patent number: 9922768
    Abstract: A multilayer ceramic capacitor includes a multilayer unit, thickness-direction first and second outer layer sections, and length-direction first and second outer layer sections. A dimension of the thickness-direction second outer layer section is greater than a dimension of the thickness-direction first outer layer section. The thickness-direction second outer layer section includes an inner portion and an outer portion. A composition ratio of Si to Ti in a ceramic dielectric layer included in the outer portion is higher than that in the inner portion. A Si content ratio is higher in a boundary portion between the outer portion and the inner portion. The inner portion has a higher composition ratio of Mn to Ti than the outer portion. Both of minimum dimensions in the length direction of the length-direction first and second outer layer sections are greater than a dimension in the thickness direction of the thickness-direction first outer layer section.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: March 20, 2018
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Shota Kitano, Takanobu Katsuyama, Hiroaki Sugita
  • Patent number: 9871019
    Abstract: A microelectronic assembly includes a stack of microelectronic elements, e.g., semiconductor chips, each having a front surface defining a respective plane of a plurality of planes. A leadframe interconnect joined to a contact at a front surface of each chip may extend to a position beyond the edge surface of the respective microelectronic element. The chip stack is mounted to support element at an angle such that edge surfaces of the chips face a major surface of the support element that defines a second plane that is transverse to, i.e., not parallel to the plurality of parallel planes. The leadframe interconnects are electrically coupled at ends thereof to corresponding contacts at a surface of the support element.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: January 16, 2018
    Assignee: Invensas Corporation
    Inventors: Ashok S. Prabhu, Rajesh Katkar, Liang Wang, Cyprian Emeka Uzoh
  • Patent number: 9859058
    Abstract: A multilayer ceramic capacitor includes a ceramic body including an active portion including dielectric layers and internal electrodes that are alternately stacked and a margin portion disposed on outer surfaces of the active portion; and external electrodes disposed on outer surfaces of the ceramic body. The margin portion includes an inner half adjacent to the active portion and an outer half adjacent to the edge of the ceramic body, and a porosity of the inner half is greater than a porosity of the outer half.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: January 2, 2018
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Min Hee Hong, Chul Seung Lee, Won Seh Lee, Doo Young Kim, Chang Hoon Kim, Jae Yeol Choi, Hyeun Tea Yoon
  • Patent number: 9847171
    Abstract: A flexible cable includes an elongated flexible substrate including first and second surfaces on opposite sides thereof, a first capacitor electrode provided on the first surface side of the flexible substrate, the first capacitor electrode extending from a first end of the flexible substrate toward a second end of the flexible substrate, a second capacitor electrode provided on the second surface side of the flexible substrate, the second capacitor electrode extending from the second end of the flexible substrate toward the first end of the flexible substrate, a first connection portion provided at an end of the first capacitor electrode located at the first end of the flexible substrate, and a second connection portion provided at an end of the second capacitor electrode located at the second end of the flexible substrate.
    Type: Grant
    Filed: October 29, 2015
    Date of Patent: December 19, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Noboru Kato
  • Patent number: 9831037
    Abstract: A monolithic ceramic electronic component having outer electrodes that include an inorganic substance containing at least Si, a crystal phase C containing at least Si, Ti, and Ba at the interfaces to a ceramic layer in peripheral end portions of the outer electrodes. A value of the crystal phase area ratio indicating the relationship between the area of the crystal phase C and the area of a glass phase G, which are formed at the interface to the ceramic layer, in a region within 5 ?m from the peripheral end portion of the outer electrode is within a range of 75% to 98%.
    Type: Grant
    Filed: February 24, 2017
    Date of Patent: November 28, 2017
    Assignee: MURATA MANUFATURING CO., LTD.
    Inventors: Takashi Omori, Seiji Koga, Jun Ikeda
  • Patent number: 9831036
    Abstract: A ceramic body includes outer layer portions of about 15 ?m or more and about 25 ?m or less in thickness outside an inner layer portion where internal electrodes are stacked with dielectric ceramic layers interposed therebetween, the inner layer portion includes inner cover electrodes opposed to the internal electrode located outermost in the stacking direction with the dielectric ceramic layers interposed therebetween, the outer layer portions include outer cover electrodes opposed to the inner cover electrodes with the dielectric ceramic layers interposed therebetween, the inner cover electrodes have a coverage of about 75% or more and about 100% or less, the outer cover electrodes have a coverage of about 50% or more and about 70% or less, and boundary layers containing Mg and Mn are provided at the boundaries between the outer cover electrodes and the dielectric ceramic layers located outside the electrodes.
    Type: Grant
    Filed: November 9, 2015
    Date of Patent: November 28, 2017
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Mitsuru Ikeda
  • Patent number: 9824819
    Abstract: There is provided a dielectric ceramic composition including a base powder, wherein the base powder includes: a first major component represented by BaTiO3, a second major component represented by (Na, K)NbO3, and a third major component represented by (Bi, Na)TiO3. The base powder is represented by xBaTiO3-y(Na, K)NbO3-z(Bi, Na)TiO3, where x+y+z=1, and x, y, and z are represented by mol, and x, y and z satisfy 0.5?x?0.97, 0.01?y?0.48, and 0.02?z?0.2, respectively. In certain embodiments, the base powder is be represented by xBaTiO3-y(Na0.5K0.5)NbO3-z(Bi0.5Na0.5)TiO3.
    Type: Grant
    Filed: October 28, 2015
    Date of Patent: November 21, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seok Hyun Yoon, Yun Jung Park, Doo Young Kim, Song Je Jeon, Chang Hoon Kim
  • Patent number: 9818537
    Abstract: A capacitor includes a dielectric layer, a first conductive layer, a second conductive layer, first inner electrodes, second inner electrodes, a first external power electrode layer, a second external power electrode layer, a first outer electrode, and a second outer electrode. The first and second inner electrodes and first and second second outer electrodes are a conductive material. The dielectric layer has through-holes connecting with a first main surface and a second main surface. The first inner electrodes are in a first set of the through-holes and connected to the first conductive layer. The second inner electrodes are in a second set of the through-holes and connected to the second conductive layer. The first outer electrode is on the first external power electrode layer and some side-faces of the dielectric layer. The second outer electrode is on the second external power electrode layer and some side-faces of the dielectric layer.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: November 14, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventor: Hidetoshi Masuda
  • Patent number: 9805870
    Abstract: In a multilayer ceramic capacitor, a ceramic body includes dielectric layers and inner electrodes stacked in a stacking direction, outer electrodes on the ceramic body and connected to the plurality of inner electrodes. When viewing a first cross section of the ceramic body parallel or substantially parallel to first and second side surfaces of the ceramic body and having the plurality of inner electrodes exposed, a connection proportion is about 30% to about 70% and is a proportion of a number of the inner electrodes connected to the outer electrodes to a number of all of the plurality of inner electrodes exposed at the first cross section, and when the first cross section is viewed, glass is present between one of the inner electrodes not connected to each of the outer electrodes, and each of the outer electrodes.
    Type: Grant
    Filed: September 25, 2015
    Date of Patent: October 31, 2017
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shuichi Ito
  • Patent number: 9779875
    Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers and first and second internal electrodes disposed to face each other with respective dielectric layers interposed therebetween, and external electrodes disposed on outer surfaces of the ceramic body. Opposite edge portions of at least one or more of the first and second internal electrodes in a width direction of the ceramic body are thicker than a central portion thereof, and a ratio (T2/T1) of a thickness (T2) of the edge portion to a thickness (T1) of the central portion satisfies 1.0<T2/T1?2.0.
    Type: Grant
    Filed: September 17, 2015
    Date of Patent: October 3, 2017
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Hyung Lim, Min Hee Hong, Chang Hoon Kim, Doo Young Kim, Chul Seung Lee