Electrostatic Capacitors Patents (Class 361/271)
  • Patent number: 10854393
    Abstract: Provided is an electrolytic capacitor having a cathode that exhibits a high capacity. The electrolytic capacitor includes: a cathode having a conductive substrate and a conductive polymer layer placed on a surface of the conductive substrate; an anode having a substrate composed of a valve metal and a dielectric layer composed of an oxide of the valve metal that is placed on the surface of the substrate and is so placed that the dielectric layer and the conductive polymer layer of the cathode face each other through a space; and an ion-conductive electrolyte filled in the space, in which the conductive polymer layer of the cathode that is in contact with the ion-conductive electrolyte expresses a redox capacity by applying a voltage between the anode and the cathode.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: December 1, 2020
    Assignee: NIPPON CHEMI-CON CORPORATION
    Inventors: Kazuya Koseki, Kenji Machida
  • Patent number: 10763049
    Abstract: A capacitor component is disclosed. In an embodiment a capacitor component includes a winding having an oval core hole, which has a maximum diameter and a minimum diameter, wherein the minimum diameter is smaller than the maximum diameter, and wherein the winding is designed such that a deformation of the winding that occurs only locally is producible by a force acting punctiformly on the winding.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: September 1, 2020
    Assignee: EPCOS AG
    Inventors: Norbert Will, Fabio Augusto Bueno De Camargo Mello, Igor Peretta, Paulo Faria
  • Patent number: 10566234
    Abstract: A method for forming a multi-level stack having a multi-level contact is provided. The method includes forming a multi-level stack comprising a specified number, n, of conductive layers and at least n?1 insulating layers. A via formation layer is formed over the stack. A first via is etched in the via formation layer at a first edge of the stack. A first multi-level contact is formed in the first via. For a particular embodiment, a second via may be etched in the via formation layer at a second edge of the stack and a second multi-level contact may be formed in the second via.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: February 18, 2020
    Assignees: Samsung Austin Semiconductor, LLC, Samsung Electronics Co., Ltd.
    Inventor: Keith Lao
  • Patent number: 10522292
    Abstract: A multi-layer ceramic capacitor includes a ceramic body, a first external electrode, and a second external electrode. The ceramic body includes ceramic layers laminated along a first direction, first internal electrodes and second internal electrodes that are alternately disposed between the ceramic layers, a first end surface and a second end surface that are oriented in a second direction orthogonal to the first direction, and a first inner groove and a second inner groove that are respectively formed in the first end surface and the second end surface along the first direction. The first and second external electrodes respectively cover the first and second end surfaces, the first internal electrodes being drawn to the first end surface and protruding in the first inner groove, the second internal electrodes being drawn to the second end surface and protruding in the second inner groove.
    Type: Grant
    Filed: March 1, 2018
    Date of Patent: December 31, 2019
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Yuji Tomizawa, Wakae Akaishi
  • Patent number: 10170246
    Abstract: A capacitor component includes a body including a plurality of dielectric layers having a stacked structure, and first and second internal electrodes which are alternately disposed while having the dielectric layer interposed therebetween; and first and second external electrodes formed on an outer surface of the body, and connected to the first and second internal electrodes, respectively, wherein the body includes an active region having capacity by the first and second internal electrodes and a cover region located above and below the active region, the cover region includes a protection pattern of a metal material connected to the first external electrode or the second external electrode, and the protection pattern does not overlap with the internal electrode having a different polarity among the first and second internal electrodes in a thickness direction of the body.
    Type: Grant
    Filed: July 5, 2017
    Date of Patent: January 1, 2019
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jin Mo Ahn, Sun Cheol Lee
  • Patent number: 9760106
    Abstract: Various embodiments include an integrated circuit (IC) structure having: a chip control logic; a chip power system connected with the chip control logic; and a voltage island connected with the chip control logic and the chip power system, the voltage island including: an interface component for interfacing with the chip power system and the chip control logic; a logic island connected with the interface component; and a voltage island power system connected with the interface component and the logic island, the voltage island power system independently controlling a voltage supplied to the logic island.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: September 12, 2017
    Assignee: International Business Machines Corporation
    Inventors: Donald W. Labrecque, Steffen A. Loeffler, Christopher P. Miller, Christopher Scoville
  • Patent number: 9696862
    Abstract: A capacitance type touch panel is provided which distinguishes a noise signal with ease and detects an input operation position with high accuracy, without extensively modifying the structure of a touch panel. The capacitance type touch panel is provided with capacitance change judgment unit for comparing a voltage variation level R(n,m) of a detection electrode S(n) detected by capacitance detection unit with a detection threshold value. If the voltage variation levels R(n,m) of all the detection electrodes S(n) are equal to or more than the detection threshold value while outputting a detection signal to any drive area DV(m), it is assumed that noise occurs for the long period of outputting the detection signal to the drive area DV(m), and position detection unit does not detect the input operation position.
    Type: Grant
    Filed: November 15, 2015
    Date of Patent: July 4, 2017
    Assignees: SMK Corporation, KABUSHIKI KAISHA TOKAI RIKA DENKI SEISAKUSHO
    Inventors: Osamu Yoshikawa, Takao Imai
  • Patent number: 9418789
    Abstract: A multilayer ceramic electronic component may include: a ceramic body including an active part in which dielectric layers and internal electrodes are alternately disposed, an upper cover part disposed on an upper portion of the active part, and a lower cover part disposed on a lower portion thereof; a first dummy electrode disposed between a central portion of the upper or lower cover part in a length direction and one end surface of the cover part in the length direction; and a second dummy electrode disposed between the central portion of the upper or lower cover part in the length direction and the other end surface of the cover part in the length direction, and spaced apart from the first dummy electrode.
    Type: Grant
    Filed: July 18, 2014
    Date of Patent: August 16, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jong Ho Lee, Hang Kyu Cho, Doo Young Kim, Chung Eun Lee, Chul Seung Lee
  • Patent number: 9019685
    Abstract: A spiral capacitor-inductor device in which an array of unit capacitors 101 is arranged in a loop along the length is provided as the fourth circuit element. An input signal is applied to one end of the array of the unit capacitors, an output signal is taken out from the other end, an electric charge stored in each unit capacitor increases or decreases in accordance with increase or decrease in the bias applied to the device, the increase or decrease in the electric charge causes the current of the loop to increase or decrease, and, as a result, the magnetic flux 103 generated in the device varies. Accordingly, the fourth circuit element is provided that follows after an inductor, a capacitor, and a resistor is provided in which the electric charge stored determines the magnitude of its magnetic flux.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: April 28, 2015
    Assignee: National Institute for Materials Science
    Inventors: Satyajit Sahu, Anirban Bandyopadhyay, Daisuke Fujita
  • Publication number: 20150062773
    Abstract: A fast-mounting capacitor is composed of a capacitor (1) and a plug-in sheet (10). A fixed rod (22) extends from the lower end of the shell of the capacitor (1). The fixed rod (22) has a fixed slot (18). The plug-in sheet (10) includes an insulating strip (11) provided above. Plastic elastic clamps (12) and a connection part (13) are connected to the lower part of the insulating strip (11). Fixing clamping strips (17) are provided on the inner wall of the capacitor mounting hole (15). The capacitor can be plugged in conveniently, and can effectively serve as an insulator, therefore it can prevent conducting leakage of electricity to the box of electrical equipment so as to cause accident when abnormal leakage occurs to the capacitor.
    Type: Application
    Filed: September 25, 2012
    Publication date: March 5, 2015
    Applicants: SHANGHAI HAOYE ELECTRIC CO., LTD., SHANGHAI HAOYE CAPACITORS CO., LTD.
    Inventors: Zikui Zhang, Feng Xu, Hao Pan
  • Patent number: 8971011
    Abstract: A semiconductor device includes a first static actuator having a first drive electrode and a second drive electrode, the first drive electrode and the second drive electrode being capable of coming close to each other upon shifting from an open state to a close state due to an electrostatic attractive force against an elastic force thereof; a detection circuit configured to detect a temperature of the first static actuator; and a drive circuit configured to apply a first voltage between the first drive electrode and the second drive electrode to maintain the first static actuator in the closed state between the first drive electrode and the second drive electrode, and to switch a polarity of the first voltage every first time period. The drive circuit varies a length of the first time period based on a detection result of the detection circuit.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: March 3, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Takayuki Miyazaki
  • Patent number: 8908350
    Abstract: A device including a first electrical conductor, a second electrical conductor, dielectric material connecting the first and second conductors to each other, and an output or ground terminal section. The first electrical conductor has a first terminal section and a first plate section. The second electrical conductor includes a second terminal section and a second plate section. The second terminal section is connected to a first end of the second plate section. The second plate section includes a coil shaped section. The output terminal section is connected to an opposite second end of the second plate section. The dielectric material connects the first and second plate sections to each other.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: December 9, 2014
    Assignee: Core Wireless Licensing S.A.R.L.
    Inventors: Matti Naskali, Samuli Wallius, Lassi Yla-Soininmaki
  • Patent number: 8878337
    Abstract: A method and integrated circuit structure for mitigating metal gate dishing resulting from chemical mechanical polishing. The integrated circuit structure comprises a first area comprising at least one first type device; a second area comprising at least one second type device; a third area comprising at least one capacitor having an uppermost layer of polysilicon, where the capacitor area is greater than a sum of the first and second areas. The method utilizes the polysilicon of the capacitor to mitigate metal gate dishing of a metal gate of at least one device.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: November 4, 2014
    Assignee: Xilinx, Inc.
    Inventors: Hong-Tsz Pan, Yun Wu, Shuxian Wu, Qi Lin, Bang-Thu Nguyen
  • Patent number: 8811027
    Abstract: A DC-DC converter includes an insulating substrate with an inductor provided on the top surface thereof, a switching control IC provided therein, and a ground electrode pattern provided on the bottom surface thereof. The ground electrode pattern includes a first pattern and a second pattern separated from each other and a bridge pattern that connects the first and second patterns to each other. A capacitor and the switching control IC is connected to each of the first and second patterns. The bridge pattern faces the inductor and has a smaller width than that of the first and second patterns.
    Type: Grant
    Filed: August 14, 2012
    Date of Patent: August 19, 2014
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Noboru Kato
  • Patent number: 8803629
    Abstract: There is provided an electromagnetic coupler, which includes: a first conductor pattern and at least one second conductor pattern separated from the first conductor pattern, the first conductor pattern and the at least one second conductor pattern being formed in a first conductor layer; a feed pattern connected to a feeding system and a ground pattern separated from the feed pattern, the feed pattern and the ground pattern being composed of a conductor and formed in a second conductor layer; and a plurality of linear conductors electrically connecting the first conductor pattern with the feed pattern and connecting the second conductor pattern with the ground pattern, the plurality of linear conductors being formed between the first conductor layer and the second conductor layer. Furthermore, the first conductor layer and the second conductor layer are parallel to each other.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: August 12, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yohei Shirakawa, Kazuhiro Fujimoto, Masamichi Kishi, Naoto Teraki
  • Patent number: 8780576
    Abstract: An interconnection component includes a first support portion has a plurality of first conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent a first surface and a second end adjacent a second surface. A second support portion has a plurality of second conductive vias extending therethrough substantially perpendicular to surfaces thereof such that each via has a first end adjacent the first surface and a second end adjacent the second surface. A redistribution layer is disposed between the second surfaces of the first and second support portions, electrically connecting at least some of the first vias with at least some of the second vias. The first and second support portions can have a coefficient of thermal expansion (“CTE”) of less than 12 parts per million per degree, Celsius (“ppm/° C.”).
    Type: Grant
    Filed: September 14, 2011
    Date of Patent: July 15, 2014
    Assignee: Invensas Corporation
    Inventors: Belgacem Haba, Kishor Desai
  • Patent number: 8760840
    Abstract: A lead 3 of an electrochemical device includes a lead body 3A containing Al, and a bent metallic thin film 3a provided to a tip part of the lead body 3A. The metallic thin film 3a includes a thin film body 3a1 containing Ni, and a plating layer 3a2 containing Sn and covering at least an outer surface of the bent thin film body 3a1. A specific area of an inner surface of the bent thin film body 3a1 and a surface of the lead body 3A are welded in a predetermined area without the plating layer 3a2 being disposed there between.
    Type: Grant
    Filed: April 13, 2011
    Date of Patent: June 24, 2014
    Assignee: TDK Corporation
    Inventors: Hiroaki Hasegawa, Hidetake Itoh, Yoshihiko Ohashi, Kazuo Katai, Yosuke Miyaki
  • Patent number: 8742866
    Abstract: An electromagnetic coupler including a conductor pattern formed in a first conductor layer, a feed pattern connected to a feeding system and a ground pattern separated from the feed pattern. The feed pattern and the ground pattern are formed in a second conductor layer parallel to the first conductor layer. A first linear conductor and a plurality of second linear conductors are formed perpendicularly to the first and the second conductor layers. The first linear conductor connects the conductor pattern and the feed pattern. The plurality of second linear conductors connects the conductor pattern and the ground pattern. In addition, the conductor pattern is symmetrical in shape with respect to the connection point between the conductor pattern and the first linear conductor. The plurality of second linear conductors are symmetrical in position with respect to the first linear conductor in a planar view.
    Type: Grant
    Filed: April 5, 2011
    Date of Patent: June 3, 2014
    Assignee: Hitachi Metals, Ltd.
    Inventors: Yohei Shirakawa, Naoto Teraki
  • Patent number: 8699254
    Abstract: In a power inverter, a coolant passage is fixed to a chassis to cool the chassis; the chassis is divided into a first region and a second region by providing the coolant passage in the chassis; a power module is provided in the first region as fixed to the coolant passage; a capacitor module is provided in the second region; and the DC terminal of the capacitor module is directly connected to the DC terminal of the power module.
    Type: Grant
    Filed: August 8, 2008
    Date of Patent: April 15, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Fusanori Nishikimi, Kinya Nakatsu
  • Patent number: 8633783
    Abstract: An electromagnetic coupler has a first conductor pattern and a second conductor pattern separated from the first conductor pattern that are formed in a first plane, a feeding pattern made of a conductor and being connected to a feeing system and a ground made of a conductor and being separated from the feeding pattern that are formed in a second plane, and linear conductors electrically connecting between the first conductor pattern and the feeding pattern, and between the second conductor pattern and the ground, respectively.
    Type: Grant
    Filed: October 8, 2010
    Date of Patent: January 21, 2014
    Assignees: Hitachi Cable Fine-Tech, Ltd., Hitachi Cable, Ltd.
    Inventors: Yohei Shirakawa, Keisuke Fukuchi, Haruyuki Watanabe
  • Patent number: 8576536
    Abstract: A device is provided for protecting an electronic printed circuit board, which includes at least two layers. The device includes on a layer, at least one conductive part uniformly spread on an insulator layer, the entirety comprising the conductive part and the insulator layer forming a capacitive support presenting a uniform electrical field. The capacitive support is placed roughly on the whole surface of one of the layers of the multi-layered electronic printed circuit board. The capacitive support is configured to deliver a reference capacitance. A capacitive measurement microprocessor detects a variation in capacitance. A transmitter is configured for transmitting a piece of information representing the variation in capacitance when an absolute value of a difference between the measured capacitance and the reference capacitance exceeds a predetermined threshold.
    Type: Grant
    Filed: September 15, 2011
    Date of Patent: November 5, 2013
    Assignee: Compagnie Industrielle et Financiere d'Ingenierie “Ingenico”
    Inventors: Laurent Rossi, Bernard Schang
  • Patent number: 8537520
    Abstract: A semiconductor device applies a hold voltage Vhold to an upper electrode of an electrostatic actuator and a ground voltage to a lower electrode. After the semiconductor device sets the voltage of the lower electrode to a test voltage Vtest, it eliminates the hold voltage Vhold from the upper electrode and places the voltage of the upper electrode in a high impedance state. The potential difference between the upper electrode and the lower electrode is set to Vhold?Vtest=Vmon. Thereafter, the voltage of the lower electrode is returned to the ground voltage. Whether the electrostatic actuator is placed in an open state or in a closed state is determined by measuring the capacitance between the electrodes based on the amount of drop of the voltage of the upper electrode due to capacitance coupling at the time.
    Type: Grant
    Filed: September 20, 2011
    Date of Patent: September 17, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinji Miyano
  • Patent number: 8518573
    Abstract: An energy-storage device electrode core is disclosed that features relatively low-inductive impedance (and thus low equivalent series resistance (ESR)). Also disclosed is an energy-storage device electrode core that features a radii-modulated electrode core that forms extra vias to facilitate efficient heat removal away from the electrode, thus improving the performance and capabilities of an energy-storage device so equipped. The internal electrode core heat-removal vias are defined by the modulation patterns that in turn define the size and layout of the folds in the electrode, which are circumferentially collapsed about the center axis of the electrode core.
    Type: Grant
    Filed: December 24, 2009
    Date of Patent: August 27, 2013
    Assignee: Maxwell Technologies, Inc.
    Inventor: John M. Miller
  • Publication number: 20130163142
    Abstract: A microelectronic assembly, a surface mount component and a method of providing the surface mount component. The assembly comprises: a substrate having bonding pads disposed on a mounting surface thereof, the bonding pads including a ferromagnetic material therein; solidified solder disposed on the bonding pads; and a surface mount component bonded to the substrate by way of the solidified solder and including a magnetic layer disposed on a substrate side thereof, the magnetic layer being adapted to cooperate with the ferromagnetic material in the bonding pads to establish a magnetic force of a sufficient magnitude to hold the surface mount component on the substrate before and during soldering.
    Type: Application
    Filed: February 19, 2013
    Publication date: June 27, 2013
    Inventor: Haixiao Sun
  • Patent number: 8461743
    Abstract: According to one embodiment, a method of driving an electrostatic actuator includes a first electrode provided on a substrate, a second electrode arranged above the first electrode to be movable in a vertical direction, and an insulating film provided between the first electrode and the second electrode, includes boosting a power supply voltage to generate a driving voltage of the electrostatic actuator, and applying the driving voltage to each of the first electrode and the second electrode when setting the electrostatic actuator in an up state.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: June 11, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tamio Ikehashi
  • Patent number: 8439251
    Abstract: To permanently apply lead terminals to corresponding electrodes of electronic or electro-optic components, a. providing a frame including a tensioned wire, b. providing a holding jig including at least one seat in which the components can be removably and temporarily retained, c. applying the components to the seats with the respective electrodes aligned along a respective longitudinal direction, d. applying the holding jig to the frame and orienting the same so that the longitudinal direction corresponds to the direction of the tensioned wire, the tensioned wire being thereby brought substantially in contact with (all) the electrode(s) aligned to each other on a corresponding row of components, e. electrically and mechanically bonding the tensioned wire to the corresponding electrodes, and f. cutting the wire to separate the components from each other thereby forming a respective lead terminal for each electrode.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: May 14, 2013
    Assignee: Google Inc.
    Inventor: Giovanni Delrosso
  • Patent number: 8400778
    Abstract: A multi-phase voltage regulator is disclosed where each phase is comprised of an array of high and low side transistors that are integrated onto a single substrate. Further, a system of mounting the voltage regulator onto a flip chip and lead frame is disclosed wherein the source and drain lines form an interdigital pattern.
    Type: Grant
    Filed: February 2, 2010
    Date of Patent: March 19, 2013
    Assignee: Monolithic Power Systems, Inc.
    Inventors: Michael R. Hsing, Anthonius Bakker
  • Patent number: 8366968
    Abstract: An active material, an electrode, and a battery which exhibit high safety in overcharging tests, and methods of manufacturing them are provided. The active material comprises a first metal oxide particle 1 and a second metal oxide particle group 2 attached to a surface of the first metal oxide particle 1. The second metal oxide is at least one selected from the group consisting of zirconia, silica, and tin oxide. The first metal oxide particle 1 contains fluorine atoms from its surface to deepest part.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: February 5, 2013
    Assignee: TDK Corporation
    Inventors: Hisashi Suzuki, Masayoshi Hirano
  • Publication number: 20120262835
    Abstract: A method for fabricating a dynamic random access memory (DRAM) capacitor stack is disclosed wherein the stack includes a first electrode, a dielectric layer, and a second electrode. The first electrode is formed from a conductive binary metal compound and the conductive binary metal compound is annealed in a reducing atmosphere to promote the formation of a desired crystal structure. The binary metal compound may be a metal oxide. Annealing the metal oxide (i.e. molybdenum oxide) in a reducing atmosphere may result in the formation of a first electrode material (i.e. MoO2) with a rutile-phase crystal structure. This facilitates the formation of the rutile-phase crystal structure when TiO2 is used as the dielectric layer. The rutile-phase of TiO2 has a higher k value than the other possible crystal structures of TiO2 resulting in improved performance of the DRAM capacitor.
    Type: Application
    Filed: April 12, 2011
    Publication date: October 18, 2012
    Applicant: INTERMOLECULAR, INC.
    Inventors: Karthik Ramani, Nobumichi Fuchigami, Wim Deweerd, Hanhong Chen, Hiroyuki Ode
  • Patent number: 8289674
    Abstract: Embodiments disclosed herein generally solve a stiction problem in switching devices by using a series of pulses of force which take the switch from being strongly adhered to a landing electrode to the point where it is only weakly adhered. Once in the low adhesion state, the switch can then be pulled away from contact with a lower force provided by either the spring constant of the switch and/or the electrostatic forces resulting from low voltages applied to nearby electrodes.
    Type: Grant
    Filed: March 17, 2009
    Date of Patent: October 16, 2012
    Assignee: Cavendish Kinetics, Ltd.
    Inventors: Charles Gordon Smith, Richard L. Knipe
  • Publication number: 20120257321
    Abstract: A capacitor includes a main body, a first seat, and a second seat. The main body includes a first end surface and a second end surface opposite to the first end surface. Two first pins extend upward from the first end surface. Two second pins extend downward from the second end surface. The first pins electrically connect the second pins. The first seat includes a first substrate and two first pads, the first seat is positioned on the second end surface of the main body and the first pads are electrically connected to the second pins. The second seat includes a second substrate and two second pads, the second seat is positioned on the first end surface of the main body and the second pads are electrically connected to the first pins.
    Type: Application
    Filed: June 30, 2011
    Publication date: October 11, 2012
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: CHUN-AN LAI
  • Publication number: 20120243142
    Abstract: A lower enclosure has a first recess. A first annular retainer is adapted for engaging a lower portion of a capacitor and the first recess. The first annular retainer has a plurality of tabs that extend radially outward from an outer diameter surface of the first annular retainer. Each of the tabs has a sloped surface or a peaked surface for compression of the first annular retainer against the capacitor. An upper enclosure has a plurality of second recesses. A second annular retainer is adapted for engaging an upper portion of the capacitor and the second recesses. The second annular retainer has a plurality of protrusions that extend upward from the second annular retainer. Each of the protrusions has a slit for receiving a wedge, such that if the protrusions engage the wedge the second annular retainer is compressed against the capacitor.
    Type: Application
    Filed: June 28, 2011
    Publication date: September 27, 2012
    Inventors: Christopher J. Schmit, Jeffrey S. Duppong
  • Patent number: 8274324
    Abstract: According to one embodiment, an electrostatic actuator apparatus includes a first voltage generation circuit configured to generate a first voltage, a first switch connected between the first voltage generation circuit and a first node, a second voltage generation circuit configured to generate a second voltage, a second switch connected between the second voltage generation circuit and a second node, a capacitor connected between the first node and the second node, an electrostatic actuator having a drive electrode connected to the first node, and a control circuit configured to perform an operation of sequentially turning on the first switch, turning off the first switch and turning on the second switch when the electrostatic actuator is driven.
    Type: Grant
    Filed: April 12, 2012
    Date of Patent: September 25, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tamio Ikehashi
  • Patent number: 8174306
    Abstract: According to one embodiment, an electrostatic actuator apparatus includes a first voltage generation circuit configured to generate a first voltage, a first switch connected between the first voltage generation circuit and a first node, a second voltage generation circuit configured to generate a second voltage, a second switch connected between the second voltage generation circuit and a second node, a capacitor connected between the first node and the second node, an electrostatic actuator having a drive electrode connected to the first node, and a control circuit configured to perform an operation of sequentially turning on the first switch, turning off the first switch and turning on the second switch when the electrostatic actuator is driven.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: May 8, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tamio Ikehashi
  • Patent number: 8169770
    Abstract: A semiconductor integrated circuit comprises an electrostatic actuator, an estimation circuit, a storage circuit and a bias circuit. The electrostatic actuator has a top electrode, a bottom electrode, and an insulating film disposed between the top electrode and the bottom electrode. The estimation circuit estimates the amount of a charge accumulated in the insulating film of the electrostatic actuator. The storage circuit stores a result of the estimation of the charge amount by the estimation circuit. The bias circuit changes, on the basis of the estimation result stored in the storage circuit, a drive voltage to drive the electrostatic actuator.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: May 1, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tamio Ikehashi, Hiroaki Yamazaki
  • Patent number: 8145919
    Abstract: A power supply module removably disposed within an automated data storage and retrieval system. An automated data storage and retrieval system which includes one or more power supply modules removably disposed therein. An accessor movably disposed with an automated data storage and retrieval system comprising a gripper mechanism which can be releasably attached to a power supply module. A method to supply power to an automated data storage and retrieval system. A method to monitor the operation of a power supply module removably disposed within an automated data storage and retrieval system.
    Type: Grant
    Filed: August 21, 2008
    Date of Patent: March 27, 2012
    Assignee: International Business Machines Corporation
    Inventors: Robert G. Emberty, Craig Anthony Klein
  • Publication number: 20120003544
    Abstract: Provided are an electrode structure which is excellent in adhesiveness between an aluminum material as a base material and a dielectric layer and adhesiveness between the dielectric layers and allows a higher capacitance than the conventional one to be obtained, even when a thickness of the dielectric layer is thick; a method for manufacturing the above-mentioned electrode structure; and a capacitor and a battery, each of which includes the above-mentioned electrode structure. An electrode structure comprises: an aluminum material; a dielectric layer formed on a surface of the aluminum material; and an interposing layer formed in at least one part of a region of the surface of the aluminum material between the aluminum material and the dielectric layer and including aluminum and carbon, the dielectric layer includes dielectric particles including valve metal, and an organic substance layer is formed on at least one part of a surface of the dielectric particle.
    Type: Application
    Filed: March 4, 2010
    Publication date: January 5, 2012
    Inventors: Kunihiko Nakayama, Zenya Ashitaka, Hidetoshi Inoue
  • Publication number: 20110299219
    Abstract: A compressible and deformable layer is densified and laminated to a layer of a material that is relatively resistant to stretching. The densification and bonding take place in a single step. As used in fabrication of electrodes, for example, electrodes for double layer capacitors, a deformable and compressible active electrode film is manufactured from activated carbon, conductive carbon, and a polymer. The electrode film may be bonded directly to a collector. Alternatively, a collector may be coated with a wet adhesive layer. The adhesive layer is subsequently dried onto the foil. The dried adhesive and foil combination may be manufactured as a product for later sale or use, and may be stored as such on a storage roll or other storage device. The active electrode film is overlayed on the metal foil, and processed in a laminating device, such as a calender. Lamination both densifies the active electrode film and bonds the film to the metal foil.
    Type: Application
    Filed: May 1, 2011
    Publication date: December 8, 2011
    Applicant: MAXWELL TECHNOLOGIES, INC.
    Inventors: Porter Mitchell, Xiaomei Xi, Linda Zhong
  • Publication number: 20110286147
    Abstract: An electrode material comprising 0.5-50 wt % functionalized graphene material and a capacitor comprising the electrode material are provided. A method for preparing the functionalized graphene material is also provided. The method comprises the step of chemically reducing the soluble graphene material and the step of physically reducing the chemically reduced graphene material.
    Type: Application
    Filed: October 26, 2009
    Publication date: November 24, 2011
    Applicants: TIANJIN PULAN NANO TECHNOLOGY CO., LTD., NANKAI UNIVERSITY
    Inventors: Yongsheng Chen, Yi Huang, Yan Wang, Yanfeng Ma
  • Patent number: 8035949
    Abstract: A semiconductor device applies a hold voltage Vhold to an upper electrode of an electrostatic actuator and a ground voltage to a lower electrode. After the semiconductor device sets the voltage of the lower electrode to a test voltage Vtest, it eliminates the hold voltage Vhold from the upper electrode and places the voltage of the upper electrode in a high impedance state. The potential difference between the upper electrode and the lower electrode is set to Vhold?Vtest=Vmon. Thereafter, the voltage of the lower electrode is returned to the ground voltage. Whether the electrostatic actuator is placed in an open state or in a closed state is determined by measuring the capacitance between the electrodes based on the amount of drop of the voltage of the upper electrode due to capacitance coupling at the time.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: October 11, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Shinji Miyano
  • Publication number: 20110229753
    Abstract: The present invention relates to an electric energy storage device such as a capacitor, a secondary battery, or the like, and more particularly, to an electric energy storage device capable of improving high output characteristics by using a voltage terminal. The electric energy storage device according to an exemplary embodiment of the present invention includes a positive electrode and a negative electrode storing electric energy and a positive current terminal and a negative current terminal connected to the positive electrode and the negative electrode to apply current; and a positive voltage terminal and a negative voltage terminal connected to the positive electrode and the negative electrode to detect voltage across the positive electrode and the negative electrode, wherein the charging or discharging operation is controlled by using the detected voltage across the positive electrode and the negative electrode as control voltage.
    Type: Application
    Filed: November 12, 2009
    Publication date: September 22, 2011
    Applicant: Kim's TechKnowledge Inc.
    Inventor: Seong Min Kim
  • Publication number: 20110151286
    Abstract: A lead-acid battery comprising: at least one lead-based negative electrode; at least one lead dioxide-based positive electrode; at least one capacitor electrode; and electrolyte in contact with the electrodes; wherein a battery part is formed by the lead based negative electrode and the lead dioxide-based positive electrode; and an asymmetric capacitor part is formed by the capacitor electrode and one electrode selected from the lead based negative electrode and the lead-dioxide based positive electrode; and wherein all negative electrodes are connected to a negative busbar, and all positive electrodes are connected to a positive busbar. The capacitor electrode may be a capacitor negative electrode comprising carbon and an additive mixture selected from oxides, hydroxides or sulfates of lead, zinc, cadmium, silver and bismuth, or a capacitor negative electrode comprising carbon, red lead, antimony in oxide, hydroxide or sulfate form, and optionally other additives.
    Type: Application
    Filed: March 1, 2011
    Publication date: June 23, 2011
    Applicant: COMMONWEALTH SCIENTIFIC AND INDUSTRIAL RESEARCH ORGANISATION
    Inventors: Lan Trieu Lam, Nigel Peter Haigh, Christopher G. Phyland, David Anthony James Rand
  • Publication number: 20110140826
    Abstract: A wire material includes at least two branch structures disposed so as to be continuous with each other, each of the branch structures including a conductor and a pair of branching conductors connected to the conductor. The branching conductors may be connected to a front surface and a back surface of an end of the conductor. The conductors may be in the form of a foil.
    Type: Application
    Filed: December 22, 2009
    Publication date: June 16, 2011
    Inventors: Masanori ABE, Tomoaki UEDA
  • Publication number: 20110104536
    Abstract: An energy storage unit, such as a galvanic cell, is composed of a first electrode (10), a second electrode (18) and a separation element (24), which is arranged between the first and the second electrode. Therein, the first and the second electrode (10, 18), respectively, comprise an electrode collector (12, 20) and an active electrode material (14, 22), which is applied onto the respective electrode collector on one side or on both sides. In order to improve the longterm stability, in particular for large format lithium-ion cells, the electrode collector (12, 20) of the first and/or the second electrode (10, 18) is made of a copper material, which is technical-grade oxygen-free having at least approximately 99.9% by weight copper and a specific phosphorous content.
    Type: Application
    Filed: November 26, 2008
    Publication date: May 5, 2011
    Inventors: Tim Schaefer, Andreas Gutsch
  • Patent number: 7885051
    Abstract: A semiconductor integrated circuit comprises an electrostatic actuator, an estimation circuit, a storage circuit and a bias circuit. The electrostatic actuator has a top electrode, a bottom electrode, and an insulating film disposed between the top electrode and the bottom electrode. The estimation circuit estimates the amount of a charge accumulated in the insulating film of the electrostatic actuator. The storage circuit stores a result of the estimation of the charge amount by the estimation circuit. The bias circuit changes, on the basis of the estimation result stored in the storage circuit, a drive voltage to drive the electrostatic actuator.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: February 8, 2011
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Tamio Ikehashi, Hiroaki Yamazaki
  • Patent number: 7872945
    Abstract: This invention applies to the means whereby capacitance changes due to varying temperature and/or pressure in a piezoelectric transducer used for acoustic telemetry in a drilling environment is dynamically offset by modifying one or more parameters associated with the drive or control circuitry of said transducer. The object of the invention is to closely maintain the transducer in a resonant mode, thereby ensuring optimum energy consumption.
    Type: Grant
    Filed: April 11, 2007
    Date of Patent: January 18, 2011
    Assignee: XAcT Downhole Telemetry, Inc.
    Inventors: Paul L. Camwell, Edwin I. Hildebrandt, Andrzej M. Sendyk
  • Patent number: 7851861
    Abstract: A device includes an embedded MIM capacitor and a transistor formed in parallel with reduced processing steps and improved device performance in different regions of a substrate. The embedded MIM capacitor has a bottom electrode, an insulator layer, a dielectric film, and a top electrode. The substrate has an insulator region. The bottom electrode, having a first conductor, overlies the insulator region. The insulator layer overlies the substrate and the bottom electrode. The insulator layer has an opening connecting parts of the bottom electrode. The dielectric film lines the opening, and is disposed directly on the bottom electrode and sidewalls of the opening. The top electrode, having a second conductor, overlies the dielectric film in the opening. The dielectric film lines sidewalls and bottom of the top electrode.
    Type: Grant
    Filed: January 22, 2007
    Date of Patent: December 14, 2010
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventor: Kuo-Chi Tu
  • Publication number: 20100284123
    Abstract: The present invention describes systems and methods for fabricating high-density capacitors. An exemplary embodiment of the present invention provides a method for fabricating a high-density capacitor system including the steps of providing a substrate and depositing a nanoelectrode particulate paste layer onto the substrate. The method for fabricating a high-density capacitor system further includes sintering the nanoelectrode particulate paste layer to form a bottom electrode. Additionally, the method for fabricating a high-density capacitor system includes depositing a dielectric material onto the bottom electrode with an atomic layer deposition process. Furthermore, the method for fabricating a high-density capacitor system includes depositing a conductive material on the dielectric material to form a top electrode.
    Type: Application
    Filed: May 5, 2009
    Publication date: November 11, 2010
    Inventors: MarkondeyaRaj Pulugurtha, Andreas Fenner, Anna Malin, Kanika Sethi, Himani Sharma, Dasharatham Janagama Goud, Rao Tummala
  • Publication number: 20100246087
    Abstract: A semiconductor integrated circuit comprises an electrostatic actuator, an estimation circuit, a storage circuit and a bias circuit. The electrostatic actuator has a top electrode, a bottom electrode, and an insulating film disposed between the top electrode and the bottom electrode. The estimation circuit estimates the amount of a charge accumulated in the insulating film of the electrostatic actuator. The storage circuit stores a result of the estimation of the charge amount by the estimation circuit. The bias circuit changes, on the basis of the estimation result stored in the storage circuit, a drive voltage to drive the electrostatic actuator.
    Type: Application
    Filed: June 9, 2010
    Publication date: September 30, 2010
    Inventors: Tamio IKEHASHI, Hiroaki Yamazaki
  • Patent number: 7800462
    Abstract: A printed board is mounted with a chip-type solid electrolytic capacitor of a four-terminal structure where a pair of positive electrode terminals are disposed at opposite positions and a pair of negative electrode terminals are disposed at opposite positions on a mounting surface. The printed board has a pair of positive electrode patterns and a pair of negative electrode patterns to which the positive electrode terminals and negative electrode terminals of the chip-type solid electrolytic capacitor are connected, respectively. The printed board further has an inductor section that is insulated from the negative electrode patterns, and electrically connects the positive electrode patterns.
    Type: Grant
    Filed: March 16, 2009
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Junichi Kurita, Kenji Kuranuki, Youichi Aoshima, Hiroshi Higashitani, Tsuyoshi Yoshino