Abstract: Disclosed herein is a multilayer ceramic device, including a device body; an inner electrode arranged in the device body; and an external electrode arranged at outside of the device body and being electrically connected to the inner electrode; wherein the external electrode includes: an inner layer covering the device body; an outer layer covering the inner layer and being exposed to the outside; and an intermediate layer arranged between the inner layer and the outer layer, and made of a mixture of a copper metal and a resin, a surface of the copper metal being coated with an oxide film.

Abstract: In some embodiments, a metal oxide second electrode material is formed as part of a MIM DRAM capacitor stack. The second electrode material is doped with one or more dopants. The dopants may influence the crystallinity, resistivity, and/or work function of the second electrode material. The dopants may be uniformly distributed throughout the second electrode material or may be distributed with a gradient in their concentration profile.

Abstract: Structures including alternating first U-shaped electrodes and second U-shaped electrodes and contact pads interconnecting the first and the second U-shaped electrodes are provided. Each of the first U-shaped electrodes includes substantially parallel straight portions connected by a bent portion located on one end of a substrate. Each of the second U-shaped electrodes includes substantially parallel straight portions connected by a bent portion located on an opposite end of the substrate. Every adjacent straight portions of neighboring first and second U-shaped electrodes constitute an electrode pair having a sub-lithographic pitch. Each of the contact pads overlaps and contacts the bent portion of one of the first and the U-shaped electrodes.

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body; an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body, disposed vertically on upper and lower surfaces of the ceramic body and forming capacitance; an upper cover layer formed upwardly of the active layer; a lower cover layer formed downwardly of the active layer and having a thickness greater than that of the upper cover layer; and first and second external electrodes covering both end surfaces of the ceramic body, wherein the active layer includes a first block in which a first region I and a second region II formed, and a second block in which a third region III, and a fourth region IV formed.

Abstract: A dielectric ceramic that can be sintered at a sufficiently low temperature and has a desired specific resistance at a high temperature, and a multilayer ceramic electronic component (a multilayer ceramic capacitor and the like) using the dielectric ceramic are provided. The multilayer ceramic capacitor includes a multilayer body having a plurality of laminated dielectric ceramic layers, and a plurality of internal electrodes at interfaces between the dielectric ceramic layers; and external electrodes 8 and 9 on outer surfaces of the multilayer body. The composition of the multilayer body includes a perovskite-type compound containing Ba and Ti (where a part of Ba may be substituted by Ca, and a part of Ti may be substituted by Zr) as a primary ingredient, and further includes M (where M is at least one of Cu, Zn, Li, K, and Na) and Bi. The total content of M and Bi is equal to or greater than 3 molar parts when the total content of Ti and Zr is 100 molar parts.

Abstract: A multilater ceramic capacitor includes: a ceramic body in which a plurality of dielectric layers are laminated; and an active layer including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layer interposed therebetween, and forming capacitance. An upper cover layer is formed on an upper portion of the active layer; a lower cover layer is formed on a lower portion of the active layer and having a thickness greater than that of the upper cover layer. First and second external electrodes cover both end surfaces of the ceramic body. Specific sizing of ceramic body and electrodes is defined.

Abstract: When a monolithic ceramic electronic component is viewed from either one of end surfaces thereof, an outer electrode includes a solder-repellent portion and a solder-receivable portion. The solder-repellent portion covers the central portion of an end surface of a ceramic laminate body. The solder-receivable portion includes portions disposed on two opposing sides of the solder-repellent portion. When the monolithic ceramic electronic component is mounted on the circuit board, solder does not adhere to a portion around the central portion of the end surface. Thus, expansion and contraction that occur as a result of application of an AC voltage are not significantly transmitted to the circuit board. Consequently, vibrations of the circuit board are reduced.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body including a plurality of dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces; a first capacitor part including a first internal electrode exposed to the first end surface and a second internal electrode exposed to the second side surface and a second capacitor part including a third internal electrode exposed to the first side surface and a fourth internal electrode exposed to the second end surface; an internal connection conductor exposed to the first and second side surfaces; and first to fourth external electrodes electrically connected to the first to fourth internal electrodes and the internal connection conductor, wherein the internal connection conductor is connected to the first and second capacitor parts in series.

Abstract: There is provided a multilayer ceramic electronic part to be embedded in a board, including: a ceramic body including dielectric layers; first and second internal electrodes having first and second leads; and first and second external electrodes, wherein when lengths from edges of the first or second external electrode formed on first and second side surfaces of the ceramic body to points at which the first or second external electrode contacts the first and second leads are G1, lengths from the edges of the first or second external electrode formed on first and second side surfaces of the ceramic body to a corresponding end surface of the ceramic body are BW1, and lengths from the corresponding end surface of the ceramic body to points at which the first or second external electrode contacts the first and second leads are M1, 30 ?m?G1<BW1?M1 is satisfied.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body having first and second main surfaces, first and second side surfaces, and first and second end surfaces; a first block including first and second internal electrodes having overlap regions which form a capacitance part; one or more second blocks each including third and fourth internal electrodes having overlap regions which form a capacitance part; a first external electrode connected to the first and third lead out portions and a second external electrode connected to the second and fourth lead out portions; and an insulating layer formed on the first side surface of the ceramic body, wherein the second blocks are disposed on upper and lower parts of the first block.

Abstract: There is provided a multilayered ceramic electronic component including: a ceramic body including a dielectric layer and having first and second side surfaces; first and second internal electrodes having an overlapping region provided in the ceramic body, forming a capacitance forming area exposed to the first side surface, the first internal electrode having a first lead-out portion, and the second internal electrode being insulated from the first internal electrode and having a second lead-out portion; a first external electrode connected to the first lead-out portion and a second external electrode connected to the second lead-out portion; and an insulating layer formed on the first side surface, wherein the first and second external electrodes further include non-conductive layers formed on outer surfaces thereof.

Abstract: A ceramic electronic component includes a ceramic base body and first and second outer electrodes. The ceramic base body includes first and second primary surfaces, first and second side surfaces, and first and second end surfaces. The first and second outer electrodes are arranged on the ceramic base body so that front end portions of the outer electrodes face each other. The first and the second outer electrodes include outermost layers each containing Cu. Outermost layers of the facing front end portions of the first and the second outer electrodes are more oxidized than outermost layers of the other portions of the first and the second outer electrodes.

Abstract: A capacitor structure is provided, which includes a conductive substrate, a first dielectric layer, and a first metal layer. The conductive substrate includes a first surface and at least one first concave located on the first surface. The first dielectric layer covers the first surface and the first concave. The first metal layer covers the first dielectric layer, wherein the first dielectric layer and the first metal layer respectively have concave structures corresponding to the first concave. A stack-type capacitor structure is also provided.

Abstract: A multilayer ceramic capacitor includes a body and first and second outer electrodes. The body includes a multilayer unit with ceramic dielectric layers and conductive layers alternately stacked on each other. The body is sectioned into a thickness-direction inner layer section that includes the multilayer unit and thickness-direction first and second outer layer sections that sandwich the thickness-direction inner layer section therebetween. A dimension of the thickness-direction second outer layer section is greater than a dimension of the thickness-direction first outer layer section. A conductive layer closest to a first principal surface and a conductive layer closest to a second principal surface are first and second outermost conductive layers, respectively. A curving amount of an extension portion of the second outermost conductive layer is greater than that of an extension portion of the first outermost conductive layer.

Abstract: The electronic component has a resin electrode which constitutes an external electrode on a face of a ceramic base body. At least a tip portion of a resin electrode region extended around another face of the body is bonded to the ceramic base body, and further a relationship between Rz1 and Rz2 satisfies the following requirement: Rz1>Rz2, Rz1>3.3 ?m, and Rz2<3.2 ?m, wherein Rz1 is a ten-point average surface roughness of a first region of a surface of the ceramic base body to which the tip portion is bonded, and Rz2 is a ten-point average surface roughness of a second region of the surface of the ceramic base body where the external electrode is not formed.

Abstract: There is provided a stacked-type multilayer ceramic electronic component including: a ceramic body, a plurality of first and second internal, and first and second external electrodes formed on both surfaces of the ceramic element opposing one another; and first and second metal frames disposed to face one another and allowing the first and second external electrodes of the ceramic body to be attached thereto, respectively, wherein two or more ceramic bodies are attached between the first and second metal frames in a length direction of the first and second metal frames with an interval therebetween, and the respective ceramic bodies have different levels of capacitance.

Abstract: A dielectric ceramic composition is represented by BaTiO3+aRe2O3+bMnO+cV2O5+dMoO3+eCuO+fB2O3+gLi2O+xSrO+yCaO (wherein Re represents one or more elements selected from among Eu, Gd, Dy, Ho, Er, Yb, and Y; and a-h each represents the mole number of each component with respect to 100 mol of the main component that is composed of BaTiO3). When the molar ratio of (Ba+Sr+Ca)/Ti contained in the dielectric ceramic composition is represented by m, the 0.10?a?0.50, 0.20?b?0.80, 0?c?0.12, 0?d?0.07, 0.04?c+d?0.12, 0?e?1.00, 0.50?f?2.00, 0.6?(100(m?1)+2g)/2f?1.3, and 0.5?100(m?1)/2g?5.1 are satisfied.

Abstract: High precision capacitors and methods for forming the same utilizing a precise and highly conformal deposition process for depositing an insulating layer on substrates of various roughness and composition. The method generally comprises the steps of depositing a first insulating layer on a metal substrate by atomic layer deposition (ALD); (b) forming a first capacitor electrode on the first insulating layer; and (c) forming a second insulating layer on the first insulating layer and on or adjacent to the first capacitor electrode. Embodiments provide an improved deposition process that produces a highly conformal insulating layer on a wide range of substrates, and thereby, an improved capacitor.

Abstract: According to an embodiment, first and second internal electrode layers are alternatively interposed between dielectric layers to form a laminated capacitor. The first internal electrode layer have a first base portion connected to a first external electrode, and is extended from the first base portion toward a second external electrode. The second internal electrode layer have a base portion connected to the second external electrode, and is extended from the second external electrode toward the first external electrode. The second internal electrode layer is formed in a deformation pattern which allows a path length greater than a length between the first and the second external electrode so that an open stub producing an open stub resonance is formed.

Abstract: An apparatus includes a two-terminal MLCC. The two-terminal MLCC includes a conductive layer, where the conductive layer includes at least one slot. The apparatus may also include a second conductive layer that includes at least one slot and an insulating layer that separates the two conductive layers. In one example, a first (e.g., positive) terminal of the two-terminal MLCC is formed by a first set of plates, where each plate in the first set includes at least one slot. A second (e.g., negative) terminal of the two-terminal MLCC is formed by a second set of plates, where each plate in the second set also includes at least one slot. The first set of plates and the second set of plates are interleaved, and each pair of plates is separated by an insulating layer.

Abstract: A multi-layer component has a base body that has a stack made of dielectric layers and internal electrode layers. An external contact is in electrical contact with the electrode layers. The external contact has a first layer and a second layer, where the first layer and the second layer are burned-in.

Abstract: The invention relates to a capacitive structure comprising: first and second components, at least one component comprising a plurality of capacitive layers of a dielectric, each layer arranged between electrodes of different polarity, wherein the first and second components are arranged in a stack separated by a stress reducing layer having a supporting structure with an open mesh in which air acts to reduce the transmissibility of cracks through the stress reducing layer.

Abstract: A thin sub-layer (<15 ?) of an impurity is formed under, over, or inside a thicker layer (˜30-100 ?) of a high-k (k>12) host material. The sub-layer may be formed by atomic layer deposition (ALD). The layer and sub-layer are annealed to form a composite dielectric layer. The host material crystallizes, but the crystalline lattice and grain boundaries are disrupted near the impurity sub-layer, impeding the migration of electrons. The impurity may be a material with a lower dielectric constant than the high-k material, added in such a small relative amount that the composite dielectric is still high-k. Metal-insulator-metal capacitors may be fabricated by forming the composite dielectric layer between two electrodes.

Abstract: There is provided a multilayer ceramic electronic component comprising a ceramic body having a hexahedral shape, including dielectric layers, and satisfying T/W>1.0 when a length of the ceramic body is defined as L, a width of a lower surface thereof is defined as W, and a thickness thereof is defined as T, and first and second internal electrodes stacked in the ceramic body to face each other, having the respective dielectric layers therebetween, wherein the ceramic body includes an active layer and cover layers and in a case in which the active layer is divided into three regions in a thickness direction of the ceramic body, when an average thickness of the internal electrodes in an upper region and an average thickness of the internal electrodes in a lower region, based on a central region, are defined as ta and tb, respectively, 0.751?ta/tb?0.913 is satisfied.

Abstract: There are provided a multilayer ceramic electronic component and a method of manufacturing the same. Here, an average diameter (Dc) of ceramic grains in a cover area is smaller than an average diameter (Da) of ceramic grains in the active area, and when a thickness of the cover area is expressed by Tc, 9 um?Tc?25 um and Tc/Dc?55 are satisfied. A multilayer ceramic capacitor having excellent moisture-resistance properties may be obtained.

Abstract: A multilayer ceramic capacitor includes a ceramic main body including an inner layer portion including third ceramic layers and a plurality of inner electrodes arranged at interfaces between the third ceramic layers, and first and second outer layer portions respectively including first and second ceramic layers, the first and second ceramic layers being arranged vertically so as to sandwich the inner layer portion. The third ceramic layers and the first and second outer layer portions contain a perovskite-type compound represented by ABO3 where A contains one or more of Ba, Sr, and Ca, B contains one or more of Ti, Zr, and Hf, and O represents oxygen) as a main component. Where a rare-earth element concentration (CR) in the third ceramic layers is compared to a rare-earth element concentration (Cr) in outermost layer portions including at least outermost surfaces of the first and second outer layer portions, CR>Cr (inclusive of Cr=0).

Abstract: There is provided a multilayer ceramic capacitor including: a ceramic body having first and second side surfaces opposite to each other, and third and fourth end surfaces connecting the first and second side surfaces; a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third or fourth end surface; and first and second side margin parts formed from the first and second side surfaces to respective edges of the internal electrodes, the first and second side margin parts having an average thickness of 18 ?m or less, wherein when a boundary surface between a cover layer and the first or second side margin part in the ceramic body is divided into two regions in a thickness direction of the ceramic body, a region adjacent to the internal electrode is S1, and a porosity of S1 is P1, 1?P1?20 is satisfied.

Abstract: A ceramic electronic component comprising; including a chip component of approximately rectangular parallelepiped, a first metal terminal portion having a first flat plate portion facing a first end face, at least a pair of first fitting arm portions connected to the first flat plate portion, having a first engagement projection engaging with a first wraparound portion holding the first wraparound portion in between, and a first mounting portion connected to the first flat plate portion and extending approximately parallel to one side face, and a second metal terminal portion having a second flat plate portion facing the second end face, at least a pair of second fitting arm portions connected to the second flat plate portion, having a second engagement projection engaging with a second wraparound portion, holding the second wraparound portion in between, and a second mounting portion extending approximately parallel to one side face.

Abstract: There is provided a multilayer ceramic electronic component including: a ceramic body including dielectric layers; and a plurality of internal electrodes disposed in the ceramic body, having at least one of the dielectric layers interposed therebetween, wherein when a distance between a widthwise end of an internal electrode disposed at a central portion of the ceramic body in a thickness direction thereof and an adjacent side surface of the ceramic body is defined as D1 and a distance between a widthwise end of an internal electrode disposed at an upper or lower portion of the ceramic body in the thickness direction thereof and the adjacent side surface of the ceramic body is defined as D2, D1/D2 is in a range of 0.5 to 0.95 (0.5?D1/D2?0.95).

Abstract: A multilayer ceramic electronic component is provided including a ceramic body having dielectric layers and a plurality of internal electrodes disposed in the ceramic body. The internal electrodes have exposed portions exposed to the exterior of the ceramic body. An electrode layer is disposed on an outer surface of the ceramic body electrically connected to the exposed portions of the internal electrodes A conductive resin layer is disposed on the electrode layer. The electrode layer has an uneven surface.

Abstract: There is provided a multilayer ceramic electronic component including a lamination main body including a plurality of inner electrodes. When T1 represents a distance between vertically adjacent inner electrodes in a central portion of the lamination main body, and T2 represents a distance between vertically adjacent inner electrodes at an edges of the inner electrodes in a widthwise direction, a ratio (T2/T1) of T2 to T1 is 0.80 to 0.95.

Abstract: Disclosed herein is a multilayer capacitor comprising: a laminate in which a plurality of first sheets and second sheets are alternately laminated, wherein the first sheets and the second sheets are disposed in a direction perpendicular to a mounting surface; a first inner electrode formed on the first sheets, wherein the first electrode is exposed through upper, lower, and first lateral surfaces of the laminate; a second inner electrode that is formed on the second sheets and has a horizontally symmetrical shape with respect to the first inner electrode; a sealing portion encapsulating the first and second inner electrodes exposed through two lateral surfaces of the laminate; and an external electrode that is electrically connected to the first and second inner electrodes exposed through the upper and lower surfaces of the laminate.

Abstract: A method of producing a fully active multilayer element including producing a fully active stack, and optionally sintering of the fully active stack or a green precursor thereof; applying outer electrodes onto sides A? and C? of the fully active stack and contacting of the uncoated inner electrodes so that the two outer electrodes electrically connect to the uncoated inner electrode layers.

Abstract: The present invention is ceramic electronic component with metal terminals comprising a chip component of approximately parallelepiped shape having a pair of terminal electrodes, and a pair of metal terminal parts provided in accordance with said terminal electrodes. The terminal electrode is formed by wrapping around a part of side faces from an end face of the chip component. The metal terminal part comprises a connecting part connecting to the terminal electrode and including a connecting face extending approximately parallel to the end face, plurality of joint parts connecting to the connecting part and including a joint face extending in a different direction of the connecting face, and plurality of mounting parts connecting to the joint parts and including a mounting part upper face extending approximately parallel to any one of the side faces which is different direction of the joint face by taking predetermined spaces.

Abstract: A ceramic material for capacitors uses multilayer technology of the general formula: Pb1?1.5a?0.5b+1.5d+e+0.5f)AaBb(Zr1?xTix)(1?c?d?e?f)LidCeFefSicO3+y.PBO wherein A is selected from the group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb; B is selected from the group consisting of Na, K and Ag; C is selected from the group consisting of Ni, Cu, Co and Mn; and 0<a<0.12; 0.05?x?0.3; 0<b<0.12; 0?c?0.12; 0<d<0.12; 0?e?0.12; 0 <f<0.12; 0?y?1, and wherein b+d+e+f>0.

Abstract: A laminated ceramic capacitor is characterized in that when the section constituted by two internal electrode layers positioned adjacent to each other in the laminating direction and one dielectric layer present between the two internal electrode layers is considered a unit capacitor, then the respective capacitances of the unit capacitors arranged in the laminating direction are distributed in such a way the capacitance at the center in the laminating direction is lower than the capacitances at both ends in the laminating direction. The laminated ceramic capacitor is resistant to deterioration of insulation resistance.

Abstract: A multilayer ceramic electronic component may include a ceramic body having a plurality of dielectric layers stacked in the ceramic body; a plurality of active layers including first and second internal electrodes disposed to be alternately exposed to the end surfaces of the ceramic body with the dielectric layers interposed between the first and second internal electrodes; and dummy layers disposed between the active layers.

Abstract: A multilayer ceramic electronic component includes a ceramic body including dielectric layers stacked in a thickness direction and satisfying T/W>1.0 when a width thereof is W and a thickness thereof is T; first and second internal electrodes; and first and second external electrodes, wherein when the ceramic body is divided into five regions in a width direction and a central region among the five regions is CW1 and regions adjacent to the central region CW1 are CW2 and CW3, a difference between electrode connectivity of the central region CW1 and electrode connectivity of the region CW2 or CW3 satisfies 0.02?(CW2 or CW3)?CW1?0.10.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces facing each other, and third and fourth end surfaces connecting the first and second side surfaces, a plurality of internal electrodes formed in the ceramic body and having one ends thereof exposed to the third end surface or the fourth end surface, and a first side margin part and a second side margin part formed such that an average thickness thereof from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less.

Abstract: A thin film capacitor includes an under electrode, a plurality of dielectric body layers and a plurality of internal electrode layers that are alternately laminated on the under electrode, the internal electrode layers respectively including protrusion parts that each protrude from the dielectric body layers viewed in the lamination direction, and connection electrodes to which at least a portion of each of the protrusion parts contacts. Assuming that protrusion amounts of the protrusion parts of the internal electrode layers that are connected to the same connection electrode are regarded as L, a protrusion amount Ln of a protrusion part of nth (n?2) internal electrode layer from the under electrode side is smaller than another protrusion amount Ln-1 of another protrusion part of (n?1)th internal electrode layer.

Abstract: There is provided a multilayer ceramic electronic component to be embedded in a board including: a ceramic body including dielectric layers and having first and second main surfaces opposing one another, first and second lateral surfaces opposing one another, and first and second end surfaces opposing one another; first and second internal electrodes stacked to be spaced apart from both end surfaces of the ceramic body at a predetermined distance with the dielectric layers interposed therebetween, respectively; and first and second external electrodes formed in both end portions of the ceramic body, wherein the first and second external electrodes include first and second base electrodes and first and second terminal electrodes formed on the first and second base electrodes, respectively, and a non-conductive paste layer is formed on both lateral surfaces of the ceramic body.

Abstract: A multilayer ceramic electronic component including: a ceramic body having a plurality of dielectric layers stacked therein; active layers including a plurality of first and second internal electrodes formed to be alternately exposed to both end surfaces of the ceramic body with the dielectric layers interposed therebetween; and first and second external electrodes formed on the both end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The active layers may include a first active layer including a ferroelectric layer and a second active layer including a paraelectric layer, the first and second active layers being alternately stacked.

Abstract: A method for producing a multilayer component (21) is specified, which involves providing a body having dielectric layers (3) arranged one above another and first and second electrically conductive layers (4, 84, 5, 85) arranged therebetween. The first conductive layers (4, 84) are connected to a first auxiliary electrode (6) and the second conductive layers (5, 85) are connected to a second auxiliary electrode (7). The body (1, 81) is introduced into a medium and a voltage is applied between the first and second auxiliary electrodes (6, 7) for producing a material removal. Furthermore, a multilayer component is specified, which has depressions (20) formed by an electrochemically controlled material removal.

Abstract: A multilayer ceramic capacitor may have low equivalent series inductance (ESL), in which via electrodes are opposed to each other diagonally and be off-centered from positions corresponding to center points of external electrodes, so that a distance between the via electrodes is significantly reduced and a current path is reduced.

Abstract: In a capacitor main body, a dimension along the thickness direction of a first region where a first inner electrode and a second inner electrode are provided is t1, a dimension along the thickness direction of a second region that is positioned on the side of a first main surface relative to the first region is t2, and a dimension along the thickness direction of a third region that is positioned on the side of a second main surface relative to the first region is t3. A condition of t2/t1>about 0.15 and a condition of t3/t1>about 0.15 are satisfied.

Abstract: There is provided a multilayer ceramic electronic component, including: a ceramic body including dielectric layers; and first and second inner electrodes disposed to face each other with the dielectric layer interposed therebetween within the ceramic body, the first and second inner electrodes being alternately laminated with a difference in printing widths therebetween, wherein a difference ratio between the printing widths of the first and second inner electrodes is 20 to 80%. According to embodiments of the present invention, a multilayer ceramic electronic component having excellent reliability and withstand voltage characteristics may be realized, by reducing the occurrence of cracking through a reduction in the influence of step height while securing high capacitance.

Abstract: There is provided a multilayer ceramic capacitor including a ceramic body having first and second side surfaces and third and fourth end surfaces, a plurality of internal electrodes and having one ends exposed to the third or fourth end surface, and first and second side margin parts formed so that an average thickness from the first and second side surfaces to edges of the internal electrodes is 18 ?m or less, wherein when the first or second side margin part is divided into two regions by a virtual line obtained by connecting mid points of distances between the edges of the internal electrodes and points at which lines extended from the internal electrodes contact the first or second side surface, when a region adjacent to the internal electrodes is defined as S1 and a porosity of S1 is defined as P1, P1 is in a range of 1 to 20 (1?P1?20).

Abstract: A multilayer ceramic capacitor may include three external electrodes disposed on a mounting surface of a ceramic body to be spaced apart from one another. When a length of the ceramic body is defined as L, and a width of an active region including a plurality of internal electrodes disposed therein in a width direction of the ceramic body is defined as A, A/L is in a range of 0.64 to 1.14 (0.64?A/L?1.14).

Abstract: In a multilayer ceramic electronic component, a size of a step portion on a first main surface and a size of a step portion on a second main surface are different from each other. A first outer electrode includes a plating film containing Cu. A length of a portion of the plating film containing Cu that is positioned on the first main surface in a length direction and a length of a portion of the plating film containing Cu that is positioned on the second main surface in the length direction are different from each other.

Abstract: A multilayer ceramic capacitor may include a ceramic body and an active layer. The ceramic body includes three external electrodes disposed on amounting surface thereof so as to be spaced apart from each other, and first, second, and third lead parts extending from first and second internal electrodes of the ceramic body so as to be exposed to the mounting surface of the ceramic body. One side of at least one of the first, second, and third lead parts connected to the mounting surface of the ceramic body may be at least partially formed as an inclined extension portion that is inclined with respect to an outer periphery of the first or second internal electrode.