Abstract: A power switch disposed in a housing includes a contact breaker configured to connect and disconnect a low-voltage switchgear from a power source supplying the low-voltage switchgear, a triggering device configured to disconnect the low-voltage switchgear in an overload event, a current detection device, a control device, a first evaluation device configured to evaluate an accidental arc overcurrent, and a second evaluation device configured to evaluate the accidental arc overcurrent. The power switch is configured to be activated via an overcurrent signal generated by an arc monitoring system in response to the accidental arc overcurrent. The overcurrent signal is linked to the at least one triggering signal. The second evaluation has a threshold above a threshold of the first evaluation device. The triggering device is configured to be activated via a turn-off pulse when a signal from the current detection device is above the threshold of the second evaluation device.

Abstract: The present application discloses methods, circuits and systems for power conversion, using a universal multiport architecture. When a transient appears on the power input (which can be, for example, polyphase AC), the input and output switches are opened, and a crowbar switch shunts the inductance which is used for energy transfer. This prevents this inductance from creating an overvoltage when it is disconnected from outside lines.

Abstract: In one embodiment, an integrated circuit, and method of manufacturing thereof, is provided. The integrated circuit contains an over-voltage protection element and an over-current protection element. The integrated circuit operates to provide enhanced and efficient ESD functionality. The over-current element of the instant disclosure includes a diffusion protection layer to enhance the lifetime of the over-current element and improve functionality.

Abstract: An information processing unit is disclosed that includes a load circuit, a pair of terminals that are capable of being connected to and removed from a direct current power source, a first capacitor connected between power terminals of the load circuit, a rush current suppressing circuit configured to suppress rush current flowing from the direct current power source to the first capacitor or the load circuit via the terminals, a buffer circuit connected between the terminals and buffers voltage fluctuation between the terminals, a second capacitor connected in series with the rush current suppressing circuit and the first capacitor in a line parallel to the buffer circuit, a switch connected parallel to the second capacitor, and a first controller configured to turn on the switch when a designated period of time is elapsed after hot insertion of the terminals into the direct current power source.

Abstract: Embodiments of the invention are directed to systems and methods using an interruption device for automatically re-routing power upon the occurrence of an event. The interruption device may interrupt the flow of power to an external device upon the detection of an event, such as a circuit overload or short circuit. Interrupting the flow of power may cause power to be cut off to a receiving connector, which supplies power to the external device, by re-routing the flow of power away from the receiving connector by the use of relay switches. By interrupting and re-routing the flow of power, an electrical fire, damage to the external device or other hazard may be prevented. Once the source of the problem, such as a defective external device, has been removed or fixed, the flow of power may be re-routed back to the receiving connector.

Abstract: The resistance of an integrated circuit against ESD (electrostatic discharge) is improved without disturbing improvement of the performance and reduction of size of the integrated circuit. A protection circuit is interposed between an input and output terminals. When ESD is generated, the input and output terminals are short-circuited by the protection circuit, so that overvoltage application to the circuit is prevented. The circuit is electrically connected to the input and output terminals by a connection wiring. The circuit has a plurality of electrical connection portions between the circuit and the connection wiring, and the connection wiring is formed such that the wiring resistance between the input or output terminal and each of the connection portions is the same. Accordingly, if ESD is generated, voltage application on only one of the connection portions is prevented, whereby the possibility that the circuit will be broken by ESD is decreased.

Abstract: A device for diverting energy away from an arc flash occurring within an electrical power system is provided. The device comprising an arc source configured to create a second arc flash, a plasma gun configured and disposed to inject plasma in proximity of said arc source in response to the arc flash, an arc containment device configured and disposed to house said arc source and said plasma gun, said arc containment device comprising a cover configured and disposed to cover said arc source and said plasma gun, said cover comprising an inner surface and an outer surface, said inner surface being proximal to said arc source and said plasma gun, said inner surface including an insulative ceramic plasma spray coating.

Abstract: Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

Abstract: An ESD protection circuit including a first electrostatic discharge protection circuit provided between first power supply wiring and first ground wiring; a second ESD protection circuit provided between second power supply wiring and second ground wiring; a third ESD protection circuit provided between the first ground wiring and the second ground wiring; a PMOS transistor coupled to the first power supply wiring and provided between a first CMOS circuit coupled to the first ground wiring and the first power supply wiring, the first CMOS circuit receiving a signal from a first internal circuit and outputting a signal to a first node; an NMOS transistor provided between the first node and the first ground wiring; and an ESD detection circuit that renders the PMOS transistor conductive and the NMOS transistor non-conductive during normal operation, and renders the PMOS transistor non-conductive and the NMOS transistor conductive when an ESD is applied.

Abstract: A method is disclosed for protecting a radio frequency power amplifier applied in a base station radio frequency system. The method comprises: a protection detection circuit detecting a signal output by a transceiver and sending a turn-on control signal to a protection switch circuit when the signal is greater than a preset threshold; and the protection switch circuit receiving the turn-on control signal sent by the protection detection circuit and controlling its grounded connection based on the turn-on control signal. A base station radio frequency system is also disclosed comprising a transceiver and a radio frequency power amplifier connected to each other, a protection detection circuit and a protection switch circuit. Using the method and system, abnormal big signals with wide spectrum cannot enter the power amplifier, thereby achieving the object of protecting the power amplifier from being damaged.

Abstract: An apparatus and method for protecting against electrocution hazards that arise when an appliance is electrically connected to a miswired single-phase AC electrical source which includes an energized ground lead are described. The apparatus includes one or more sensors that detect electrical energy in the ground lead combined with a miswiring condition in the hot and common leads. A tester embodiment is also illustrated. The method includes the steps of detecting if the putative ground of the electrical source is energized and whether the hot and common leads are reversed.

Abstract: An embodiment is a semiconductor device comprising a receiver circuit comprising fin field effect transistors (FinFETs), a transceiver circuit comprising FinFETs, and a transmit bus electrically coupling the receiver circuit and the transceiver circuit, wherein the receiver circuit and the transceiver circuit each further comprises an electrostatic discharge protection circuit comprising planar transistors electrically coupled to the transmit bus. Other embodiments may further comprise a power clamp electrically coupling a first power bus and a first ground bus, a power clamp electrically coupling a second power bus and a second ground bus, or at least two diodes electrically cross-coupling the first ground bus and the second ground bus. Also, the planar transistors of the transceiver circuit and the receiver circuit may each comprise a planar PMOS transistor and a planar NMOS transistor.

Abstract: A system and method for electrostatic discharge protection. The system includes a first transistor including a first drain, a second transistor including a second drain, and a resistor including a first terminal and a second terminal. The first terminal is coupled to the first drain and the second drain. Additionally, the system includes a third transistor coupled to the second terminal and a protected system. The third transistor includes a first gate, a first dielectric layer located between the first gate and a first substrate, a first source, and a third drain. The protected system includes a fourth transistor, and the fourth transistor includes a second gate, a second dielectric layer located between the second gate and a second substrate, a second source, and a fourth drain.

Abstract: Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

Abstract: A lithium-based battery system for a vehicle includes a plurality of lithium battery cells arranged in series that provide energy to propel the vehicle. Each of the battery cells includes a first terminal, a second terminal, a plurality of lithium battery elements arranged in parallel, a plurality of disconnect switches, and a shunt switch. Each of the battery elements includes a first terminal and a second terminal. The first terminal of each of the battery elements is connected to the first terminal of the battery cell. The second terminal of each of the battery elements is connected to the second terminal of the battery cell via a corresponding one of the disconnect switches. The shunt switch is connected between the first and second terminals of the battery cell. A control module selectively opens and closes the shunt switches and the disconnect switches.

Abstract: A vehicle on-board electric power system is disclosed including at least one field-effect-controlled power transistor which applies a vehicle on-board electric power system supply voltage VBB to a load when actuated by a logic circuit. The power transistor has a drain-source breakdown voltage VDS with a positive temperature coefficient TKDS and is provided with a clamping means for protecting against overvoltages VO occurring in the vehicle on-board electric power system. The clamping means has a clamping voltage VCLAMP with a positive temperature coefficient TKCLAMP?TKDS, the clamping voltage VCLAMP being lower than or equal to an anticipated maximum overvoltage VOmax in the vehicle on-board electric power system.

Abstract: One form of the invention provides a method and apparatus for preventing an extraordinary electromagnetic pulse from reaching and rendering inoperative an electrical component of an electrical power system, wherein the component is located in a conductive path of the system that receives the pulse. The method and apparatus comprises the steps or means for detecting the presence of the pulse in the conductive path prior to the pulse reaching and rendering inoperative the electrical component. The pulse is diverted around the electrical component with a low inductance, high current capacity circuit relative to the electrical component before the pulse can reach and render the electrical component inoperative. The foregoing invention may beneficially utilize a high-speed current shunt comprising a flat conductive metal strap having a defined current-measuring region, a tapered parallel-plate transmission-line matching transformer attached to the current-measuring region and an output via a coaxial cable.

Abstract: A method and integrated circuit renders a shunt structure non-conductive during a power up event or noise event for and in addition, during an electrostatic discharge event, keeps the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a shunt structure, such as a transistor, is interposed between a power node and a ground node. Circuitry is operative during a power up event or noise event, to render the shunt structure non-conductive for a period of time during the power up event or during the noise event (when power is applied). Second circuit is operative, during an electrostatic discharge event, to keep the shunt structure conductive for a period of time to discharge electrostatic energy through the shunt structure. In one example, a plurality of resistor/capacitors (RC) circuits are utilized wherein the RC circuits have different time constants.

Abstract: Enhanced electrostatic discharge (ESD) protection schemes of an integrated circuit in three-dimensional (3D) integrated circuit (ICs) packages, and methods of forming the same are presented in the disclosure. An array of ESD protection devices can be formed in an interposer and placed under one or a plurality of ICs so that a hard block inside an IC on top of the interposer can be connected to an ESD protection device of the array and is protected from ESD. The ESD protection device cell of the array is connected to a Voltage Regulator Module (VRM) which can be placed inside the interposer, on the surface of the interposer, or on the surface of a printed circuit board (PCB). The ESD protection array is of generic nature and can be used with many kinds of ICs to form a three-dimensional IC package. Further embodiments of ESD protection for 3D IC package is disclosed where an ESD protection device inside a first IC 2 can be shared with another IC 1 to protect a hard block within IC 1.

Abstract: Present invention relates to an electrostatic discharge protection circuit for a transistor circuit having electrostatic discharge protection circuits coupled to an input and to an output terminal. The protection circuits comprise delay means having a predetermined delay time and switchable connecting means connected between said input terminal and a control terminal of said transistor circuit. The delay means are configured for activating said switchable connecting means for said predetermined delay time in response to an electrostatic discharge at said input terminal.

Abstract: An integrated circuit includes an input/output pad for signal exchange with an external circuit, an electrostatic discharge (ESD) protection unit coupled to the input/output pad and configured to form an ESD path between a first voltage line and a second voltage line, a first drive transistor coupled between the first voltage line and the input/output pad, a first driving control unit coupled to a gate of the first drive transistor and configured to control the first drive transistor, a first dummy drive transistor coupled between the first voltage line and the input/output pad, and a first auxiliary driving control unit configured to supply the first voltage to a gate of the first dummy drive transistor in a normal operation mode, and float the gate of the first dummy drive transistor in a non-operation mode in which no power is supplied.

Abstract: An apparatus has power semiconductor modules, which are connected to one another via connection devices so as to form a series circuit. A short-circuiting device for short-circuiting the respective power semiconductor module is assigned to each power semiconductor module. The apparatus has a reliable and at the same time cost-effective short-circuiting device. It is proposed that the short-circuiting device is a pyrotechnical/mechanical element, which has a detonation charge and a tripping device, which can be displaced by the detonation charge.

Abstract: The current measuring device comprises a first measuring resistor to receive a measurement current, and a first signal amplifier having an input connected to said first measuring resistor and an output to provide a first measurement signal. A second measuring resistor is connected in series with said first measuring resistor, and first voltage limiting means are connected in parallel on the first measuring resistor to branch a first shunt current off when a first limiting voltage is reached on said first measuring resistor. The value of the first measuring resistor is greater than the value of the second measuring resistor A processing unit comprises one such current measuring device.

Abstract: A line side crowbar circuit for an energy converter is disclosed. In one aspect there is a power unit that includes an energy converter; a transformer configured to transfer electrical energy generated from the energy converter to an electrical grid; and a crowbar coupled to the energy converter and the transformer that is configured to prevent an overvoltage event from damaging electrical components associated with the energy converter and the transformer.

Abstract: A semiconductor component and a method for manufacturing the semiconductor component, wherein the semiconductor component includes one or more transient voltage suppression structures. In an embodiment, the semiconductor component may include an over-voltage detection circuit, an over-current detection circuit, an over-temperature detection circuit, an ESD protection circuit, or combinations of these circuits.

Abstract: An apparatus and method is disclosed for providing an electrostatic discharge protection circuit for compound semiconductor devices and circuits. The electrostatic discharge protection circuit comprises a first terminal and a second terminal. The electrostatic discharge protection circuit further comprises a transistor shunt element that is operably coupled between the first terminal and the second terminal; the transistor shunt element is capable of providing a bi-directional discharge path between the first terminal and the second terminal. The electrostatic discharge protection circuit further comprises a shut-off element that is operably coupled with the second terminal; the shut-off element is capable of keeping the transistor shunt element turned-off.

Abstract: A circuit protection device for use with a circuit that includes at least one conductor includes at least one phase electrode assembly that is electrically coupled to the at least one conductor, wherein the at least one phase electrode assembly comprising an adjustable electrode assembly. The circuit protection device also includes a conductor base comprising at least one isolation area sized to secure the adjustable electrode assembly therein, and a conductor cover coupled to the conductor base and including at least one isolation channel, wherein the adjustable electrode assembly extends at least partially through the at least one isolation channel.

Abstract: Plural of switches are connected as switch stacking for easier management. Failures of stack member switches disrupts the stack and network availability. This invention discloses a method to maintain stacking connections in failed switches. This invention introduces a small circuit to monitor health of the switch and short circuit the stacking connections in case of switch failures.

Abstract: A computer power supply includes a standby voltage output terminal to output a standby voltage, a power connector connected to the standby voltage output terminal, and a standby voltage discharge circuit including a zener diode, first and second electrical switches. The standby voltage output terminal is connected to a cathode of the diode. An anode of the diode is connected to a first terminal of the first electrical switch. A second terminal of the first electrical switch is grounded. A third terminal of the first electrical switch is connected to a first terminal of the second electrical switch and the standby voltage output terminal via a first resistor. A second terminal of the second electrical switch is grounded. A third terminal of the second electrical switch is connected to the standby voltage output terminal via a second resistor. A capacitor is connected between the standby voltage output terminal and ground.

Abstract: Disclosed is a high efficiency amplifier operable to substantially reduce electromagnetic interference (EMI). The high efficiency amplifier comprises an output stage to provide a high powered signal to a load. The high efficiency amplifier further comprises an overlap protection circuit to produce a timing non-overlap in a control signal for the output stage, and an edge control circuit to reduce a transient portion of the high powered signal to substantially reduce the EMI. The overlap protection circuit and the edge control circuit may be implemented with resistive source degeneration. Also disclosed is a related method. In one embodiment, the high efficiency amplifier and the related method may be incorporated into a cellular telephone or a mobile audio device.

Abstract: A power distribution unit includes a communication unit. The communication unit includes a communication port and a protection circuit. The communication unit includes a ground pin and a plurality of signal pins. The ground pin is connected to a digital ground of the power distribution unit. The signal pins are connected together to receive a voltage signal outputted by a hi-pot tester. The protection circuit includes a plurality of resistors connected between the signal pins and an analog ground of the power distribution unit.

Abstract: The present invention advantageously provides a circular-arc shaped structure for forward biased steering diodes used in an ESD circuit, which circular arc shaped structure forward biases steering diodes effectively prevent concentration of an ESD pulse to one section of the p-n junction within the forward biased steering diode (or, alternatively viewed, evenly distributing stress along the entire p-n junction), thus increasing reliability of the ESD circuit, and also minimizing input capacitance as well as occupying a smaller area. The circular-arc shaped structure thus provides a mechanism to evenly distribute the current flow through the ESD steering diodes, and therefore avoids the disadvantage of a voltage gradient along the steering diode structure.

Abstract: An electrical system for connecting a wind turbine to a power grid that includes: a frequency converter that converts electric power produced by a generator of the wind turbine into electric power that is synchronized with the electric power of the power grid; a transformer that steps up the voltage for connection to the power grid, the transformer being disposed between the frequency converter and a connection to the power grid; and a grid-side crowbar circuit; wherein the grid-side crowbar circuit is configured to apply a short circuit to the electrical system upon the detection of a fault.

Abstract: An object is to provide a display device, in a part of which a monitor light emitting element is provided and in which an anode and a cathode of the monitor light emitting element are prevented from short-circuiting in an early stage and over time by using a circuit which corrects a voltage or a current to be supplied to a light emitting element in consideration of electrical property fluctuation of the monitor light emitting element, and a method for inspecting the display device. A monitor light emitting element is provided, which is electrically connected to a monitor line for supplying a current is provided, and a circuit is provided, which electrically disconnects the monitor light emitting element when an anode and a cathode of the monitor light emitting element are short-circuited in an early stage or over time. Further, a circuit for checking circuit operation before or after a step of providing the monitor light emitting element is provided.

Abstract: An over-current and over-voltage protection assembly apparatus including an over-current protection (OCP) device and an over-voltage protection (OVP) device is provided. One end of the OCP device is electrically connected to a first connection point, and the other end is electrically connected to a second connection point. One end of the OVP device is electrically connected to a third connection point, and the other end is electrically connected to the second connection point. The second connection point is a common point. The OCP device and the OVP device are modularized and integrated to an assembly. The first, second, and third connection points are connected to an external circuit to be protected, such that the OCP device is connected in series to the circuit to be protected, and the OVP device is connected in parallel to the circuit to be protected.

Abstract: A plant for transmitting electric power comprises a direct voltage network for High Voltage Direct Current and at least one alternating voltage network connected thereto through a station. The station comprises at least one Voltage Source Converter adapted to convert direct voltage into alternating voltage and conversely. In the direct voltage network at least one parallel connection of at least one semiconductor device of turn-off type and a resistor is connected in series with a direct voltage line of the direct voltage network.

Abstract: Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

Abstract: Disclosed embodiments are directed to an electrical overstress protection circuit. The electrical overstress protection circuit may include an intermediate node receiving a reference voltage, a first pair of clamp devices, having opposite polarity, clamping an input signal line to the intermediate node, and a second pair of clamp devices, each clamping the intermediate node to one of two reference potentials. The electrical overstress protection circuit may also include a filter connected to the intermediate node to reduce noise at the intermediate node.

Abstract: A cooling system is provided with a motor drive device, a fan motor, and a Hall element. The motor drive device includes a lock protection circuit and a lock controller. When a control signal instructing rotation of the fan motor that is to be driven instructs stoppage of the motor for a predetermined time-period or longer, the lock controller has the lock protection circuit inactive. At an occasion when the control signal has continued to instruct stoppage of the fan motor for a first time-period or longer, a standby controller starts time measurement, and after a further predetermined second time-period has elapsed, makes at least a part of the motor drive device transition to a standby mode.

Abstract: Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

Abstract: Systems and methods for dynamically clearing faults in a power transmission line involve automatically terminating ends of a section of the power line while preserving electrical and/or physical continuity of the power line. The terminating of the ends is reversed at about voltage zero-crossings in the power line to clear a fault.

Abstract: A motor-drive circuit comprising: a current-passage-control circuit to perform ON/OFF control of a drive transistor connected to a motor coil to pass current through the motor coil; an overcurrent-state-detection circuit to detect whether current passing through the drive transistor is in an overcurrent state where the current exceeds a predetermined threshold value; a charging and discharging circuit to start charging a capacitor in response to detecting the overcurrent state by the overcurrent-state-detection circuit and subsequently discharge the capacitor in response to not detecting the overcurrent state; and an overcurrent-protection-control circuit to stop the ON/OFF control to turn off the drive transistor, for an elapsed charging period for a charging voltage of the capacitor at a predetermined voltage to exceed a threshold voltage, and determine whether to perform such an overcurrent-protection-control as to turn off the drive transistor by detection of the overcurrent state, after the charging peri

Abstract: An I/O regulating circuitry is provided. The I/O regulating circuitry omits the ESD device in a CMOS process with a minimized critical dimension to reduce chip size while still maintaining electrostatic discharge immunity. The I/O regulating circuitry is applied in MLC flash memory applications and the flash controller thereof.

Abstract: The disclosure relates to a circuit arrangement for preventing overloading of magneto-inductive flowmeters. The disclosure can protect the amplifiers which are connected downstream thereof or the electronic evaluation system from overloading. To this end, the signal input circuit is provided with additional voltage-limiting diodes disposed downstream of the impedance converters so that eventual voltage tips are prevented during modulation in the downstream amplifiers of the evaluation electronics.

Abstract: A power protection apparatus includes a PIN diode circuit and a solid state limiter. The PIN diode circuit is connected to a signal path for transporting RF signals between a first RF device and a second RF device, the PIN diode circuit including first and second PIN diodes having opposite polarities. The solid state limiter is configured to detect an overpower condition of an RF signal input from the second RF device on the signal path, and to trigger the PIN diode circuit in response to the detected overpower condition, limiting the overpower condition.

Abstract: The present invention relates to a protection circuit for MOS-technology field-effect transistors. The circuit comprises at least one MOSFET protected by a module for blocking said MOSFET, the module being placed between the gate of the MOSFET and an electrical conductor, the module comprising switched connection means having at least two states: a first state which connects the gate of the MOSFET to the conductor, which is maintained at an electrical potential suitable for blocking the MOSFET, this first state being activated in the presence of an alarm signal; and a second state which disconnects the gate of the MOSFET, this second state being activated in the absence of the alarm signal. The invention applies notably to the protection of the power MOSFETs included in the amplification stages of electronic systems.

Abstract: An energy management system that facilitates the transfer of high frequency energy induced on an implanted lead or a leadwire includes an energy dissipating surface associated with the implanted lead or the leadwire, a diversion or diverter circuit associated with the energy dissipating surface, and at least one switch disposed between the diversion circuit and the AIMD electronics for diverting energy in the implanted lead or the leadwire through the diversion circuit to the energy dissipating surface. The switch may comprise a single or multi-pole double or single throw switch. The diversion circuit may be either a high pass filter or a low pass filter.

Abstract: It is an object to provide a protection circuit and a semiconductor device to which a countermeasure against ESD is applied. The protection circuit includes a signal line electrically connected to an integrated circuit; a first diode provided between the signal line and a first power supply line; a second diode provided in parallel to the first diode; and a third diode provided between the first power supply line and a second power supply line. The first diode is a diode formed by diode-connecting a transistor, and the second diode is a diode having a PIN junction or a PN junction. The protection circuit is particularly effective when applied to a semiconductor device manufactured using a thin film transistor.

Abstract: A circuit includes multiple battery modules and protection circuits respectively coupled to the battery modules. Each protection circuit includes a controller and a shunt circuit. The controller is coupled to one of the battery modules and detects a fault associated with the battery module. The shunt circuit is coupled to the battery module and the controller, and shunts a current around the battery module if the fault associated with the battery module is detected by the controller.

Abstract: Provided are an electrical and/or electronic system protecting circuit using an abrupt metal-insulator transition (MIT) device which can effectively remove high-frequency noise with a voltage greater than a rated standard voltage received via a power line or a signal line of an electrical and/or electronic system, and the electrical and/or electronic system including the electrical and/or electronic system protecting circuit. The abrupt MIT device of the electrical and/or electronic system protecting circuit abrupt is connected in parallel to the electrical and/or electronic system to be protected from the noise. The electrical and/or electronic system protecting circuit bypasses toward the abrupt MIT device most of the noise current generated when the voltage greater than the rated standard voltage is applied, thereby protecting the electrical and/or electronic system.