Abstract: An ESD protection circuit, arranged between a first and second potential terminals, has a RC branch, a voltage adjuster circuit, and an ESD discharge transistor. The RC branch includes a resistor and a capacitor series connected from the first to the second potential terminal. The voltage adjuster circuit has a plurality of inputs connected to the RC branch, and the first and second potential terminals, and an output connected to a gate of the ESD discharge transistor to adjust the gate voltage thereof for obtaining a uniform turn on and optimal ESD robustness. The voltage adjuster circuit mainly includes a plurality of transistors that enable to effectively adjust the gate voltage with respect to high level of ESD stress.

Abstract: A solid-state relay is arranged so that, during the off-state of the switching element, a surge protective means forcefully turns the switching element on based upon a surge voltage VSG multiplexed on an AC voltage VAC from output terminals; therefore, a surge current is allowed to flow by the low impedance (on-resistance) of the switching element so that the surge voltage VSG is absorbed to be set to a low surge voltage VSG, thereby making it possible to protect the switching element from damages caused by the surge voltage VSG.

Abstract: In a production system included in a power modulator for the protection of a load connected to the power modulator, comprising a charging system, a power impulse former, a control arrangement and a pulse transformer with a first protection circuit in the form of a crowbar circuit connected to the input side and the load connected to the output side of the pulse transformer, a second protection circuit is connected to the output side of the pulse transformer between the low potential and the ground potential connections thereof wherein the second protection circuit includes a controlled switch with a resistor arranged in parallel therewith.

Abstract: A shunt regulator circuit and method for protecting the circuit having a plurality of fuses parallely arranged in a bank so that lower rated fuse can be used while improving the control characteristics of activating the fuse elements. The circuit operates in one of two modes, a shunt regulator mode and a fuse activation mode. In the shunt regulator mode, a feedback circuit prevents any fuse that has blown open form loading a feedback signal to the regulator amplifier of the circuit. In fuse activation mode, each fuse is selectively activated so that a large amount of current is caused to flow through the fuse element until it blows open. This continues for each fuse element in the bank until the safety concern has been eliminated.

Abstract: A protecting apparatus includes a back-flow preventing Zener diode having a cathode connected directly to a control terminal of a main transistor formed on a semiconductor substrate. A protecting transistor has an output terminal connected to an anode of the back-flow preventing Zener diode and an input terminal connected to an input terminal of the main transistor. A protecting capacitor or Zener diode circuit is connected between a control terminal of the protecting transistor and the input terminal of the main transistor for allowing initial surge current, when caused based on a rapid surge, to flow into the control terminal of the protecting transistor. The protecting transistor, when turning on in response to the initial surge current, allows next surge current succeeding the initial surge current to flow into the control terminal of the main transistor via the back-flow preventing Zener diode.

Abstract: A solid state fuse type protective circuit is provided in which a series MOSFET is connected in series with the load and its voltage source and a shunt MOSFET is connected in parallel with the load. A control circuit turns the series MOSFET on and the shunt FET off under normal operation; and turns the series FET off and applies a turn on signal to the shunt FET under a fault condition. An indicator LED is connected across the series FET and turns on when the series FET turns off.

Abstract: An apparatus and method are provided for preventing buffers used to reduce delays on long lines of an IC from being damaged due to charge that collects on the buffers during manufacturing. In accordance with the present invention, a protection diode is included directly in at least each buffer that is used for this purpose, i.e., for the purpose of preventing delays on long lines of the IC. By including a protection diode in at least each buffer that is used for this purpose, the present invention obviates the need for having to use tools during the IC design process to determine a suitable location for a protection diode.

Abstract: Compatibility with a current transformer having several kinds of rated current ratios is achieved by finding out a formula of relationship between errors arising in a transformer input circuit and detectable ranges set as setting values of the input circuits which can be optimally set. In connection with that, by dispensing with a gain control section, the number of components, the mounting area and the cost can be reduced. Arithmetic expressions representing the relationship among errors arising in the transformer input circuit, the instrumentation ranges of the input circuits, and detectable errors have been derived. Further by optimally setting the detectable ranges of the input circuits, which are the parameters of the arithmetic expressions, the configuration compatible with a current transformer having several kinds of rated current ratios is achieved.

Abstract: An arc-fault detecting circuit-breaker system includes a normally closed line circuit breaker in series with a protected electrical circuit element whose current flow is to be interrupted upon the occurrence of an arc fault. A detector senses the rate of change with time of the current flow in the protected electrical circuit element. A silicon-controlled rectifier has a gate of the silicon-controlled rectifier in electrical communication with a detector output signal of the detector. The silicon-controlled rectifier shorts the current flow in the protected electrical circuit element in the event that the detector output signals that the rate of change of current with time in the protected electrical circuit element is in excess of a permitted maximum rate-of-change value, thereby activating the line circuit breaker.

Abstract: This invention is to provide a transforming system capable of satisfactorily protecting the equipment of a substation even if a aerial electric power lines is struck directly by an intense electric shock of a large energy, such as an electric shock of a waveform similar to that of a thunderbolt stroke having a long duration of wave tail. So, this invention, a transforming system comprises, a lightning arrester, a ground fault device installed near a service entrance through which the power lines are led in, a voltammeter placed on the gas-insulated switchgear, and a control device receiving a signal from the voltammeter and providing a signal for controlling the grounding device. And when detecting of said thunderbolt arising in said aerial electric power line, a control device which order said ground fault device to make the ground fault condition.

Abstract: A MOS-type power device having a drain terminal, a source terminal, and a gate terminal; and a protection circuit having a first conduction terminal connected to the gate terminal, via a diffused resistor, and a second conduction terminal connected to the source terminal. The protection circuit has a resistance variable between a first value and a second value according to the operating condition of the power device. In a first embodiment of the protection circuit, an ON-OFF switch made by means of a horizontal MOS transistor has a control terminal connected to the drain terminal of the power device. In a second embodiment of the protection circuit, the ON-OFF switch is replaced with a gradual-intervention switch made by means of a P-channel JFET transistor having a control terminal connected to the gate terminal of the power device.

Abstract: In an electrostatic protection device, a parasitic bipolar transistor has a base region. A trigger device is arranged adjacent to the parasitic bipolar transistor and injects charges generated by static electricity into the base region.

Abstract: A controller has two shunt lines connected in parallel with safety relays. For testing their switching capability, the safety relays are reversed to their idle positions and the change in voltage is monitored on their idle contacts. If voltage is missing, an error signal is issued. During the test, the parallel shunt line is closed so that the safety power line is not interrupted. Switching amplifiers having a response and action time which is a fraction of the preset response time of the safety relays control the safety relays. For testing the electrical control, the drives of the safety relays are switched to currentless and the change in voltage is monitored on the drives. If the change in voltage is inadequate, an error signal is issued. The safety relays remain in their operating positions during the test.

Abstract: Over-current protection is accomplished in an output transistor (MP) of an electronic circuit wherein an input signal (Vgatedrive) Is Applying to a first conductor (19) coupled to a gate of the output transistor to cause an output current (Iout) to flow through the output transistor and an output terminal (11) of the electronic circuit. A limit voltage (VLIMIT) who is applied to an input (21) of a voltage clamping circuit (18) to cause a clamping current to flow in the first conductor (19) as needed to prevent the magnitude of the input signal (Vgatedrive) from being less than the magnitude of the limit voltage (VLIMIT) so that the output current (Iout) is limited to a maximum current limit determined by the limit voltage (VLIMIT).

Abstract: Electrical receptacles configured to eliminate arc faults rather than merely detect such faults with attendant circuit disconnection, the invention contemplates low-cost, child-safe electrical receptacles useful in residential situations and which can be fitted within the confines of single gang enclosures. The safety receptacles of the invention can be used in all use situations including both residential and industrial applications to increase safe use of electrical receptacles in residential applications in particular and to decrease industrial liabilities. In essence, the safety receptacles of the invention prevent arcing during insertion of a plug into the receptacle, during residence of the plug in the receptacle and during removal of the plug from the receptacle with a substantial load to the receptacle.

Abstract: A semiconductor device has an internal circuit (2), a PAD, a NMOS Tr (QN) as a protective transistor formed between a node (N) on a signal line and a first power source (Vss), and a NOR gate (G1) as a logical gate connected to a gate as a control terminal of the NMOS transistor (QN). The internal circuit (2) is connected to the PAD through the signal line. The NOR gate (G1) keeps the protective transistor (QN) an OFF state during a normal operation of the internal circuit (2). In addition, the semiconductor device further includes a test circuit (21). The output from the NOR gate (G1), whose one input is the output from the test circuit (21), is supplied to the gate of the NMOS transistor (QN). The output from the test circuit (21) is thereby output to outside through the NMOS transistor (QN) and the PAD.

Abstract: An improved MOS IC is disclosed having a low standby current ESD voltage clamp for the power and ground pads. The ESD voltage clamp uses the vertical PNP transistors inherently available in CMOS device fabrication by using the P+ source drain regions as the emitter, the N+ source drains as base contacts, the N wells as bases, and the P substrate as collectors. Thus the advantages of rapid voltage spike protection may be obtained with no increase in the number of masking steps or device fabrication complexity. The vertical PNP bipolar transistors are arranged in a Darlington configuration with the last transistor in the chain having a base region connected to both a resistor charging network connected to the power supply, and a capacitive network connected to the ground potential. A PMOS transistor is attached across the emitter and base of the last bipolar transistor in the Darlington chain to reduce the voltage overshoot and regulate the charge on the capacitor network.

Abstract: A stress-driver circuit for providing a constant voltage (Vce) and a constant current (I=Vin/R) to a bipolar transistor under test. The circuit includes a power source, an op-amp, a FET, and the bipolar transistor. The power source is connected to the bipolar transistor collector. The op-amp has a positive input biased at input voltage (Vin) and a negative input having a feedback loop connected to the bipolar transistor emitter. The op-amp output is connected to the FET gate, the FET drain is connected to the power supply, and the FET source is biased to ground through a first resistor and connected to the base of the bipolar transistor. The second resistor is connected at one end to the bipolar transistor emitter and biased to ground at the other end. An automatic trip circuit may be provided to cut off power to the bipolar transistor if the current at the bipolar transistor collector exceeds a predetermined value.

Abstract: A current limiter is provided to protect a fieldbus network from electrical shorts in the wiring of the spur cables and network devices attached to the spur cables. In the event of an electrical short, the impedance of the current limiter and the spur connection increases permitting the remainder of the network to continue to function. To facilitate repairs, the current limiter includes an indicator that signals excessive current in the spur.

Abstract: A current detection switch comprising a measured conductor into which a measured current flows, a plurality of magnetoelectric devices placed sandwiching the measured conductor so as to have magneto-sensitive faces on sides to which a magneticflux generated by the measured current is input, each of the magnetoelectric devices for outputting a magnetoelectric signal when the magnetic flux exceeds a predetermined value, and a computation section for outputting a logical multiplication of the magnetoelectric signals from the plurality of magnetoelectric devices as a detection signal.

Abstract: The present invention relates to a device of protection of a monolithic component including a MOS-type vertical diffused power transistor formed of a great number of identical cells, and a measurement transistor formed of a smaller number of cells identical to those of the power transistor, the drains and the gates of all cells being common, an inductive load being connected to the source of the power transistor, a short-circuiting circuit connected between the source of the power transistor and the source of the measurement transistor, and a control circuit that turns on the short-circuiting circuit when the power transistor turns off.

Abstract: The interruption device, circuit breaker or contactor, comprises a communication module arranged in one of the locations designed for auxiliary contacts. The module is connected to the auxiliary contacts and to a communication bus to enable transmission of the states of the device to a supervision device, by means of the bus. The module can also act as interface between the bus and opening an closing control relays of the device, so as to enable remote control thereof by means of the bus.

Abstract: A system is disclosed for verifying the operativeness of a crowbar circuit which normally protects an electrical device in a series circuit with a power supply. The crowbar circuit includes means for sensing fault current in the series circuit and a crowbar switch responds to the sensing means for protecting the electrical device by directing the fault current away from the electrical device. The system includes verification testing means including a fuse and actuatable pneumatic switch connected together in series for, when said pneumatic switch is actuated, providing a short circuit across the crowbar switch to verify the operativeness of the crowbar circuit which, if not operative, causes the fault current to flow through and blow out the fuse.

Abstract: A surge suppression network for single and multiphase ac systems has a voltage clamping device connected in series with a gated crowbar device across the supply voltage in parallel with the load to be protected. A trigger circuit gates the crowbar device on in response to a specified rate of change of the supply voltage indicative of a surge. For higher levels of surge current shunting, pluralities of clamping devices and crowbar devices can be connected in parallel with a single trigger circuit simultaneously turning on all of the crowbar devices for each phase. For crowbar devices such as TRIACs with different response characteristics to positive and negative surges and for unipolar devices such as SCRs, positive and negative subnetworks are connected in anti-parallel across the load.

Abstract: An electronic module comprising a power supply conductor coupled to one or more electromechanical actuators to supply operable power to the electromechanical actuators. The electronic module also includes a moisture sensor positioned to sense moisture intrusion into the module. Further, the electronic module comprises a first transistor responsively coupled to the moisture sensor, the first transistor coupled to draw current from the power supply conductor when the first transistor is in a conductive state. In addition, the electronic module includes a second transistor responsively coupled to the first transistor and in turn controllingly coupled to the first transistor.

Abstract: A string set of series-connected incandescent bulbs adapted to being connected to a source of alternating-current operating potential and in which all of the bulb filaments in the set are individually provided with a non-avalanche shunt circuit which substantially maintains the rated voltage of the bulb across each of the bulb sockets whether or not an operative bulb occupies its respective socket and whereby the illumination of each remaining operative bulb continues to be substantially unchanged and substantially the same rated current continues to flow through said string set despite the absence of a plurality of bulbs from their respective sockets.

Abstract: The electrostatic discharge (ESD) protection device for a liquid crystal display using a chip on glass (COG) package is provided. The ESD protection device includes a plurality of gate lines and data lines each of which has an output pad at its end. A plurality of gate line input pads and data line input pads are formed opposite to the output pads of the gate lines and data lines, respectively. A common electrode is formed between the plurality of gate line input pads and output pads and between the data line input pads and output pads. A plurality of electrostatic discharge protection circuits are connected between the input pads and the common electrodes to protect the input pads from electrostatic discharge.

Abstract: An active power line compensation circuit for providing a power distribution network with a series compensation system that utilizes a transformer-coupled three-phase voltage-source inverter. A solid-state thyristor shorting ("crowbar") switch is provided on a third winding of a coupling series transformer. The transformer couples the ac output of a three-phase voltage-source inverter (VSI) to the power distribution network. The crowbar switch circuitry utilizes three diode-thyristor pairs, where each pair is connected to one phase leg of the VSI. The thyristors of the crowbar switch are each controlled by an fault output signal from an overcurrent or overvoltage sensor, that is coupled to a tertiary winding of the transformer. The fault signal closes the thyristors and thereby shunts overcurrent that would otherwise flow through the VSI. When the fault signal ceases, the thyristors automatically switch open when a null current is present in the normal three-phase line current.

Abstract: An intrinsically safe power supply unit is provided for conditioning power supplied by a power source. An input power converter connected to the power source receives current from the power source. A direct output crowbar and discrete impedance elements dissipate and limit the energy in the power supply unit that would otherwise be delivered to an external fault. In addition, the direct output crowbar extracts energy from any external storage elements. An adaptive shut down circuit distinguishes nominal load conditions including load changes from an external fault. A multistage LC power filter is used to minimize the stored energy that would be deliverable to an external fault or dissipated by the direct output crowbar and discrete impedance elements. The combination of the direct output crowbar, discrete impedance elements, adaptive shut down detection circuitry and multistage LC power filter significantly improves the level and quality of intrinsically safe power delivered by the power supply unit.

Abstract: An apparatus and method for electrical shock protection and electrical arc fault protection in an electrical distribution system. The invention consists of a current interrupting circuit that impedes electrical current flow during short time intervals in each half cycle of an AC source. If a shock hazard or electrical arc fault condition occurs during this short time interval, it results in current flow that is sensed at a load center, causing a circuit interrupter to open and preventing current flow to the distribution system for a period of time as short as one half cycle. When the fault is removed, that event is detected within one half cycle and power is restored to the load thus implementing an automatic reset. The invention is well suited for the retrofit of existing electrical distribution systems using the existing wiring.

Abstract: A protection circuit for a pnp-type output transistor includes a pnp-type monitor transistor through which a current 1/n (where n>1) times as high as the output current of the output transistor passes. A first, second, and third resistor are connected between the output electrode of the output transistor and ground. An output terminal is connected to the collector of the output transistor. A fourth and fifth resistor are connected serially between the output current of the monitor transistor and ground. When the voltage at the node between the fourth and fifth resistors exceeds a predetermined level, the conduction biases for the output and monitor transistors are reduced. When the voltage at the node between the first and second resistors drops below the voltage at the output side of the monitor transistor, the conduction biases are further reduced in accordance with the voltage difference.

Abstract: An integrated circuit breaker is provided with shunt trip capability along with automatic overcurrent protection through the circuit breaker trip unit and shunt trip module. The shunt trip module further provides auxiliary power to the trip unit and allows the trip unit microprocessor to report and record the shunt trip operation. The trip unit communicates with the circuit breaker operating mechanism to determine the ON-OFF status of the circuit breaker contacts.

Abstract: The present invention features a method and an apparatus for distributing electrical power from a power source to a distribution transformer, using at least one hot-phase conductor, a neutral conductor and an independent ground conductor. The neutral conductor is connected to the ground conductor at only one point in the distribution system, preferably at or near the power source. Normal imbalance current flows only in the neutral conductor. Return current flow in the earth is eliminated by the single point neutral-to-ground connection. Magnetic field (MF) generation in this power distribution system is thus reduced and stray voltage problems eliminated. In addition, high-impedance faults are easily detected because the only current ever flowing in the ground conductor is fault current. A method is also described for converting existing power distribution systems to the independent ground topology of the present invention.

Abstract: Power transistors, especially MOSFETs and IGBTs, must be protected adequately in the ON state against a short circuit in the load circuit, in order to avoid their destruction. Until now, the power transistor was turned off if a short-circuit current appeared by providing that its gate-to-source path, in the event of a short circuit, was short-circuited through another transistor, and the power transistor was thus turned off. However, if that readjustment of the current took place too fast, the power transistor was able to be damaged by overvoltage. That is counteracted by a voltage sensor configuration, which detects the voltage change in the load path of the power transistor and reduces the potential at the control terminal connection of the other transistor if the output voltage rises.

Abstract: A device and method for protecting a CRT screen. The device includes first and second amplifying circuits for amplifying a video signal input thereto and outputting an amplified signal; a buffer circuit for buffering the amplified signal and generating an output signal for a screen; a Vcc voltage sensing circuit for detecting a drop in a Vcc voltage during a power cut-off stage; and a transistor being turned on based on the detection and being connected at the input stage of the buffer circuit for eliminating AC and DC components of the amplified signal outputted from the second amplifying circuit so as to eliminate formation of a spot on the screen during the power cut-off stage.

Abstract: An assembly structure of a self-turn-off switching device and a snubber circuit connected in parallel with the self-turn-off switching device. The snubber circuit is composed of at least a series circuit of a snubber diode and a snubber capacitor. The assembly structure includes the self-turn-off switching device, the snubber diode and the snubber capacitor. The assembly structure also includes a conductive heat sink on which the self-turn-off switching device is mounted at a first surface thereof and the snubber diode is mounted at a first surface thereof, for cooling the self-turn-off switching device and the snubber diode and for connecting the first surfaces of the self-turn-off switching device and said snubber diode.

Abstract: Paint flow control interface circuitry for passing electrical signals across a paint booth barrier including a feedback signal indicating a paint flow parameter from a parameter transducer within the paint booth, includes passive resistive intrinsically safe barrier circuit elements coupled with buffer circuitry for minimizing the voltage drop across the interface circuitry. Light filtering of the buffer circuitry output signal with minimum filter lag yields an accurate indication of the paint flow parameter with high signal to noise ratio and minimum signal lag, for application in closed-loop paint flow control. Additional transducer voltage supply signal feedback provides for closed-loop voltage supply control across the interface circuit.

Abstract: A circuit protection arrangement comprises a series switching circuit that is intended to be connected in a line of the circuit and will switch to an open state when subjected to an overcurrent, and a shunt switching circuit that is open under normal operating conditions but will shunt the overcurrent across the load of the circuit or to ground when triggered by the series switching circuit. Preferably the series switching circuit comprises a switching transistor (4) that is controlled by a control transistor (6), and the shunt switching circuit comprises a shunt switching transistor (9) that is controlled by a shunt control transistor (11) which is itself controlled by the series switching circuit. The shunt switching circuit may be connected to ground or it may be connected to a back-up load or voltage foldback device such as a triac.

Abstract: A short-circuit-proof transistorized ignition output stage for motor vehicles, has a power transistor (10) connected in series to a primary winding (11) of an ignition coil (12), and a blocking arrangement including a first switching transistor for turning off the power transistor in the event of a very small voltage drop indicative of a short circuit in the coil (12). The voltage drop detector includes a second switching transistor (23') whose base-emitter path is connected across the primary winding (11) and whose collector-emitter path controls the base of a third switching transistor (25) of opposite conductivity type. The collector-emitter path of the third switching transistor (25) is connected in parallel to the base-emitter path of the first switching transistor (27) and the collector-emitter path of the first switching transistor is connected in parallel to the base-emitter path of the power transistor (10). Preferably, the entire output stage consists of a monolithic integrated circuit.

Abstract: An NPN transistor is added to the chip of a power integrated circuit which contains a power MOSFET and a control circuit in a common chip. The NPN transistor is coupled between the P well containing the integrated circuit components and the N type substrate of the chip and is turned on in response to the forward biasing of the body diode Of the power MOSFET. A depletion mode control MOSFET transistor is coupled, through a fault latch circuit, to the power MOSFET gate and is in series with a capacitor. The node between the power MOSFET gate and capacitor is decoupled from the N type substrate when the bipolar transistor turns on, to turn off the power MOSFET.

Abstract: A turn-on control circuit having a comparator supplied with a turn-on voltage increasing gradually during the turn-on phase of a device for protection. When the control voltage reaches a predetermined value, the comparator supplies a diagnostic enabling signal to a diagnostic stage, which, in the event an undesired condition is detected at an output of the device, supplies a clamp enabling signal to the control terminal of a clamping transistor located between the input of the circuit and ground, and which, when enabled, prevents the turn-on voltage from increasing further, and so prevents the device from being turned on.

Abstract: An electrically operated actuator stores power in a capacitor for returning the actuator output element to a preselected position upon power failure. The actuator has a controller having input power terminals connected across the capacitor and control terminals for controlling the power applied from the input power terminals to the motor which comprises the actuator's prime mover. A sensor monitors the presence of power provided to the controller's input power terminals. When failure of this power is sensed, the capacitor current flows to the controller, and the sensor applies signals to an override circuit of the controller causing the controller to apply current from the capacitor to the actuator motor in a way which drives the actuator toward the preselected position. A properly selected capacitor is capable of supplying adequate current over a period of time sufficient to return the actuator to the preselected position.

Abstract: An ESD protection circuit combines a split bipolar transistor with a transistor layout which exhibits very high tolerance to ESD events. The split bipolar transistor divides current among many segments and prevents the current hogging which often causes an ESD failure. Several splitting structures are disclosed, each combining a resistor in series with each segment to distribute current evenly. The transistor takes advantage of the snap-back effect to increase current carrying capacity. Layout positions metal contacts away from regions of highest energy dissipation. Layout also allows high currents to be dissipated through ESD protection structures and not through circuit devices such as output drivers or through parasitic bipolar transistors not designed for high current. Sharp changes in electron density are avoided by the use of high-diffusing phosphorus in N-regions implanted to both lightly and heavily doped levels. Critical corners are rounded rather than sharp.

Abstract: An embodiment of the present invention is a ballast for a high intensity discharge lamp that includes a non-automatically resetting thermal protector thermally coupled to a coil wound on a core and insulation between the coil and the core. Only one cycle is allowed into what may be a range of temperatures capable of destroying the insulation within the ballast.

Abstract: An arrangement for protecting an integrated circuit device (11) against latch up during a nuclear event comprising a capacitance (15) and a switch (17) connected in parallel across the power supply lines (13) of the device. When the power supply lines are connected to a power supply (19) the capacitance stores energy sufficient to supply necessary operating currents to the device during its normal operation. The switch is arranged so that, under a transient gamma pulse incident thereon during a nuclear event, its impedance is set to a low value at such a rate that the energy stored by the capacitance is discharged through the switch and the voltage applied to the device via the power supply lines is pulled down to such a level and at such a rate as to prevent transient gamma pulse induced latch-up in the device.

Abstract: A GFCI receptacle has a receptacle and terminals for connecting the connectors of that receptacle to an AC source, terminals for connecting the connectors of the receptacle to one or more other loads and an interrupter for disconnecting the source from the receptacle and the other loads in the event of ground current exceeding a selected level. For testing the interrupter, a manually operable supervisory circuit opens the interrupter and gives a visible indication of its operation. The supervisory circuit is connected between a hot connector of the receptacle and ground so that the visible indication will not be visible when the GFCI receptacle is installed improperly, thereby avoiding a false indication of proper installation.

Abstract: A method for measuring capacitance in a power conversion system by measuring the time rate of discharge of the capacitance means and computing the value of capacitance corresponding to the measured discharge rate and a method for verifying that a filter in the power conversion system is effective for suppressing preselected frequencies corresponding to signalling frequencies used in a transit system. In this latter form, the system periodically initiates a self-test function in which the preselected frequency is injected into the system for verifying that the system will detect signals at the preselected frequency.

Abstract: A semiconductor integrated circuit employing a separate voltage supplying system in which a first circuit block is energized through a power supply line and a second circuit block is energized through another power supply line and provided with an improved protection circuit for the first circuit block is disclosed. The improved protection circuit includes a first discharge circuit for operatively discharging abnormal electrostatic charges at a signal line connected to the first circuit block to one power supply line and a second discharge circuit for operatively discharging abnormal electrostatic charges at the signal wiring to another power supply line.

Abstract: A device for limiting the maximum and/or minimum speed of universal series- or compound-type electric motors. The device includes a first impedance element for limiting the maximum speed of the motor under light load (high speed) conditions to a predetermined value, and a second impedance element for limiting the minimum speed of the motor under high load (low speed) conditions. The limited maximum and minimum speeds of the motor give it operating characteristics which are similar to a shunt motor.

Abstract: A dynamic braking system resistor for stabilizing a power system during power system disturbances includes a braking resistor for coupling with a power system bus. A controller monitors a power system parameter, such as the speed of a generator coupled with the power system bus, and determine therefrom a thyristor control signal. The controller uses the power system parameter to establish a desired modulation and then provides a bias to the desired modulation. The controller conditions the biased desired modulation signal to provide the thyristor control signal. A thyristor valve responsive to the thyristor control signal couples the braking resistor with a ground potential. A method is also provided of damping subsequent oscillations on a power system following a power system disturbance using the dynamic braking resistor.