Impedance Insertion Patents (Class 361/58)
  • Patent number: 8289717
    Abstract: Protective containers for electronic equipment, and methods of testing and manufacture thereof, are provided. The cabinets provide a HEMP protection level to electronic equipment housed therein that meets a HEMP protection level according to MIL-STD-188-125-1.
    Type: Grant
    Filed: February 26, 2010
    Date of Patent: October 16, 2012
    Assignee: Qwest Communications International Inc.
    Inventors: Michael J. Heimann, Jennifer Edison Zatz, Stephen Sattler, Andrew Bruno
  • Patent number: 8283808
    Abstract: A switch arrangement comprises a first and a second terminal (1, 2), a first switch (3), a current sensor (10), a first and a second control circuitry (20, 30). The first switch (3) comprises a control terminal (4), a first terminal (5) which is coupled to the first terminal (1) of the switch arrangement and a second terminal (6) which is coupled to the second terminal (2) of the switch arrangement. The current sensor (10) is realized for the measurement of a load current (Iload) flowing through the first switch (3). The first control circuitry (20) is coupled to an output terminal of the current sensor (10) and to the control terminal (4) of the first switch (3). The second control circuitry (30) is coupled to the control terminal (4) of the first switch (3).
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: October 9, 2012
    Assignee: Austriamicrosystems AG
    Inventors: Pawel Chojecki, Jeffrey Smith
  • Patent number: 8264805
    Abstract: A module hot swap circuit includes a low voltage-drop rectifier adapted to receive either positive or negative voltages of different absolute values. The rectifier is coupled to a power manager that provides dual startup/shutdown voltage thresholds and inrush current limiting. A detector prevents reverse current flow allowing the module to hold up during input voltage drop-outs.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: September 11, 2012
    Assignee: Apple Inc.
    Inventor: Charles E. Norman
  • Patent number: 8253525
    Abstract: A smart link in a power delivery system includes an insulator, which electrically isolates a power line, and a switchable conductance placed in parallel with the insulator. The switchable conductance includes switchgear for sourcing, sinking, and/or dispatching real and/or reactive power on the power line to dynamically in response to dynamic loading, transient voltages and/or currents, and phase conditions or other conditions on the power line.
    Type: Grant
    Filed: October 9, 2009
    Date of Patent: August 28, 2012
    Assignee: The Invention Science Fund I, LLC
    Inventors: Roderick A. Hyde, William Gates, Jordin T. Kare, Nathan P. Myhrvold, Clarence T. Tegreene, David B. Tuckerman, Lowell L. Wood, Jr.
  • Patent number: 8233253
    Abstract: The invention discloses a controlling apparatus for a signal outputting circuit in an electronic system. The controlling apparatus includes a detecting circuit, a switch, and a controlling circuit. The detecting circuit is used for detecting whether the electronic system has an abnormal condition. The switch is electrically connected between a signal receiving terminal and the signal outputting circuit. The controlling circuit is electrically connected between the detecting circuit and the switch. Once the detecting circuit detects that the electronic system has the abnormal condition, the controlling circuit sets the switch into a high-impedance state.
    Type: Grant
    Filed: April 21, 2009
    Date of Patent: July 31, 2012
    Assignee: Raydium Semiconductor Corporation
    Inventors: Chih-Chuan Huang, Hui-Wen Miao, Ko-Yang Tso
  • Patent number: 8223467
    Abstract: An isolation device having normally off detection is provided. The isolation device having normally off detection includes a transient blocking unit (TBU) having at least one depletion mode device disposed between a pair of sense terminals, and at least one normally off transition element disposed to drive a gate of the depletion mode device in the TBU, where the normally off transition element transitions from a first resistive state to a second resistive state and one depletion mode device is connected to one sense terminal, and the normally off transition element transitions by detection of a current through the TBU. The TBU can be unidirectional or bidirectional.
    Type: Grant
    Filed: January 27, 2009
    Date of Patent: July 17, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Patent number: 8218282
    Abstract: A portable electronic device includes an audio file playing unit and a surge protector device connected to the audio file playing unit. The surge protector device includes a protector module connected to an audio file playing unit and a processor module connected to the protector module and the audio file playing unit. The processor module detects electric surges in the audio file playing unit and controls the protector module to filter the detected electric surges when the audio file playing unit plays audio files.
    Type: Grant
    Filed: November 13, 2009
    Date of Patent: July 10, 2012
    Assignee: Chi Mei Communication Systems, Inc.
    Inventor: Chia-Pin Lin
  • Patent number: 8213143
    Abstract: A circuit arrangement for protecting an electronic device from damage upon a fault. The circuit arrangement includes at least one first terminal, at least one second terminal, a first interface and a second interface, a fault detection circuit region, a fault signal processing circuit region, and a disconnection circuit region. The at least one first terminal is coupled to the at least one second terminal in a fault-free state, the fault detection circuit region is coupled to the fault signal processing circuit region, the fault signal processing circuit region is coupled to the disconnection circuit region, the disconnection circuit region is configured to disconnect at least one of the at least one first terminal and the at least one second terminal, and the fault detection circuit region, the first and second interfaces, and the disconnection circuit region are configured to be compatible with another different fault signal processing circuit region.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 3, 2012
    Assignee: DSPACE Digital Signal Processing and Control Engineering GmbH
    Inventor: Frank Beny
  • Publication number: 20120154966
    Abstract: A current limiting device (30, 40, 50, 60) comprising for each phase of an AC supply a closed magnetic core (31) of reduced volume and mass having first and second pairs of opposing limbs (32a, 32b; 33a, 33b), and at least one AC coil (35a, 35b) enclosing opposing limbs (33a, 33b) of the magnetic core (31) and adapted for series connection with a load. A non-superconducting DC bias coil (34) typically formed of copper encloses a limb (32a, 32b) of the magnetic core (31) for saturating each of the opposing limbs (33a, 33b) in opposite directions by the bias coil (34). Under fault conditions, the AC flux in at least one limb counteracts the DC bias flux, bringing the limb out of saturation. Preferably, current is reduced in the DC bias coils thus bringing both opposing limbs of the core out of saturation.
    Type: Application
    Filed: August 31, 2010
    Publication date: June 21, 2012
    Applicants: RICOR CRYOGENIC & VACUUM SYSTEMS LIMITED PARTNERSHIP, BAR ILAN RESEARCH & DEVELOPMENT COMPANY LTD.
    Inventors: Shuki Wolfus, Yossef Yeshurun, Alexander Friedman, Vladimir Rozenshtein, Zvi Bar-Haim
  • Patent number: 8169756
    Abstract: An alternating current system 10 has a primary circuit 11 which forms a primary winding 18 on a core 16. A secondary winding 24 is connected with a current source 26 or, alternatively, with an impedance 60. The core 16 is threaded by a superconducting coil 20 having a current source 22. In normal use, current in the coil 20 provides a DC bias level of flux in the core 16, and the source 26 is varied to maintain substantially constant flux, thereby minimising losses in the primary circuit 11. In fault conditions, current in the coil 20 is reduced or removed to increase voltage losses across the coil 18, thereby limiting fault current. The impedance 60 can also be switched into circuit, creating further current limiting by virtue of the transformer effect of the windings 18, 24.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: May 1, 2012
    Assignee: Rolls-Royce plc
    Inventors: Stephen M Husband, David R Trainer
  • Patent number: 8169763
    Abstract: A transient blocking unit (TBU) is a circuit having series-connected transistors that normally conduct current, but automatically switch to a high-impedance current blocking state in response to an over-current condition. Here enhancement mode devices are used in the primary TBU current path, as opposed to the conventional use of depletion mode devices in this context. This approach provides two main advantages. The first advantage is that the dependence of TBU parameters on poorly controlled depletion mode device parameters can be reduced or eliminated. The second advantage is that such TBUs can provide over-voltage protection in addition to over-current protection.
    Type: Grant
    Filed: December 18, 2009
    Date of Patent: May 1, 2012
    Assignee: Bourns, Inc.
    Inventor: Andrew J. Morrish
  • Patent number: 8154830
    Abstract: A superconducting magnet assembly comprises a superconducting magnet which, under working conditions, generates a magnetic field in a working volume. The superconducting magnet is connected in parallel with a series combination of a superconducting fault current limiter and a resistor, and with a DC power source. Under working conditions, the magnet can be energized by the power source to generate a desired magnetic field in the working volume.
    Type: Grant
    Filed: February 29, 2008
    Date of Patent: April 10, 2012
    Assignee: Siemens plc
    Inventors: Graham Gilgrass, M'Hamed Lakrimi, Adrian Mark Thomas
  • Patent number: 8139329
    Abstract: An over-voltage protection circuit for use in low power integrated circuits is provided. The over-voltage protection circuit distributes certain connection and conditioning circuitry to a component network external to the integrated circuit. As a result, the integrated circuit need not be created with specialized high voltage components, significantly reducing its cost and complexity, and allowing it to be used in a wider range of end-user applications.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: March 20, 2012
    Assignee: Linear Technology Corporation
    Inventor: Steven Martin
  • Publication number: 20120063042
    Abstract: Active current surge limiters and methods of use are disclosed. One exemplary system, among others, comprises a current limiter, including an interface configured to be connected between a power supply and a load; a disturbance sensor, configured to monitor the power supply for a disturbance during operation of the load; and an activator, configured to receive a control signal from the disturbance sensor and to activate the current limiter based on the control signal.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 15, 2012
    Applicant: Georgia Tech Research Corporation
    Inventor: Deepakraj Malhar Divan
  • Publication number: 20120063043
    Abstract: Active current surge limiters and methods of use are disclosed. One exemplary system, among others, comprises a current limiter, including an interface configured to be connected between a power supply and a load; a disturbance sensor, configured to monitor the power supply for a disturbance during operation of the load; and an activator, configured to receive a control signal from the disturbance sensor and to activate the current limiter based on the control signal.
    Type: Application
    Filed: September 12, 2011
    Publication date: March 15, 2012
    Applicant: Georgia Tech Research Corporation
    Inventor: Deepakraj Malhar Divan
  • Patent number: 8133765
    Abstract: The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form a transmission line. The metallic layers are generally already present in the integrated circuit for signal routing. The transmission line is coupled between the circuit node and a terminal of an ESD protection device, with a transmission line return conductor coupled to a high-frequency ground. The transmission line is formed with an electrical length that transforms the impedance of the ESD protection device substantially into an open circuit at the circuit node at an operational frequency of the integrated circuit. The other terminal of the ESD protection device is coupled to the high-frequency ground.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: March 13, 2012
    Assignee: Infineon Technologies AG
    Inventors: Uwe Hodel, Wolfgang Soldner
  • Publication number: 20120057262
    Abstract: A transmitter comprises a protection circuit; a first termination resistor having a first end coupled to a first voltage source, and a second end coupled to the protection circuit; a second termination resistor having a first end coupled to the first voltage source, and a second end coupled to the protection circuit, wherein the second end of the first termination resistor and the second end of the second termination resistor form a differential output pair; a current switch coupled to the protection circuit; a current source coupled to the current switch; and a pre-driver circuit coupled to the current switch, for controlling the current switch, making the differential output pair generate an output current. Wherein, the pre-driver circuit receives a second voltage source, and the first voltage source is higher than the second voltage source.
    Type: Application
    Filed: March 29, 2011
    Publication date: March 8, 2012
    Applicant: MSTAR SEMICONDUCTOR, INC.
    Inventors: Chun-Wen Yeh, Hsian-Feng Liu
  • Publication number: 20120050928
    Abstract: High voltage direct current systems are provided including one or more outlets and an electronic current limiter circuit associated with the one or more outlets. The electronic current limiter circuit is configured to limit current inrush when a connector is plugged into and/or unplugged from the one or more outlets when a direct current bus associated with the one or more outlets is energized so as not to damage the connector; and/or isolate direct current faults and/or excess current draw in a load connected to the one or more outlets so as to protect the system from shutdown.
    Type: Application
    Filed: August 30, 2011
    Publication date: March 1, 2012
    Inventor: Robert William Johnson, JR.
  • Patent number: 8125194
    Abstract: A control system of a laptop computer storage system comprises a plurality of receptacles for charging one or more laptop computer batteries. A first switch may be provided for coupling the receptacles to a power source via a current limiter having an impedance that initially limits a current inrush and then decreases with temperature. A second switch may be provided for coupling the receptacles to the power source via a low impedance path. A controller may be provided and configured to activate the first switch to limit an initial current inrush while charging energy storing components associated with the laptop computer's power supply and then activate the second switch to allow each laptop coupled to the receptacles to at least partially charge its battery.
    Type: Grant
    Filed: March 13, 2008
    Date of Patent: February 28, 2012
  • Patent number: 8112044
    Abstract: A transceiver is provided for wireless communication. The transceiver can include a bias source, a transformer including a primary side and a secondary side, and a switching device. During a receive mode, the primary side of the transformer is configured to receive a first signal from a first port. During a transmission mode, the primary side is configured to transmit a second signal from a second port. The switching device is configured to couple the first port to the bias source during transmission of the second signal and to couple the second port to the bias source during receipt of the first signal. The bias source can be, for example, ground.
    Type: Grant
    Filed: January 4, 2011
    Date of Patent: February 7, 2012
    Assignee: Broadcom Corporation
    Inventors: Bojko F. Marholev, Jesus A. Castaneda
  • Patent number: 8050878
    Abstract: A device and method for dynamically determining an impedance of a network is disclosed. The device includes at least a processing system for measuring a network voltage and network current when said network is determined to be in a first state, measuring a network voltage when said network is determined to be in a second state, estimating said impedance value dependent upon said measured voltages and current, adapting said estimated impedance based on at least one prior impedance value and storing at least said adapted impedance.
    Type: Grant
    Filed: November 13, 2008
    Date of Patent: November 1, 2011
    Assignee: General Electric Company
    Inventors: John James Dougherty, Dale Finney, Senthoor Navaratnam
  • Patent number: 8035938
    Abstract: Active current surge limiters (100) and methods of use are disclosed. One exemplary system, among others, comprises a current limiter (140), including an interface configured to be connected between a power supply (110) and a load (120); a disturbance sensor (150), configured to monitor the power supply for a disturbance during operation of the load; and an activator (160), configured to receive a control signal (215) from the disturbance sensor (150) and to activate the current limiter (140) based on the control signal.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: October 11, 2011
    Assignee: Georgia Tech Research Corporation
    Inventor: Deepakraj Malhar Divan
  • Patent number: 8009744
    Abstract: A communication system comprises a twisted pair communication link operably coupled to at least two driver stages for providing at least two independent input signals on the twisted pair communication link. The at least two independent input signals on the twisted pair communication link are summed and input to a comparator arranged to compare the summed signal to a reference value. The output of the comparator is input to the at least two driver stages. The outputs from the at least two driver stages are summed and fed back and summed with one or more of the independent input signals. In this manner, adverse effects due to non-ideal symmetry between components in a twisted pair communication link, such as a Controller Area Network system, are reduced.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: August 30, 2011
    Assignee: Freescale Semiconductor, Inc.
    Inventor: Erwan Hemon
  • Patent number: 8004806
    Abstract: A solid-state disconnect device capable of isolating and protecting circuits and equipment from overloads and undesired transients is presented. The protection device includes at least one depletion mode circuit block having three terminals (drain, gate, and source), which in its simplest form is implemented by a single n-channel depletion mode field-effect transistor, and two enhancement mode circuit blocks each having three terminals (drain, gate and source), each implemented in simplest form by a single n-channel enhancement mode field-effect transistor. The current conducting path of the first enhancement mode circuit block is connected in series with the current conducting path of the depletion mode circuit block. The drain terminal of the second enhancement mode circuit block is connected through a current limiting load to both the gate terminal of the second enhancement mode circuit block and the drain terminal of the first enhancement mode circuit block.
    Type: Grant
    Filed: May 4, 2009
    Date of Patent: August 23, 2011
    Assignee: United Silicon Carbide, Inc.
    Inventor: Xueqing Li
  • Publication number: 20110194220
    Abstract: An electronic system including an assembly with a protection clamp for discharging a portion of the incoming pulse, the un-discharged residual pulse (132) including a spike voltage (150, 202) for a first time duration (151, 203) followed by a bulk voltage (160, 302) smaller than the spike voltage for a second time duration (161, 303) greater than the first time duration; an integrated circuit device coupled with the board, the device allowing a peak current (211) at the insulator breakdown voltage (213), and including a pin protection clamp allowing a threshold current (311) at a threshold voltage (313) during the second time duration; and an isolation impedance integrated with the system for weakening the residual pulse, the impedance being the greater of a first resistor (220), determined by dividing the voltage difference between spike and insulator breakdown voltage through the peak current, and a second resistor (320), determined by dividing the voltage difference between the bulk and threshold voltage t
    Type: Application
    Filed: February 2, 2011
    Publication date: August 11, 2011
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Charvaka DUVVURY, Steve E. MARUM
  • Publication number: 20110188161
    Abstract: An electric component arrangement is described, comprising a semiconductor component (1) mounted on a varistor body (2). The varistor body is contact-connected to the semiconductor component for the protection thereof against electrostatic discharges and contains a composite material having as matrix a varistor ceramic and as filler a highly thermally conductive material being different from the varistor ceramic.
    Type: Application
    Filed: May 22, 2009
    Publication date: August 4, 2011
    Applicant: EPCOS AG
    Inventors: Thomas Feichtinger, Guenter Engel, Axel Pecina
  • Patent number: 7973365
    Abstract: The invention relates to a high-frequency integrated circuit requiring ESD protection for a circuit node. One or more metallic layer is deposited within the integrated circuit and patterned to form a transmission line. The metallic layers are generally already present in the integrated circuit for signal routing. The transmission line is coupled between the circuit node and a terminal of an ESD protection device, with a transmission line return conductor coupled to a high-frequency ground. The transmission line is formed with an electrical length that transforms the impedance of the ESD protection device substantially into an open circuit at the circuit node at an operational frequency of the integrated circuit. The other terminal of the ESD protection device is coupled to the high-frequency ground.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: July 5, 2011
    Assignee: Infineon Technologies AG
    Inventors: Uwe Hodel, Wolfgang Soldner
  • Patent number: 7974057
    Abstract: The present invention relates to an inrush current limiter device (4) for limiting inrushing current to a connectable load (3) comprising: at least one switchable IGBT-based limiter unit (5) for selectively limiting the inrushing current, having at least one current limiting conductor element for a limited leading of current and at least an IGBT-based switch (Q2), whereby the IGBT-based switch (Q2) is used as well as a controlled current limiter and as a by-pass element, and at least one control device (7) for controlling the IGBT-based switch (Q2), whereby the control device (7) comprises at least one IGBT-based switch supply (6) and means for realizing (8) a smooth flank of an output signal at the selected conductor element.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: July 5, 2011
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Wolfgang Schiene, Georg Greuel, Marc Maria Alex Bleukx
  • Patent number: 7965481
    Abstract: A high voltage tolerance circuit includes a first transistor, a second transistor, a third transistor, and a latch-up device. The first transistor and the second transistor are controlled by a control signal. The gate of the third transistor is coupled to a ground through the first transistor. The gate of the third transistor is coupled to an I/O pad through the second transistor. The third transistor is coupled between a power supply and a node. The latch-up device is coupled between the node and the I/O pad.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: June 21, 2011
    Assignee: eMemory Technology Inc.
    Inventors: Shao-Chang Huang, Wei-Yao Lin, Tsung-Mu Lai
  • Patent number: 7952385
    Abstract: The temperature dependence of an inrush current suppression circuit comprising a MOSFET having an input terminal coupled to a direct current input voltage can a transistor electrically coupled to the MOSFET can be reduced by matching the temperature coefficient of a transistor to a component electrically coupled to the transistor.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: May 31, 2011
    Assignee: Rantec Power Systems, Inc.
    Inventor: Ethan Beck Newman
  • Publication number: 20110116198
    Abstract: A conductor arrangement for a resistive switching element, has at least first and second conductor connections disposed in a mutual plane adjacent to each other and insulated against each other. The composite conductors each have two conductor parts extending parallel, and forming a bifilar construction. The conductor parts are constructed from at least one superconducting conductor band. The composite conductors are formed into a coil winding, wherein the windings thereof substantially extend in the manner of a spiral, and are insulated against each other by a spacer.
    Type: Application
    Filed: April 9, 2009
    Publication date: May 19, 2011
    Inventor: Hans-Peter Krämer
  • Patent number: 7940029
    Abstract: A system for providing reactive power compensation to a utility power network includes a switch coupled to the utility power network, and a capacitor coupled with the switch for providing a controlled amount of reactive current based on conditions of the utility power network. The system also includes a switchable power dissipation device coupled in series to the capacitor and configured to provide a preselected amount of impedance to the reactive current for a predetermined duration when a line voltage on the utility power network drops below a threshold.
    Type: Grant
    Filed: July 2, 2008
    Date of Patent: May 10, 2011
    Assignee: American Superconductor Corporation
    Inventor: Lynn Johnson
  • Patent number: 7936544
    Abstract: A power supply for a device which has a load, comprising a first resonant generator and a second resonant generator, coupled in parallel, each generator having a phase output. The power supply further comprises a control circuit coupled to the first and second generators controlling the first and second phase outputs, wherein the first phase output and the second phase output are summed to provide a variable power supply to the load.
    Type: Grant
    Filed: May 18, 2008
    Date of Patent: May 3, 2011
    Assignee: EMD Technologies Inc.
    Inventor: Robert Beland
  • Patent number: 7924543
    Abstract: A current-limiting circuit (100), which limits an electrical current from a voltage source to a consumer to a predetermined maximum current. A measuring resistor (110) is coupled into a current lead (103) between a circuit input (102) and a circuit output (104). A transistor (106) of the circuit is coupled into the current lead (103) with its collector-emitter path in series with the measuring resistor (110), and its base is connected to the current lead (103) through a series resistor (108). A shunt regulator (116) of the circuit has an anode, a reference input and a cathode, wherein the cathode is connected to the base of the transistor (106), and the anode and the reference input form a voltage tap across the measuring resistor (110).
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: April 12, 2011
    Assignee: Sartorius AG
    Inventor: Dieter Klausgrete
  • Patent number: 7890079
    Abstract: A radio frequency integrated circuit (RFIC) includes a silicon substrate, CMOS processing circuitry, and a bipolar power amplifier module. The CMOS processing circuitry is on the silicon substrate. The bipolar power amplifier module is on the silicon substrate and is operable in a 5 GHz frequency band.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: February 15, 2011
    Assignee: Broadcom Corporation
    Inventors: Arya Reza Behzad, Payman Hosseinzadeh Shanjani, Hsin-Hsing Liao, Hao Jiang
  • Patent number: 7888739
    Abstract: An electrostatic discharge circuit between a first pad and a second pad including an electrostatic discharge circuit element, including a bipolar transistor path and a resistor path, the electrostatic discharge circuit element alternately discharging an electrostatic current through the bipolar transistor path and the resistor path.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: February 15, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chan-hee Jeon, Han-gu Kim, Sung-pil Jang
  • Patent number: 7889489
    Abstract: A protective enclosure for an electronic device that has a protective shell that is capable of enclosing and substantially surrounding an electronic device, substantially rigid and substantially crush-resistant manner. POD units can be releasably connected to the protective enclosure to form an integrated unitary device that is substantially crush-resistant. The POD units can be interchangeable and connect to the protective case using the same format.
    Type: Grant
    Filed: October 15, 2008
    Date of Patent: February 15, 2011
    Assignee: Otter Products, LLC
    Inventors: Curtis R. Richardson, Alan Morine, Jamie Lee Johnson, Matthew Glanzer
  • Publication number: 20110013327
    Abstract: A smart link in a power delivery system includes an insulator, which electrically isolates a power line, and a switchable conductance placed in parallel with the insulator. The switchable conductance includes switchgear for sourcing, sinking, and/or dispatching real and/or reactive power on the power line to dynamically in response to dynamic loading, transient voltages and/or currents, and phase conditions or other conditions on the power line.
    Type: Application
    Filed: October 9, 2009
    Publication date: January 20, 2011
    Applicant: Searete LLC
    Inventors: Roderick A. Hyde, William Gates, Jordin T. Kare, Nathan P. Myhrvold, Clarence T. Tegreene, David B. Tuckerman, Lowell L. Wood, JR.
  • Patent number: 7864495
    Abstract: In a disclosed excess voltage protection circuit, when the input voltage equal to or higher than a predetermined maximum voltage is detected by an excess voltage detection circuit, a switching element is shut off so as to prevent the input voltage being output from the excess voltage protection circuit. A voltage obtained by dividing the input voltage using resistors is output from the excess voltage protection circuit.
    Type: Grant
    Filed: May 15, 2007
    Date of Patent: January 4, 2011
    Assignee: Ricoh Company, Ltd.
    Inventor: Tadayoshi Ueda
  • Publication number: 20100309590
    Abstract: A fault current limiter designed for connection into a medium voltage, high voltage, or extra-high voltage substation or other high voltage source such as a generator station, the limiter including: a ferromagnetic circuit formed from a ferromagnetic material and including at least a first limb, a second limb and a third limb; a first input phase coil wound around the first limb, a second output phase coil wound around the third limb; a saturation mechanism surrounding a limb for magnetically saturating the ferromagnetic material; a containment vessel providing a substantially uniform, low electrical conductivity medium surrounding the ferromagnetic circuit, the phase coils and the saturation mechanism.
    Type: Application
    Filed: October 30, 2008
    Publication date: December 9, 2010
    Applicant: Zenergy Power Pty Ltd.
    Inventor: Francis Anthony Darmann
  • Patent number: 7830168
    Abstract: The temperature dependence of an inrush current suppression circuit comprising a MOSFET having an input terminal coupled to a direct current input voltage can a transistor electrically coupled to the MOSFET can be reduced by matching the temperature coefficient of a transistor to a component electrically coupled to the transistor.
    Type: Grant
    Filed: February 9, 2009
    Date of Patent: November 9, 2010
    Assignee: Rantec Power Systems, Inc.
    Inventor: Ethan Beck Newman
  • Patent number: 7778000
    Abstract: An overcurrent protection arrangement for aircraft to protect an electric element from an overcurrent, the overcurrent protection arrangement including an overcurrent protection device designed for detecting the overcurrent of a current through the electric element to be protected via the overcurrent protection device in such a way that the current through the element to be protected does not exceed an upper current limit.
    Type: Grant
    Filed: March 2, 2006
    Date of Patent: August 17, 2010
    Assignee: Airbrush Deutschland GmbH
    Inventor: Sebastian Scheffler
  • Patent number: 7760067
    Abstract: According to a first aspect the present invention relates to a fault current limiter formed by a conductor tape (11, 41, 51, 61, 71) coated with a high temperature superconductor and having at least one mounting element (12, 42, 52, 62, 72) which is essentially holding the conductor tape solely on one or more edge regions in such a way that the principal surfaces of the tape cannot get in touch with the mounting element. According to a second aspect the present invention relates to a fault current limiter formed by a conductor tape coated with a high temperature superconductor and comprising at least one mounting element (23, 24) which is contacting the conductor tape on one or on both major surfaces in an electrically conducting manner such that the conductor tape (21) in its normal conducting state is electrically shunted by the mounting element (23) in the contact region.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: July 20, 2010
    Assignee: Theva Dunnschichttechnik GmbH
    Inventors: Werner Prusseit, Helmut Kinder
  • Publication number: 20100177450
    Abstract: The invention provides an electric grid stabilization metadevice including a plurality of interactive grid devices each forming part of a respective electrical path of an electric grid and each including, a variable impedance device that inserts a current limiting impedance in the respective path when a fault occurs, a state detection transducer connected to the variable impedance device to change a detection state when the fault occurs and an integral communications system having transmission and reception capabilities and being connected to the state detection transducer and variable impedance device, wherein a fault detected by each of the interactive grid devices automatically causes transmission of a signal to another integrated grid device, reception of the signal by the other integrated grid device and an insertion of a current limiting impedance by the other integrated grid device.
    Type: Application
    Filed: January 12, 2010
    Publication date: July 15, 2010
    Applicant: GRID LOGIC
    Inventors: Matthew J. Holcomb, George Caravias
  • Publication number: 20100165526
    Abstract: A positive temperature coefficient device is configured in parallel with a bypass switch and implemented at an input to a switching regulation stage of a switching power supply. A monitoring module determines that a voltage across the regulation switch in the switching power supply is below a predefined threshold voltage for greater than a predefined threshold time period. A control module controls operation of the bypass switch. The control module opens the bypass switch in response to the monitoring module determining that the voltage across the regulation switch is below the predefined threshold voltage for greater than the predefined threshold time period such that substantially all of the current entering the switching regulation stage passes through the PTC device. By causing substantially all of the current to pass through the PTC device, the device will enter a high impedance state thereby preventing smoke and smell from occurring.
    Type: Application
    Filed: December 30, 2008
    Publication date: July 1, 2010
    Applicant: International Business Machines Corporation
    Inventors: C. Charles Dishman, Jen-Ching Lin, Randhir S. Malik
  • Publication number: 20100149706
    Abstract: A removable and short-circuit-avoidable lithium battery module mainly makes use of a protective device mounted between a control circuit and any two cells. Wherein, the protective device includes a base plate and a conductive surface connecting with the cell, an output tab connecting with the control circuit, and a protective unit mounted on the conductive surface and the output tab. Whereby, the conductive surface and the output tab have larger areas to respectively link the cell and the control circuit. While connecting with electricity, the cell and the control circuit would be more accurately connected. Moreover, the protective unit would become disconnected while the cell and the control circuit are fell and collided, so as to prevent the cell and the control circuit from the inaccurate connection and destruction. The present invention also facilitates to swiftly replace the protective device while it is damaged and to contribute a convenient utility.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 17, 2010
    Applicant: STL TECHNOLOGY CO., LTD.
    Inventors: CHIEN-FANG LEE, PO-KUN CHEN
  • Publication number: 20100149707
    Abstract: A method of controlling fault currents within a utility power grid is provided. The method may include coupling a superconducting electrical path between a first and a second node within the utility power grid and coupling a non-superconducting electrical path between the first and second nodes within the utility power grid. The superconducting electrical path and the non-superconducting electrical path may be electrically connected in parallel. The superconducting electrical path may have a lower series impedance, when operated below a critical current level, than the non-superconducting electrical path. The superconducting electrical path may have a higher series impedance, when operated at or above the critical current level, than the non-superconductor electrical path.
    Type: Application
    Filed: January 25, 2010
    Publication date: June 17, 2010
    Inventors: Douglas C. Folts, James Maguire, Jie Yuan, Alexis P. Malozemoff
  • Patent number: RE42318
    Abstract: A semiconductor module is provided which includes a beat heat spreader, at least two semiconductors thermally coupled to the heat spreader, and a plurality of electrically conductive leads electrically connected to the semiconductors. At least one of the electrically conductive leads is common to both of the semiconductors. The semiconductor module also includes a termination resistor electrically coupled to at least one of the semiconductors. A method of making a semiconductor module is also taught, whereby a plurality of electrically conductive leads are provided. At least two semiconductors are electrically coupled to the plurality of electrically conductive leads, where at least one of the electrically conductive leads is common to both of the semiconductors. The semiconductors are then thermally coupled to a heat spreader. Subsequently, a termination resistor is electrically coupled to at least one of the semiconductors.
    Type: Grant
    Filed: April 4, 2006
    Date of Patent: May 3, 2011
    Assignee: Rambus Inc.
    Inventor: Belgacem Haba
  • Patent number: RE42429
    Abstract: A semiconductor module is provided which includes a beat heat spreader, at least two semiconductors thermally coupled to the heat spreader, and a plurality of electrically conductive leads electrically connected to the semiconductors. At least one of the electrically conductive leads is common to both of the semiconductors. The semiconductor module also includes a termination resistor electrically coupled to at least one of the semiconductors. A method of making a semiconductor module is also taught, whereby a plurality of electrically conductive leads are provided. At least two semiconductors are electrically coupled to the plurality of electrically conductive leads, where at least one of the electrically conductive leads is common to both of the semiconductors. The semiconductors are then thermally coupled to a heat spreader. Subsequently, a termination resistor is electrically coupled to at least one of the semiconductors.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: June 7, 2011
    Assignee: Rambus Inc.
    Inventor: Belgacem Haba
  • Patent number: RE42785
    Abstract: A semiconductor module is provided which includes a beat heat spreader, at least two semiconductors thermally coupled to the heat spreader, and a plurality of electrically conductive leads electrically connected to the semiconductors. At least one of the electrically conductive leads is common to both of the semiconductors The semiconductor module also includes a termination resistor electrically coupled to at least one of the semiconductors. A method of making a semiconductor module is also taught, whereby a plurality of electrically conductive leads are provided. At least two semiconductors are electrically coupled to the plurality of electrically conductive leads, where at least one of the electrically conductive leads is common to both of the semiconductors. The semiconductors are then thermally coupled to a heat spreader. Subsequently, a termination resistor is electrically coupled to at least one of the semiconductors.
    Type: Grant
    Filed: May 28, 2010
    Date of Patent: October 4, 2011
    Assignee: Rambus Inc.
    Inventor: Belgacem Haba