Impedance Insertion Patents (Class 361/58)
-
Patent number: 6735064Abstract: An inrush current suppressing device capable of stabilizing inrush current suppression control to improve the reliability and quality of the control. A current limiting element limits an input current flowing to a power supply circuit in accordance with an input current limit value. A current detecting section detects the input current flowing through the current limiting element and converts the current to a voltage signal, and a sloping voltage signal generating section generates a sloping voltage signal proportional to a time elapsed after the start of power supply. An input current limiting section compares the voltage signal with the sloping voltage signal, and outputs the input current limit value for suppressing the inrush current while gradually increasing the limit value with rise in the sloping voltage signal during a period in which the voltage signal is higher in level than the sloping voltage signal after the start of power supply.Type: GrantFiled: October 23, 2002Date of Patent: May 11, 2004Assignee: Fujitsu LimitedInventor: Takahiro Miyazaki
-
Patent number: 6728087Abstract: A method and apparatus for remotely operating a circuit protection device, such as a circuit breaker, to move the circuit protection device to an open condition to disconnect a load from a power source. The apparatus includes a control circuit positioned externally from the circuit protection device. The control circuit includes an impedance limiter and a switching device connected in series with each other. The impedance limiter and switching device are positioned in parallel with the load. The switching device can be remotely actuated to move between an open position and a closed position. When the switching device is in the closed position, the impedance limiter draws a supply of current through the impedance limiter. The size of the impedance limiter is selected such that the current drawn from the power source is greater than the trip current required to move the circuit protection device to the open position. Thus, the switching device can be used to remotely actuate the circuit protection device.Type: GrantFiled: August 2, 2001Date of Patent: April 27, 2004Assignee: Reliance Controls CorporationInventor: Neil A. Czarnecki
-
Patent number: 6724588Abstract: A data processing system power supply selection device. The system power supply selector circuit can include a first make-without-break power supply selector module having a power supply input, at least one controlling power supply input, and a system power rail output substantially continuously coupled to said at least a first power supply input.Type: GrantFiled: September 22, 1999Date of Patent: April 20, 2004Assignee: Dell USA L.P.Inventors: John A. Cummings, John J. Breen, III
-
Publication number: 20040070903Abstract: A first step of alternately stacking a ceramic sheet and an internal electrode with an adhesive layer between the ceramic sheet and the internal electrode to obtain a laminated body, and a second step of sintering the laminated body are provided. The adhesive layer includes a thermoplastic resin and at least one of Cr, Mg, Al, Si, a Cr compound, an Mg compound, an Al compound, an Si compound and an inorganic powder included in the ceramic sheet. This manufacturing method improves adhesion between a ceramic layer and the internal electrode after sintering and suppresses a structural defect such as delamination or a crack.Type: ApplicationFiled: July 25, 2003Publication date: April 15, 2004Inventors: Atsuo Nagai, Jun Otsuki, Hideki Kuramitsu, Keiji Kobayashi
-
Patent number: 6721156Abstract: A primary/secondary surge protector circuit for protecting telecommunications equipment from power and surge transients includes a printed circuit board and a surge protector circuit. The surge protector circuit is mounted on the printed circuit board. The printed circuit board has tip and ring conductive traces formed on its top surface. The surge protector circuit includes a voltage suppressor operatively coupled to the tip and ring conductive traces. The tip and ring conductive traces define fusible links which are opened when an excessive current is passed through so as to meet the specifications set forth by UL Standards 497 and 497A.Type: GrantFiled: January 11, 2002Date of Patent: April 13, 2004Assignee: Illinois Tool Works Inc.Inventor: Mohammad Masghati
-
Patent number: 6720625Abstract: The invention describes the fabrication and structure of an ESD protection device for integrated circuit semiconductor devices with improved ESD protection and resiliency. A vertical bipolar npn transistor forms the basis of the protection device. To handle the large current requirements of an ESD incident, the bipolar transistor has multiple base and emitter elements formed in an npn bipolar array. To assure turn-on of the multiple elements of the array the emitter fingers are continuously or contiguously connected with an unique emitter design layout. The contiguous emitter design provides an improved electrical emitter connection for the device, minimizing any unbalance that can potentially occur when using separate emitter fingers and improving the ability for the simultaneous turn on of the multiple emitter-base elements.Type: GrantFiled: October 8, 2002Date of Patent: April 13, 2004Assignee: Taiwan Semiconductor Manufacturing CompanyInventor: Ta-Lee Yu
-
Patent number: 6717784Abstract: A rush current suppression circuit is used with a power supply circuit which includes a common line and an input voltage detection circuit and supplies power from an input power supply via a switching circuit. There is provided a smoothing capacitor coupled to an output end of the power supply circuit, and a rapid discharge and delay circuit coupled to the input voltage detection circuit and carrying out a rapid discharge and a time delay and controlling the switching circuit. The switching circuit includes two FETs which are coupled in series to the common line, and the two FETs have sources which are coupled to each other and gates which are coupled to each other and driven by the rapid discharge and delay circuit.Type: GrantFiled: March 26, 2002Date of Patent: April 6, 2004Assignee: Fujitsu LimitedInventors: Tomiyasu Isago, Naoki Takahashi, Yoshinori Usui, Tatsuo Araki
-
Patent number: 6717783Abstract: The present invention provides a short circuit power limiter circuit having a current sensor and a power limiter. The short circuit sensor sends a short circuit flag signal to the power limiter when the short circuit sensor detects a short circuit condition in a target circuit. The power limiter then reduces the power consumption of the target circuit. In a specific example, the power limiter toggles a particular portion of the target circuit on and off to reduce the circuit's average short circuit power consumption. This cycle is repeated as long as a short circuit condition exists.Type: GrantFiled: January 9, 2001Date of Patent: April 6, 2004Assignee: Exar CorporationInventors: Robert Alan Brannen, Bahram Fotouhi
-
Patent number: 6714393Abstract: Transient suppression apparatus, which is coupleable in series with an electrical pathway into a potentially explosive environment for limiting current, voltage and energy thereto, comprises: an impedance element coupleable in series with the electrical pathway to conduct current to the potentially explosive environment; at least one first semiconductor element and at least one second semiconductor element coupled in series with the impedance element upstream and downstream of the impedance element, respectively. Both of the first and second semiconductor elements operative to impose a series resistance to the current of the electrical pathway governed by the voltage potential across the impedance element.Type: GrantFiled: January 7, 2002Date of Patent: March 30, 2004Assignee: Simmonds Precision Products, Inc.Inventor: Thomas Joseph Nostrand
-
Patent number: 6707654Abstract: A protection device arranged on an electric current path between a load unit including a stabilized power supply unit and a DC power supply, includes: a switching unit including an FET having a source terminal and a drain terminal arranged on an electric current path between the DC power supply and the load unit; and an input end to which a voltage generated by the stabilized power supply circuit in the load unit as a control voltage, the control voltage being capable of turning on the FET in a case of forward connection in which a positive input terminal of the load unit is connected to an anode of the DC power supply and a negative input terminal of the load unit is connected to a cathode of the DC power supply, and turning off the FET in a case of reversed connection in which the positive input terminal of the load unit is connected to the cathode of the DC power supply and the negative input terminal of the load unit is connected to the anode of the DC power supply, wherein the control voltage is appliedType: GrantFiled: April 1, 2002Date of Patent: March 16, 2004Assignee: Koito Manufacturing Co., Ltd.Inventors: Masayasu Ito, Hitoshi Takeda
-
Patent number: 6707653Abstract: An electrostatic discharge (ESD) protection circuit includes an MOS transistor acting as a trigger for the circuit. A drain region of the MOS transistor is formed by an N-type heavily doped impurity region which overlaps an N-type well region. Further, a P-type heavily doped impurity region is formed in the N-type well region. The N-type and P-type heavily doped impurity regions are electrically connected to an input/output pad. The ESD protection circuit exhibits a reduced input capacitance at the pad, and a reduced breakdown voltage of the MOS transistor.Type: GrantFiled: September 23, 2002Date of Patent: March 16, 2004Assignee: Samsung Electronics Co., Ltd.Inventors: Dong-Jin Lee, Ki-Whan Song
-
Patent number: 6704179Abstract: A computerized method for designing electrostatic discharge (ESD) protection circuits uses a hierarchical system of parametrized cells (p-cells) which are constructed into higher level ESD networks. Lowest order p-cells pass user defined parameters to higher order p-cells to form an ESD protection circuit meeting the design criteria. Ones of the p-cells are “growable” such that they can form repetition groups of the underlying p-cell element to accommodate the design parameters. This allows for change of circuit topology as well as structure size in an automated fashion. Layout and circuit schematics are auto-generated with the user varying the number of elements in the circuit by adjusting the input parameters. The circuit topology automation allows for the customer to autogenerate new ESD circuits and ESD power clamps without additional design work. Interconnects and wiring between the circuit elements are also autogenerated.Type: GrantFiled: March 7, 2002Date of Patent: March 9, 2004Assignee: International Business Machines CorporationInventor: Steven H. Voldman
-
Patent number: 6700164Abstract: In order to divert damaging currents into an electrostatic discharge (ESD) protection device during an ESD event, a tungsten wire resistor is incorporated into a current path connected in parallel with the ESD protection circuitry. The tungsten wire resistor has linear current-voltage (IV) characteristics at low currents, and non-linear IV characteristics at high current levels. The width and length of the resistor is chosen so that the resistor experiences significant self-heating caused by the higher currents generated by the ESD event. At a higher current level, the resistor becomes hot and its resistance increases dramatically. As a result the voltage drop across it increases thus diverting excess current into the parallel connected ESD protection circuitry. This limits the current through the resistor and thereby protects circuit elements in series with the resistor.Type: GrantFiled: July 7, 2000Date of Patent: March 2, 2004Assignee: International Business Machines CorporationInventors: Ciaran J. Brennan, Kevin A. Duncan, William R. Tonti, Steven H. Voldman
-
Patent number: 6700768Abstract: The invention relates to a cost effective protective device for safeguarding an electrical device against overcurrent. The preferred exemplary embodiment is a conductor track fuse that is arranged in a hollow body. According to the invention, the hollow body has an opening that specifically allows metal vapor to escape upon tripping of the fuse. This prevents the production of an electric arc.Type: GrantFiled: October 17, 2002Date of Patent: March 2, 2004Assignee: Patent-Treuhand-Gesellschaft fur elektrische Gluhlampen mbHInventor: Horst Werni
-
Patent number: 6700763Abstract: A microcircuit includes core and other portions, which receive different supply voltages from disparate sources. An electrostatic discharge protection (ESD) circuit internally connects the lower and higher voltage terminals together with a diode, poled so that the diode conducts if the nominally lower voltage supply exceeds the higher voltage supply. If the high voltage supply fails or even drops below the value of the low voltage supply, the diode conducts, and current is drawn in an amount which may overheat the microcircuit. A shut-down circuit is provided for sensing the voltage of the higher-voltage source, and shutting down the lower-voltage source any time the higher-voltage source drops below either the actual voltage or nominal voltage of the lower value source.Type: GrantFiled: January 24, 2003Date of Patent: March 2, 2004Assignee: Thomson Licensing S.A.Inventor: William John Testin
-
Patent number: 6696708Abstract: The present invention reveals an electrostatic discharge protection apparatus including a silicon controlled rectifier, a triggering voltage adapter network and a holding voltage adapter network. Additionally, the triggering voltage adapter network and the holding voltage adapter network are coupled to the silicon controlled rectifier. The present invention can change the characteristic of current vs. voltage by adjusting the triggering voltage and the holding voltage of the silicon controlled rectifier to meet the special requirement of various chips, and effectively prevent the chips from being damaged caused by the electrostatic discharging.Type: GrantFiled: August 5, 2002Date of Patent: February 24, 2004Assignee: Winbond Electronics Corp.Inventors: Chien-Ti Hou, Fu-Chien Chiu, Wei-Fan Chen
-
Patent number: 6697248Abstract: The invention teaches improved materials and processes for production of structures to shield against ingress of egress of electromagnetic radiation. The structures and processes taught are based on the recognition and use of directly electroplateable resins. The directly electroplateable resins are combined with electrodeposited metal-based coatings to result in uniquely suitable structures to achieve radiation shielding. Fabrication and compositional flexibility of directly electroplateable resins and low cost material possibilities contribute to the unique suitability of directly electroplateable resins in the production of improved electromagnetic radiation shields.Type: GrantFiled: February 6, 2001Date of Patent: February 24, 2004Inventor: Daniel Luch
-
Publication number: 20040032700Abstract: A base bias circuit (1) operates like a constant voltage source, and a base bias voltage generated thereby varies according to fluctuation of the environment temperature without being influenced by the supply voltage, to hold a collector bias voltage constant. The base bias circuit (1) has a function of controlling the base bias voltage according to a control signal coming from the outside. By using a resistor (6) and resistor (14) having suitable resistances, the bipolar transistors constituting the bias circuit (1) can be small in size to reduce the electric current consumed by the bias circuit (1) thereby to make unnecessary the RF choke inductor between a power transistor (13) and the bias circuit (1). In short, the cost is lowered by making the chip size small and by reducing the number of external parts.Type: ApplicationFiled: July 9, 2003Publication date: February 19, 2004Inventors: Noriaki Matsuno, Tomohisa Hirayama
-
Publication number: 20040027746Abstract: An electrical contact system (11) comprising an electrically conductive porous fleece (12) and one or more electrical contacts (13) is provided. The electrical contacts (13) are applied on the electrically conductive porous fleece (12) by means of a coating technique.Type: ApplicationFiled: May 8, 2003Publication date: February 12, 2004Inventors: Geert Devooght, Willy Marrecau, Koen Wastijn
-
Patent number: 6690558Abstract: A high power resistor device and method for making a high power resistor device. A resistor is formed on a first end of a fired, ceramic chip with multiple internal conductor electrodes, and end terminations are then applied to both ends of the chip. A power resistor device having a high power rating is thus provided having buried conductor electrodes electrically connected to end terminations, where the connection at the first end is through the resistor to form a power resistor structured to dissipate heat efficiently. In an alternative method of the present invention, both ends of the chip may be dipped in resistor paste to form resistors on both ends of the chip. In yet another alternative method of the present invention, a conductor under-layer is formed under the resistor, such as by first dipping the end of the chip in a conductor paste and firing the chip.Type: GrantFiled: January 14, 2002Date of Patent: February 10, 2004Inventors: Alan Devoe, Daniel Devoe
-
Publication number: 20040022000Abstract: The invention relates to an electronic assembly, in particular for low power consumption electric switching devices such as low power contactors, time relays or the like. In order to provide protection against input current pulses, an ohmic resistor (6) is provided in the form of a resistive layer that is applied by pressing.Type: ApplicationFiled: February 26, 2003Publication date: February 5, 2004Inventor: Gerd Schmitz
-
Patent number: 6687108Abstract: The present invention relates to a universal multi-functional common conductive shield structure plus two electrically opposing differential energy pathways which in part uses a electrode shielding architecture with stacked conductive hierarchy progression comprising circuitry for energies propagating simultaneous along paired and electrically differential pathways that utilize bypass or feed-thru energy propagation modes. The invention, when energized, will allow both the outer partially shielded paired differential conductive energy pathway electrodes, as well as the contained and oppositely paired differential conductive energy pathway electrodes to function with respect to one another, in complementary, yet in an electrically opposite manner, respectively.Type: GrantFiled: February 5, 2001Date of Patent: February 3, 2004Assignee: X2Y Attenuators, LLCInventors: William M. Anthony, Anthony A. Anthony
-
Patent number: 6680834Abstract: A high precision, high efficiency controller for LED devices such as LED arrays includes a current limiter, driver and buffer.Type: GrantFiled: April 12, 2001Date of Patent: January 20, 2004Assignee: Honeywell International Inc.Inventor: Marion S. Williams
-
Patent number: 6674623Abstract: In a microcomputer equipped with a built-in temperature sensor, diodes as a temperature sensor are incorporated in a pair of circuit blocks, respectively, and placed in opposite polarity connection to each other. When detecting a temperature of the microcomputer, a constant current If is supplied to the diodes through terminals commonly connected to both the diodes. A voltage Vf generated at each diode is read through terminals located at more adjacent nodes to the diode when compared in position with the terminals.Type: GrantFiled: May 24, 2000Date of Patent: January 6, 2004Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Toshihiro Abe, Shintaro Mori, Fumihiko Terayama, Masahiro Kitamura, Seiichi Yamazaki, Yasuo Moriguchi
-
Patent number: 6671159Abstract: A compact gas-expansion-type power source breaker by which a power supply circuit can be forcedly and surely isolated only in case of abnormalities such as short-circuiting of a wire harness or collision of road vehicles is provided. A lock 18 for constraining movement of a shaft 16 is set in a locked state by means of pushing force for constraining the movement of the shaft 16 forcedly provided by a reset spring 19 on one hand, and is connected via a lock operation plate 20 with a piston 21 for forcedly providing a reverse pushing force beyond the pushing force of the reset spring 19 sublimation of a gaseous actuating reagent 23 contained in a igniter 22 on the other hand.Type: GrantFiled: February 9, 2001Date of Patent: December 30, 2003Assignee: Yazaki CorporationInventors: Goro Nakamura, Takahiro Sato
-
Patent number: 6667867Abstract: In an ESD protection circuit for an analog bipolar circuit, the avalanche breakdown voltage of a BJT acting as an avalanche diode is reduced by injecting current into the base of the BJT. This is achieved through the use of a capacitor connected between Vdd and the base of the avalanche BJT to speed up the switching of the protection circuit.Type: GrantFiled: January 23, 2001Date of Patent: December 23, 2003Assignee: National Semiconductor Corp.Inventors: Vladislav Vashchenko, Peter J. Hopper
-
Patent number: 6667871Abstract: An electrical device includes a housing with first and second portions. Each of the first and second portions has a first insulative layer and a second conductive layer. The first and second layers define an inner cavity. The second portion has opposing first and second lateral sides with the first layer defining a first thickness at the first lateral side and a second thickness at the second lateral side. An electrically conductive member is received within the inner cavity in the first portion. At least one electrical component is received within the inner cavity at the second portion. A weak section is defined by the first thickness at the first lateral side being substantially less than the second thickness at the second lateral side diametrically opposite it at given points along a longitudinal axis of the second portion.Type: GrantFiled: February 16, 2001Date of Patent: December 23, 2003Assignee: Hubbell IncorporatedInventors: Viorel Berlovan, Glen A. Weis
-
Publication number: 20030227727Abstract: A method for isolating suites includes the steps of isolating the suites when an alarm is initiated, setting a timer during isolation creating a window of time to clear a short circuit, clearing said short circuit, removing isolation from the suites as the timer reaches completion, determining if there is a short circuit in each of the suites, and isolating suites that have a short circuit.Type: ApplicationFiled: June 11, 2002Publication date: December 11, 2003Applicant: Edwards Systems Technology, Inc.Inventor: Peter Galgay
-
Patent number: 6657841Abstract: A circuit arrangement for overvoltage protection of a power transistor for controlling an inductive load includes a first varistor which bridges-over the supply connections. A second varistor is arranged parallel in relation to the switching path of the power transistor and in series with a switching transistor. The switching transistor can be controlled by a voltage divider which is connected to the supply voltage via a Zener diode.Type: GrantFiled: March 1, 2002Date of Patent: December 2, 2003Assignee: Moeller GmbHInventors: Wilhelm Melchert, Gerd Schmitz
-
Patent number: 6650525Abstract: The present invention is a surface mount component carrier comprised of a disk of insulating material having at least two apertures. The disk is substantially covered by a metalized ground surface and includes at least two conductive pads surrounding the apertures, and insulating bands which surround each conductive pad. The insulating bands separate and electrically isolates the conductive pads from the metalized ground surface. A surface mount component, such as a differential and common mode filter, is positioned lengthwise between the two conductive pads and operably coupled to the carrier. Once the surface mount component is coupled to the carrier, the combination can be manipulated, either manually or through various types of automated equipment, without subjecting the surface mount component to mechanical and physical stresses normally associated with the handling of miniature components.Type: GrantFiled: August 31, 2001Date of Patent: November 18, 2003Assignee: X2Y Attenuators, LLCInventor: Anthony A. Anthony
-
Patent number: 6650518Abstract: In a production system included in a power modulator for the protection of a load connected to the power modulator, comprising a charging system, a power impulse former, a control arrangement and a pulse transformer with a first protection circuit in the form of a crowbar circuit connected to the input side and the load connected to the output side of the pulse transformer, a second protection circuit is connected to the output side of the pulse transformer between the low potential and the ground potential connections thereof wherein the second protection circuit includes a controlled switch with a resistor arranged in parallel therewith.Type: GrantFiled: April 12, 2001Date of Patent: November 18, 2003Assignee: Forschungszentrum Karlsruke GmbHInventors: Grigory Kuperman, Klaus-Peter Jüngst
-
Patent number: 6650519Abstract: A method and apparatus for protecting a thin film sensor such as a magnetoresistive head from damaging electrical transients, such as electrostatic discharge. A thin film sensor assembly includes a thin film sensor in electrical contact with a first and a second electrical contact. A shunting structure is deposited between and in electrical communication with the first and second electrical contacts such that the shunting structure as deposited is a high resistance path between the first and second electrical contacts and does not electrically short the first and second electrical contacts. Heat treating the shunting structure then forms a low resistance path between the first and second electrical contacts to provide protection of the sensor from electrostatic discharge.Type: GrantFiled: August 17, 2000Date of Patent: November 18, 2003Assignee: Seagate Technology LLCInventors: Brian William Karr, Lance Eugene Stover, Michael Berry Hintz
-
Patent number: 6650104Abstract: A device for detecting impedance disturbance points in symmetrical data transmission lines includes an evaluation unit having at least two magnetosensitive elements. One of these elements is positioned in the proximity of the first conductor strand and a second one is positioned in the proximity of the second conductor strand. The evaluation unit contains furthermore an evaluation circuit which is connected to the magnetosensitive elements and supplies at an output terminal a fault signal which provides information on impedance disturbance points in the data transmission lines.Type: GrantFiled: September 7, 2001Date of Patent: November 18, 2003Assignee: Siemens AktiengesellschaftInventor: Werner Schirl
-
Patent number: 6646842Abstract: An inrush current suppression circuit is installed between a DC voltage and a load with a parallel system capacitor. The inrush current suppression circuit includes a first current limiting circuit which includes a first resistor, a first controlled switch, and a second controlled switch. The inrush current suppression circuit further includes a second current limiting circuit which further includes a second resistor, a third controlled switch, and an energy-storing capacitor. The second current limiting circuit is electrically connected in parallel to the system capacitor, and the first current limiting circuit is electrically connected with the DC voltage and the second current limiting circuit. When the DC voltage is detected, the first controlled switch is conducted. When a voltage of two ends of the load reaches a first threshold value, the second controlled switch is conducted so as to bypass the first resistor.Type: GrantFiled: March 14, 2002Date of Patent: November 11, 2003Assignee: Delta Electronics, Inc.Inventors: Kuang-Hua Pan, Chih-Ming Hsu
-
Patent number: 6643111Abstract: To detect a fault state due to a line break in power supply lines on the receiving side during the operation of a transducer device, the transducer output voltage is forced to an extreme voltage range by a co-integrated p-channel-depletion-transistor. As a result, the signal detection device can reliably detect the presence of the fault state due to a line break in the supply feed lines.Type: GrantFiled: July 15, 2000Date of Patent: November 4, 2003Assignee: Micronas GmbHInventors: Mario Motz, Ulrich Theus
-
Patent number: 6639768Abstract: Tripping of a circuit breaker by an arc fault detector is blocked by a disable circuit upon detection of a transient associated with cold turn-on of an incandescent bulb powered by a dimmer. The peak value of pulses generated by the bandpass filter of the arc detector in response to step increases in the ac current is decayed approximately exponentially. The amplitude of each pulse is compared with upper and lower percentage limits of the decaying peak value. If the amplitudes of the pulses remain below the upper threshold for about 3 to 4 half cycles and exceed the lower threshold each half cycle, a dimmer transient is identified and logic is set to block generation of a false arc signal.Type: GrantFiled: December 20, 2001Date of Patent: October 28, 2003Assignee: Eaton CorporationInventors: Joseph C. Zuercher, Steven Christopher Schmalz
-
Patent number: 6639773Abstract: A current limiting circuit to limit current including an input circuit to input an input voltage, a connecting circuit to connect the input voltage to a current, and a current limiting circuit controlled by a constant voltage to limit said current.Type: GrantFiled: November 21, 2001Date of Patent: October 28, 2003Assignee: Texas Instruments IncorporatedInventor: Hajime Andoh
-
Patent number: 6635930Abstract: A protective circuit for limiting a voltage at a pad of an integrated circuit includes a threshold selector connected between the pad and ground. The input voltage to the threshold selector is the pad voltage. The threshold detector includes a first transistor where load path is connected to the pad. The central terminal of the first transistor is maintained at a threshold voltage derived from the pad voltage. A second transistor has its control terminal connected to a second terminal of the load path of the first transistor. The load path of this second transistor is connected between the pad and ground.Type: GrantFiled: April 30, 2001Date of Patent: October 21, 2003Assignee: Infineon Technologies AGInventors: Joerg Hauptmann, Alexander Kahl
-
Patent number: 6636401Abstract: A bus assembly for a network protector, where the network protector includes a housing, and where the bus assembly includes a plurality of busses having laminations and a rack assembly. The plurality of busses are mounted in the rack assembly and the rack assembly is coupled to the housing.Type: GrantFiled: May 26, 2000Date of Patent: October 21, 2003Assignee: Eaton CorporationInventors: Steven E. Meiners, Douglas M. Brandt, Michael F. Magazine
-
Patent number: 6636407Abstract: A surge protector includes a coaxial through-section having a first inner conductor and a first outer conductor and a stub having a second inner conductor and a second outer conductor. The stub has a first end and a second end, the stub being coupled to the coaxial through-section, wherein the second inner conductor is conductively coupled to the first inner conductor at the first end of the stub and the second outer conductor is conductively coupled to the first outer conductor at the first end of the stub. The second inner conductor is substantially hollow and has at least one helical aperture disposed therein. A charge elimination device is conductively coupled between the second inner conductor and a grounding device. A radio frequency short circuit bypass is electrically coupled between the second inner conductor and the second outer conductor.Type: GrantFiled: September 13, 2000Date of Patent: October 21, 2003Assignee: Andrew CorporationInventor: Henry G. Ryman
-
Patent number: 6633473Abstract: The present invention relates to a technique of limiting an overcurrent of a power semiconductor element (1) such as an IGBT. In a background art overcurrent protection circuit (10P), when an emitter current (i) and a current sense current (is) do not show the same behavior even in a transient state, the current sense current tends to momentarily increase at a turnoff, and in such a case, the energizing capability of a MOSFET (2P) in the overcurrent protection circuit increases and the turnoff speed of an IGBT (1P) becomes much faster than necessary and as a result, a surge voltage disadvantageously increases. Then, in the present invention, a diode (5) having a forward voltage set not lower than a threshold voltage of the MOSFET (2) is so provided as a voltage clamping circuit (4) between a gate electrode (2G) and a source electrode (2S) as to be biased in the forward direction in an overcurrent protection circuit (10) of an IGBT (1).Type: GrantFiled: April 25, 2001Date of Patent: October 14, 2003Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Yoshifumi Tomomatsu
-
Patent number: 6633470Abstract: A clamping MOS transistor-based overvoltage protection circuit is provided for a bidirectional transmission gate FET coupled between input and output ports. When the voltage applied to the input port exceeds the supply voltage by a MOS gate threshold, the clamping MOS transistor is turned on, pulling the voltage applied to the gate of the transmission gate FET very close to the applied overvoltage level by a voltage differential less than a diode drop. This reduction in Vgs of the transmission gate FET reduces its source-to-drain current, as the device operates deeper in a sub-threshold region, increasing the overvoltage rating for the same leakage current specification. In a second embodiment, a clamping MOS device is coupled on either side of the source-drain path of the transmission gate's FET device.Type: GrantFiled: December 19, 2000Date of Patent: October 14, 2003Assignee: Intersil Americas Inc.Inventors: Kent Aaron Ponton, James Winthrop Swonger
-
Patent number: 6631062Abstract: An electrically conductive ceramics comprises a compound containing at least one element belonging to the Group 3A of the periodic table and TiO2−x (0<x<2) in a range such that the TiO2−x (0<x<2) accounts for 1 to 60 wt % of the total amount of the ceramics, and at least part of the compound and the TiO2−x form a composite oxide.Type: GrantFiled: December 6, 1999Date of Patent: October 7, 2003Assignees: Nihon Ceratec Co., Ltd., Taiheiyo Cement CorporationInventors: Kazuyoshi Minamisawa, Hiroyuki Matsuo, Sari Endoh, Yukio Kishi, Kazunori Saitoh, Hiroshi Suzuki, Motohiro Umezu, Mamoru Ishii, Hironori Ishida, Youichi Shirakawa, Norikazu Sashida
-
Patent number: 6624993Abstract: A fault current limiting system for direct current circuits and for pulsed power circuit. In the circuits, a current source biases a diode that is in series with the circuits' transmission line. If fault current in a circuit exceeds current from the current source biasing the diode open, the diode will cease conducting and route the fault current through the current source and an inductor. This limits the rate of rise and the peak value of the fault current.Type: GrantFiled: November 22, 2000Date of Patent: September 23, 2003Assignee: The Regents of the University of CaliforniaInventors: Heinrich J. Boenig, Josef B. Schillig
-
Patent number: 6624992Abstract: An arrangement for protecting an element from electro-static discharge. A switch is provided to inhibit the flow of energy through the element in response to the control signal. In the illustrative embodiment, the switch is a transistor switch. A resistor is disposed between an input terminal of the transistor and the positive supply to keep the transistor on during normal operation. A capacitor is disposed between the input terminal of the transistor and ground to prevent the input voltage of the transistor from fast changing. The RC time constant is chosen to be much larger than the time constant of the ESD pulse. Consequently, input voltage of the transistor will remain unchanged near ØV and the transistor will remain off during ESD event preventing the element from conducting the discharge current and providing ESD protection.Type: GrantFiled: October 6, 2000Date of Patent: September 23, 2003Assignee: Qualcomm, IncorporatedInventor: Vladimir Aparin
-
Patent number: 6621260Abstract: One embodiment of the present invention concerns an integrated circuit that includes bond pads and special contact pads or points. The bond pads are for interfacing the integrated circuit as a whole with an external circuit, and are to be bonded to a package or circuit board. The bond pads are disposed on the die in a predetermined alignment such as a peripheral, grid, or lead-on-center alignment. The special contact pads are used to provide external test patterns to internal circuits and/or to externally monitor results from testing the internal circuits. The special contact pads may be advantageously located on the integrated circuit with a high degree of positional freedom. For one embodiment, the special contact pads may be disposed on the die at a location that is not in the same alignment as the bond pads. The special contact pads may be smaller than the bond pads so as not to increase the die size due to the special contact pads.Type: GrantFiled: December 29, 2000Date of Patent: September 16, 2003Assignee: FormFactor, Inc.Inventors: Benjamin N. Eldridge, Igor Y. Khandros, David V. Pedersen, Ralph G. Whitten
-
Patent number: 6621677Abstract: A method for protection of an electrical installation against series fault. The method is directed to detection of heat development at specific points in the installation by means of individual sensor/switch units connected to the installation and interruption of the current supply to the installation when the heat development exceeds a given threshold. The invention also concerns a system for implementing the method.Type: GrantFiled: September 13, 2000Date of Patent: September 16, 2003Assignee: Sicom ASInventor: Aage Amundsen
-
Patent number: 6621674Abstract: What is described here is a power supply unit for plasma systems such as plasma processing or coating devices, wherein electric arcs or disruptive breakdown may occur, which originate from an electrode in particular, comprising a d.c. voltage or direct-current source whose output terminals are connected via an inductive resistor and a power switch to the electrodes of the plasma system, and possibly a circuit for detecting electric arcs or disruptive breakdown, that operates the switch upon occurrence of an electric arc or disruptive breakdown, in such a way that electrical energy producing a plasma will no longer be applied to the electrodes. The invention is characterised by the provisions that the inductive resistor(s) is (are) each connected to a recovery diode and that the switch is a series switch.Type: GrantFiled: April 10, 2001Date of Patent: September 16, 2003Assignee: Hüttinger Elektronik GmbH & Co. KGInventors: Gerhard Zahringer, Peter Wiedfmuth, Thomas Rettich
-
Publication number: 20030169547Abstract: This invention separates input electrical power, typically a public power grid, from output electrical power, typically for use by electrically sensitive equipment, by converting the electrical energy into mechanical energy, transferring that mechanical energy, by way of a non-conductive transfer medium, through a non-conductive conduit, to a protected system that converts the mechanical energy back into useable and protected electrical power.Type: ApplicationFiled: March 11, 2002Publication date: September 11, 2003Inventor: Walter William Stumberger
-
Patent number: 6614634Abstract: The invention relates to a field bus arrangement with a field bus distributor (11) for mounting in the area (1) at risk of explosion, for feeding a plurality of field devices (121 to 12n), arranged in the area (1) at risk of explosion, via intrinsically safe electric circuits (13) from at least one high-energy voltage source (21) arranged in the area (2) not at risk of explosion. For this purpose, in the area (2) not at risk of explosion, a field bus coupler (22) arranged in the area (2) not at risk of an explosion and having three electric circuits which are DC-isolated from one another is provided.Type: GrantFiled: November 16, 2000Date of Patent: September 2, 2003Assignee: ABB Patent GmbHInventors: Peter Westerfeld, Gunter Von Zur Gathen