For Lead Frame Patents (Class 361/723)
  • Patent number: 11532534
    Abstract: A semiconductor module includes a power element, a signal wiring, and a heat sink. The signal wiring is connected to a signal pad of the power element. The heat sink cools the power element. The power element has an active area provided by a portion where the signal pad is formed. The signal pad is thermally connected to the heat sink via the signal wiring.
    Type: Grant
    Filed: February 10, 2021
    Date of Patent: December 20, 2022
    Assignee: DENSO CORPORATION
    Inventors: Yoshitaka Kato, Takeshi Endo
  • Patent number: 11342260
    Abstract: A power flat no-lead (FN) package is provided. The power FN package includes a die paddle; a die, disposed on the die paddle, operating at a radio frequency; a first lead, disposed by a first side of the die paddle, configured to receive an input signal of the power FN package; and a capacitor, disposed on the first lead; wherein a lead width of the first lead is greater than a half of a first side length of the first side.
    Type: Grant
    Filed: October 15, 2019
    Date of Patent: May 24, 2022
    Assignee: WIN Semiconductors Corp.
    Inventors: Chih-Wen Huang, Jui-Chieh Chiu
  • Patent number: 10032824
    Abstract: The present invention discloses a CMOS image sensor structure and packaging method thereof. The method includes the following steps: providing an image sensor chip and a transparent package substrate that is ground and cut, the front side of the image sensor chip being provided with an image sensing region and a pad region surrounding the image sensing region; bonding a first end of a metal wire onto the pad, the other end being suspended outside the image sensor chip; bonding the transparent package substrate and the image sensor chip having the metal wire to form an image sensor package, which can be assembled by surface mount technology (SMT) or pressure welding via the exposed and suspended metal wire. In the present invention, an auxiliary substrate is optionally used and an optical glass is directly fixed to the image sensor chip, and the image sensor chip is directly connected to a circuit board.
    Type: Grant
    Filed: May 4, 2015
    Date of Patent: July 24, 2018
    Assignee: GALAXYCORE SHANGHAI LIMITED CORPORATION
    Inventors: Hui Deng, Lixin Zhao
  • Patent number: 9701335
    Abstract: An electronic control unit includes a casing and a cover which are mutually bonded. A drive circuit board which drives a motor unit is fixed to the cover and, on the other hand, a control circuit board which controls the drive circuit board is fixed to the casing. An electrical connector which supplies an electric power to each board and a motor unit is attached on an opening section of the casing. First power supply terminals of this electrical connector and the motor unit and second power supply terminals of the drive circuit board are directly electrically connected by a bonding of both of casing and the cover.
    Type: Grant
    Filed: August 20, 2014
    Date of Patent: July 11, 2017
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventor: Katsumasa Hagiwara
  • Patent number: 9590328
    Abstract: A peg press-fitting structure for a connector includes a peg which is made from a metal plate to fix a housing of the connector to a circuit board, and which is attached to the housing by being press-fitted from the distal end of the peg into a peg attaching slot of the housing of the connector. The housing is provided with an end wall where an entrance of the peg attaching slot opens. A press-fitting position regulating projection, which regulates the press-fitting position of the peg by abutting against the end wall of the housing where the entrance of the peg attaching slot opens, is provided closer to the base end of the peg than a press-fitted portion of the peg that is press-fitted into the peg attaching slot.
    Type: Grant
    Filed: August 13, 2015
    Date of Patent: March 7, 2017
    Assignee: Yazaki Corporation
    Inventors: Kaoru Sawairi, Keiji Hamada
  • Patent number: 9350096
    Abstract: A contact member establishes an electrical contact between a substrate and a first device. The contact member includes: a base extending substantially along a plane (P) and having a first surface that can be fixed on to the substrate, and a second surface (68) opposite the first surface along a normal direction (N) substantially perpendicular to the said plane. The second surface can be located face-to-face with the first device. At least one tongue can be integrally attached to the base. The tongue is flexible between a rest position, in which a distal end of the tongue is located at a distance away from the base on the side of the second surface along the normal direction, and a flexed position.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: May 24, 2016
    Assignee: HYPERTAC SA
    Inventor: Patrice Retho
  • Patent number: 9105173
    Abstract: An assembly that is provided with condition monitoring includes a first element having two or more electrically conductive contact members (102-105), a second (106) element attached to the two or more electrically conductive contact members and providing galvanic connections between the contact members. The assembly further includes a monitoring circuit (120) for monitoring electrical conductivities of the galvanic connections and for generating an indicator signal in response to a situation in which the electrical conductivity of one or more of the galvanic connections is lower than a threshold. When the joint between the first and second elements is totally or partially out of order, the electrical conductivity of one or more of the galvanic connections is low or zero and thus the indicator signal is generated. Therefore, the condition of the joint can be electrically monitored.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: August 11, 2015
    Assignee: CORIANT OY
    Inventors: Antti Matias Holma, Petri Kohonen
  • Patent number: 9088215
    Abstract: An embodiment power converter package comprises a semiconductor die, an output inductor, a plurality of input capacitors and output capacitors. The semiconductor die, the output inductor and the plurality of capacitors are mounted on a lead frame and connected one to another through various pads on the lead frame. The semiconductor die comprises a high side switch, a low side switch and a driver. The power converter package is electrically coupled to an external pulse width modulation controller through a variety of input and output pads.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: July 21, 2015
    Assignee: Futurewei Technologies, Inc.
    Inventors: Hengchun Mao, Dianbo Fu, Bing Cai
  • Patent number: 9042103
    Abstract: A power semiconductor has power terminals arranged in a row at one side of the housing, with control terminals arranged in a row at the other side of the housing. The spacing between adjacent power terminals is greater than the spacing between adjacent control terminals.
    Type: Grant
    Filed: May 16, 2012
    Date of Patent: May 26, 2015
    Assignee: IXYS Semiconductor GmbH
    Inventors: Olaf Zschieschang, Andreas Laschek-Enders
  • Patent number: 8995139
    Abstract: Provided is a circuit device in which encapsulating resin to encapsulate a circuit board is optimized in shape, and a method of manufacturing the circuit device. A hybrid integrated circuit device, which is a circuit device according to the present invention includes a circuit board, a circuit element mounted on a top surface of the circuit board, and encapsulating resin encapsulating the circuit element, and coating the top surface, side surfaces, and a bottom surface of the circuit board. In addition, the encapsulating resin is partly recessed and thereby provided with recessed areas at two sides of the circuit board. The providing of the recessed areas reduces the amount of resin to be used, and prevents the hybrid integrated circuit device from being deformed by the cure shrinkage of the encapsulating resin.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: March 31, 2015
    Assignee: Semiconductor Components Industries, L.L.C.
    Inventor: Hideyuki Sakamoto
  • Patent number: 8681500
    Abstract: Carbon nanotube material is used in an integrated circuit substrate. According to an example embodiment, an integrated circuit arrangement (100) includes a substrate (110) with a carbon nanotube structure (120) therein. The carbon nanotube structure is arranged in one or more of a variety of manners to provide structural support and/or thermal conductivity. In some instances, the carbon nanotube structure is arranged to provide substantially all structural support for an integrated circuit arrangement. In other instances, the carbon nanotube structure is arranged to dissipate heat throughout the substrate. In still other instances, the carbon nanotube structure is arranged to remove heat from selected portions of the carbon nanotube substrate.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: March 25, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chris Wyland
  • Patent number: 8576567
    Abstract: A COF includes, in at least one embodiment, a heat dissipating material on a back surface of an insulating film. The heat dissipating material has a slit for reducing a degree of thermal expansion. Thus, at least one embodiment of the invention provides the COF in which deformation and disconnection of wiring are prevented.
    Type: Grant
    Filed: January 13, 2009
    Date of Patent: November 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tatsuya Katoh, Takuya Sugiyama, Yasunori Chikawa
  • Patent number: 8547709
    Abstract: A composite substrate made of a circuit board mounted on a lead frame is used for an electronic system package. High heat generated electronic components are adapted to mount on the lead frame and relatively low heat generated electronic components are adapted to mount on the circuit board. Metal lines are used for electrical coupling between the circuitry of the IC chip and the circuit board. An electronic system with the composite substrate gains both advantages—good circuitry arrangement capability from the circuit board and good heat distribution from the lead frame.
    Type: Grant
    Filed: February 12, 2010
    Date of Patent: October 1, 2013
    Assignee: Cyntec Co. Ltd.
    Inventors: Han-Hsiang Lee, Kun-Hong Shih, Jeng-Jen Li
  • Publication number: 20130128181
    Abstract: The present invention discloses a backplane, a backlight module, and an LCD device. A backplane comprises a heatsink plate and a supporting plate connected with the heatsink plate; the heat conductivity of the heatsink plate is larger than that of the supporting plate; the heatsink plate or the supporting plate is provided with reinforcing ribs in the joint. In the present invention, metal with good heat dispersion and common material with low cost are respectively adopted and joined according to different radiating areas of the backlight module; then, the heat dispersion is ensured and meanwhile, the cost is reduced. The reinforcing ribs are added in the joint so that the strength of the joint is enhanced and the backplane is tightened and durable.
    Type: Application
    Filed: December 2, 2011
    Publication date: May 23, 2013
    Inventors: Yi-cheng Kuo, Gege Zhou
  • Patent number: 8383962
    Abstract: A packaged semiconductor is disclosed. The packaged semiconductor comprises a conductive integral frame that includes an inner portion and a ring portion encircling the inner portion, a semiconductor die that is mounted to a first surface of the inner portion of the conductive frame, and a casing that supports the conductive frame and covers the semiconductor die. Sections of the conductive frame that connect the inner portion to the ring portion are removed after the casing is applied to the conductive frame.
    Type: Grant
    Filed: March 25, 2010
    Date of Patent: February 26, 2013
    Assignee: Marvell World Trade Ltd.
    Inventor: Sehat Sutardja
  • Patent number: 8370777
    Abstract: A method of generating a model of a leadframe IC package, a leadframe modeler and an IC design system are disclosed. In one embodiment the method includes: (1) adding connectivity information to a geometric representation of a leadframe, wherein the connectivity information represents electrical connections between the IC die and leads of the leadframe and (2) formatting the leads to represent BGA point of contacts for the IC die.
    Type: Grant
    Filed: June 16, 2009
    Date of Patent: February 5, 2013
    Assignee: LSI Corporation
    Inventors: Donald E. Hawk, Jr., Stephen M. King, Jeffrey M. Klemovage, John J. Krantz, Allen S. Lim, Ashley Rebelo, Richard J. Sergi
  • Patent number: 8263870
    Abstract: It is an object to improve a conventional point that mounting an electronic component that requires a high current and heat radiation, such as an LED, together with other general electronic components on the same board has been difficult. To achieve this object, a different thickness lead frame partially having different thicknesses is used. On a thick portion of the different thickness lead frame, a special electronic component, such as an LED, for which a high current and heat radiation are required is mounted. Further, a thin portion of the different thickness lead frame is formed at a fine pitch, and general electronic components are mounted at a high density on the thin portion. Thus, unitization or modularization of electronic components for which a high current and heat radiation are required becomes possible.
    Type: Grant
    Filed: September 25, 2006
    Date of Patent: September 11, 2012
    Assignee: Panasonic Corporation
    Inventors: Tetsuya Tsumura, Hiroharu Nishiyama, Etsuo Tsujimoto
  • Patent number: 8254126
    Abstract: An electronic circuit device includes a bus bar, a base component and an electronic component. The bus bar has an external connector terminal capable of receiving electric power from an external power source. The base component has a metallic heat radiation portion and is disposed to oppose the bus bar. The electronic component is held between the bus bar and heat the radiation portion of the base component. The bus bar further includes fixing terminals extending toward the base component. The fixing terminals are fixed to the base component to constitute fixing portions. The fixing portions are configured to have elasticity and exert a restoring force such that a distance between the bus bar and the base component reduces. The electronic component is in pressure contact with the bus bar and the base component by the restoration force of the elasticity of the fixing portions.
    Type: Grant
    Filed: November 16, 2010
    Date of Patent: August 28, 2012
    Assignee: Anden Co., Ltd.
    Inventors: Naoki Uejima, Hirohisa Suzuki, Nobutomo Takagi
  • Patent number: 8184440
    Abstract: In an electronic apparatus comprising a circuit board supporting semiconductor components and traces or conductors for supplying electrical energy to the semiconductor components, and a connection arrangement by which the conductors are connected to a power supply cable, the circuit board being covered by an electrically insulating encapsulating layer, a molded frame part is mounted on the circuit board so as to cover the connection arrangement, the molded frame part having a circumferential edge structure which extends on one end into the encapsulating layer and at the other end projects above the encapsulating layer so as to create an interior space which, when the encapsulating layer is at least partially cured, is filled with additional encapsulating compound to form, after curing, a relatively thick protective layer over the wire or cable and conductor connecting area.
    Type: Grant
    Filed: May 1, 2009
    Date of Patent: May 22, 2012
    Assignee: ABL IP Holding LLC
    Inventors: Daniel Sekowski, Frederick Lloyd Carpenter, Mark Anthony Hand, Bernhard Bachl, Bernd Bienek, Olaf Cladders, Henning Dieker, Christian Miesner, Lothar Schopmann, Herfried Zimmer
  • Patent number: 8159835
    Abstract: A laser apparatus comprises: a lead frame comprising a first outer lead and a first inner lead connected to the first outer lead; mold resin that has a top surface, does not seal the first outer lead but does seal the first inner lead and cleaves part of the first inner lead exposed on the top surface; a sub-mount comprising a mounting surface and a back surface facing each other, the mounting surface facing the top surface of the mold resin and the back surface being not covered with the mold resin; and a laser element mounted on the mounting surface of the sub-mount and electrically connected to the exposed part of the first inner lead.
    Type: Grant
    Filed: April 16, 2009
    Date of Patent: April 17, 2012
    Assignee: Mitsubishi Electric Corporation
    Inventor: Junji Fujino
  • Patent number: 8130499
    Abstract: The present invention relates to a heat dissipation structure board and a module using this heat dissipation structure used for purpose required of high reliability such as a hybrid vehicle or an electric vehicle and to a method of manufacturing the heat dissipation structure. A resin structure is disposed on a lead frame constituting a heat dissipation board and an odd-shaped electronic component or the like mounted on this lead frame or the like to cover up the lead frame and the odd-shaped electronic component or the like, and this resin structure is fixed to a metal plate, a chassis of a device and the like to constitute the heat dissipation structure board as a whole, whereby fixing strengths of fixing the lead frame and the odd-shaped electronic component or the like, a bonding strength at an interface between the lead frame and the heat transfer layer and the like can be reinforced.
    Type: Grant
    Filed: November 28, 2008
    Date of Patent: March 6, 2012
    Assignee: Panasonic Corporation
    Inventors: Tohru Ohnishi, Hitoshi Kouno, Toshiyuki Taniguchi, Koji Nakashima, Toshiyuki Nakata, Tsunetsugu Imanishi, Keiichi Nakao
  • Patent number: 8102655
    Abstract: Provided is a circuit device capable of increasing the packaging density and preventing the thermal interference between circuit elements to be incorporated. In a hybrid integrated circuit device, a first circuit board and a second circuit board are fitted into a case member in a way that the first circuit board is overlaid with the second circuit board. A first circuit element is arranged on the upper surface of the first circuit board and a second circuit element is arranged on the upper surface of the second circuit board. Furthermore, inside the case member, provided is a hollow portion that is not filled with a sealing resin. Such a configuration prevents the second circuit element, which is a microcomputer, from operating unstably due to a heat generated in the first circuit element, which is a power transistor, for example.
    Type: Grant
    Filed: July 15, 2010
    Date of Patent: January 24, 2012
    Assignees: SANYO Semiconductor Co., Ltd., Semiconductor Components Industries, LLC
    Inventors: Hideyuki Sakamoto, Hidefumi Saito, Yasuhiro Koike, Masao Tsukizawa
  • Patent number: 8022306
    Abstract: A mounting region is provided at a substantially center of one surface of an insulating layer. A metal layer is provided on the other surface of the insulating layer. A slit is formed to cross a region (an opposite region) of the metal layer that coincides with the mounting region and to divide the metal layer. A plurality of regions (large regions) of the metal layer divided by the slit each include a partial region (small region) of the opposite region. The area of each large region is set corresponding to the area of the small region included therein. Specifically, the small region having the area of A [%] with respect to the whole area of the opposite region is included in the large region having the area of (A±?) [%] with respect to the whole area of the metal layer. Here, ? is an acceptable error range, and the acceptable error range ? is not more than (A×0.3).
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: September 20, 2011
    Assignee: Nitto Denko Corporation
    Inventors: Hirofumi Ebe, Yasuto Ishimaru
  • Publication number: 20100091464
    Abstract: The present invention relates to a heat dissipation structure board and a module using this heat dissipation structure used for purpose required of high reliability such as a hybrid vehicle or an electric vehicle and to a method of manufacturing the heat dissipation structure. A resin structure is disposed on a lead frame constituting a heat dissipation board and an odd-shaped electronic component or the like mounted on this lead frame or the like to cover up the lead frame and the odd-shaped electronic component or the like, and this resin structure is fixed to a metal plate, a chassis of a device and the like to constitute the heat dissipation structure board as a whole, whereby fixing strengths of fixing the lead frame and the odd-shaped electronic component or the like, a bonding strength at an interface between the lead frame and the heat transfer layer and the like can be reinforced.
    Type: Application
    Filed: November 28, 2008
    Publication date: April 15, 2010
    Applicant: PANASONIC CORPORATION
    Inventors: Tohru Ohnishi, Hitoshi Kouno, Toshiyuki Taniguchi, Koji Nakashima, Toshiyuki Nakata, Tsunetsugu Imanishi, Keiichi Nakao
  • Patent number: 7626255
    Abstract: Provided is a device, an assembly comprising said device, a sub-assembly and an element suitable for use in the assembly. The device comprises a body of an electrically insulating material having a first side and an opposite second side, the body being provided with conductors according to a desired pattern, said conductors being anchored in the body. The body is provided with a through-hole extending from the first side to the second side of the body and having a surfacial area which is smaller on the first side than on the second side. Such a device can very suitably be used in an assembly comprising an element which is a sensor, preferably a chemical sensor, and particularly a biosensor.
    Type: Grant
    Filed: October 14, 2004
    Date of Patent: December 1, 2009
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Johannus Wilhelmus Weekamp, Menno Willem Jose Prins
  • Patent number: 7586191
    Abstract: An integrated circuit apparatus with heat removal has an electrical interconnection network. The electrical interconnection network has a plurality of electrically and thermally conductive vias in electrical communication with terminals of at least one semiconductor device. An electrically insulating heat spreader is chemically bonded to each of the vias at an upper layer of the electrical interconnection network. At the upper layer the vias are electrically isolated from each other. In some embodiments the electrically insulating heat spreader is a polycrystalline diamond body with a metallized undersurface. The metallized undersurface may be etched away between vias.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: September 8, 2009
    Inventors: David R. Hall, H. Tracy Hall, Paul Moody, Scott Dahlgren, Marshall Soares
  • Patent number: 7551455
    Abstract: A package structure including a first carrier, a second carrier, at least a first electronic component and at least a second electronic component is provided. The second carrier is electrically connected to the first carrier. The first electronic component is disposed on the first carrier and electrically connected to the first carrier. The second electronic component is disposed on the second carrier and electrically connected to the second carrier.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: June 23, 2009
    Assignee: Cyntec Co., Ltd.
    Inventors: Da-Jung Chen, Yi-Cheng Lin, Bau-Ru Lu, Yi-Min Fang, Chau-Chun Wen, Chun-Tiao Liu
  • Patent number: 7477527
    Abstract: A method and apparatus is provided for attaching a cooling structure to the surface of an integrated circuit (IC). The attachment of the cooling structure, for example a heat sink, to the IC requires that certain pressure is applied, usually by connecting the cooling structure to a Printed Circuit Board (PCB). However, excess pressure may damage the ball grid array (BGA) that connects the IC to the PCB. Attachment of a cooling structure to the IC package substrate is provided without support from the PCB. In one embodiment, shock absorbers are also attached to the cooling structure and the PCB to prevent undesirable vibration of the heat sink mass from affecting the IC.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: January 13, 2009
    Assignee: Nanoconduction, Inc.
    Inventor: Ephraim Suhir
  • Patent number: 7336491
    Abstract: A heat dissipation device for electrical components includes an outer surface and an inner surface. The outer surface is configured for mounting the electrical components thereon, wherein the components are mounted to the outer surface to allow the transfer of heat from the electrical components to the heat dissipation device and ambient air. The inner surface defines a cavity within the heat dissipation device that also enables housing of the electrical components.
    Type: Grant
    Filed: September 6, 2005
    Date of Patent: February 26, 2008
    Assignee: Lear Corporation
    Inventors: Frank Goemmel, Roland Hammer
  • Patent number: 7084490
    Abstract: A semiconductor device assembly including a semiconductor device having a plurality of bond pads on the active surface thereof and a lead frame having a portion of the plurality of lead fingers of the lead frame located below the semiconductor device in a substantially horizontal plane and another portion of the plurality of lead fingers of the lead frame located substantially in the same horizontal plane as the active surface of the semiconductor device. Both pluralities of lead fingers of the lead frame having their ends being located substantially adjacent the peripheral sides of the semiconductor device, rather than at the ends thereof.
    Type: Grant
    Filed: July 20, 2005
    Date of Patent: August 1, 2006
    Assignee: Micron Technology, Inc.
    Inventor: David J. Corisis
  • Patent number: 7064420
    Abstract: A leadframe for a semiconductor package includes signal and ground leads, a ground plane, and a frame paddle. Supports connect the signal and ground leads, ground plane, and frame paddle in at least two different layers. At least one force release and stress relief structure is incorporated into the leadframe to free the ground plane substantially from distortion and warpage resulting from residual mechanical stresses therein.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: June 20, 2006
    Assignee: St Assembly Test Services Ltd.
    Inventors: Byung Joon Han, Byung Hoon Ahn, Zheng Zheng
  • Patent number: 7042730
    Abstract: A power module including a power circuit having heat generating power devices including one or more heatsinks not isolated from the power devices by an insulating body.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: May 9, 2006
    Assignee: International Rectifier Corporation
    Inventors: Bertrand Vaysse, Heny Lin, Thanh Van Tran, Ajit Dubhashi
  • Patent number: 7016200
    Abstract: In a module frame for electronic components, having a conductor structure having a metallic conductor, at least one contact segment of a metallic conductor, the at least one contact segment of the metallic conductor uncovered by the insulation sheathing and conductively connected to a segment of the metallic conductor, the thermal conduction cross section of the at least one connecting web being designed to be so small that when the contact segment is intensely heated, the connecting web has a throttling effect on the heat flow to the segment of the conductor.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: March 21, 2006
    Assignee: Robert Bosch GmbH
    Inventors: Roland Schmid, Thomas Uhland, Kai Beckbissinger, Ralf Schinzel, Udo Hennel
  • Patent number: 6891581
    Abstract: An assembly structure for aluminum frame of LCD, comprising a front frame, a middle frame and a rear frame. These frames are composed of two sets of long rectangular horizontally matching frames and two sets of short rectangular vertically matching frames. The front frame has a rectangular loop of sticking spline at inner edge. The middle frame forms a horizontally inward rectangular loop of embedded lug at connection with front frame, and forms a vertically upward rectangular loop of locking lug at connection with rear frame. The sticking spline of front frame leans against the embedded lug of middle frame. The fastener of sticking spline is used to clamp and position the front and middle frame. The periphery of rear frame leans against the locking lug of middle frame. Locking and positioning the middle and rear frames by a screw. With above, the aluminum frame of LCD is accomplished.
    Type: Grant
    Filed: June 6, 2003
    Date of Patent: May 10, 2005
    Inventor: Ching-Lung Peng
  • Patent number: 6838755
    Abstract: A leadframe for semiconductor devices, including a region which is adapted to support a semiconductor device and a plurality of leads which are arranged so as to be directed toward the region, for mutual connection, by connecting wires connecting the leads and the semiconductor device. The leads include leads having at least two different lengths for the connection of connecting wires having different diameters.
    Type: Grant
    Filed: May 21, 2001
    Date of Patent: January 4, 2005
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto Tiziani, Carlo Cognetti, Andrea Cigada
  • Patent number: 6777790
    Abstract: A semiconductor device assembly package includes a semiconductor device having components thereon which are generic to a variety of applications by manipulation of the pinout configuration. The lead frame includes redundant leads for connection to the semiconductor device, as desired. The semiconductor device may include redundant wire bond pads, each redundant pair including one pad on a lateral edge and one pad on a non-lateral edge of the die. In applications requiring less than all of the available leads, the pinout configuration of the leadframe is adjusted to use the extra space from unused NC leads and missing pins for providing wider, shorter leads with reduced inductance, and wider paddle arms for reduced bending and breakage.
    Type: Grant
    Filed: March 4, 2003
    Date of Patent: August 17, 2004
    Assignee: Micron Technology, Inc.
    Inventor: David J. Corisis
  • Publication number: 20040125573
    Abstract: A multichip module is disclosed. In one embodiment, the multichip module includes a substrate having a first side and a second side, the first side being opposite to the first side. A driver chip is at the first side of the substrate. A semiconductor die comprising a vertical transistor is at the second side of the substrate. The driver chip and the semiconductor die are in electrical communication through the substrate.
    Type: Application
    Filed: December 26, 2002
    Publication date: July 1, 2004
    Applicant: Fairchild Semiconductor Corporation
    Inventors: Rajeev Joshi, Maria Cristina B. Estacio
  • Patent number: 6713851
    Abstract: The invention relates to an LOC type semiconductor device having improved heat radiation. The semiconductor device related to the present invention has a preferably metal heat-radiating element 7 that is in thermal contact with the surface opposite the principal surface of the semiconductor chip 3. One region of said heat-radiating element 7 is externally exposed from the package that encloses the semiconductor chip 3. The heat-radiating element 7 is in thermal contact with a metal pattern 12 that is formed on the substrate 10 on which the semiconductor device is mounted. The heat from the semiconductor chip is transferred to the mounting substrate 10 side via the heat-radiating plate 7, and heat dissipation is conducted efficiently.
    Type: Grant
    Filed: September 2, 1999
    Date of Patent: March 30, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Norito Umehara, Masazumi Amagai
  • Patent number: 6713836
    Abstract: In a leadframe packaging structure, a leadframe includes a plurality of first leads, a plurality of second leads, and a die pad. The first leads define a chip-bonding region in which is arranged the die pad. The second leads extend and terminate into a plurality of contact pads in the chip-bonding region. An adhesive tape further is bonded on bottom surfaces of the contact pads. A chip is bonded on the die pad. At least a passive device is mounted between and electrically connects the contact pads. A plurality of bonding wires respectively connect the chip, the passive device, and the first and second leads. An encapsulant material encapsulates the chip, the passive device, and the bonding wires.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: March 30, 2004
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventors: Sheng-Tsung Liu, Kang-Wei Ma
  • Patent number: 6703261
    Abstract: A semiconductor device is disclosed in which a heat sink is difficult to warp and which is inexpensive.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: March 9, 2004
    Assignee: Hitachi, Ltd.
    Inventor: Mamoru Ito
  • Patent number: 6653934
    Abstract: An electromagnetic audio transducer for SMD applications. The transducer comprises a lead frame with external terminals, which are formed into a predetermined shape. The transducer has a case with inside and outside surfaces, where the case is integrated with the lead frame to expose the external terminals at its outside surface. The transducer has solder bases formed by exposing the lead frame at the inside surface of the case. The drive section of the transducer has a coil arranged inside the case, with the coil having coil terminals, and the coil terminals are led to the solder bases for electrical connection at the inside surface of the case.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: November 25, 2003
    Assignee: American Audio Components, Inc
    Inventors: Zhonglai Pan, Guoxin Jin, Zhengmin Pan
  • Patent number: 6643142
    Abstract: A module (1) for contactless communication includes a plurality of electrical components (4, 5, 6, 7, 8) which each have at least two contact faces (9, 10, 11, 12, 13, 14, 15, 16) for the electrical connection. The electrical components (4, 5, 6, 7, 8) of the module are mounted both on a component side (MB) and an on adhesive side (MK) of a lead frame (M) formed by metal strips (MS). During the manufacture of the module (1) the metal strips (MS) of the lead frame (M) are held in one plane (E) and in position by means of an adhesive tape (K). The adhesive tape (K) has openings (A1, A2, A3, A4, A5, A6) at given positions of the lead frame (M) so as to enable electrical components to be mounted on the adhesive side (MK) of the lead frame (M).
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: November 4, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Gunter Aflenzer, Joachim Heinz Schober, Marcus Toth
  • Patent number: 6636429
    Abstract: A high frequency, low impedance network is integrated into the substrate level of a power module for the reduction of electromagnetic interference (“EMI”). In one embodiment, capacitance is electrically connected to at least one of the positive conducting layer in a substrate or the negative conducting layer in a substrate and a ground. Integrating a capacitive network of low stray inductance in a substrate of a power module allows relatively small, inexpensive capacitors to be used.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: October 21, 2003
    Assignee: Ballard Power Systems Corporation
    Inventors: Douglas Maly, Sayeed Ahmed, Scott Parkhill, Fred Flett
  • Patent number: 6621714
    Abstract: An apparatus and method for retaining a length of fiber optic cable to a circuit board includes a body portion. The body portion of the apparatus includes at least a pair of spaced legs extending from the body portion, each of the legs is adapted to be received in a mounting opening formed in the PC board. Each of the spaced legs includes a foot portion adapted for securing the body to the circuit board and at least a pair of spaced arms extend from the body portion defining a slot between the arm and the body portion for receiving and retaining a portion of the length of fiber optic cable. The arms are spaced a distance from each other for retaining the fiber optic cable in an arc having a radius greater than a minimum bend radius of the fiber optic cable.
    Type: Grant
    Filed: November 2, 2001
    Date of Patent: September 16, 2003
    Assignee: 3Com Corporation
    Inventors: Hong Li, Kenneth S. Laughlin, Craig G. Mitchell, Thomas C. Ruberto
  • Patent number: 6614655
    Abstract: In an information processing apparatus such as a space-saving type personal computer having a liquid-cooling type cooling system, the presence of a cooling liquid, the presence of a frozen state of the cooling liquid and the temperature of the cooling liquid are detected. When a freeze of the cooling liquid is detected, a CPU is throttled down to defrost the cooling liquid, or the cooling liquid is heated to be prevented from being frozen. Alternatively, a warning of detection of a freeze may be displayed. Alternatively, activation of the system may be stopped or operation of the system may be interrupted. By such measures, system failure is prevented from being caused by leaking, shortage, freezing, etc. of the cooling liquid.
    Type: Grant
    Filed: March 2, 2001
    Date of Patent: September 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tsuyoshi Nakagawa, Kenichi Nagashima, Kenichi Saito, Masahito Suzuki, Hajime Yamagami, Masato Kurita, Yasushi Neho
  • Publication number: 20030090877
    Abstract: The preferred embodiments provide a lead frame wherein a first air vent 29 and a second air vent 30 are formed in an air vent forming region 32. When resin-molding, one end of this first air vent 29 is disposed within the cavity, whereby air in the cavity when resin-molding can be completely released to the outside of the cavity. As a result, a package after resin-molding includes no unfilled regions or voids, whereby a semiconductor device with excellent product quality can be provided. In the background, air in cavities could not be completely released when resin-molding since, for instance, one air vent was provided at a position apart from the cavity region, and unfilled regions or voids were created.
    Type: Application
    Filed: November 12, 2002
    Publication date: May 15, 2003
    Inventors: Isao Ochiai, Kazumi Onda
  • Patent number: 6552901
    Abstract: Apparatus and systems for cooling heat sinks, integrated circuit boards, and electronic components by providing internal passageways in the heat sinks, circuit boards, and electronic components that connect to a fluid manifold. The internal passageways connect to the surface of the heat sinks, circuit boards and electronic components. A cooling fluid capable of phase change is supplied to the internal passageways to conductively cool the interior of the heat sink, circuit board, and component and to cool the surface of the heat sink, circuit board, and/or component at least partially by evaporative cooling. A plurality of circuit boards, components, and/or heat sinks may be placed back to back with the fluid manifold therebetween. The heat sinks, circuit boards, and/or components are in an enclosed space so that cooling fluid can be contained, condensed and recycled to the fluid manifold.
    Type: Grant
    Filed: October 10, 2001
    Date of Patent: April 22, 2003
    Inventor: James Hildebrandt
  • Patent number: 6552420
    Abstract: A semiconductor device assembly package includes a semiconductor device having components thereon which are generic to a variety of applications by manipulation of the pinout configuration. The lead frame includes redundant leads for connection to the semiconductor device, as desired. The semiconductor device may include redundant wire bond pads, each redundant pair including one pad on a lateral edge and one pad on a non-lateral edge of the die. In applications requiring less than all of the available leads, the pinout configuration of the leadframe is adjusted to use the extra space from unused NC leads and missing pins for providing wider, shorter leads with reduced inductance, and wider paddle arms for reduced bending and breakage.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: April 22, 2003
    Assignee: Micron Technology, Inc.
    Inventor: David J. Corisis
  • Publication number: 20030072136
    Abstract: A lead frame of a circuit board is punched in a direction opposite to a heat sink plate. Even if burrs are produced due to the punching, the burrs do not penetrate a sheet or short-circuit to the heat sink plate. A resist film tightly contacts on the periphery of a land of the lead frame of the circuit board, and a plated layer tightly contacts on the land. This prevents electronic components from defective mounting on the land.
    Type: Application
    Filed: September 10, 2002
    Publication date: April 17, 2003
    Inventors: Masaki Suzumura, Kazuo Okada, Koichi Hirano, Takaaki Okawa, Shinya Tanaka
  • Patent number: 6545868
    Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate.
    Type: Grant
    Filed: October 16, 2000
    Date of Patent: April 8, 2003
    Assignee: Legacy Electronics, Inc.
    Inventors: Kenneth J. Kledzik, Jason C. Engle