Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.

Abstract: A power module includes a first substrate with a power semiconductor device mounted thereon, a second substrate with a control circuit for controlling the power semiconductor device formed thereon, a smoothing capacitor electrically connected to the power semiconductor device for smoothing a voltage to be externally supplied to the power semiconductor device, and a case including a case frame and a case lid. The case has an interior in which the first substrate, the second substrate and the smoothing capacitor are disposed, and the smoothing capacitor is disposed in contact with a side surface of the case frame.

Abstract: A heat sink with integrated electronics having a cavity with one or more facing sides. Hybrid circuits are housed in the cavities. A bottom portion seals the housing and has a row of pins is provided for interconnecting the circuits housed in the separate cavities to an external device, thereby allowing the integration of different types of circuits in a single, fully enclosed, yet partitioned, housing.

Abstract: A power module includes a substrate with a power semiconductor device mounted thereon, a case having an interior in which the substrate is disposed, a cooling fin having a surface on which the substrate and the case are placed, and a smoothing capacitor disposed on an opposite surface of the cooling fin from the surface on which the substrate is placed, the smoothing capacitor being electrically connected to the power semiconductor device for smoothing a voltage to be externally supplied to the power semiconductor device.

Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.

Abstract: A coaxial via hole structure used in a carrier is disclosed. The coaxial via hole includes an outer cylinder-shaped conductor, an inner cylinder-shaped conductor and an intermediate fill. The outer cylinder-shaped conductor extends along a first direction. The inner cylinder-shaped conductor is disposed in the outer cylinder-shaped conductor and also extends along the first direction. The intermediate fill is between the outer cylinder-shaped conductor and the inner cylinder-shaped conductor and is made of insulating material or electrical-resistant material. The coaxial via hole structure can be applied as a capacitor or a resistor and has the function of signal shielding.

Abstract: A semiconductor integrated circuit comprising a power supply wiring and a ground wiring and a decoupling capacitor formed between the power supply wiring and the ground wiring, wherein at least one electrode of the decoupling capacitor consists of a shield layer formed in a plane shape on a semiconductor substrate, and the shield layer is electrically connected directly to the semiconductor substrate and is fixed to a power supply potential or the ground potential.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: Surface applied passive devices for use on electronic circuit boards are formed by applying layers of conductive, insulating, and other material to a thin polymer film carrier. The surface applied passives are thin enough to fit underneath standard integrated circuit packages in order to conserve space on the circuit board. Resistors, capacitors, inductors and other passive circuits may be formed on thin polymer films, less than 8 mils thick. This significantly aids in conserving space on an electronic circuit board.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A power module includes a box-shaped smoothing capacitor (20) for smoothing a DC supply voltage to be externally applied to a power semiconductor device (5). The smoothing capacitor (20) is in contact with a side surface of a case frame (6) including a side (along which an N-terminal (8N) and a P-terminal (8P) are arranged) of a top surface of the case frame (6), and has a top surface level with the top surface of the case frame (6). An N-electrode (21N) and a P-electrode (21P) of the smoothing capacitor (20) are disposed on the top surface of the smoothing capacitor (20) and in proximity to the N-terminal (8N) and the P-terminal (8P) of a power module body portion (99), respectively. The power module can reduce a circuit inductance, is reduced in size and weight, and has good resistance to vibration.

Abstract: A lead frame type of semiconductor apparatus includes a die pad on which a semiconductor chip is mounted; ground terminals which are to be grounded; power supply terminals which are connected to a power supply; inner leads connected to the ground terminals and power supply terminals, in which a pair of adjacent inner leads for power supply terminal and ground terminal are extended inwardly; a chip capacitor mounting pad which is provided at inner ends of the extended inner leads; and a chip capacitor which is mounted on the chip capacitor mounting pad so that a decoupling capacitor is provided.

Abstract: A method for surface mounting electrical components to a substrate, such as a printed circuitboard, involves use of an anisotropically conductive adhesive or Z-Axis adhesive between facing conductive surface areas on the component and substrate. Pressure is applied to the conductive adhesive by a nonconducting adhesive that is first cured between oppositely facing nonconductive surface areas of the component and substrate. This fixes the thickness of each layer of the conductive adhesive at a dimension no greater than its design conductive thickness. In a first submethod, the nonconducting adhesive is a fast setting adhesive subjected to mechanical pressure only as it is assembled on the substrate prior to the subsequent curing of the conductive adhesive. In a second submethod, it is a high shrinkage adhesive that applies compressive force between the component and substrate as it cures and shrinks dimensionally while at a temperature below the subsequent curing temperature of the conductive adhesive.

Abstract: Described is a method for minimizing switching noise in the high- and mid-frequency range on printed circuit cards or boards by means of a plurality of surface mounted decoupling capacitors. A novel configuration and implementation of capacitor pads including the connecting vias is also presented. As a result the parasitic inductance of the pads and vias can be significantly reduced. Thus the effectiveness of the decoupling capacitors in the mid and high frequency range can be increased, the voltage drop can be reduced and the system performance can be increased. Several design rules for the new pad via configuration lead to the significant reduction of the parasitic inductance. The proposal is especially important for high integrated system designs on boards and cards combined with increased cycle times.

Abstract: An integrated circuit package substrate. At least one insulating layer is formed between every two neighboring patterned wiring layers for isolation. At least a via is formed to penetrate through the insulating layers to electrically connect the patterned wiring layers. A capacitor is formed within at least one of the insulating layer. The capacitor has two electrodes insulated by a dielectric layer. One of the electrodes is connected to a power source, while the other is connected to ground.

Abstract: Switching noise within an LGA-packaged or PGA-packaged IC Vdd and IC Vss nodes is reduced by spreading the electrical current in the bypass path to reduce the effective current loop area, and thus reduce the energy stored in the magnetic field surrounding the current path. This result is achieved by minimizing the horizontal components of the linkage paths between the IC nodes to be bypassed and the bypass capacitor. Since effective inductance Leff seen by the bypass capacitor is proportional to magnetic energy, Leff is reduced over a broad band of frequencies. For each bypass capacitor, a pair of conductive vias is formed. A first via is coupled to the LGA package Vcc plane and to the IC Vdd node, and a second via is coupled to the LGA package Vss plane and to the IC Vss node.

Abstract: A semiconductor device is disclosed. The device includes an integrated circuit chip having integral de-coupling capacitors on the chip backside. The de-coupling capacitors includes a metal layer in intimate contact with the semiconductor substrate of the integrated circuit, a dielectric layer and a second metal layer. The second metal layer is segmented to form multiple capacitors, and each capacitor is interconnected to power supplies of the chip. Interconnection to different integrated circuit packages is provided. A method of making the semiconductor device is also disclosed.

Abstract: Switching noise within an LGA-packaged or PGA-packaged IC Vdd and IC Vss nodes is reduced by spreading the electrical current in the bypass path to reduce the effective current loop area, and thus reduce the energy stored in the magnetic field surrounding the current path. This result is achieved by minimizing the horizontal components of the linkage paths between the IC nodes to be bypassed and the bypass capacitor. Since effective inductance Leff seen by the bypass capacitor is proportional to magnetic energy, Leff is reduced over a broad band of frequencies. For each bypass capacitor, a pair of conductive vias is formed. A first via is coupled to the LGA package Vcc plane and to the IC Vdd node, and a second via is coupled to the LGA package Vss plane and to the IC Vss node.

Abstract: The present invention provides an ancillary electrical component in very close proximity to a semiconductor device, preferably mounted directly to the semiconductor device. In one preferred embodiment, the ancillary electrical component is a capacitor. In a preferred embodiment, a terminal is provided on the semiconductor device such that the capacitor can be electrically connected directly to the terminals, as by soldering or with conductive epoxy. Connecting the capacitor between terminals of a power loop provides superior noise and transient suppression. The very short path between the capacitor and the active circuit provides for extremely low inductance, allowing for the use of relatively small capacitors. The semiconductor device then is connected to an electronic device such as a PC board for further connection to other circuitry.

Abstract: An electronic package comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The electronic package comprises at least a surface-mountable device connected across the ground ring and the power ring. The present invention is characterized in that the surface-mountable device has at least a bonding region formed on one end contact thereof for bonding to a bonding wire thereby allowing the chip to be electrically connected to the ground ring or power ring directly through the end contact of the surface-mountable device.

Abstract: A multiple line grid (MLG) for use in a multiple line grid array(MLGA) packaging incorporates therein circuit elements, e.g., metal lines, resistors, capacitors, inductors, transistors or combinations thereof, with a view to reducing a size of a printed circuit board on which it is mounted. The MLGA package includes a semifinished package including a surface with a first metal pattern formed thereon for connecting a number of input/output terminals, a printed circuit board(PCB) including a top surface with a second metal pattern formed thereon according to the first metal pattern; and at least of a MLG which is disposed between the semifinished package and the PCB. The MLG includes a non-conductive body incorporated therein a plurality of circuit elements and multiple number of conductors in the form of a column. Each of the conductors is electrically isolated from each other and is electrically connected to the first and the second metal patterns.

Abstract: An electronic device for a motor vehicle, having an electronics unit designed for switching high currents in a two-part housing, a capacitor unit being arranged in the housing to suppress the interference signals produced by said high currents. In an electronic device which is easy to manufacture and in which the heat produced by the electronic circuits has no further effect on the operation of the electronic circuit, the capacitor unit, which is designed to have a large surface area, is thermally connected to a first housing part (1), and the electronics unit (8, 9) is thermally connected to a second housing part (2).

Abstract: A multi-chip chip scale package. The package has a film carrier whereby two chips with different sizes can be disposed on the same film carrier. A flip chip technique is used to arrange each chip on each side of the film carrier face to face. A bump is formed on each chip to electrically connect with the film carrier. An insulation material is filled in between the chips to leave one side of each chip exposed. The conductive wires of the film carrier are connected to the chips directly.

Abstract: The present invention relates to mounting an electric connector (20) onto a printed circuit board, particularly to a printed circuit board comprised of ceramic material, for instance either an LTCC substrate or an HTCC substrate. The problem addressed is one where the connector (20) tends to loosen from the substrate when the temperature varies. This is due to the difference in the coefficients of thermal expansion of the printed circuit board and the connector (20). The problem is solved with the aid of a so-called shim (10) that has a coefficient of thermal expansion between that of the printed circuit board and that of the connector. One side of the shim (10) is soldered onto the connector and the other side of the shim is soldered onto the printed circuit board. The connector (20) is therewith fastened to the printed circuit board. Shear stresses acting between the connector (20) and the printed circuit board are distributed through said board through the medium of two joints instead of one.

Abstract: A semiconductor device assembly with a gap to be filled has thermal vias formed in the supporting substrate. After the semiconductor device is connected to the substrate and fill material positioned about the gap to create a seal, a vacuum is drawn through the thermal vias and a pressure applied to the fill material to urge the fill material into the interior of the gap.

Abstract: The present invention is a multi-level printed circuit board (PCB) containing at least one power plane for conducting and distributing electrical power and at least one ground plane, spaced apart from the power plane, for providing and distributing an electrical ground. At least one integrated circuit chip is mounted on the printed circuit board. At least one signal plane is spaced apart from both the power plane and the ground plane, for conducting and distributing electrical signals from a first point to a second point. The signal plane(s) each have a portion or "patch" that is electrically isolated from signal traces in the remainder of the signal plane. The patches are placed in the area underneath the integrated circuit chip. The patches are connected, respectively, to the power plane or to the ground plane, for reducing effective inductance and input impedance. The multi-level PCB has one or more plated through hole vias for connecting the power or ground plane to a patch.

Abstract: A resonant via-type connection between layers of a multilayer support structure having, at predetermined RF frequencies, a very low, effectively short circuit impedance. The resonant vias utilize the inductance of a via post by forming it into a resonant circuit with a capacitance at the via's distal end coupled to another conductor. A plurality of resonant vias can be formed having respective plurality of resonant frequencies to form a wideband connection. The capacitances at the vias' distal ends coupling to another conductor can be formed to resonate with the total series inductance of the via post and of wire connections to an attached device.

Abstract: A combination motor starter and protector module is described. The base member, in one embodiment, forms a motor protector compartment and a motor starter compartment. The motor protector, in one form, is a bimetallic switch configured to be coupled between a power source and the motor windings. The switch includes a stationary contact and a movable contact. A bimetal element, responsive to current flow through the protector, controls movement of the movable contact. The starter, in one form, is a positive temperature coefficient resistor (PTCR) disk configured to be connected in series circuit with the motor start winding. The cover of the combination housing includes, in one form, an integral capacitor support arm and terminal openings for receiving blade terminals of a run capacitor. The terminal openings in the cover align with blade receiving receptacles coupled to the PTCR start circuit.

Abstract: A module for an equipment rack in a wireless communication system wherein the functions of power filtering, distribution, and limitation are integrated into a single module whose wiring is both simplified and standardized. The module comprises a filtering capacitor and several circuit breakers which are arranged in parallel with a busbar providing the filtered current. The tripping current of each circuit breaker is set to safely provide power to a branch circuit of the equipment rack which the module serves. A terminal in the rear of the module connects it to the rack as the module is inserted. The replacement module has the same quality control standard as the rest of the equipment and the down time of the wireless system network is reduced.

Abstract: A method and apparatus for constructing, repairing and operating modular electronic systems utilizes peripheral half-capacitors (i.e., conductive plates on the outside of the modules) to communicate non-conductively between abutting modules. Such systems provide lower cost, improved testability/repairability and greater density than conventional modular packaging techniques, such as printed circuit boards and multi-chip modules. The non-conductive interconnection technique of the invention can be applied to all levels in the packaging hierarchy, from bare semiconductor dies to complete functional sub-units. Numerous exemplary systems and applications are described.

Abstract: An electronic variable speed device which includes a rectifier supplied with an alternating current, at least one capacitor and an inverter supplied with a DC voltage from the rectifier to the at least one capacitor. The inverter includes plural solid state switch power modules which produce an AC voltage. A plastic material internal enclosure encloses the power modules and a heatsink is connected to the power modules. An electrical connection board electrically connects the power modules to the at least one capacitor such that the heatsink, power modules, at least one capacitor and electrical connection board form a non-sealed chamber containing the power modules. An electronic control system is connected to the electrical connection board to control the power modules.

Abstract: A discrete element electronic package (100) includes a heat spreader (180) with a cavity (185) for receiving a substrate (110), a substrate (110) mounted within the cavity (185) of the heat spreader (180), a heat-generating semiconductor device (170), such as a power transistor (170), mounted on the substrate (110), and electrical connectors (140) located on the substrate (110) to provide an electrical interface to the semiconductor device (170).

Abstract: On a printed circuit board or module card (20) of a standard size for a particular type of system, one or more different, smaller circuit cards or sub-modules (50) can be selectively mounted on the module card so as to utilize a maximum of its area. The module card has openings or holes (30) therein so as to provide component clearance and thus prevent the thickness of the module card from reducing the maximum permissible height of the components that can be mounted on the sub-modules. In order to minimize the amount of module card area devoted to interconnecting to the sub-modules, the sub-modules plug into the module card as the sub-module is moved in a direction perpendicular to the plane of the module card rather than in a direction parallel to the plane of the module card. Circuit wiring and switching (FIG.

Abstract: A low impedance interconnection assembly for use with high frequency switching power semiconductor devices includes a low inductance modular capacitor, multi-layer planar bus structure and semiconductor switching devices assembled as a laminated unitary structure. Terminals electrically and physically connect the positive electrode of the modular capacitor to the positive DC voltage potential carried by the bus structure and the positive DC input of the semiconductor switch and other terminals electrically and mechanically couple the negative electrode of the modular capacitor to the negative DC voltage potential layer of the bus structure and the negative DC input of the switching device. The low inductance modular capacitor is made of a number of capacitor elements having their respective positive electrodes bonded to a copper foil pattern strip to define a positive electrode and their respective negative electrode terminals to a second copper foil strip to define the negative electrode.

Abstract: In a semiconductor device module of this invention, on a metal base is formed a metal layer, on which an insulating substrate is formed. On the insulating substrate is formed conducting film patterns, to which a power device and a control device for controlling the power device are electrically connected. The metal layer exists only between the insulating substrate and the base under the power device, whereas a space is provided between the insulating substrate and the base under the control device, and is filled with air.

Abstract: A low impedance interconnection assembly for use with high frequency switching power semiconductor devices includes a modular capacitor, multi-layer bus structure and semiconductor switching devices assembled as a laminated unitary structure. Terminals electrically and physically connect the positive electrode of the modular capacitor to the positive DC voltage potential carried by the bus structure and the positive DC input of the semiconductor switch and other terminals electrically and mechanically couple the negative electrode of the modular capacitor to the negative DC voltage potential layer of the bus structure and the negative DC input of the switching device. The modular capacitor is made of a number of capacitor elements having their respective positive electrodes bonded to a copper foil pattern strip to define a positive electrode and their respective negative electrode terminals to a second copper foil strip to define the negative electrode.

Abstract: A novel and improved device for interconnecting an integrated circuit package to a circuit board is presented. In accordance with the present invention an integrated circuit package having an central area devoid of surface contacts is positioned over a resilient or compressible connector system. The compressible connector includes an opening about its center which corresponds to the central area on the integrated circuit package. A component is mounted onto the circuit board within the opening of the compressible connector between the integrated circuit package and the circuit board.

Abstract: A novel and improved device for interconnecting an integrated circuit package to a circuit board is presented. In accordance with the present invention an integrated circuit package having an central area devoid of surface contacts is positioned over a resilient or compressible connector system. The compressible connector includes an opening about its center which corresponds to the central area on the integrated circuit package. A component is mounted on the circuit board within the opening of the compressible connector between the integrated circuit package and the circuit board.