Solder Connection Patents (Class 361/743)
  • Patent number: 11249110
    Abstract: Resistivity probes can be used to test integrated circuits. In one example, a resistivity probe has a substrate with multiple vias and multiple metal pins. Each of the metal pins is disposed in one of the vias. The metal pins extend out of the substrate. Interconnects provide an electrical connection to the metal pins. In another example, a resistivity probe has a substrate with a top surface and multiple elements extending from the substrate. Each of the elements curves from the substrate to a tip of the element such that each of the elements is non-parallel to the top surface of the substrate.
    Type: Grant
    Filed: November 10, 2019
    Date of Patent: February 15, 2022
    Assignee: KLA-Tencor Corporation
    Inventors: Walter H. Johnson, III, Nanchang Zhu, Xianghua Liu, Jianli Cui, Zhu-bin Shi, Zhuoxian Zhang, Haiyang You, Lu Yu, Jianou Shi, Fan Zhang
  • Patent number: 11183781
    Abstract: A connector includes a base member having a projection, a contact made of a conductive material and having a projection accommodating portion of a recess shape into which the projection is inserted, and a housing holding the contact. The housing has a holding mechanism configured to hold a flexible conductor disposed to extend across an opening end portion of the projection accommodating portion of the contact. When the projection of the base member is inserted into the projection accommodating portion of the contact together with the flexible conductor held by the holding mechanism, the flexible conductor is sandwiched between a lateral surface of the projection and an inner surface of the projection accommodating portion to contact the inner surface of the projection accommodating portion. The contact is electrically connected to the flexible conductor.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: November 23, 2021
    Assignee: JAPAN AVIATION ELECTRONICS INDUSTRY, LIMITED
    Inventors: Tetsuya Komoto, Seiya Matsuo, Osamu Hashiguchi, Akira Kimura, Akihiro Matsunaga, Takahiro Shimotori
  • Patent number: 10672727
    Abstract: A semiconductor package includes a support member having first and second surfaces opposing each other, having first and second through-holes, spaced apart from each other, and having a wiring structure that connects the first and second surfaces to each other; a connection member disposed on the second surface of the support member and having redistribution layers connected to the wiring structure; a semiconductor chip disposed in the first through-hole and having connection pads connected to the redistribution layers; a second passive component disposed in the second through-hole and connected to the redistribution layers; a first encapsulant disposed on the first surface of the support member and encapsulating the first passive component; and a second encapsulant encapsulating the support member, the first encapsulant, and the semiconductor chip.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: June 2, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyung Joon Kim, Jung Ho Shim, Jun Young Won, Han Kim
  • Patent number: 10349539
    Abstract: An electrical center for distributing electrical power to an electrical system of a vehicle and a method of manufacture the same is described herein. The electrical center includes a printed circuit board structure having a first printed circuit board (PCB) section angularly arranged with respect to a second PCB section. The printed circuit board structure includes a flexible connection element integrally formed with the first and second PCB sections forming a printed circuit extending from the first to second PCB section. The electrical center also includes a first plurality of electrical terminals extending perpendicularly from a first major surface of the first PCB section and a second plurality of electrical terminals extending perpendicularly from a second major surface of the second PCB section. The first major surface is angularly arranged at about a ninety degree angle relative to the second major surface.
    Type: Grant
    Filed: October 3, 2017
    Date of Patent: July 9, 2019
    Assignee: APTIV TECHNOLOGIES LIMITED
    Inventors: Naiki A. Reynoso Galvan, Rodrigo Villanueva Ponce, Christopher Alan Brandon
  • Patent number: 10348008
    Abstract: The contact includes a base portion, a contact portion, and a spring portion integrally molded with a thin metal plate. The spring portion includes a first bending portion, a flat plate portion, and a second bending portion. The first bending portion is bent such that a first surface of the thin plate is on an outer peripheral side, and the second bending portion is bent such that a second surface of the thin plate is on an outer peripheral side. The thin plate has a thickness t of from 0.10 to 0.15 mm, a curvature radius R1 of the first bending portion is from 0.6 to 1.0 mm, and a ratio L/R1 of a length L between the first bending portion and the second bending portion of the flat plate portion to the curvature radius R1 is configured to satisfy 0<L/R1?4.
    Type: Grant
    Filed: March 2, 2017
    Date of Patent: July 9, 2019
    Assignee: Kitagawa Industries Co., Ltd.
    Inventors: Tatsuya Nakamura, Kazushige Ueno
  • Patent number: 10305214
    Abstract: A terminal fitting includes a case (20) provided with an opening (31) into which a mating contact (91) is inserted, and an electrical contact member (60) disposed in the case (20) to face the opening (31) and configured to retreat while rotating to compress a resilient member (40) by being biased toward the opening (31) and pressed against the mating contact (91) by the resilient member (40).
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: May 28, 2019
    Assignees: AutoNetworks Technologies, Ltd., Sumitomo Wiring Systems, Ltd., Sumitomo Electric Industries, Ltd.
    Inventors: Akio Kimura, Seido Nishijima
  • Patent number: 10136529
    Abstract: A method of making a power module includes providing a base plate defining a topology pattern, providing a power substrate above the base plate, providing at least two power contacts and arranging solder catches in the at least two power contacts, soldering the at least two power contacts to the power substrate utilizing the solder catches, and securing a housing to the power substrate.
    Type: Grant
    Filed: August 15, 2016
    Date of Patent: November 20, 2018
    Assignee: Cree Fayetteville, Inc.
    Inventors: Brice McPherson, Peter Killeen, Alex Lostetter, Robert Shaw, Brandon Passmore, Jared Hornberger, Tony M. Berry
  • Patent number: 9780064
    Abstract: A method of forming a package assembly includes forming a no-flow underfill layer on a substrate. The method further includes attaching a semiconductor die to the substrate. The semiconductor die comprises a bump and a molding compound layer in physical contact with a lower portion of the bump. An upper portion of the bump is in physical contact with the no-flow underfill layer.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: October 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Hung-Jen Lin, Tsung-Ding Wang, Chien-Hsiun Lee, Wen-Hsiung Lu, Ming-Da Cheng, Chung-Shi Liu
  • Patent number: 9288916
    Abstract: A structure includes a substrate on a surface of which a functional element and a first electrode are disposed, wherein the functional element provides a predetermined function by an operation based on an electrical signal and the first electrode is coupled to the functional element; an insulating member in a thin film that covers the surface of the substrate and extends from an end of the substrate; and a second electrode disposed on a substrate-side surface of the extending portion, which is extending from the end of the substrate, of the insulating member, wherein the second electrode is coupled to the first electrode. The second electrode is electrically coupled to a coaxial cable.
    Type: Grant
    Filed: November 6, 2012
    Date of Patent: March 15, 2016
    Assignee: OLYMPUS CORPORATION
    Inventor: Mikio Nakamura
  • Patent number: 8952271
    Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: February 10, 2015
    Assignee: Fujitsu Limited
    Inventors: Masaharu Furuyama, Daisuke Mizutani, Seiki Sakuyama, Toshiya Akamatsu
  • Publication number: 20150009633
    Abstract: A circuit board module includes a first circuit board, an electrically conductive structure, a first bump, a second circuit board and an electrically conductive film. The electrically conductive structure and the first bump are disposed on the supporting surface of the first circuit board. The electrically conductive structure and the first bump respectively have a first maximal thickness T1 and a second maximal thickness T2 along the normal direction of the supporting surface. The second circuit board is disposed on the electrically conductive structure and the first bump. The electrically conductive film is disposed between the second circuit board and the electrically conductive structure, and it has a plurality of electrically conductive particles. An average particle diameter D of the electrically conductive particles when undeformed satisfies: 0<T2?T1?D.
    Type: Application
    Filed: July 2, 2014
    Publication date: January 8, 2015
    Inventors: Chih-Hung CHEN, Po-Fu HUANG, Chih-Hao WANG
  • Patent number: 8923003
    Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.
    Type: Grant
    Filed: February 6, 2012
    Date of Patent: December 30, 2014
    Assignee: Apple Inc.
    Inventors: Alexander D. Schlaupitz, Joshua G. Wurzel
  • Publication number: 20140369008
    Abstract: A flexible electronic component module includes a first substrate and a second substrate. The first substrate overlaps the second substrate to define at least one first exposed portion and at least one second exposed portion. The at least one first exposed portion includes a first electrode layer and the at least one second exposed portion includes a second electrode layer. The first electrode layer is disposed on a lower surface of the first substrate and the second electronic layer is disposed on an upper surface of the second substrate.
    Type: Application
    Filed: December 13, 2013
    Publication date: December 18, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: CHANG YI CHEN, YUNG MIN HSIEH, CHANG HO LIOU
  • Patent number: 8804340
    Abstract: According to an exemplary embodiment, a power semiconductor package includes a power module having a plurality of power devices. Each of the plurality of power devices can be a power switch. The power semiconductor package also includes a double-sided heat sink with a top side in contact with a plurality of power device top surfaces and a bottom side in contact with a bottom surface of the power module. The power semiconductor package can include at least one fastening clamp pressing the top side and the bottom side of the double-sided heat sink into the power module. The double-sided heat sink can also include a water-cooling element.
    Type: Grant
    Filed: June 8, 2011
    Date of Patent: August 12, 2014
    Assignee: International Rectifier Corporation
    Inventor: Henning M. Hauenstein
  • Publication number: 20140168909
    Abstract: Attachment structures for electrically coupling a microelectronic package to a microelectronic board/interposer including joint pads formed on the microelectronic board/interposer which provide a gap between respective openings in a solder resist layer of the microelectronic substrate and each of the joint pads. Such attachment structures may reduce or substantially eliminate contact between a solder interconnect and a solder resist layer of the microelectronic board/interposer, which may, in turn, reduce or substantially eliminate the potential of crack initiation and propagation at contact areas between the solder interconnect and a solder resist layer of the microelectronic board/interposer due to stresses induced by a mismatch of thermal expansion between the microelectronic package and the microelectronic board/interposer during thermal cycling.
    Type: Application
    Filed: December 19, 2012
    Publication date: June 19, 2014
    Inventors: Tieyu Zheng, Jin A. Zhao, Ru Han, Min Pei
  • Patent number: 8410375
    Abstract: A wiring board has a wiring member, a first reinforcing member and a second reinforcing member. The wiring member has wiring layers and insulating layers which are stacked, and the wiring layers include a first connecting electrode formed on a surface of the wiring member and a second connecting electrode formed on a back surface of the wiring member. A pin is formed on the second connecting electrode. The second reinforcing member is formed by a resin and serves to reinforce the wiring member. The first reinforcing member is formed on the whole back surface of the wiring member except for the pin provided on the second connecting electrode.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: April 2, 2013
    Assignee: Shinko Electric Industries Co., Ltd.
    Inventors: Yoshitaka Matsushita, Kazuhiro Oshima, Akio Horiuchi
  • Patent number: 8351213
    Abstract: An electrical assembly including a substantially planar substrate having at least one recess therein and a plurality of electrical components. The electrical components are positioned in the at least one recess and include a first electrical component and a second electrical component. Each of the electrical components has a body and an electrical connection. The electrical connection of the first electrical component and the electrical connection of the second electrical component are aligned with each other when the body of the first electrical component is in a recess and the body of the second electrical component is in a recess.
    Type: Grant
    Filed: May 16, 2007
    Date of Patent: January 8, 2013
    Inventors: Brian Gorrell, Austin A. Saylor
  • Patent number: 8156643
    Abstract: A method of electrically interconnecting a semiconductor chip to another electronic device including providing a carrier including contact pins and a chip attached to the carrier, the chip having a copper contact pad that faces away from the carrier, extending a copper electrical connector between the contact pins and the contact pad, and diffusion soldering the copper electrical connector to the active area with a solder material including tin to form a solder connection including a contiguous bronze coating disposed between and in direct contact with both the copper electrical connector and the contact pad.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: April 17, 2012
    Assignee: Infineon Technologies AG
    Inventors: Manfred Schneegans, Markus Leicht, Stefan Woehlert, Edmund Riedl
  • Patent number: 8134839
    Abstract: A junction structure and a joining method of substrates are provided that stably can join the substrates and achieve high workability during joining. A second substrate 2 to be joined with solder to a first substrate 1 is bent with elasticity generated by a bending portion 9, and first joints 5 on the first substrate 1 and second joints 6 on the second substrate 2 are joined with solder in a state in which the first substrate 1 is brought into contact with, in a direction that increases the bending angle of the bending portion 9, a part where the joints 6 are formed on the second substrate 2.
    Type: Grant
    Filed: July 21, 2009
    Date of Patent: March 13, 2012
    Assignee: Panasonic Corporation
    Inventors: Masahiro Yamazaki, Yasumasa Shibata, Yasuo Ueda
  • Patent number: 8125790
    Abstract: The invention discloses design concepts and means and methods that can be used for enhancing the reliability and extending the operating life of electronic devices, and assemblies incorporating such devices, and substrates and/or PCBs, especially if such assemblies are exposed to severe environmental conditions such as thermal cycling or power cycling. The main thrust of the invention is to provide flexible joints, such as columns, between the attached components, and preferably to orient such joints, so that they would present their softest bending direction towards the thermal center or fixation point of the assemblies. Joints with rectangular or elongated cross-section are preferred, and they should be oriented so that the wide face of each joint would be facing the thermal center, perpendicular to the thermal deformation ray emanating from the thermal center towards the center of each respective joint. The concepts apply equally to leadless packages as well as to leaded packages.
    Type: Grant
    Filed: August 24, 2008
    Date of Patent: February 28, 2012
    Inventor: Gabe Cherian
  • Patent number: 8023269
    Abstract: A circuit assembly (34) resistant to high-temperature and high g centrifugal force is disclosed. A printed circuit board (42) is first fabricated from alumina and has conductive traces of said circuit formed thereon by the use of a thick film gold paste. Active and passive components of the circuit assembly are attached to the printed circuit board by means of gold powder diffused under high temperature. Gold wire is used for bonding between the circuit traces and the active components in order to complete the circuit assembly (34). Also, a method for manufacturing a circuit assembly resistant to elevated temperature is disclosed.
    Type: Grant
    Filed: August 15, 2008
    Date of Patent: September 20, 2011
    Assignees: Siemens Energy, Inc., Arkansas Power Electronics International, Inc.
    Inventors: David J. Mitchell, Anand A. Kulkarni, Ramesh Subramanian, Edward R. Roesch, Rod Waits, Roberto Schupbach, John R. Fraley, Alexander B. Lostetter, Brice McPherson, Bryon Western
  • Patent number: 7968801
    Abstract: The camera module structure (10) of the present invention is arranged such that a board electrode (2) of a printed board (1) and a mounting electrode (4) of a camera module (3) mounted on the printed board (1) are joined with each other through a solder joint section (5), and the board electrode (2) and the mounting electrode (4) are aligned by self-alignment. The solder joint section (5) includes a solder section (16) for solder-joining, and a supporting section (17) for supporting the camera module (3). The present invention realizes a solder mounting structure wherein a heavy-weight component is joined on the board with solder by self-alignment.
    Type: Grant
    Filed: January 25, 2008
    Date of Patent: June 28, 2011
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kazuo Kinoshita
  • Publication number: 20110063805
    Abstract: A method of forming a stack-type semiconductor package includes preparing a lower printed circuit board including a plurality of interconnections and a plurality of ball lands for connection on an upper surface thereof. One or more first chips, which are electrically connected to the plurality of interconnections and sequentially stacked, are mounted on the lower printed circuit board. A lower molded resin compound is formed on the lower printed circuit board to cover the first chips, and is formed to have via holes exposing the ball lands for connection. An upper chip package, under which solder balls are formed, is aligned so that the solder balls correspond to the via holes of the lower molded resin compound, respectively. The solder balls are reflown to form connection conductors filling the via holes. A stack-type semiconductor package structure and an electronic system including the same are also provided.
    Type: Application
    Filed: November 23, 2010
    Publication date: March 17, 2011
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Tae-Hun KIM
  • Patent number: 7758350
    Abstract: An electrical connector for electrically connecting a first electronic device to a second electronic device includes a housing that includes a plurality of solder retention channels that hold a plurality of solder segments in a vertical orientation such that at least a vertical surface and one end of each solder segment are exposed. The solder retention channels are formed in first and second opposing rows with an open space formed therebetween. The exposed vertical surfaces of the solder segments face one another.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: July 20, 2010
    Assignee: Teka Interconnection Systems
    Inventors: James R. Zanolli, Joseph S. Cachina
  • Patent number: 7722962
    Abstract: A solder foil formed from a material comprising particles of Cu, etc. as metal particles and Sn particles as solder particles by rolling is suitable for solder bonding at a high temperature side in temperature-hierarchical bonding, and semiconductor devices and electronic devices produced by use of such solder bonding have distinguished reliability of mechanical characteristics, etc.
    Type: Grant
    Filed: December 19, 2001
    Date of Patent: May 25, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Tasao Soga, Hanae Hata, Toshiharu Ishida, Kanko Ishida, legal representative, Tetsuya Nakatsuka, Masahide Okamoto, Kazuma Miura
  • Publication number: 20100085715
    Abstract: A manufacturing method and manufacturing system for creating a modular electronic assembly are disclosed. The manufacturing system 300 may position a contact terminal 202 of a printed electronic component module 102 relative to a contact pad 204 of a printed electronic substrate 112. The manufacturing system 300 may connect the contact terminal 202 to the contact pad 204 using a conductive adhesive connection 116.
    Type: Application
    Filed: October 7, 2008
    Publication date: April 8, 2010
    Applicant: Motorola, Inc.
    Inventors: Steven M. Scheifers, Hope W. Chik, Andrew F. Skipor
  • Patent number: 7606041
    Abstract: A circuit board apparatus of a battery pack in which tape is attached to low priced flexible printed circuit boards (FPCB) so that it is possible to prevent cracks from being generated in the FPCBs when the FPCBs are bent. The circuit board apparatus includes a first board, a second board, and a bendable third board with one side electrically connected to one side of the first board, and the other side electrically connected to one side of the second board. The first board is oblique to the second board, or the first board is substantially perpendicular to the second board. Protective tape is provided on a first region where the first board and the third board overlap, and in a second region where the second board and the third board overlap.
    Type: Grant
    Filed: December 12, 2006
    Date of Patent: October 20, 2009
    Assignee: Samsung SDI Co., Ltd.
    Inventor: Junyoung Park
  • Patent number: 7595997
    Abstract: In a multilayer ceramic electronic component, a pedestal portion is provided on a region of a first main surface of a multilayer ceramic body and includes a non-metallic inorganic powder and a resin so that the pedestal portion is fixed to the first main surface with at least the resin, the multilayer ceramic body being formed by stacking a ceramic base material layer and a shrinkage-inhibiting layer having a predetermined conductor pattern. Also, a via hole conductor is disposed in the pedestal portion so that one of the end surfaces is exposed in a surface of the pedestal portion, and a surface mounting-type electronic component such as a semiconductor element is connected, through a conductive binder, to the one of the end surfaces of the via hole conductor exposed in the surface of the pedestal portion. A resin is provided between the surface mounting-type electronic component and the pedestal portion, the resin having the same composition as in the resin of the pedestal portion.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: September 29, 2009
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Masato Nomiya, Norio Sakai, Mitsuyoshi Nishide
  • Patent number: 7566592
    Abstract: The principles described herein relate to methods for soldering electrode terminals, pins or lead-frames of commercial electric components for high temperature reliability. In one embodiment, prior to soldering the electric components, a pre-plated solder layer is removed from the lead frame or pins, and nickel and/or gold films are formed with electroless plating. The removal of the pre-plated solder layer avoids excess pre-plated Sn with high-Pb solder that lowers the melting point to between 180° C. and 220° C. and weakens solder joints. The nickel layer formed with an electroless plating acts as a barrier to the interdiffusion of tin from solder with copper of the lead frame material, which may otherwise occur at high temperatures. Interdiffusion forms an intermetallic compound layer of copper and tin and degrades solder joint strength. The novel soldering processes improve high temperature reliability of solder joints and extend electronics life-time.
    Type: Grant
    Filed: October 26, 2006
    Date of Patent: July 28, 2009
    Assignee: Schlumberger Technology Corporation
    Inventors: Shigeru Sato, Jiro Takeda, Atsushi Kayama, So Suzuki, Lionel Beneteau
  • Patent number: 7521789
    Abstract: An electrical assembly, comprising a heat producing semiconductor device supported on a first major surface of a direct bond metal substrate that has a set of heat sink protrusions supported by its second major surface. In one preferred embodiment the heat sink protrusions are made of the same metal as is used in the direct bond copper.
    Type: Grant
    Filed: December 18, 2004
    Date of Patent: April 21, 2009
    Assignee: Rinehart Motion Systems, LLC
    Inventors: Lawrence E. Rinehart, Guillermo L. Romero
  • Publication number: 20090091895
    Abstract: An electronic circuit module includes a circuit substrate whose two opposite side surfaces are provided with cutout portions; and a box-shaped cover body made of a metallic plate and having two claw segments individually disposed within the cutout portions, the cover body being attached to the circuit substrate so as to cover the top surface thereof. The circuit substrate has notches extending linearly inward beyond the opposite ends of each cutout portion from the corresponding side surface of the circuit substrate. The opposite ends of each claw segment in the width direction thereof are disposed facing linear sections of the corresponding notches within the corresponding cutout portion.
    Type: Application
    Filed: September 29, 2008
    Publication date: April 9, 2009
    Applicant: ALPS ELECTRIC CO., LTD.
    Inventor: Yoshikiyo WATANABE
  • Patent number: 7433201
    Abstract: The invention discloses design concepts and means and methods that can be used for enhancing the reliability and extending the operating life of electronic devices, and assemblies incorporating such devices, and substrates and/or PCBs, especially if such assemblies are exposed to severe environments such as thermal cycling or power cycling. The main thrust of the invention is to provide flexible joints, such as columns, between the attached components, and preferably to orient such joints, so that they would present their softest bending direction towards the thermal center or fixation point of the assemblies. Joints with rectangular or elongated cross-section are preferred, and they should be oriented so that the wide face of each joint would be facing the thermal center, perpendicular to the thermal deformation ray emanating from the thermal center towards the center of each respective joint. The concepts apply equally to leadless packages as well as to leaded packages.
    Type: Grant
    Filed: January 26, 2004
    Date of Patent: October 7, 2008
    Inventor: Gabe Cherian
  • Publication number: 20080184550
    Abstract: A method for manufacturing an integrated circuit device having antenna conductors is provided. The method includes the steps of providing a wafer with a plurality of integrated circuit components; forming a first antenna conductor on the surface of each integrated circuit component; forming a plurality of metal bumps above the first antenna conductor; coating an insulating layer to encapsulate the plurality of integrated circuit components and to cover the plurality of metal bumps; removing a portion of the insulating layer to expose a top portion of each metal bump; and forming a second antenna conductor on the insulating layer by screen printing.
    Type: Application
    Filed: February 5, 2008
    Publication date: August 7, 2008
    Applicant: MUTUAL-PAK TECHNOLOGY CO., LTD.
    Inventors: Lu-Chen Hwan, P.C. Chen, Yu-Lin Ma
  • Patent number: 7295445
    Abstract: Methods and apparatus to couple a device, such as, for example, a surface mount device, with a substrate, such as, for example, a printed circuit, are disclosed. An apparatus, according to one aspect, may include a substrate, a plurality of terminals coupled with the substrate, a conductive bonding material coupled with the plurality of terminals, an electronic device coupled with the conductive bonding material, and a holder that is coupled with the substrate to hold the electronic device. A method, according to one aspect, may include coupling a holder with a substrate such that terminals of the substrate are included in an opening of the holder, mounting an electronic device over the terminals with a conductive bonding material disposed therebetween, heating the conductive bonding material to its melting point, and cooling the conductive bonding material.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventor: Jang My
  • Patent number: 7197819
    Abstract: A method of assembling and providing an electric power apparatus. The method uses a heat resistant housing having a structure adapted to accommodate and retain a power circuit card and also including a bracket adapted to accommodate and constrain a rigid conductive member. A power circuit card having an electrical terminal is placed into the housing and a rigid conductive member into the bracket. The rigid conductive member is flow soldered to the electrical terminal, thereby exposing the heat resistant housing to heat and creating a solder bond. Finally, the rigid conductive member is affirmatively connected to the housing. The bracket constrains the rigid conductive member so that the act of affirmatively connecting does not weaken the solder bond.
    Type: Grant
    Filed: December 18, 2004
    Date of Patent: April 3, 2007
    Assignee: Rinehart Motion Systems, LLC
    Inventors: Lawrence E. Rinehart, Guillermo L. Romero
  • Patent number: 7122905
    Abstract: Packaged microelectronic devices, methods of manufacturing packaged microelectronic devices, and method of mounting packaged microelectronic devices to printed circuit boards. One embodiment can include a die, an interposer substrate, a solder-ball, and a dielectric compound. The die can have an integrated circuit and at least one bond-pad coupled to the integrated circuit. The interposer substrate is coupled to the die and can have at least one ball-pad electrically coupled to the bond-pad on the die. The interposer substrate can also have a trace line adjacent to the ball-pad, and a solder-mask having an opening over the ball-pad. The solder-ball can contact the ball-pad in the opening. The dielectric compound can insulate the ball-pad and the solder-ball from an exposed portion of the adjacent trace line in the opening.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: October 17, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Ford B. Grigg
  • Patent number: 7045902
    Abstract: A circuitized substrate has contact pads for mounting a Surface Mount Device (SMD). First and second contact pads are located on a surface of the substrate corresponding to a first terminal and a second terminal of the SMD. The first and the second contact pads have a plurality of expanded portion or diminished portions to form bead receptacles at the facing corners thereof. When solder paste is reflowed to electrically connect the SMD, solder beads formed from the solder paste can be fixed on the bead receptacles. Therefore, there is no free solder bead on the substrate causing short circuit for semiconductor packages.
    Type: Grant
    Filed: October 15, 2004
    Date of Patent: May 16, 2006
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Sheng-Tsung Liu
  • Patent number: 6959489
    Abstract: A method of making a microelectronic package includes providing a substrate having a plurality of conductive leads at a first surface of the substrate. The conductive leads may have first ends permanently attached to the substrate and second ends remote from the terminal ends, the second ends being movable relative to the first ends of the leads. One or more microelectronic elements having contact bearing surfaces and back surfaces remote therefrom may be juxtaposed with the substrate and the contacts connected with the first ends of the leads. A substantially rigid plate may be attached to the back surfaces of the microelectronic elements. The substantially rigid plate may be moved to a precise height above the substrate to vertically extend the leads. While the plate is maintained at the precise height above the substrate, a spacer material is dispensed between the plate and the substrate. The spacer material is then at least partially cured for holding the plate at the precise height above the substrate.
    Type: Grant
    Filed: September 19, 2001
    Date of Patent: November 1, 2005
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Michael Warner
  • Patent number: 6853542
    Abstract: A video-apparatus-tuner mounting board includes a television tuner mounted on the board; a predetermined circuit to be connected to pins connected to an internal circuit of the television tuner; through holes arranged in a line, into which pins are inserted; and conductor lands, formed around the through holes, to be connected to the pins. Of the conductor lands, first conductor lands connected to the pins of a specific television tuner to be mounted on the board are connected to the predetermined circuit and to second conductor lands, which are not connected to the pins of the specific television tuner.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: February 8, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventor: Michinori Sasaki
  • Publication number: 20040246688
    Abstract: The present invention provides a number of techniques for laminating and interconnecting multiple substrates to form a multilayer package or other circuit component. A solder bump may be formed on the conductive pad of at least one of two or more substrates. The solder bump preferably is formed from an application of solder paste to the conductive pad(s). Adhesive films may be positioned between the surfaces of the substrates having the conductive pads, where the adhesive films include apertures located substantially over the conductive pads such that the conductive pads and/or solder bumps confront each other through the aperture. The two or more substrates then may be pressed together to mechanically bond the two or more substrates via the adhesive films. The solder bump(s) may be reflowed during or after the lamination to create a solder segment that provides an electrical connection between the conductive pads through the aperture in the adhesive films.
    Type: Application
    Filed: April 21, 2004
    Publication date: December 9, 2004
    Applicant: General Dynamics Advanced Information Systems, Inc.
    Inventors: Deepak K. Pai, Ronald R. Denny
  • Publication number: 20040231152
    Abstract: A method for utilizing one or more pre-formed underfill compositions in the application of surface mount components, most commonly chip scale packages (CSP's), to substrates for use in electronic devices. The pre-formed underfill of the invention is applied directly to the top and/or sides of the CSP before the reflow process and softens during reflow to flow across the circuit/board gap. One underfill composition utilized for this method comprises a thermoplastic film system that provides a coating on the component that is smooth and non-tacky. The film may be applied selectively to parts of the CSP such that it overhangs the top of the component and upon reflow flows over the edge of the CSP to form a connection with the substrate. A second pre-applied underfill composition or solder paste may be applied as an adhesive to provide sufficient tack in order to hold the electronic assembly together during the assembly process and to serve as a flux to facilitate solder wetting.
    Type: Application
    Filed: May 23, 2003
    Publication date: November 25, 2004
    Inventors: Paul Morganelli, David Peard, Jayesh Shah, Douglas Katze
  • Publication number: 20040178250
    Abstract: The invention discloses design concepts and means and methods that can be used for enhancing the reliability and extending the operating life of electronic devices, and assemblies incorporating such devices, and substrates and/or PCBs, especially if such assemblies are exposed to severe environments such as thermal cycling or power cycling. The main thrust of the invention is to provide flexible joints, such as columns, between the attached components, and preferably to orient such joints, so that they would present their softest bending direction towards the thermal center or fixation point of the assemblies. Joints with rectangular or elongated cross-section are preferred, and they should be oriented so that the wide face of each joint would be facing the thermal center, perpendicular to the thermal deformation ray emanating from the thermal center towards the center of each respective joint. The concepts apply equally to leadless packages as well as to leaded packages.
    Type: Application
    Filed: January 26, 2004
    Publication date: September 16, 2004
    Inventor: Gabe Cherian
  • Patent number: 6791184
    Abstract: A support assembly for supporting an integrated circuit package with an array of solder columns extending from a bottom surface of the integrated circuit package to a circuit board preferably includes: a pair of shims for supporting the integrated circuit package, the shims being positioned along opposite edges of the integrated circuit package and placed between and abutting the integrated circuit package and the circuit board; and a retention clip for aligning and securing in place the pair of shims.
    Type: Grant
    Filed: July 23, 2002
    Date of Patent: September 14, 2004
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Jeffrey L Deeney, Laszlo Nobi, Joseph D. Dutson
  • Patent number: 6750081
    Abstract: A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material and joined together to form a frame around an area substantially the same as the area of the components board. A plurality of metal pins are located in the frame, each having one end extending from said frame such that these ends can be soldered to the components board concurrently with the solder attachment of the components to the board. The other ends of the pins can be formed so that they are adjusted for either through-hole attachment to circuit boards, or for surface mounting.
    Type: Grant
    Filed: May 8, 2003
    Date of Patent: June 15, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Kristopher K. Neild, Claude Fernandez, Charles Schaefer
  • Patent number: 6693801
    Abstract: An electronic device includes a wiring board, and at least one pair of signal lines that is provided on the wiring board in parallel and has an equal length. A chip is mounted on the wiring board and includes at least one differential driver which outputs complementary digital transmit signals to said at least one of lines. A pair of power system lines is provided to supply first and second power supply voltages to the above-mentioned at least one differential driver. The power system lines are parallel to each other and have an equal length.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: February 17, 2004
    Inventor: Kanji Otsuka
  • Patent number: 6690088
    Abstract: A stack of integrated circuits in thin small outline packages (TSOP's) is constructed with an air space in between adjacent packages. The TSOP's have a plurality of connection terminals extending therefrom. A lead frame is disposed adjacent to the packages, positioned medially of the air space and having a plurality of connection terminals in registration with and in electric contact with the plurality of TSOP connection terminals. The TSOP's have a chip select terminal and several unused terminals. The lead frame has a strain-relieved conductor extending between the chip select terminal on a TSOP higher in the stack to the adjacent TSOP lower in the stack. Moreover, TSOP locating surfaces are included on the lead frame in the finished stack.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: February 10, 2004
    Inventor: Donald M. MacIntyre
  • Publication number: 20040012930
    Abstract: Packaged microelectronic devices, methods of manufacturing packaged microelectronic devices, and method of mounting packaged microelectronic devices to printed circuit boards. One embodiment can include a die, an interposer substrate, a solder-ball, and a dielectric compound. The die can have an integrated circuit and at least one bond-pad coupled to the integrated circuit. The interposer substrate is coupled to the die and can have at least one ball-pad electrically coupled to the bond-pad on the die. The interposer substrate can also have a trace line adjacent to the ball-pad, and a solder-mask having an opening over the ball-pad. The solder-ball can contact the ball-pad in the opening. The dielectric compound can insulate the ball-pad and the solder-ball from an exposed portion of the adjacent trace line in the opening.
    Type: Application
    Filed: July 15, 2003
    Publication date: January 22, 2004
    Inventor: Ford B. Grigg
  • Patent number: 6664622
    Abstract: A low-cost header for connecting an electronic components board to a circuit board is disclosed, consisting of side walls made of an unwarpable plastic material and joined together to form a frame around an area substantially the same as the area of the components board. A plurality of metal pins are located in the frame, each having one end extending from said frame such that these ends can be soldered to the components board concurrently with the solder attachment of the components to the board. The other ends of the pins can be formed so that they are adjusted for either through-hole attachment to circuit boards, or for surface mounting.
    Type: Grant
    Filed: February 9, 2001
    Date of Patent: December 16, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Kristopher K. Neild, Claude Fernandez, Charles Schaefer
  • Patent number: 6661674
    Abstract: In a system having two printed circuit boards, each printed circuit board is provided with at least one electrical contact element for electrically interconnecting the printed circuit boards. One of the electrical contact elements includes at least one electroconductive pin formed from one of the printed circuit boards, while the other electrical contact element is formed by at least one recess in the other printed circuit board, a wall of the recess being covered with an electrically conducting layer.
    Type: Grant
    Filed: July 26, 2001
    Date of Patent: December 9, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Johannes Franciscus Adrianus Reniers
  • Patent number: 6651321
    Abstract: A Microelectronic Bonding processes wherein a microelectronic element is connected with a connection component having a polymeric body, and a bonding material is provided between contacts on the microelectronic element and conductive features of the connection component. The microelectronic element is heated so as to activate the bonding material, and then cooled, leaving said contacts on said microelectronic element bonded to said conductive features on the connection component. The connection component is maintained at an average temperature below the glass transition temperature of the polymer in the connection component during the heating and cooling steps.
    Type: Grant
    Filed: March 10, 2000
    Date of Patent: November 25, 2003
    Assignee: Tessera, Inc.
    Inventors: Masud Beroz, Belgacem Haba, Klaus-Jurgen Wolter