Abstract: Embodiments of the present disclosure are directed towards a circuit board having integrated passive devices such as inductors, capacitors, resistors and associated techniques and configurations. In one embodiment, an apparatus includes a circuit board having a first surface and a second surface opposite to the first surface and a passive device integral to the circuit board, the passive device having an input terminal configured to couple with electrical power of a die, an output terminal electrically coupled with the input terminal, and electrical routing features disposed between the first surface and the second surface of the circuit board and coupled with the input terminal and the output terminal to route the electrical power between the input terminal and the output terminal, wherein the input terminal includes a surface configured to receive a solder ball connection of a package assembly including the die. Other embodiments may be described and/or claimed.

Abstract: A semiconductor package may include: a substrate including a core layer having a first surface and a second surface which is opposite to the first surface, a wiring layer formed over the first and second surfaces and in an inside of the core layer, and having a first electrode disposed in the inside of the core layer and exposed from the core layer and a second electrode disposed over the first surface, and a passivation layer formed over the first and second surface of the core layer such that the first and the second electrodes are exposed; a first semiconductor chip disposed over the first surface of the core layer; a second semiconductor chip stacked over the first semiconductor chip; a first connection member for connecting the first semiconductor chip with the first electrode; and a second connection member for connecting the second semiconductor chip with the second electrode.

Abstract: The present invention discloses a printed circuit board, a semiconductor package having the same, and a method for manufacturing the same. A printed circuit board according to an aspect of the present invention includes: a package board including a mounting area and a peripheral area, the mounting area having a semiconductor chip mounted therein, the peripheral area surrounding the mounting area; a first central circuit pattern formed in the mounting area on one surface of the package board; a second central circuit pattern formed in the mounting area on the other surface of the package board and having a greater thickness than the first central circuit pattern; a first peripheral circuit pattern formed in the peripheral area on the one surface of the package board; and a second peripheral circuit pattern formed in the peripheral area on the other surface of the package board and having a greater thickness than the second peripheral circuit pattern.

Abstract: A method of manufacturing a circuit board includes forming a first electrode on a support substrate, covering the support substrate and the first electrode with a first insulating layer, polishing the first insulating layer to expose a first surface of the first electrode, forming a first wiring on the first insulating layer after exposing the first surface of the first electrode, the first wiring being connected to the first electrode, and removing the support substrate to expose a second surface of the first electrode after forming the first wiring.

Abstract: Devices and methods related to packaging of radio-frequency (RF) devices on ceramic substrates. In some embodiments, a packaged electronic device can include a ceramic substrate configured to receive one or more components. The ceramic substrate can include a conductive layer in electrical contact with a ground plane. The packaged electronic device can further include a die having an integrated circuit and mounted on a surface of the ceramic substrate. The packaged electronic device can further include a conformal conductive coating implemented over the die to provide shielding functionality. The packaged electronic device can further include an electrical connection between the conformal conductive coating and the conductive layer.

Abstract: A power module includes a power module body portion and a wiring board. The power module body portion includes P-side semiconductor elements and N-side semiconductor elements, and a P-side terminal connection portion, a U-phase terminal connection portion, and an N-side terminal connection portion which establish electrical connection with the wiring board on an upper surface of the power module body portion and into which a current flows from the wiring board and from which a current flows to the wiring board.

Abstract: Provided is a semiconductor package including a wiring substrate having top and bottom surfaces facing each other. A first semiconductor chip is disposed on the wiring substrate in a flip-chip manner. The first semiconductor chip has a first surface facing the top surface of the wiring substrate and a second surface opposite to the first surface. First connection members are disposed between the wiring substrate and the first semiconductor chip. The first connection members include first and second contact members each including one or more magnetic materials. The first contact members include portions disposed in the second contact members. The one or more magnetic material of the first contact members have an opposite polar orientation to that of the second contact members.

Abstract: An electronic board includes conducting traces having an upper surface at least partially sunken with respect to a gluing surface of the board. A surface mount technology electronic device for mounting to the board includes insulating windows that define gluing sites within one or more pins. An electronic system is formed by one or more of such surface mount technology electronic devices mounted to electronic board. The devices are attached using a wave soldering technique that flows through channels formed by the sunken conductive traces.

Abstract: Provided is a heat curable adhesive that can strongly bond a base material formed of a crystalline polyester resin, can freely regulate the thickness of an adhesive layer, has excellent chemical resistance, and, at the same time, has excellent storage stability. Furthermore, provided is a resin laminated-type IC card, in which a liquid heat curable adhesive of which use has been difficult in the past can be used, and the liquid heat curable adhesive can be coated with a good accuracy by a printing method without the need to perform molding into a hot-melt sheet to bond a base material formed of a crystalline polyester resin. Accordingly, the resin laminated-type IC card can have a high degree of freedom in design of the thickness of an IC card. The heat curable adhesive comprises (a) a hydroxyl group-containing non-crystalline polyester resin, (b) a resin containing a carboxylic acid anhydride, and (c) a solvent for dissolving (a) the hydroxyl group-containing non-crystalline polyester resin.

Abstract: The embodiments described herein describe technologies for memory systems. One implementation of a memory system includes a motherboard substrate with multiple module sockets, at least one of which is populated with a memory module. A first set of data lines is disposed on the motherboard substrate and coupled to the module sockets. The first set of data lines includes a first subset of point-to-point data lines coupled between a memory controller and a first socket and a second subset of point-to-point data lines coupled between the memory controller and a second socket. A second set of data lines is disposed on the motherboard substrate and coupled between the first socket and the second socket. The first and second sets of data lines can make up a memory channel.

Abstract: A method for patterning a layer stack with at least one ceramic layer includes providing the ceramic layer, which has at least one plated-through hole. An electrically conductive layer is applied above the ceramic layer, such that the electrically conductive layer is electrically coupled to the at least one plated-through hole. A further layer is deposited onto the electrically conductive layer in the region of the at least one plated-through hole, wherein the further layer includes nickel. The electrically conductive layer is removed outside the region of the at least one plated-through hole. A carrier device patterned in this way can be electrically and mechanically coupled to an electronic component.

Abstract: A circuit board upon which to mount an integrated circuit chip may include a first interconnect zone on the surface of the circuit board having first contacts with a first pitch, and a second interconnect zone, surrounding the first zone, having second contacts or traces with a second pitch that is smaller than the first pitch. The first contacts may have a design rule (DR) for direct chip attachment (DCA) to an integrated circuit chip. The first contacts may be formed by bonding a sacrificial substrate having the first contacts to a surface of the board; or by laser scribing trenches where the conductor will be plated to create the first contacts. Such a board allows DCA of smaller footprint processor chips for devices, such as tablet computers, cell phones, smart phones, and value phone devices.

Abstract: One disclosed embodiment comprises formation of a padless via in a substrate. The padless via includes a hole through a metal layer blanketing the substrate, as well as the underlying substrate. An inner wall of the padless via hole receives a seed layer of a conductive material. Electrolytic differential plating is then performed, resulting in a preferential accumulation of a conductive plating material on the via inner wall, relative to that deposited on a surface of the substrate. In one embodiment, the differential plating is performed by addition of an organic suppressant to a plating bath.

Abstract: A semiconductor device according to the present invention includes a ceramic substrate, a plurality of circuit patterns arranged on a surface of the ceramic substrate, a semiconductor element arranged on an upper surface of at least one circuit pattern, and a sealing resin for sealing the ceramic substrate, the plurality of circuit patterns, and the semiconductor element, in which an undercut part is formed in opposed side surfaces of the circuit patterns adjacent to one another, the undercut part is configured such that an end of an upper surface of the circuit pattern protrudes outside the circuit pattern more than an end of a lower surface of the circuit pattern on the ceramic substrate, and the undercut part is also filled with the sealing resin.

Abstract: A semiconductor module includes a printed circuit board, a ceramic substrate and a semiconductor chip. The printed circuit board includes an insulating material, a cutout formed in the insulating material, and a first metallization layer, which is partly embedded into the insulating material. The first metallization layer includes a conductor track projection projecting into the cutout. The ceramic substrate includes a dielectric, ceramic insulation carrier, and an upper substrate metallization applied to a top side of the insulation carrier. The semiconductor chip is arranged on the upper substrate metallization, and the first metallization layer is mechanically and electrically conductively connected to the upper substrate metallization at the conductor track projection.

Abstract: Provided herein are technologies generally relating to creating connections and/or associations. In some examples, the embodiments can relate to a circuit that includes a surface, a first electrical contact that is attached to the surface, a glass substrate, a second electrical contact that is attached to the glass substrate, and at least one elastomer layer. In some embodiments, the elastomer layer can provide or assist in creating a contact between the first electrical contact and the second electrical contact.

Abstract: A substrate and an electronic device including the substrate are described. The substrate includes a first surface configured such that a semiconductor package or a semiconductor die is installable thereon, and a second surface facing the first surface, wherein, with respect to a central plane disposed between the first surface and the second surface at equal distances therefrom, a coefficient of thermal expansion in a first portion between the first surface and the central plane is configured to be higher than a coefficient of thermal expansion in a second portion between the second surface and the central plane configured to be. By using the substrate, undesirable overall shape deformation during semiconductor installation may be reduced or relieved.

Abstract: A bleed channel electronic component package includes a substrate having an upper solder mask. To mount an electronic component to the substrate, an inactive surface of the electronic component is placed into an adhesive on the substrate. As the adhesive is squeezed between the electronic component and the upper solder mask, the adhesive bleeds laterally outwards past sides of the electronic component. However, bleed channels are formed in the upper solder mask directly adjacent and around the electronic component. Thus, the adhesive bleed flows into the bleed channels, and is captured therein. In this manner, the lateral spread of the adhesive bleed is minimized.

Abstract: Disclosed herein is a device comprising a first package having a first side with a plurality of connectors disposed thereon and a second package mounted on the first package by the connectors. A molding compound is disposed on the first side of the first package and between the first package and the second package. A plurality of stress relief structures (SRSs) are disposed in the molding compound, the plurality of SRSs each comprising a cavity free of metal in the molding compound and spaced apart from each of the plurality of connectors.

Abstract: An electronic device may be provided with integrated circuits and electrical components such as capacitors that are soldered to printed circuit boards. Liquid polymer adhesive such as encapsulant and underfill materials may be deposited on the printed circuit. Electrical components such as capacitors may be coated with the encapsulant. The underfill may be deposited adjacent to an integrated circuit, so that the underfill wicks into a gap between the integrated circuit and the printed circuit board. The encapsulant may be more viscous than the underfill and may therefore prevent the flowing underfill from reaching the electrical components. Some of the encapsulant may be located between the electrical components and the printed circuit board. The encapsulant can be cured to form an elastomeric material covering the electrical components that helps damp vibrations. The elastomeric material may be less stiff than the underfill.

Abstract: Even in an electronic device where electrodes are coupled electrically using a solder, sections to which electrodes of an electronic component are coupled are switched by a method other than changing circuits of the electronic component or changing circuits of a wiring substrate. The electronic device includes: a wiring substrate having two or more first electrodes over one surface thereof; and an electronic component having, over one surface thereof, two or more second electrodes arranged corresponding to the two or more first electrodes, respectively. At least one of the first electrodes is a specific electrode divided into two or more divided portions, and the divided portions are coupled to different wirings, respectively. Further, at least one of the divided portions is coupled to a corresponding second electrode through a solder.

Abstract: An object of the present invention is to provide an epoxy resin composition that provides, when used for an insulation layer of a multilayer printed wiring board, a multilayer printed wiring board which is excellent in plating adhesion, heat resistance and moisture resistance reliability and capable of forming fine wiring. Another object of the present invention is to provide a resin sheet, a prepreg, a method for producing a multilayer printed wiring board, a multilayer printed wiring board and a semiconductor device. These objects are achieved by an epoxy resin composition comprising (A) an epoxy resin, (B) a phenoxy resin having a specific bisphenol acetophenone structure and (C) a curing agent, wherein the content of the phenoxy resin (B) is 10 to 30% by weight of the total solid content of the resin composition.

Abstract: Disclosed herein is an interposer substrate, including: a core layer and a through core via (TCV) penetrating through the core layer; circuit wirings formed on both surfaces of the core layer and a TCV upper pad and a TCV lower pad which are each bonded to upper and lower surfaces of the TCV formed on both surfaces of the core layer; upper insulating layers covering the TCV upper pad and the circuit wiring formed on one surface of the core layer and having the circuit wirings formed on upper surfaces thereof; a stack via penetrating through the upper insulating layers of each layer and having one end connected to the TCV upper pad; and a lower insulating layer covering the TCV lower pad and the circuit wiring formed on the other surface of the core layer and provided with an opening which exposes the TCV lower pad.

Abstract: A substrate board includes an electrical connection network on a face thereof. An integrated-circuit chip is mounted to the face of the substrate board in electrical contact with the electrical connection network. A local reinforcing or balancing layer made of a non-metallic material is mounted to the face of the substrate board in at least one local zone free of the face which is free of metal portions of the electrical connection network.

Abstract: A chip-on-glass device comprises a chip-on-glass substrate, a metal layer, and a plurality of chip-on-glass connection bumps. The metal layer comprises a plurality of passive jumper routing traces. The plurality of chip-on-glass connection humps is coupled with passive jumper routing traces of the plurality of passive jumper routing traces.

Abstract: A printed circuit board includes an insulating layer; a via in the insulating layer, a first circuit layer formed at a first side of the insulating layer and having a portion buried in the via; a second circuit layer formed at a second side of the insulating layer and electrically connected with the portion of the first circuit layer in the via.

Abstract: A circuit board includes an electric circuit having a wiring section and a pad section in the surface of an insulating base substrate. The electric circuit is configured such that a conductor is embedded in a circuit recess formed in the surface of the insulating base substrate, and the surface roughness of the conductor is different in the wiring section and the pad section of the electric circuit. In this case, it is preferable that the surface roughness of the conductor in the pad section is greater than the surface roughness of the conductor in the wiring section.

Abstract: A stacked semiconductor device includes a first semiconductor package and a second semiconductor package stacked thereon, and further includes a plate member interposed between the first semiconductor package and the second semiconductor package. The plate member has a plate body, protruding strips protruding toward its edges from the plate body, and leg portions respectively provided on the protruding strips. Each of the leg portions is disposed on a surface, which opposes one surface of a wiring substrate, of the protruding strip, and contacts the one surface of the wiring substrate. Thus, defective connection of connecting terminals due to warping of the wiring substrate and loading inclination of the first semiconductor package is reduced, resulting in an improved yield.

Abstract: A probe card for conducting an electrical test on a test subject includes a substrate body including a first surface, which faces toward the test subject, and a second surface, which is opposite to the first surface. A through electrode extends through the substrate body between the first surface and the second surface. A contact bump is formed in correspondence with the electrode pad and electrically connected to the through electrode. An elastic body is filled in an accommodating portion, which is formed in the substrate body extending from the first surface toward the second surface. The contact bump is formed on the elastic body.

Abstract: An electronic device may contain components such as flexible printed circuits and rigid printed circuits. Electrical contact pads on a flexible printed circuit may be coupled electrical contact pads on a rigid printed circuit using a coupling member. The coupling member may be configured to electrically couple contact pads on a top surface of the flexible circuit to contact pads on a top surface of the rigid circuit. The coupling member may be configured to bear against a top surface of the flexible circuit so that pads on a bottom surface of the flexible circuit rest against pads on a top surface of the rigid circuit. The coupling member may bear against the top surface of the flexible circuit. The coupling member may include protrusions that extend into openings in the rigid printed circuit. The protrusions may be engaged with engagement members in the openings.

Abstract: A method for attaching a metal surface to a carrier is provided, the method including: forming a first polymer layer over the metal surface; forming a second polymer layer over a surface of the carrier; and bringing the first polymer layer into physical contact with the second polymer layer such that at least one of an interpenetrating polymer structure and an inter-diffusing polymer structure is formed between the first polymer layer and the second polymer layer.

Abstract: There is provided an interposer for cooling an electronic component. The interposer includes: a substrate body having a hollow cooling channel therein, wherein a cooling medium flows through the cooling channel, the cooling channel including: a plurality of main cooling channels extending in a certain direction and separated from each other; an inflow channel which is communicated with one end of the respective main cooling channels; and an outflow channel which is communicated with the other end of the respective main cooling channels, and a plurality of through electrode groups each comprising a plurality of through electrodes arranged in a line. Each of the though electrodes is formed through the substrate body to reach the first and second surfaces of the substrate body. The respective through electrode groups are partitioned by at least corresponding one of the main cooling channels.

Abstract: A securing device for securing an electric device having a groove is disclosed. The securing device includes a base and a buckle-hook module. The base covers a portion of the electric device and has a connecting part corresponding to the groove. An operating unit and a buckle-hook unit of the buckle-hook module are rotatably disposed in the connecting part. The operating unit has a first position and a second position. The buckle-hook unit has an insert part. A resetting unit of tile buckle-hook module is disposed between the buckle-hook unit and the connecting part, so that the buckle-hook unit is rotated to and from. When the operating unit is moved from the first position to the second position, the insert part inserts into the groove, for securing the electric device.

Abstract: An electronic device includes first to third terminals and a clip. The clip includes first to third joint portions and a connection portion. The first to third joint portions correspond to and are bonded to the first to third terminals, respectively. The connection portion connects the first to third joint portions. One terminal in the first to third terminals has a depressed portion depressed to one side in a predetermined direction to store a conductive bonding material. A variation in positions of the first to third terminals in the predetermined direction is absorbed by deformation of the conductive bonding material when one joint portion in the first to third joint portions corresponding to the one terminal is bonded to the one terminal through the conductive bonding material.

Abstract: A microelectronic assembly includes a dielectric element, first and second microelectronic elements, signal leads, and one or more jumper leads. The dielectric element has oppositely-facing first and second surfaces and first and second apertures extend between the surfaces. A plurality of electrically conductive elements are positioned thereon. Signal leads are connected to one or more of the microelectronic elements and extend through one or more of the first or second apertures to some of the conductive elements on the dielectric element. One or more jumper leads extend through the first aperture and are connected to a contact of the first microelectronic element. The one or more jumper leads span over the second aperture and are connected to a conductive element on the dielectric element.

Abstract: Embodiments of the present disclosure are directed towards techniques and configurations for interconnect structures embedded in a package assembly including a bridge. In one embodiment, a package assembly may include a package substrate, a bridge embedded in the package substrate and including a bridge substrate, and an interconnect structure including a via extending through the package substrate into a surface of the bridge substrate and configured to interface with a conductive feature disposed on or beneath the surface of the bridge substrate. The interconnect structure may be configured to route electrical signals between the conductive feature and a die mounted on the package substrate. Other embodiments may be described and/or claimed.

Abstract: A multi-chip socket including multiple cavities. The multiple cavities include support surfaces. The support surfaces may be disposed at different heights relative to a reference plane. A first thermal interface is to thermally contact a top surface of the first component, and a second thermal interface is to thermally contact a top surface of the second component.

Abstract: A non-planar printed circuit board has an interior surface and an exterior surface. Between the interior surface and exterior surfaces are layers of conductive and dielectric materials. Passive and active electrical components are embedded within the interior and exterior surfaces. A hollow region is defined by the interior surface of the non-planar circuit board. The non-planar printed circuit board is manufactured on a mandrel having a non-planar shape such as, for example, a cylinder or sphere so as to form a hollow, curved non-planar structure.

Abstract: A device includes: a wiring board having first and second surfaces opposing each other; and a plurality of memory packages on the first surface. The wiring board includes: a first set of terminals on the first surface; a plurality of second sets of terminals on the first surface; and a plurality of first signal lines. The terminals of the first set receive respective ones of a plurality of first signals supplied from a control device. Each of the second sets is provided for a corresponding one of the memory packages. The terminals of each of the second sets contact the corresponding one of the memory packages. The first signal lines extend from respective ones of the terminals of the first set while coupling respective ones of the terminals of each of the second sets. The first signal lines extend on the first surface without extending in the wiring board.

Abstract: A method of manufacture of an integrated circuit packaging system includes: providing a substrate; mounting a first integrated circuit over the substrate; forming an encapsulant around the first integrated circuit and over the substrate; and forming a shield structure within and over the encapsulant while simultaneously forming a vertical interconnect structure.

Abstract: A wiring substrate includes a first insulation layer, a first wiring layer formed on the first insulation layer, and a second insulation layer stacked on the first insulation layer. The second insulation layer covers the first insulation layer and includes a filler. A third insulation layer is stacked on the second insulation layer. The third insulation layer is filler-free. A through electrode extends through the second and third insulation layers in a thicknesswise direction. A second wiring layer is stacked on the third insulation layer and the through electrode. The through electrode electrically connects the second wiring layer to the first wiring layer.

Abstract: The invention relates to a high-voltage insulation circuit board which is used in an electric power apparatus such as an electric power converter or the like such as power semiconductor device, inverter module, or the like and provides an insulation circuit board in which electric field concentration at the end sections of a wiring pattern is reduced, partial discharging is suppressed, and a reliability is high. According to the invention, there is provided an insulation circuit board having: a metal base substrate; and wiring patterns which are formed onto at least one of the surfaces of the metal base substrate through an insulation layer, characterized in that between two adjacent wiring patterns in which an electric potential difference exists among the wiring patterns, at least one or more wiring patterns or conductors which are in contact with the insulation layer and have an electric potential in a range of the electric potential difference between the adjacent wiring patterns are arranged.

Abstract: A method of making an electronic device includes forming a circuit layer on a liquid crystal polymer (LCP) substrate and having at least one solder pad. The method also includes forming an LCP solder mask having at least one aperture therein alignable with the at least one solder pad. The method further includes aligning and laminating the LCP solder mask and the LCP substrate together, then positioning solder paste in the at least one aperture. At least one circuit component may then be attached to the at least one solder pad using the solder paste.

Abstract: A printed-board includes a first conductor-layer, a second conductor-layer provided to a layer different from the first conductor-layer, an insulation-layer provided between the first conductor-layer and the second conductor-layer, a plurality of through-holes that pass through the first conductor-layer, the second conductor-layer, and the insulation-layer, and a plurality of vias that are formed in the plurality of through-holes, respectively, and couple the first conductor-layer and the second conductor-layer, each of the plurality of vias including a conductor portion that occupies part of an internal space of the through-hole, and a non-conductor portion that occupies remaining part of the internal space, wherein in a given pair of vias adjacent to each other, the conductor portion of one of the pair of vias is arranged so as to face the non-conductor portion of another one of the pair of vias.

Abstract: An electronic device may have a housing in which electrical components on a printed circuit board are mounted. A connector may be mounted to the edge of the printed circuit board using solder. The connector may have a threaded portion that protrudes through the housing. A threadless portion of the connector may be aligned with the housing. The connector may have a metal body member covered with a metal shell. The metal shell may have a portion that covers the electrical components and serves as an electromagnetic interference shield for the electrical components. The connector may have a threaded barrel. The threaded barrel may have a threaded outer portion with a diameter that is larger than a threaded inner portion. The threadless portion of the connector may lie between the threaded outer and inner portions.

Abstract: Provided are a method of manufacturing a substrate for chip packages and a method of manufacturing a chip package, the method of manufacturing the substrate including: forming a lower adhesive layer in a lower part of an insulation film; forming an upper adhesive layer in an upper part of the insulation film to form a base material; forming via holes in the base material; and forming a circuit pattern layer on the upper adhesive layer, so it is effective to improve adhesion power between the molding resin and the insulation film at the time of manufacturing a chip package later.

Abstract: A packaging substrate includes: a dielectric layer unit having top and bottom surfaces; a positioning pad embedded in the bottom surface of the dielectric layer unit; at least a passive element having a plurality of electrode pads disposed on upper and lower surfaces thereof, the passive element being embedded in the dielectric layer unit and corresponding to the positioning pad; a first circuit layer disposed on the top surface of the dielectric layer unit, the first circuit layer having first conductive vias electrically connected to the electrode pads disposed on the upper surface of the passive element; and a second circuit layer disposed on the bottom surface of the dielectric layer unit, the second circuit layer having second conductive vias electrically connected to the electrode pads disposed on the lower surface of the passive element. Through the embedding of the passive element, the overall structure may have a reduced height.

Abstract: A semiconductor device having a printed circuit board and a semiconductor chip. The printed circuit board includes a chip region, a plurality of first ball lands adjacent to the chip region, and at least one second ball land adjacent to the first ball lands. The semiconductor chip is mounted on the chip region. The first ball lands are arranged to have a first pitch. One of the first ball lands which is nearest to the second ball land, and the second ball land have a second pitch greater than the first pitch.

Abstract: An electrical interconnection system comprises a bifurcated, multilayer flex circuit having electrode pads on the inner surfaces of the bifurcation. Electronic components are mounted on one or both sides of the flex circuit by conventional means. When the bifurcation is spread apart, the electrode pads are alignable with respective contacts on a printed circuit board. After bonding the pads to the contacts by soldering, conductive adhesive, or other means, a secure electrical connection is maintained while still allowing the flex circuit to bend somewhat from side to side, creating additional design options not available with rigidly mounted components and modules.

Abstract: An electronics system includes a main circuit board; main circuitry located on the main circuit board; a carrier board located on top of the main circuit board; an integrated circuit (IC) located on the carrier board, wherein the IC is electrically connected to the main circuitry on the main circuit board; and a layer of adhesive located between the carrier board and the main circuit board.