Printed Circuit Board Patents (Class 361/748)
  • Patent number: 11504892
    Abstract: Various embodiments related to three dimensional printers, and reinforced filaments, and their methods of use are described. In one embodiment, a void free reinforced filament is fed into an conduit nozzle. The reinforced filament includes a core, which may be continuous or semi-continuous, and a matrix material surrounding the core. The reinforced filament is heated to a temperature greater than a melting temperature of the matrix material and less than a melting temperature of the core prior to drag the filament from the conduit nozzle.
    Type: Grant
    Filed: September 18, 2018
    Date of Patent: November 22, 2022
    Assignee: MARKFORGED, INC.
    Inventors: Gregory Thomas Mark, Antoni S. Gozdz
  • Patent number: 11507714
    Abstract: Augmented reality apparatus and methods of use are provided with secure persistent digital content linked to a location coordinates. More specifically, the present invention links a physical location with digital content to enable a user interface with augmented reality that combines aspects of the physical area with location specific digital content. According to the present invention, digital content remains persistent with a location even if visual aspects of the location change.
    Type: Grant
    Filed: October 19, 2021
    Date of Patent: November 22, 2022
    Assignee: Middle Chart, LLC
    Inventors: Rebecca Kincart, Michael S. Santarone, Michael Wodrich, Randall Pugh, Jason E. Duff, Joseph P. Kincart, Frederick Flitsch
  • Patent number: 11488764
    Abstract: A voltage regulator module includes a first circuit board assembly and a magnetic core assembly. The first circuit board assembly includes a first printed circuit board, a plurality of switch elements and a first molding compound layer. The switch elements are mounted on a first surface of the first printed circuit board. The first molding compound layer is formed on the first surface of the first printed circuit board to encapsulate the switch elements. The magnetic core assembly is arranged beside a second surface of the first printed circuit board, and includes a magnetic core portion and at least one first U-shaped copper structure. The magnetic core portion includes a plurality of openings. Each first U-shaped copper structure is penetrated through two corresponding openings to define two inductors. A first terminal of each inductor and the corresponding switch element are connected in series to define a phase circuit.
    Type: Grant
    Filed: October 2, 2019
    Date of Patent: November 1, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yahong Xiong, Da Jin, Qinghua Su
  • Patent number: 11453762
    Abstract: Provided is a composite material that shows a low specific dielectric constant, and that hardly causes an appearance failure or changes in characteristics when exposed to, for example, a treatment liquid to be used in the production of an electronic circuit board. Specifically, a plate-like composite material including polytetrafluoroethylene and a predetermined filler, and satisfying a predetermined condition serves as a composite material that shows a low specific dielectric constant, and that hardly causes an appearance failure or changes in characteristics even when exposed to, for example, a treatment liquid to be used in the production of an electronic circuit board.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: September 27, 2022
    Assignees: NITTO DENKO CORPORATION
    Inventors: Shimpei Yakuwa, Kou Uemura, Shunji Imamura, Tomoyuki Kasagi, Tao Gu
  • Patent number: 11445622
    Abstract: A display device includes a display panel including a display area on which a plurality of display elements is disposed and a non-display area on which one or more wires for driving the plurality of display elements are disposed. A back cover is attached to one surface of the display panel and has a plurality of openings. A roller unit winds or unwinds the back cover and the display panel, and a lifting unit moves the back cover and the display panel in a vertical direction. The plurality of openings overlaps the display panel, and each of the plurality of openings is disposed to be staggered with one or more of the openings in an adjacent row. A size of the back cover is larger than a size of the display panel.
    Type: Grant
    Filed: February 20, 2021
    Date of Patent: September 13, 2022
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Mi-Na Shin, ChounSung Kang, SunBok Song, GeunChang Park, Moonsun Lee
  • Patent number: 11439016
    Abstract: A power converter module includes a multilayer printed circuit board, a switching device, a magnetic core element and a winding via. The multilayer printed circuit board has a first surface, a second surface and an inside layer. The multilayer printed circuit board includes a plurality of copper layers. The magnetic core element is disposed in the inside layer and includes a hole. One end of the winding via is electrically connected to the switching device, and the other end of the winding via is electrically connected to the second surface. The winding via penetrates through the hole and forms a magnetic assembly. An amount of the copper layers on a first side of the magnetic core element close to the first surface of the multilayer printed circuit board is at least two more than a second side of the magnetic core element.
    Type: Grant
    Filed: January 13, 2021
    Date of Patent: September 6, 2022
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Yahong Xiong, Cheng Cheng, Junguo Cui, Shengli Lu
  • Patent number: 11415852
    Abstract: Some of a plurality of image signal lines of a display apparatus according to one embodiment includes: a plurality of bypass wiring portions (bypass wirings) arranged in a frame region so as to have both ends being connected to a plurality of extension wiring portions (extension wirings). The plurality of bypass wiring portions of the plurality of image signal lines include: a plurality of second-layer bypass wirings arranged in a second conductive layer; and a plurality of third-layer bypass wirings arranged in a third conductive layer that is different from a first conductive layer and the second conductive layer. Each of an arrangement pitch between the plurality of second-layer bypass wirings and an arrangement pitch between the plurality of third-layer bypass wirings is smaller than an arrangement pitch between the plurality of image signal lines in a display region.
    Type: Grant
    Filed: September 2, 2021
    Date of Patent: August 16, 2022
    Assignee: JAPAN DISPLAY INC.
    Inventor: Hirotaka Hayashi
  • Patent number: 11417940
    Abstract: A first antenna element (1111) and a second antenna element (1121) are formed on a first dielectric substrate (131). The first antenna element (1111) is supplied with power from a first radio frequency element (191). The second antenna element (1121) is supplied with power from a second radio frequency element (192). The first dielectric substrate (131), the first radio frequency element (191) and the second radio frequency element (192), and a first heat dissipation member (120) are laminated in this order in a Z-axis direction that is a normal direction of the first dielectric substrate (131). When viewed in plan from the Z-axis direction, the first heat dissipation member (120) overlaps at least a part of the first radio frequency element (191) and at least a part of the second radio frequency element (192).
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: August 16, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Yoshiaki Hasegawa, Hirotsugu Mori
  • Patent number: 11383451
    Abstract: A method of 3D printing an object includes receiving design information corresponding to an object for which a printed object is to be generated by a 3D printing operation according to a first set of print instructions, generating a plurality of measurement locations, printing successive layers which form the object, measuring the object at the measurement locations to form measurement data, comparing the measurement data with expected measurements of the measurement locations based on the design information, and generating, based on the comparing, deviation information. The measurement locations represent locations of the object to be measured by a measurement device. The deviation information represents deviations between the printed object following completion of the printing, and the object represented by the design information.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: July 12, 2022
    Assignee: Markforged, Inc.
    Inventors: Bruce David Jones, Corey Hazeltine Walsh, Yongquan Lu, Maggie Su
  • Patent number: 11387295
    Abstract: A terminal device includes a display screen module, wherein the display screen module comprises a passive matrix organic light-emitting diode (PMOLED) display panel, and an electrode cable of the PMOLED display panel comprises a transparent cable and a camera, wherein an orthographic projection of a lighting region of the camera on a display surface of a PMOLED display panel is located in the display region in which the transparent cable is located.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: July 12, 2022
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Ding Zhong, Wei He, Wenwen Wu
  • Patent number: 11379035
    Abstract: Aspects of the present disclosure describe systems, methods, and structures that provide eye-tracking by 1) steering a beam of light through the effect of a microelectromechanical system (MEMS) operating at a resonant frequency onto a corneal surface; and 2) detecting the light reflected from the corneal surface.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: July 5, 2022
    Assignee: AdHawk Microsystems Inc.
    Inventor: Niladri Sarkar
  • Patent number: 11380708
    Abstract: A semiconductor device includes a ferroelectric field-effect transistor (FeFET), wherein the FeFET includes a substrate; a source region in the substrate; a drain region in the substrate; and a gate structure over the substrate and between the source region and the drain region. The gate structure includes a gate dielectric layer over the substrate; a ferroelectric film over the gate dielectric layer; and a gate electrode over the ferroelectric film.
    Type: Grant
    Filed: January 2, 2020
    Date of Patent: July 5, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Chih-Sheng Chang
  • Patent number: 11369021
    Abstract: On a flexible substrate is printed LEDs and a driver circuit containing transistors. The LEDs and transistors are printed microscopic devices contained in an ink. The LEDs are printed in groups and connected in parallel, and the transistors are printed in groups and connected in parallel. Other components, such as resistors and an on/off switch, are also printed to form the driver. A battery and other circuit components may also be printed on the substrate. An overlay is provided over the LEDs to create a desired light pattern. The LEDs and driver may be generic, and the overlay customizes the light pattern for a particular application. The transistors in the driver may be interconnected with a trace pattern to drive the LEDs in a customized manner, such as for an insert in a product package for marketing to a consumer.
    Type: Grant
    Filed: March 16, 2021
    Date of Patent: June 21, 2022
    Assignee: Nthdegree Technologies Worldwide Inc.
    Inventors: Alexander Ray, Richard Blanchard, Shawn Barber, David Moffenbeier
  • Patent number: 11347273
    Abstract: An electronic device module includes a substrate, a first component disposed on a first surface of the substrate, a sealing portion disposed on the first surface of the substrate, a second component disposed on the first surface of the substrate and embedded in the sealing portion, and a shielding wall at least partially disposed between the first component and the second component and including a portion having a height, with respect to the first surface of the substrate, that is lower than a height of the sealing portion.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: May 31, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Youn Hong, Jong In Ryu, Seung Hyun Hong, Jang Hyun Kim
  • Patent number: 11335758
    Abstract: A display device according to an embodiment of the present invention includes: a substrate, a plurality of pixels on the substrate, a first inorganic insulating layer that covers the plurality of pixels, a conductive layer on the first inorganic insulating layer, and a second inorganic insulating layer that on the conductive layer, the conductive layer being between the first inorganic insulating layer and the second inorganic insulating layer, wherein the first inorganic insulating layer includes an area that is in direct contact with the second inorganic insulating layer, and all of the conductive layer is covered with the first inorganic insulating layer and the second inorganic insulating layer.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: May 17, 2022
    Assignee: Japan Display Inc.
    Inventors: Hiraaki Kokame, Akinori Kamiya
  • Patent number: 11327371
    Abstract: According to one embodiment, a relay substrate provided between a liquid crystal panel and a controller includes first connectors. The controller includes a microcomputer and second connectors. The relay substrate and the controller include a line pattern to form a test circuit which feeds a test signal back to an input pin of the microcomputer from an output pin of the microcomputer, and which transfers the test signal between the controller and the relay substrate in each pair of the first connectors and the second connectors. The microcomputer outputs the test signal from the output pin, and determines a connecting state of the cables that connect the relay substrate and the controller based on a state of feedback of the test signal to the input pin.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: May 10, 2022
    Assignee: JAPAN DISPLAY INC.
    Inventors: Takafumi Fujita, Seiji Furumoto
  • Patent number: 11307693
    Abstract: A display device includes a first substrate having a light-emitting element. A second substrate is disposed over the first substrate. A sealing member is disposed between the first substrate and the second substrate. The sealing member couples the first substrate and the second substrate together. The sealing member includes a first linear portion extending in a first direction, and a second linear portion extending in a second direction different from the first direction. A maximum width of the first linear portion is greater than a maximum width of the second linear portion.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 19, 2022
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Min Soo Kim
  • Patent number: 11295944
    Abstract: Improved ion mirrors (10) are proposed for multi-reflecting TOF MS and electrostatic traps at various analyzer topologies. Ion mirrors (10) are constructed of printed circuit boards (11) with improved precision and flatness. To compensate for the remaining geometrical imperfections of mirror electrodes there are proposed electrode sets (17) and field structures in the ion retarding region for electronically adjusting of the ion packets time fronts, for improving the ion injection into the analyzer and for reversing the ion motion in the drift direction.
    Type: Grant
    Filed: July 26, 2018
    Date of Patent: April 5, 2022
    Assignee: MICROMASS UK LIMITED
    Inventor: Anatoly Verenchikov
  • Patent number: 11249572
    Abstract: A touch panel is provided, including a substrate, a first wire structure, and a second wire structure. The substrate includes a display area and a peripheral area surrounding the display area. The first wire structure includes a first catalyst layer, a first metal layer, and a first transparent conductive layer. The first catalyst layer is disposed above the peripheral area, the first metal layer is disposed above the first catalyst, and the first transparent conductive layer is disposed above the first metal layer. The first wire structure is divided into at least one first wire area and at least one first ground line area adjacent to the first wire area. The second wire structure is disposed under the peripheral area and includes at least one second ground line area, wherein a projection of the first wire area in a vertical direction is opposite to the second ground line area.
    Type: Grant
    Filed: July 29, 2020
    Date of Patent: February 15, 2022
    Assignee: Cambrios Film Solutions Corporation
    Inventors: Shih-Ching Chen, Wei-Chia Fang, Chun-Hung Chu, Chung-Chin Hsiao
  • Patent number: 11252812
    Abstract: An electronic device module includes: a substrate; at least one electronic device mounted on a first surface of the substrate; a connection portion mounted on the first surface of the substrate; and a shielding portion disposed along an external surface of the connection portion and electrically connected to a ground of the substrate through at least one connection conductor.
    Type: Grant
    Filed: December 9, 2020
    Date of Patent: February 15, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Suk Youn Hong, Seung Hyun Hong, Jang Hyun Kim
  • Patent number: 11239172
    Abstract: A flexible circuit board according to an embodiment of the present invention comprises: a substrate; a first wiring pattern layer disposed on a first surface of the substrate; a second wiring pattern layer disposed on a second surface opposite the first surface of the substrate; a first dummy pattern part disposed on the second surface of the substrate on which the second wiring pattern layer is not disposed; a first protection layer disposed on the first wiring pattern layer; and a second protection layer disposed on the second wiring pattern layer and the first dummy pattern part, wherein at least a part of the first dummy pattern part overlaps with the first wiring pattern layer in a vertical direction.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: February 1, 2022
    Assignee: LG INNOTEK CO., LTD.
    Inventors: Jun Young Lim, Hyung Kyu Yoon, Sung Min Chae
  • Patent number: 11231751
    Abstract: Apparatuses and associated methods for mounting PCBs and other electronics boards in portable medical equipment and/or other portable and non-portable electronic devices are disclosed herein. In some embodiments, the technology disclosed herein can provide PCB mounting systems that isolate the PCB from detrimental shock, vibration, and/or strain, while also providing electrical ground paths that greatly reduce EMI and other electrical disturbances. Some embodiments of the mounting systems described herein include both elastomeric (e.g., rubber) components and resilient metallic grounding members that, when assembled together, provide favorable shock mounting as well as robust electrical grounding without the inconvenience of using separate shock mounts, grounding straps, etc.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: January 25, 2022
    Assignee: FUJIFILM SONOSITE, INC.
    Inventor: Ken Dickenson
  • Patent number: 11224131
    Abstract: A method and device are provided. The device includes a system component that has a circuit board that includes a cable connection portion. The cable connection portion is disposed on and extends along a mounting surface, and includes board pads disposed on the mounting surface within the cable connection portion. The board pads define corresponding board contact surfaces for electrical coupling with connector pads, and include a board adhesive material disposed on the corresponding board contact surfaces.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: January 11, 2022
    Assignee: LENOVO (SINGAPORE) PTE. LTD.
    Inventors: Robert James Kapinos, Robert James Norton, Jr., Russell Speight VanBlon, Scott Wentao Li
  • Patent number: 11183836
    Abstract: An electronic circuit includes: a first series-connection of DC link capacitors (CA1, . . . , CAm) and a second series-connection of DC link capacitors (CB1, . . . , CBn) connected in parallel between DC bus bars (DC+, DC?), wherein the first series has a first node (A) between the DC link capacitors thereof and the second series has a second node (B) between the DC link capacitors thereof; and a short-circuit module (301; 401, 407) configured to receive a voltage difference (UM) between the first node and the second node and to cause the DC bus bars short circuited in response to the received voltage difference being greater than a predetermined threshold.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: November 23, 2021
    Assignee: Vacon Oy
    Inventors: Tommi Keski-Kujala, Ari Ristimäki, Pekka Hemminki, Jani Matti Perkiö
  • Patent number: 11183415
    Abstract: An adhesive can be easily peeled off after polishing the back face of a wafer, which has heat resistance and can be easily washed off. An adhesive for peelably adhering between a support and a circuit-bearing face of a wafer and thereby processing a back face of the wafer, a peeling face upon peeling becomes selectable according to heating from the support side or wafer side when the adhesive is cured. The adhesive includes a component (A) curing by hydrosilylation reaction and a component (B) containing a polydimethylsiloxane. A peeling method including forming an adhesion layer by applying the adhesive to a surface of a first substrate, bonding a surface of a second substrate to the adhesion layer, curing the adhesion layer by heating from the first substrate side to form a laminate, processing the laminate, and peeling off between the first substrate and the adhesion layer.
    Type: Grant
    Filed: June 13, 2017
    Date of Patent: November 23, 2021
    Assignee: NISSAN CHEMICAL CORPORATION
    Inventors: Hiroshi Ogino, Tomoyuki Enomoto, Tetsuya Shinjo, Kazuhiro Sawada, Shunsuke Moriya
  • Patent number: 11178749
    Abstract: A printed circuit board assembly and an electronic apparatus using the same are provided. The printed circuit board assembly includes a circuit board and a first bridging unit. The circuit board includes a first wiring layer, and the first wiring layer includes a plurality of first ground traces, a plurality of first signal traces, and at least one first ground region. Each of the first signal traces is disposed between one of the first ground traces and the first ground region. The first bridging unit is disposed on the first wiring layer of the circuit board. The first bridging unit extends over, without contacting, at least one of the first signal traces from one of the first ground traces to another one of the first ground traces or the first ground region, so as to form at least one first conductive ground path.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: November 16, 2021
    Assignee: ALi Corporation
    Inventor: Liang-Cai Zeng
  • Patent number: 11172582
    Abstract: The present invention relates to a substrate unit and a substrate assembly, and a camera module using the same. The present invention may comprise: a first substrate part having rigidity; a second substrate part stacked on one surface of the first substrate part and having flexibility; a third substrate part extending outwardly from the second substrate part and having flexibility; and a reinforcing part which is disposed at a portion where the edge portions of the first substrate part and the third substrate part meet, the reinforcing part having a recessed portion which is formed by recessing the first substrate part inwardly so as to inhibit interference between the first substrate part and the third substrate part. The present invention is capable of resolving the interference between a rigid PCB and a flexible PCB and the tearing thereof by providing a reinforcing part in a connection portion of the rigid PCB and the flexible PCB.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: November 9, 2021
    Assignee: LG INNOTEK CO., LTD.
    Inventor: Hyun Woo Ryou
  • Patent number: 11171198
    Abstract: Disclosed is a display device including: a first conductive film over and in contact with a substrate; a first undercoat and a second undercoat over and in contact with the first conductive film; a pixel over the first undercoat; a wiring over the first undercoat, the first conductive film, and the second undercoat and in contact with the first conductive film between the first undercoat and the second undercoat. The first undercoat and the second undercoat are spaced from each other over the first conductive film and each cover a part of the first conductive film. The wiring is configured to form a terminal to which a signal for driving the pixel is input over the second undercoat.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: November 9, 2021
    Assignee: Japan Display Inc.
    Inventors: Hiroki Ohara, Satoshi Maruyama
  • Patent number: 11139230
    Abstract: A flip-chip package substrate and a method for preparing the same in accordance with the present disclosure includes stacking a reinforcement layer on two opposing sides of a middle layer in order to increase the rigidity of the flip-chip package substrate, and promoting a thin middle layer, wherein the sizes of the end faces of conductive portions can be minimized according to needs. This increases the number of electrical contacts possible in a unit area and enables the creation of finer line pitch and higher layout density of the circuit portions, thereby satisfying the need for packaging of high integration/large scale chips while preventing warpage from occurring in the electronic packages.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: October 5, 2021
    Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.
    Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu
  • Patent number: 11122682
    Abstract: Tamper-respondent assemblies and fabrication methods are provided which utilize liquid crystal polymer layers in solid form. The tamper-respondent assemblies include a circuit board, and an enclosure assembly mounted to the circuit board to enclose one or more electronic components coupled to the circuit board within a secure volume. The assembly includes a tamper-respondent sensor that is a three-dimensional multilayer sensor structure, which includes multiple liquid crystal polymer layers, and at least one tamper-detect circuit. The at least one tamper-detect circuit includes one or more circuit lines in a tamper-detect pattern disposed on at least one liquid crystal polymer layer of the multiple liquid crystal polymer layers. Further, a monitor circuit is provided disposed within the secure volume to monitor the at least one tamper-detect circuit of the tamper-respondent sensor for a tamper event.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: September 14, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: James A. Busby, John R. Dangler, Mark K. Hoffmeyer, William L. Brodsky, William Santiago-Fernandez, David C. Long, Silvio Dragone, Michael J. Fisher, Arthur J. Higby
  • Patent number: 11011476
    Abstract: The present disclosure is directed to a lead frame design that includes a copper alloy base material coated with an electroplated copper layer, a precious metal, and an adhesion promotion compound. The layers compensate for scratches or surface irregularities in the base material while promoting adhesion from the lead frame to the conductive connectors, and to the encapsulant by coupling them to different layers of a multilayer coating on the lead frame. The first layer of the multilayer coating is a soft electroplated copper to smooth the surface of the base material. The second layer of the multilayer coating is a thin precious metal to facilitate a mechanical coupling between leads of the lead frame and conductive connectors. The third layer of the multilayer coating is the adhesion promotion compound for facilitating a mechanical coupling to an encapsulant around the lead frame.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: May 18, 2021
    Assignees: STMICROELECTRONICS INTERNATIONAL N.V., STMICROELECTRONICS S.R.L.
    Inventors: Paolo Crema, Jürgen Barthelmes, Din-Ghee Neoh
  • Patent number: 11004782
    Abstract: A semiconductor device includes a semiconductor element, an internal electrode connected to the semiconductor element, a sealing resin covering the semiconductor element and a portion of the internal electrode, and an external electrode exposed from the sealing resin and connected to the internal electrode. The internal electrode includes a wiring layer and a columnar portion, where the wiring layer has a wiring layer front surface facing the back surface of the semiconductor element and a wiring layer back surface facing opposite from the wiring layer front surface in the thickness direction. The columnar portion protrudes in the thickness direction from the wiring layer front surface. The columnar portion has an exposed side surface facing in a direction perpendicular to the thickness direction. The external electrode includes a first cover portion covering the exposed side surface.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: May 11, 2021
    Assignee: ROHM CO., LTD.
    Inventors: Yusuke Harada, Mamoru Yamagami
  • Patent number: 10998653
    Abstract: An edge connector includes a first row of golden fingers and a second row of golden fingers. The first row of golden fingers is adjacent to a plugging end of the edge connector, and the second row of golden fingers is adjacent to the first row of golden fingers. In a plugging direction of the edge connector, each golden finger in the first row of golden fingers has a first end proximate to the plugging end and a second end opposite to the first end. A first end of a grounded golden finger in the first row of golden fingers is protruded from other golden fingers, and second ends of two or more than two golden fingers in the first row of golden fingers are not aligned with each other.
    Type: Grant
    Filed: August 22, 2018
    Date of Patent: May 4, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Fei Yu, Shiping Cheng
  • Patent number: 10966341
    Abstract: A lightweight and low-cost electromagnetic pulse (EMP) protection rack includes a front door, a rear door disposed to face the front door, a left outer wall disposed between the front door and the rear door, a right outer wall disposed to face the left outer wall, a top outer wall positioned on top parts of the front door, the rear door, the left outer wall, and the right outer wall, a bottom outer wall disposed to face the top outer wall, and a main frame disposed to connect, into a single unit, the front door, the rear door, the left outer wall, the right outer wall, the top outer wall and the bottom outer wall, wherein at least one of the front door and the rear door is implemented as a roller blind having a shielding member.
    Type: Grant
    Filed: February 19, 2020
    Date of Patent: March 30, 2021
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Kibaek Kim, Daeheon Lee, Minseok Yoon, Seungkab Ryu
  • Patent number: 10950687
    Abstract: A manufacturing method of a substrate structure includes the following steps. A first build-up circuit structure is formed. At least one copper pillar is formed on the first build-up circuit structure. A dielectric layer is formed on the first build-up circuit structure, and the dielectric layer wraps the copper pillar. A second build-up circuit structure and a capacitive element are formed on the dielectric layer. In particular, the second build-up circuit structure and the first build-up circuit structure are respectively located at two opposite sides of the dielectric layer. The capacitive element is disposed in a capacitive element setting region within the second build-up circuit structure. The copper pillar penetrates the dielectric layer and is electrically connected to the second build-up circuit structure and the first build-up circuit structure.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: March 16, 2021
    Assignee: Unimicron Technology Corp.
    Inventors: Yu-Hua Chen, Fu-Yang Chen, Chun-Hsien Chien, Chien-Chou Chen, Wei-Ti Lin
  • Patent number: 10945358
    Abstract: Provided is a flexible electromagnetic wave shielding material. An electromagnetic wave shielding material according to an embodiment of the present invention is implemented to include a conductive fiber web including a conductive composite fiber including a metal shell part covering an outside of a fiber part such that the conductive composite fiber forms multiple pores; and a first conductive component provided in at least some of the pores. The electromagnetic wave shielding material is so excellent in flexibility, elasticity, and creasing/recovery that the electromagnetic wave shielding material may be freely changed in shape, and can be brought in complete contact with a surface where the electromagnetic wave shielding material is intended to be disposed even if the surface has a curved shape such as an uneven portion or a stepped portion, thus exhibiting excellent electromagnetic wave shielding performance.
    Type: Grant
    Filed: December 12, 2017
    Date of Patent: March 9, 2021
    Assignee: Amogreentech Co., Ltd.
    Inventors: In Yong Seo, Ui Young Jeong, Jun Woo Lee
  • Patent number: 10886851
    Abstract: A voltage regulator having a multi-level, multi-phase architecture is disclosed. The circuit includes a two-level buck converter and an N-level buck converter each coupled to an output node, wherein N is an integer value of three or more. During operation, the two-level buck converter provides one of two possible voltages to a first inductor. The N-level buck converter provides, during operation, one of N voltages to a second inductor. The first and second inductors each convert respectively received voltages to currents, which are provided to a common output node. A control circuit controls the activation of transistors in each of the two-level and N-level buck converters in such a manner as to cause the voltage on the output node to be maintained at a desired level.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: January 5, 2021
    Assignee: Apple Inc.
    Inventor: Jay B. Fletcher
  • Patent number: 10886239
    Abstract: A method for securing an integrated circuit during the realization thereof, including the following steps: delimiting the integrated circuit into a first zone referred to as standard zone and into a second zone referred to as security zone, forming of a set of vias in the security zone, and introducing of a layer loaded with contaminant particles configured to randomly obstruct a portion of the vias, thus forming a random interconnection structure in the security zone, the random interconnection structure creating a physical unclonable function.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: January 5, 2021
    Assignee: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
    Inventors: Stefan Landis, Hubert Teyssedre
  • Patent number: 10880999
    Abstract: A display panel includes: a display substrate having a display area, and a pad area disposed on at least one side of thereof; and a plurality of pad groups arranged on the pad area in a first direction and including: a first pad group having a plurality of first pads, at least some of the plurality of first pads have a first inclination with respect to a reference line extending in a second direction different from the first direction, and the plurality of first pads being spaced from each other at a first pitch; and a second pad group having a plurality of second pads, at least some of the plurality of second pads having a different second inclination with respect to the reference line, and the plurality of second pads being spaced from each other at a second pitch different from the first pitch.
    Type: Grant
    Filed: May 1, 2019
    Date of Patent: December 29, 2020
    Assignee: Samsung Display Co., Ltd.
    Inventors: Yun-mo Chung, Tak-young Lee, Joosun Yoon
  • Patent number: 10865141
    Abstract: A synthetic quartz glass lid for use in optical device packages is prepared by furnishing a synthetic quartz glass lid precursor comprising a synthetic quartz glass substrate (1) and a metal or metal compound film (2), and forming a metal base adhesive layer (3) on the metal or metal compound film (2). The metal or metal compound film contains Ag, Bi, and at least one element selected from P, Sb, Sn and In.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: December 15, 2020
    Assignee: SHIN-ETSU CHEMICAL CO., LTD.
    Inventors: Harunobu Matsui, Daijitsu Harada, Masaki Takeuchi
  • Patent number: 10802547
    Abstract: Apparatuses and associated methods for mounting PCBs and other electronics boards in portable medical equipment and/or other portable and non-portable electronic devices are disclosed herein. In some embodiments, the technology disclosed herein can provide PCB mounting systems that isolate the PCB from detrimental shock, vibration, and/or strain, while also providing electrical ground paths that greatly reduce EMI and other electrical disturbances. Some embodiments of the mounting systems described herein include both elastomeric (e.g., rubber) components and resilient metallic grounding members that, when assembled together, provide favorable shock mounting as well as robust electrical grounding without the inconvenience of using separate shock mounts, grounding straps, etc.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: October 13, 2020
    Assignee: FUJIFILM SONOSITE, INC.
    Inventor: Ken Dickenson
  • Patent number: 10790222
    Abstract: A microelectronic assembly including first and second laminated microelectronic elements is provided. A patterned bonding layer is disposed on a face of each of the first and second laminated microelectronic elements. The patterned bonding layers are mechanically and electrically bonded to form the microelectronic assembly.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 29, 2020
    Assignee: Invensas Corporation
    Inventors: Javier A. Delacruz, Belgacem Haba, Wael Zohni, Liang Wang, Akash Agrawal
  • Patent number: 10786981
    Abstract: An automated masking system includes a substrate loading apparatus designed to hold a plurality of substrates, a first masking material application station designed to automatically apply a first masking material to a portion of the substrate, and a second masking material application station designed to automatically apply a second masking material to a portion of the substrate, the second masking material being different than the first masking material. The system includes a first dispensing apparatus and a second dispensing apparatus that move relative to the substrate in a repeatable motion. The substrate moves automatically from the first masking material application station to the second masking material application station.
    Type: Grant
    Filed: July 7, 2017
    Date of Patent: September 29, 2020
    Inventors: Robert Askin, Joshua Su, Melon Yu, Alex Anderson, Wei Li, Wan-Man Liu, Zhi-Guang Chen
  • Patent number: 10765014
    Abstract: The present invention relates to a substrate unit and a substrate assembly, and a camera module using the same. The present invention may comprise: a first substrate part having rigidity; a second substrate part stacked on one surface of the first substrate part and having flexibility; a third substrate part extending outwardly from the second substrate part and having flexibility; and a reinforcing part which is disposed at a portion where the edge portions of the first substrate part and the third substrate part meet, the reinforcing part having a recessed portion which is formed by recessing the first substrate part inwardly so as to inhibit interference between the first substrate part and the third substrate part. The present invention is capable of resolving the interference between a rigid PCB and a flexible PCB and the tearing thereof by providing a reinforcing part in a connection portion of the rigid PCB and the flexible PCB.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: September 1, 2020
    Assignee: LG Innotek Co., Ltd.
    Inventor: Hyun Woo Ryou
  • Patent number: 10763647
    Abstract: An assembly contains a housing defining an internal space of the assembly, an electronic circuit arranged in the internal space, and a protection strip arranged in the internal space for protecting the electronic circuit against external influences. Accordingly, the protection strip forms a ground conductor that is electrically connected to the housing and to a ground connection of the electronic circuit. Furthermore, a method for producing the assembly is disclosed.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: September 1, 2020
    Assignee: BIOTRONIK SE & Co. KG
    Inventor: Rolf Klenner
  • Patent number: 10756003
    Abstract: A process comprises bonding a semiconductor wafer to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. After the bonding, a damage track is formed in the inorganic wafer using a laser that emits the wavelength of light. The damage track in the inorganic wafer is enlarged to form a hole through the inorganic wafer by etching. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer. An article is also provided, comprising a semiconductor wafer bonded to an inorganic wafer. The semiconductor wafer is opaque to a wavelength of light to which the inorganic wafer is transparent. The inorganic wafer has a hole formed through the inorganic wafer. The hole terminates at an interface between the semiconductor wafer and the inorganic wafer.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: August 25, 2020
    Assignee: Corning Incorporated
    Inventors: Daniel Wayne Levesque, Jr., Garrett Andrew Piech, Aric Bruce Shorey
  • Patent number: 10720277
    Abstract: Systems and methods are described for a ferrite arrangement that mitigates dimensional-tolerance effects on performance of a wireless charging pad, such as a WEVC pad. These systems and methods include a power-transfer structure having ferrite bars arranged to form ferrite strips in a staggered pattern to provide a path for magnetic flux induced by a magnetic field. The staggered pattern includes a series of ferrite strips that alternate defined starting-point locations at opposing sides of the power-transfer structure. Ending-point locations of the ferrite strips are not defined, but are based on an accumulation of lengthwise dimensional tolerances of the ferrite bars used to form the ferrite strips. Using the staggered pattern in a base power-transfer structure defines a coupling range for coupling with a vehicle power-transfer structure and a range limit for associated magnetic field emissions by the base power-transfer structure.
    Type: Grant
    Filed: September 8, 2017
    Date of Patent: July 21, 2020
    Assignee: WiTricity Corporation
    Inventors: Mickel Bipin Budhia, Chang-Yu Huang, Nicholas Athol Keeling, Michael Le Gallais Kissin
  • Patent number: 10680311
    Abstract: A communications terminal includes a mainboard, a conductor bezel, a first conductor part, and a second conductor part, where a first location on the conductor bezel is electrically connected to a ground terminal on the mainboard, a second location on the conductor bezel is electrically connected to a ground terminal on the mainboard, the second conductor part is electrically connected to a fourth location on the conductor bezel, and a radio frequency port on the mainboard is electrically connected to a third location on the conductor bezel using the first conductor part; and the fourth location and the third location on the conductor bezel are between the first location and the second location. The communications terminal is conducive to reducing antenna assembly complexity and reducing manufacturing costs.
    Type: Grant
    Filed: August 30, 2014
    Date of Patent: June 9, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Shuhui Sun, Zhenghao Li, Huiliang Xu, Yi Fan, Bo Meng, Dongxing Tu
  • Patent number: 10656027
    Abstract: An electronic device includes a printed circuit board (PCB), a control circuit, and a sensing circuit. The control circuit is configured to determine whether over temperature occurs at one or more detecting points arranged at a first surface of the printed circuit board according to at least one voltage signal. The sensing circuit is arranged at a second surface opposite to the first surface of the printed circuit board and configured to sense the temperature of the one or more detecting points and correspondingly output the voltage signal to the control circuit.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: May 19, 2020
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Shang-Feng Yang, Xin-Hung Lin
  • Patent number: 10622604
    Abstract: Provided herein are battery packs for electric vehicles. A battery pack can include a housing having cavities. The battery pack can include electrode structures having a first tab terminal and a second tab terminal. A cover can be disposed over the housing. The cover can include first junction connectors extending between a first surface of the cover and a second surface of the cover. The first tab terminal of each electrode structure can be welded to respective first junction connectors.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: April 14, 2020
    Assignee: SF Motors, Inc.
    Inventors: Ying Liu, Derek Nathan Wong, Chien-Fan Chen, Yifan Tang