Abstract: The invention provides an ID chip to which data can be written only once in order to maintain high security as a non-contact type ID chip to which signals are inputted wirelessly from an antenna. A non-contact type ID chip includes a nonvolatile FeRAM in the chip. Data representative of whether data is written or not to the FeRAM is written when writing identification data, thereby data cannot be written additionally to the FeRAM of the ID chip once the data has been written.

Abstract: Information stored in a nonvolatile storage device mounted to a semiconductor device is read by inputting an address signal or the like and by using a sense amplifier or the like. At this time, since a prescribed period of time is required, it is necessary to design a semiconductor device taking that delay into consideration. Also, a sense amplifier consumes an enormous amount of current. Further, since the number of reading bits is set, it is also necessary to read other unnecessary information when only 1 bit is to be read. A nonvolatile storage circuit is formed by a memory element that is formed by an electrical element having an electrically conducting or insulating means, a reset element, and a latch element. In the storage element, different information is stored in the latch element depending on whether the electrical element is electrically insulated or conductive, when the wireless chip is reset.

Abstract: A semiconductor memory device includes an equalizing signal generation circuit comprising a clamping circuit that clamps a voltage level less than the voltage level of a high voltage level by being controlled by the high voltage, and an equalizing signal driver receiving an output signal of the equalizing signal generation circuit as a driving signal.

Abstract: A phase change memory device may include a memory cell array, a write driver, and/or a control unit. The memory cell array may include a plurality of memory cells. The write driver may be configured to provide a program current to the memory cell array for setting a state of a phase change material to program a selected memory cell. The write driver may be configured to provide the program current such that the program current has a plurality of steps. The control unit may be configured to receive step information for adjusting a magnitude and a width of each step of the program current during a test operation and provide the step information to the write driver during a normal operation.

Abstract: The invention provides methods and apparatus. A NAND flash memory device receives command and address signals at a first frequency and a data signal at a second frequency that is greater than the first frequency.

Abstract: A RFID device having a nonvolatile ferroelectric memory regulates bit line capacitance to optimize a bit line sensing margin and minimize power consumption. The RFID device having an analog block adapted and configured to transmit and receive a radio frequency signal to/from an external communication apparatus, a digital block adapted and configured to receive a power voltage and the radio frequency signal from the analog block, transmit a response signal to the analog block and output a memory control signal, and a memory adapted and configured to store data and regulate bit line capacitance.

Abstract: An RFID device is provided to perform a pumping operation when a read or write operation of a memory cell is performed to reduce current consumption. The RFID device includes an analog block, a digital block, and a memory block including at least one ferroelectric capacitor, and a voltage pumping unit for supplying the memory cell a pumping voltage higher than a power voltage only when the memory cell is operated.

Abstract: A semiconductor according to an embodiment of the invention has a supply voltage generator circuit generating a supply voltage based on a received radio signal, a voltage detector circuit detecting a reference voltage dependent on the supply voltage, a memory circuit storing data, and a control circuit executing write operation to the memory circuit according to a reference voltage detected by the voltage detector circuit.

Abstract: The invention provides methods and apparatus. A NAND flash memory device receives command and address signals at a first frequency and a data signal at a second frequency that is greater than the first frequency.

Abstract: The invention relates to a semiconductor memory, and to a measuring method for a semiconductor memory. In one case, the method includes connecting a memory cell to a ring oscillator and measuring the frequency resulting for said ring oscillator.

Abstract: A semiconductor device includes a memory macro and fuse box. The fuse box includes a clock generator, a plurality of first data latch circuits which latch fuse data, and serially transfer the fuse data upon receiving transfer clocks, and a clock counter which counts the transfer clocks, and generates a count-up signal when counting a predetermined number of transfer clocks. The memory macro includes a branching controller which is controlled by a branching control signal generated on the basis of the count-up signal, and branches the fuse data and transfer clocks transferred from the fuse box into a plurality of transfer paths.

Abstract: A memory comprises a bitline, an accessible memory element, an activable switch coupled between the bitline and the access node and a controller configured to activate the activable switch within a first activation period, to activate the activable switch within a second activation period and to deactivate the activable switch at least once when accessing to the accessible memory element during the same access operation.

Abstract: The invention relates to an electrical device with a logic circuit and with a storage medium which is connected to the logic circuit and in which data are stored. The storage medium is provided with a data link via which data can be read out outside the device with the aid of a reader. The storage medium can also be a RFID transponder to provide data via radio link to be read by a reader outside of the device.

Abstract: A method for providing programmable delay read data strobe gating with voltage and temperature compensation. The method includes receiving a training request. The method further includes calibrating programmable delay lines for operating frequency and voltage and temperature variation. The method further includes locking to a first feedback signal. The method further includes storing a first feedback lock setting corresponding to the locked-to first feedback signal. The method further includes granting the training request. Additionally, when training is completed, the method further includes recalibrating the programmable delay lines for operating frequency and voltage and temperature variation.

Abstract: A RFID device having a nonvolatile ferroelectric memory regulates bit line capacitance to optimize a bit line sensing margin and minimize power consumption. The RFID device having an analog block adapted and configured to transmit and receive a radio frequency signal to/from an external communication apparatus, a digital block adapted and configured to receive a power voltage and the radio frequency signal from the analog block, transmit a response signal to the analog block and output a memory control signal, and a memory adapted and configured to store data and regulate bit line capacitance.

Abstract: A RFID device having a nonvolatile ferroelectric memory regulates bit line capacitance to optimize a bit line sensing margin and minimize power consumption. The RFID device having an analog block adapted and configured to transmit and receive a radio frequency signal to/from an external communication apparatus, a digital block adapted and configured to receive a power voltage and the radio frequency signal from the analog block, transmit a response signal to the analog block and output a memory control signal, and a memory adapted and configured to store data and regulate bit line capacitance.

Abstract: A memory tag is powered by and addressable via a radio frequency wireless link to read data from a memory. The memory tag is addressable by a reader. The memory holds data and interface configuration information relating to the operation of an interface device. This interface configuration information including at least one status item and an item type associated with the, or each, status item.

Abstract: To provide a memory product controller, a memory product control method, and a memory product storing a computer program, capable of realizing a multi-function memory product, without increasing the cost, by grouping a plurality of memory products. In a memory product controller, information identifying a memory product and an operating condition of the memory product are stored in association with information identifying a group, and when reading/writing is performed on one memory product belonging to a predetermined group by a reader/writer for a memory product, reference is made to an operating condition storage unit, and when other memory products having the similar operating condition are present in the same group, instruction information to perform reading or writing on one or a plurality of other memory products belonging to the same group and having the similar operating condition is transmitted to the reader/writer.

Abstract: A first-in, first-out (FIFO) unit switches between strobe sources. The FIFO uses a multiplexer to switch between two or more strobes so that different data strobes may be used with the FIFO to strobe in the data. In one implementation, the FIFO uses four data latches to strobe in data bits and output a pair of data bits onto the internal bus each half clock cycle.

Abstract: One embodiment of the present invention includes an identification mechanism, such as a radio frequency identification (RFID) tag or barcode, associated with a waste container. The identification mechanism contains an identifier that can be used to identify the waste container, and that can be read by a vehicle with an identification reader. In addition, the location of the waste container can be determined using a GPS receiver. The waste container identifier and its corresponding location can then be stored in a computer for later transmission to a second computer, for example, by using a wireless communication link. The second can be used to associate the waste container identifier and the waste container's position with a customer.

Abstract: These systems and techniques relating to RFID tags include current source control in RFID memory. According to an aspect, a radio frequency identification tag includes an antenna, a radio frequency interface coupled with the antenna, and a non-volatile memory including multiple memory cells, at least one of the memory cells including a floating gate, a control gate, and a dielectric there between. The non-volatile memory includes a controlled current source operable to modify the at least one memory cell. Additionally, the non-volatile memory can include a voltage supply line regulator that limits voltage supply based on a sensed operational current that results from the controlled current source in the non-volatile memory.

Abstract: A first-in, first-out (FIFO) unit switches between strobe sources. The FIFO uses a multiplexer to switch between two or more strobes so that different data strobes may be used with the FIFO to strobe in the data. In one implementation, the FIFO uses four data latches to strobe in data bits and output a pair of data bits onto the internal bus each half clock cycle.

Abstract: A sensor 2 of a data collection system 2 is designed to make, in a predetermined environment, an operation of writing output data of a sensing circuit 24 into a non-volatile memory 22 as reference-value data, and, in a measurement environment, an operation of transmitting output data of the sensing circuit and reference-value data stored in the non-volatile memory, under the control of a memory control section 25, thereby selectively performing by itself the data-writing or data-transmitting operation without receiving instructions from a readout device.

Abstract: A Write Broadcast system and method uses a base station to write sent data to all or some selected number (sub group) of tags in a base station field simultaneously. By unselecting the tags that have been successfully written to, and requesting a response from the remaining tags in the field (or sub group), the system determines, by receiving a response to the request, that there are tags in the field (sub group) that were unsuccessfully written to. Another Write Broadcast signal is sent to these tags. The system is useful for quickly (simultaneously) “stamping” information on the tag memory of a large number of tags in the field of the base station.

Abstract: A low read current, low power consumption sense amplifier well suited for low frequency RFID systems is disclosed. An MOS transistor receives the read current from a memory cell, typically an EEPROM, and a current mirror is formed by a parallel MOS transistor. The mirror current is integrated on a capacitor after the charge on the capacitor is cleared via a reset pulse. A time period is defined during which the voltage on the capacitor is compared to a second voltage. The second voltage is formed from a reference voltage or from dummy cells, in either case the reference voltage is at about the logic boundary between a one and zero stored in a memory cell. A comparator, with or without input hysteresis, receives the voltage on the capacitor and a second voltage and within the time period, the output state of the comparator indicates the binary contents of the memory cell.

Abstract: A rectifier circuit converts an alternating current into a direct-current voltage and outputs it as a power supply voltage. A ferroelectric holding circuit has a volatile holding circuit and a plurality of ferroelectric capacitors. Data held in the ferroelectric holding circuit has a read margin greater than that of data held in ferroelectric memory cells in a memory array. The ferroelectric holding circuit thus operates with reliability even if power that the semiconductor integrated circuit receives is low. Consequently, since the ferroelectric holding circuit is formed on the semiconductor integrated circuit to be implemented on an RFID transponder or a non-contact IC card, the communication range between the RFID transponder or non-contact IC card and a reader/writer can be extended.

Abstract: A Write Broadcast system and method uses a base station to write sent data to all or some selected number (sub group) of tags in a base station field simultaneously. By unselecting the tags that have been successfully written to, and requesting a response from the remaining tags in the field (or sub group), the system determines, by receiving a response to the request, that there are tags in the field (sub group) that were unsuccessfully written to. Another Write Broadcast signal is sent to these tags. The system is useful for quickly (simultaneously) “stamping” information on the tag memory of a large number of tags in the field of the base station.

Abstract: A driver circuit transmits a signal to a receiver circuit through a signal transmission line. The driver circuit has an output driver, a front driver, and a level adjuster. The front driver drives the output driver, and the level adjuster adjusts the output level of the front driver. The output driver generates a signal whose level is variable in response to an output level of the front driver.

Abstract: A clock signal is frequency-modulated and an image processing operation is executed synchronously with the frequency-modulated clock signal to generate image data which is stored in a memory. Image data written in the memory is read synchronously with a clock signal having a fixed frequency. The image data written in the memory synchronously with the frequency-modulated clock signal is therefore converted into the image data synchronizing with the clock signal having a fixed frequency. Data subjected to image processing synchronously with the frequency-modulated clock signal can be output on the recording apparatus side without any practical problem.

Abstract: There is provided an RF-powered, RFID transponder operable in either a high frequency or low frequency band. The transponder utilizes an EEPROM which may be programmed. The high voltage required for writing (i.e., programming) the EEPROM is provided by a unique circuit which eliminates the need for voltage multiplying circuits which typically use large, high value capacitors which usually occupy large amounts of chip real estate. It is estimated that the write voltage circuit reduces chip real estate requirements by approximately 13%.

Abstract: An integrated and constantly enabled on-chip test interface for use in verifying the functionality of high speed embedded memories such as synchronous dynamic random access memories (“SDRAM”) which allows for the utilization of existing, relatively low speed, (and hence low cost), testers to perform the testing. The interface allows for the verification of an embedded memory macro design utilizing a test interface which includes the memory macro and separate on-chip test circuitry so that half-rate, narrow word, input signals from a tester can perform all memory macro operations across the breadth of a wide memory macro input/output (“I/O”) architecture. The on-chip test circuitry may also include a synchronizing circuit to minimize skew between the external clock and the data output from the test chip.

Abstract: A ferroelectric destructive read-out memory system includes a power source, a memory array including a memory cell, and a logic circuit for applying a signal to the memory array. Whenever a low power condition is detected in said power source, a disturb prevent circuit prevents unintended voltages due to the low power condition from disturbing the memory cell. The disturb prevent circuit also stops the operation of the logic circuit for a time sufficient to permit a rewrite cycle to be completed, thereby preventing loss of the data being rewritten.

Abstract: A Write Broadcast system and method uses a base station to write sent data associated with no particular destination tag or tags, by radio frequency signal, to all or some selected number (sub group) of tags in a base station field simultaneously. By unselecting the tags that have been successfully written to, and requesting a response from the remaining tags in the field (or sub group), the system determines, by receiving a response to the request, that there are tags in the field (sub group) that were unsuccessfully written to. Another Write Broadcast signal is sent to these tags. The system is useful for quickly (simultaneously) "stamping" information on the tag memory of a large number of tags in the field of the base station.

Abstract: A data input circuit for a semiconductor memory device uses an echo clock generator to reduce the clock cycle time. The echo clock is transmitted in the memory device with the data, thereby reducing the effects of clock skew and increasing the overall device operation speed. The circuit is particularly applicable to double data rate synchronous DRAM (DDR-SDRAM) circuitry.

Abstract: A semiconductor memory having NMOS write transistors (16, 14) formed in series between a node (N1) of a memory cell (MC) and a ground level, the gate of the transistor (16) being connected to a write word line (4), the gate of the transistor (14) being connected to a first column write line (12), and NMOS write transistors (17, 15) are formed in series between a node (N2) of the memory cell (MC) and the ground level, the gate of the transistor (17) being connected to the write word line (4), the gate of the transistor (15) being connected to a second column write line (13), to thereby achieve a normal write operation when the power supply voltage is low, with power consumption reduced.

Abstract: Disclosed is a computer control device designed to be incorporated in a vehicle such as, for example, a robotic vehicle, which device is designed to be used to guide the vehicle in a desired path. The device includes a multiplicity of Hall effect sensors designed to sense a permanent magnet tape placed on a floor surface and extending along the desired path of motion. A permanent magnet bar code may also be installed on the floor surface and the device includes a reader to read the bar code and transmit read information to the computer, with the computer storing pathway information based upon the bar code. Other aspects are disclosed.

Abstract: This invention describes a system for digitally storing high-frequency signals with the ability to retrieve and transmit these stored signals repetitively or with various selectable delays. The invention provides means to store the radio frequency signal by sampling the voltage of the wave distributed along delay line means at a number of points in parallel. These voltages are then quantized and stored in a digital memory. The wave is reconstructed at the output by the reverse process.

Abstract: A device for recording a variable information in a programmable hub, for storing it and for restoring it without contact or electrical connection and without electric supply between the hub and information generator or the information readers. The generator or the readers comprise an oscillator or a power coil which supply the programmable hub with energy. The programmable hub restores the information by actuating an active loop which operates on a signal oscillator or on the readers. The invention is particularly applicable to dynamic coding.

Abstract: The invention provides an activator unit which is suitable for use in an identification system and which embodies a memory for the storage of a code therein and means for introducing a selected code into the memory by way of a programming units external to the activator unit.

Abstract: Information storage is achieved in powdered magnetoelastic materials. Such powdered magnetoelastic materials have the capability of achieving long storage times of information and also allow information to be stored at relatively high temperatures.