Input Or Output Circuit, Per Se (i.e., Line Interface) Patents (Class 370/359)
  • Patent number: 12160103
    Abstract: A driver device, a method for monitoring a driver device, and a power supply device are disclosed. The driver device includes a controller and a driver module. The driver module includes a voltage divider loop and a plurality of drivers. The voltage divider loop includes a pull-down resistor and one or more corresponding resistors connected to each of the plurality of drivers, where the pull-down resistor and the one or more corresponding resistors are coupled to a power supply via a first node, and the first node is coupled to the controller.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: December 3, 2024
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Sanbao Shi, Tangshun Wu
  • Patent number: 12085673
    Abstract: In accordance with some embodiments, a light detection and ranging (LiDAR) system comprises: a control system housing; a first LiDAR head housing separate and distinct from the control system housing; a light source within the control system housing, the light source configured to produce a first pulse signal; a light detector within the control system housing configured to detect a first return pulse signal associated with the pulse signal; a first pulse steering system within the first LiDAR head housing, the first pulse steering system configured to direct the first pulse signal in a first direction; a first fiber configured to carry the first pulse signal from the light source to the first pulse steering system; and a second fiber configured to carry a first returned pulse signal from the first LiDAR head housing to the light detector.
    Type: Grant
    Filed: February 21, 2019
    Date of Patent: September 10, 2024
    Assignee: Seyond, Inc.
    Inventors: Rui Zhang, Jim Li, Yufeng Li, Yimin Li, Junwei Bao
  • Patent number: 12056071
    Abstract: Examples disclosed herein include a method including transmitting, via respective lanes of a number of lanes of a peripheral component interconnect express (PCIe) port, a respective lane identifier. The method may also include receiving, via the respective lanes of the number of lanes of the PCIe port, respective further lane identifiers. The method may also include determining which of the number of lanes to allocate to a link for communicating with a device coupled to the PCIe port at least partially responsive to the respective further lane identifiers. The method may also include allocating the determined lanes of the number of lanes to the link. Related devices and systems are also disclosed.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: August 6, 2024
    Assignee: Microchip Technology Incorporated
    Inventors: Eric Son, Robert Kristian Watson, May Stewart, Edward Loo
  • Patent number: 12052564
    Abstract: Certain aspects of the present disclosure relate to methods and apparatus for optimizing delivery of a data to and/or from a UE in a connected but inactive state.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: July 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Huichun Liu, Miguel Griot, Gavin Bernard Horn, Keiichi Kubota, Soo Bum Lee
  • Patent number: 11934691
    Abstract: A link startup method of a storage device connected to a host through a plurality of lanes includes performing an initialization operation in the storage device; establishing data communication through a connected transmission lane and a connected reception lane among the plurality of lanes; transmitting a high speed link up message to the host through the connected transmission lane of the storage device; and performing a link startup operation in a high speed mode through the connected transmission lane of the storage device and the connected reception lane of the host, based on the high speed link up message transmitted by the storage device.
    Type: Grant
    Filed: April 21, 2023
    Date of Patent: March 19, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dongwoo Nam, Sungho Seo, Kwanwoo Noh, Myungsub Shin, Haesung Jung
  • Patent number: 11899593
    Abstract: Embodiments are directed to providing a secure address translation service. An embodiment of a system includes a computer-readable memory for storage of data, the computer-readable memory comprising a first memory buffer and a second memory buffer, an attack discovery unit device comprising processing circuitry to perform operations, comprising, receiving a direct memory access (DMA) request from a remote device via a Peripheral Component Interconnect Express (PCIe) link, the direct memory access (DMA) request comprising a host physical address and a header indicating that the target memory address has previously been translated to a host physical address (HPA), and blocking a direct memory access in response to a determination of at least one of that the remote device has not obtained a valid address translation from a translation agent, or that the remote device has not obtained a valid translation for the target memory address from the translation agent.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: February 13, 2024
    Assignee: INTEL CORPORATION
    Inventor: Przemyslaw Duda
  • Patent number: 11824731
    Abstract: There is provided a computer implemented method of allocating processing resources for processing by processing nodes, comprising: training predictive models, each predictive model for a respective processing node, each predictive model trained on a training dataset comprising records, each record including a historical amount of processing resources allocated to the respective processing node and a ground truth label indicating historical processing outcomes, wherein each processing node exhibits diminishing returns of processing outcomes with increasing allocated processing resources, wherein each predictive model is implemented as a monotonically increasing function that reaches a saturation level, solving an optimization allocation problem using the predictive models to identify a respective amount of processing resources for allocation to each processing node that maximizes a total of processing outcomes for a predetermined total amount of processing resources, and generating instructions for allocation
    Type: Grant
    Filed: December 29, 2021
    Date of Patent: November 21, 2023
    Assignee: Salesforce, Inc.
    Inventors: Elad Tzoreff, Rafi Dalla Torre
  • Patent number: 11720506
    Abstract: The embodiments of the present disclosure relate to a device and method for inspecting process and an electronic control device. The device for inspecting process may include a converting controller configuring to be controlled for, when a preset operation is performed in a serial communication, converting into at least one process monitoring message by inputting a specific value into a dummy area included in at least one message corresponding to the preset operation, and an inspecting controller configuring to be controlled for inspecting a process based on the process monitoring message.
    Type: Grant
    Filed: June 8, 2021
    Date of Patent: August 8, 2023
    Assignee: HL Klemove Corp.
    Inventors: Jong Gyu Park, Han-Sik Kim, Seung Gap Choi
  • Patent number: 11429549
    Abstract: Input/Output port configurations using multiplexers are described herein. An example computing system includes a multiplexer having a first input, a second input, and an output. The computing system also includes a first channel connecting the first input to a first host controller, the first host controller to transfer data at a first speed, and a second channel connecting the second input to a second host controller, the second host controller to transfer data at a second speed higher than the first speed. The example computing system further includes a third channel connecting the output to a port, the port to receive a connector of an electronic device, and a line selector to, based on a type of the electronic device connected to the port, configure the multiplexer to electrically couple the output to the first input or the second input.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: August 30, 2022
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Neill Thomas Kapron, Christopher Ritchie Tabarez, Glen Douglas Dower, Nicolas James Jurich
  • Patent number: 11374997
    Abstract: Method and apparatus for carrying out the method receiving packets, each of the packets comprising a header and a payload. For a particular packet among the packets, the method includes processing at least the header of the particular packet to determine a flow associated with the particular packet; attempting to determine a payload structure based on the flow, the payload structure associated with transport of coded video data in the payload of the particular packet; and if the attempting is successful, repackaging coded video data contained in the payload of the particular packet into a new packet and forwarding the new packet to an external system or storing the new packet in memory.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: June 28, 2022
    Assignee: GENETEC INC.
    Inventors: Pierre Racz, Julien Vary
  • Patent number: 11349781
    Abstract: Some embodiments provide novel circuits for recording data messages received by a data plane circuit of a forwarding element in an external memory outside of the data plane circuit. The external memory in some embodiments is outside of the forwarding element. In some embodiments, the data plane circuit encapsulates the received data messages that should be recorded with encapsulation headers, inserts into these headers addresses that identify locations for storing these data messages in a memory external to the data plane circuit, and forwards these encapsulated data messages so that these messages can be stored in the external memory by another circuit. Instead of encapsulating received data messages for storage, the data plane circuit in some embodiments encapsulates copies of the received data messages for storage. Accordingly, in these embodiments, the data plane circuit makes copies of the data messages that it needs to record.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: May 31, 2022
    Assignee: Barefoot Networks, Inc.
    Inventors: Antonin Mathieu Bas, Anurag Agrawal, Changhoon Kim
  • Patent number: 11340572
    Abstract: An information handling system may include an air mover configured to drive a flow of air and a processing component communicatively coupled to the air mover for controlling operation of the air mover via a first wire configured to communicate analog air mover speed commands from the processing component to the air mover for controlling a speed of the air mover and a second wire configured to communicate analog tachometer information from the air mover to the processing component. At least one of the air mover and the processing component may be configured to initiate a mode for serial digital communication via the first wire and the second wire. The air mover and the processing component may be configured to communicate information to each other in accordance with a digital communication protocol via the first wire and the second wire during the mode for serial digital communication.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: May 24, 2022
    Assignee: Dell Products L.P.
    Inventors: Timothy M. Lambert, Michael J. Stumpf, Nihit S. Bhavsar, Jeffrey L. Kennedy
  • Patent number: 11241621
    Abstract: A non-transitory computer-readable medium including a video game processing program for causing a server to perform functions regarding a search of a moving route in a virtual space is provided. The functions include a setting function, an arranging function, a thinning function, and a searching function. The setting function is configured to set a navigation mesh corresponding to a movable area of an object in a virtual space. The arranging function is configured to arrange a plurality of waypoints on the set navigation mesh in accordance with a predetermined arrangement rule. The thinning function is configured to thin out some waypoints, which are selected in accordance with a predetermined selection rule, from the plurality of waypoints thus arranged. The searching function is configured to search a moving route of the object on a basis of arrangement of the plurality of thinned waypoints.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: February 8, 2022
    Assignee: SQUARE ENIX CO., LTD.
    Inventors: Youichiro Miyake, Makoto Hasegawa
  • Patent number: 11148054
    Abstract: A non-transitory computer-readable medium including a video game processing program for causing a server to perform functions regarding a search of a moving route in a virtual space is provided. The functions include a setting function, an arranging function, a thinning function, and a searching function. The setting function is configured to set a navigation mesh corresponding to a movable area of an object in a virtual space. The arranging function is configured to arrange a plurality of waypoints on the set navigation mesh in accordance with a predetermined arrangement rule. The thinning function is configured to thin out some waypoints, which are selected in accordance with a predetermined selection rule, from the plurality of waypoints thus arranged. The searching function is configured to search a moving route of the object on a basis of arrangement of the plurality of thinned waypoints.
    Type: Grant
    Filed: August 28, 2020
    Date of Patent: October 19, 2021
    Assignee: SQUARE ENIX CO., LTD.
    Inventors: Youichiro Miyake, Makoto Hasegawa
  • Patent number: 11032342
    Abstract: This disclosure relates to an electronic device including a memory and at least one processor coupled to the memory. The at least one processor is configured to execute a daemon process in one of a container or a host operating system, wherein the daemon process is configured to manage data transfer between the container and the host operating system, create, via the daemon process, an inter-process communication (IPC) channel between the container and the host operating system, receive incoming audio data, and buffer the incoming audio data to the IPC channel.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: June 8, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Khaled ElWazeer, Ivan Getta, Myungsu Cha, Ahmed M. Azab, Rohan Bhutkar, Guruprasad Ganesh, Wenbo Shen, Ruowen Wang, Junyong Choi
  • Patent number: 10936530
    Abstract: A method and apparatus for determining link bifurcation availability implemented in a computer system includes assigning, by a controller, lanes that include links for one or more components connected in accordance with a current known configuration. The controller transmits ordered sets including the assignments to the one or more components which are received by the one or more components. The one or more components respond with a first link to the controller. Based upon the links received by the controller not meeting the current known configuration, the controller issues an interrupt and is reconfigured.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: March 2, 2021
    Assignee: ATI TECHNOLOGIES ULC
    Inventors: Natale Barbiero, Gordon Caruk
  • Patent number: 10915366
    Abstract: System and techniques for secure edge-cloud function-as-a-service (FaaS) are described herein. A FaaS node may receive a request to execute a function. The FaaS node executes the function and enters a result of the function execution into a blockchain. Here, the blockchain is accessible to a plurality of FaaS architectural nodes.
    Type: Grant
    Filed: September 28, 2018
    Date of Patent: February 9, 2021
    Assignee: Intel Corporation
    Inventors: Ned M. Smith, Rajesh Poornachandran
  • Patent number: 10883687
    Abstract: The invention describes a light conversion device comprising: a light converter, wherein the light converter is adapted to convert primary light to converted light, wherein a peak emission wavelength of the converted light is in a longer wavelength range than a peak emission wavelength of the primary light, a reflective structure attached to at least a part of a front surface of the light converter, wherein the front surface defines a light emission surface of the light conversion device, wherein the reflective structure is arranged to reflect a defined part of the converted light, wherein the defined part of the converted light is characterized by a wavelength above a threshold wavelength, and wherein the light conversion device is arranged to emit at least a part of the defined part of the converted light via the light emission surface such that a color point of light emitted via the light emission surface is shifted to a longer wavelength range than obtained without emission of such part.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: January 5, 2021
    Assignee: Lumileds LLC
    Inventor: Steffen Zozgornik
  • Patent number: 10735306
    Abstract: In various embodiments, a method and apparatus are configured to receive information associated with a path from a first node to a second node; and generate a set of one or more segment identifiers at least one of which is in an address space having a span in a current region in which the first node resides, and is configured for use in identifying a next region, wherein the set of one or more segment identifiers encodes the path.
    Type: Grant
    Filed: February 20, 2020
    Date of Patent: August 4, 2020
    Assignee: SITTING MAN, LLC
    Inventor: Robert Paul Morris
  • Patent number: 10721156
    Abstract: A technique efficiently selects a path computation element (PCE) to compute a path between nodes of a computer network. The PCE selection technique is illustratively based on dynamic advertisements of the PCE's available path computation resources, namely a predictive response time (PRT). To that end, the novel technique enables one or more PCEs to dynamically send (advertise) their available path computation resources to one or more path computation clients (PCCs). In addition, the technique enables the PCC to efficiently select a PCE (or set of PCEs) to service a path computation request based upon those available resources.
    Type: Grant
    Filed: July 26, 2017
    Date of Patent: July 21, 2020
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Jean-Philippe Vasseur, David R. Oran
  • Patent number: 10666514
    Abstract: A peer policy object named with a policy enforcement metric context identifier is created at a first policy enforcement point (PEP) platform of a group of peered PEP platforms. The peer policy object uniquely identifies a registered service policy to be enforced during runtime as a shared runtime policy enforcement activity by the group of peered PEP platforms within a peered policy enforcement deployment. The peer policy object named with the policy enforcement metric context identifier is deployed to at least one other peered PEP platform within the peered policy enforcement deployment to initiate the shared runtime policy enforcement activity by the group of peered PEP platforms. At least one runtime policy enforcement metric associated with runtime enforcement of the registered service policy is shared with the at least one other peered PEP platform during runtime using the policy enforcement metric context identifier.
    Type: Grant
    Filed: February 12, 2013
    Date of Patent: May 26, 2020
    Assignee: International Business Machines Corporation
    Inventors: Thomas C. Burke, Mario E. De Armas, Oswaldo Gago, Gaurang Shah, Maria E. Smith
  • Patent number: 10585831
    Abstract: An example electronic device may include a peripheral component interconnect express (PCIe) connector that includes a number of lane ports that may be arranged in a row. Physical lane numbers of the lane ports in a first half of the row may be in either an ascending order or a descending order from a first end of the row toward a middle of the row. Physical lane numbers of the lane ports in a second half of the row may be in either a descending order or an ascending order from the middle of the row toward a second end of the row. The order of the second half may be ascending when the order of the first half is descending, and the order of the second half may be descending when the order of the first half is ascending.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: March 10, 2020
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chengjun Zhu, William Joshua Price
  • Patent number: 10572291
    Abstract: In an example, a method for managing a virtual network is provided. According to the method, first and second domains are respectively created for heterogeneous first and second hypervisor mangers. The first hypervisor manager manages a first virtual machine (VM) and first virtual switch (vSwitch) The second hypervisor manager manages a second VM and a second vSwitch. Based on topology of the virtual network, topology management information may be created, which comprises first and second virtual network topology information respectively for the first and second domains, and first and second configuration information respectively for the first and second vSwitches. The topology management information may be distributed to the first and second hypervisor mangers after being associated with the first and second domains, so to the first and second vSwitches implement packet forwarding between the first and second VMs according to the first and second configuration information respectively.
    Type: Grant
    Filed: August 17, 2016
    Date of Patent: February 25, 2020
    Assignee: New H3C Technologies Co., Ltd.
    Inventors: Kai Cui, Yan Mu
  • Patent number: 10531339
    Abstract: In this device: a gain calculator (101) uses a function in which the variable is a first resource amount from among the resource amounts possessed by an operator in question, and calculates a second resource amount at which the maximum gain is reached in the function of the operator to which the device in question belongs, the first resource amount being a resource amount allocated to a terminal belonging to another operator; a transmitter/receiver (102) transmits the second resource amount to the manager (300), and receives, from the manager (300), the minimum value among second resource amounts calculated in each of the operators; and the allocation unit (103) allocates resources to the signal of the terminal belonging to the operator in question and to the terminal belonging to the other operator on the basis of the minimum value among the second resource amounts calculated by each of the operators.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: January 7, 2020
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Ayako Horiuchi, Takashi Tamura, Koji Yamamoto, Tomohiko Mimura
  • Patent number: 10474533
    Abstract: Apparatus adapted for exascale computers are disclosed. The apparatus includes, but is not limited to at least one of: a system, data processor chip (DPC), Landing module (LM), chips including LM, anticipator chips, simultaneous multi-processor (SMP) cores, SMP channel (SMPC) cores, channels, bundles of channels, printed circuit boards (PCB) including bundles, floating point adders, accumulation managers, QUAD Link Anticipating Memory (QUADLAM), communication networks extended by coupling links of QUADLAM, log 2 calculators, exp2 calculators, log ALU, Non-Linear Accelerator (NLA), and stairways. Methods of algorithm and program development, verification and debugging are also disclosed. Collectively, embodiments of these elements disclose a class of supercomputers that obsolete Amdahl's Law, providing cabinets of petaflop performance and systems that may meet or exceed an exaflop of performance for Block LU Decomposition (Linpack).
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: November 12, 2019
    Assignee: QSigma, Inc.
    Inventors: Earle Jennings, George Landers
  • Patent number: 10452576
    Abstract: Embodiments presented herein provide for hot swappable connections to various storage devices. In one embodiment, a storage controller includes an interface operable to connect to at least one of a storage device and a midplane connected to a plurality of Non Volatile Memory Express (NVMe) storage devices. The storage controller also includes a processor operable to detect when the interface is connected to the mid-plane, to determine that the NVMe storage devices each have a x4 NVMe connection, and to communicate sideband signaling, including a reference clock, to the NVMe storage devices through the midplane via Inter-Integrated Circuit (I2C) upon determining that the NVMe storage devices each have a x4 NVMe connection.
    Type: Grant
    Filed: June 24, 2016
    Date of Patent: October 22, 2019
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventor: Jason Stuhlsatz
  • Patent number: 10437316
    Abstract: On a typical motherboard the processor and memory are separated by a printed circuit data bus that traverses the motherboard. Throughput, or data transfer rate, on the data bus is much lower than the rate at which a modern processor can operate. The difference between the data bus throughput and the processor speed significantly limits the effective processing speed of the computer when the processor is required to process large amounts of data stored in the memory. The processor is forced to wait for data to be transferred to or from the memory, leaving the processor under-utilized. The delays are compounded in a distributed computing system including a number of computers operating in parallel. The present disclosure describes systems, method and apparatus that tend to alleviate delays so that memory access bottlenecks are not compounded within distributed computing systems.
    Type: Grant
    Filed: September 26, 2017
    Date of Patent: October 8, 2019
    Assignee: ADVANCED PROCESSOR ARCHITECTURES, LLC
    Inventors: Louis Edmund Chall, John Bradley Serson, Philip Arnold Roberts, Cecil Eugene Hutchins
  • Patent number: 10425177
    Abstract: A switch system configured to switch Flexible Ethernet (FlexE) client services includes interface circuitry configured to ingress and egress FlexE clients; and switch circuitry communicatively coupled to the interface circuitry and configured to switch portions of the FlexE clients utilizing a cell switch and Optical Transport Network (OTN) over Packet (OPF) techniques. A method of switching Flexible Ethernet (FlexE) client services includes ingressing and egressing FlexE clients via interface circuitry; interfacing the FlexE clients with switch circuitry communicatively coupled to the interface circuitry; and switching portions of the FlexE clients with the switch circuitry utilizing a cell switch and Optical Transport Network (OTN) over Packet (OPF) techniques.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: September 24, 2019
    Assignee: Ciena Corporation
    Inventors: Sebastien Gareau, James Tierney, David Stuart
  • Patent number: 10349351
    Abstract: A method for performing outer loop power control in wireless communications includes initializing a time interval clock to count down a predetermined time interval; receiving and decoding a channel quality indicator (CQI) message; computing a decision metric value for each symbol in the decoded CQI message; determining whether the CQI message is erroneous; counting a number of erroneous CQI messages; and signaling a wireless/transmit receive unit to adjust an uplink transmission power on a condition that the time interval clock has expired and the number of erroneous CQI messages exceeds a threshold.
    Type: Grant
    Filed: October 30, 2017
    Date of Patent: July 9, 2019
    Assignee: Signal Trust for Wireless Innovation
    Inventors: Marian Rudolf, Stephen G. Dick, James M. Miller
  • Patent number: 10348563
    Abstract: The present disclosure is directed to system-on-chip (SoC) optimization through transformation and generation of a network-on-chip (NoC) topology. The present disclosure enables transformation from physical placement to logical placement to satisfy bandwidth requirements while maintaining lowest area and lowest routing with minimum cost (wiring and buffering) and latency. In an aspect, method according to the present application includes the steps of receiving at least a floor plan description of an System-on-Chips (SoCs), transforming said floor plan description into at least one logical grid layout of one or more rows and one or more columns, optimizing a number of said one or more rows and said one or more columns based at least on any or combination of a power, an area, or a performance to obtain an optimized transformed logical grid layout, and generating said Network-on-Chip (NoC) topology at least from said optimized transformed logical grid layout.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: July 9, 2019
    Inventors: Nishant Rao, Sailesh Kumar, Pier Giorgio Raponi
  • Patent number: 10291423
    Abstract: A smart communications controller for alternative energy equipment includes an equipment port connected to the alternative energy equipment and a plurality of autoconfiguration objects. Each of the autoconfiguration objects is configured to perform a protocol testing process for a particular communications protocol. The protocol testing process includes automatically determining whether the communications protocol is used by the alternative energy equipment connected to the equipment port. The smart communications controller further includes an autoconfiguration manager configured to cause the autoconfiguration objects to iteratively perform their protocol testing processes until the communications protocol used by the alternative energy equipment is identified.
    Type: Grant
    Filed: February 27, 2017
    Date of Patent: May 14, 2019
    Assignee: JOHNSON CONTROLS TECHNOLOGY COMPANY
    Inventor: Kraig Ritmanich
  • Patent number: 10281973
    Abstract: Systems and methods are disclosed for determining hours of utility of an application per amount of energy consumed by the application for a wide variety of device types. For each subsystem of a client device, a model of the subsystem is used to estimate a portion of the total energy consumed by the subsystem during a predetermined period of time. Energy consumed by a subsystem is apportioned to one or more applications or daemons that utilize the subsystem. Energy usage by a daemon is apportioned to one or more applications that the daemon performs work on behalf of. A large sample of application energy consumption information is gathered by an energy server and provided to an application information server that is accessible by developers. Thus, a developer can view energy consumption vs. application utility, by client device type and by subsystem for the client device type.
    Type: Grant
    Filed: June 2, 2016
    Date of Patent: May 7, 2019
    Assignee: Apple Inc.
    Inventors: Abhinav Pathak, Albert S. Liu, Amit K. Vyas, Drew A. Schmitt
  • Patent number: 10277384
    Abstract: Embodiments herein describe using an intermediate distribution frame (IDF) which is connected between a central controller and a plurality radio heads which each include at least one antenna for wireless communication with a user device. Instead of running separate cables to each of the radio heads, a single cable can be used to connect the IDF to the central controller and then separate cables can be used to connect the IDF to the radio heads. If the IDF is disposed near the radio heads, the amount of cables can be reduced. Moreover, the IDF may recover a clock signal used by the central controller and forward that clock to the plurality of radio head in order to synchronize the radio heads to the central controller.
    Type: Grant
    Filed: April 4, 2017
    Date of Patent: April 30, 2019
    Assignee: Cisco Technology, Inc.
    Inventors: David S. Kloper, Brian D. Hart, Paul J. Stager
  • Patent number: 10205219
    Abstract: A radio transmitter system includes: a transmitter for deriving a carrier frequency modulated by an input; an electrically short antenna system, and a matching network between the transmitter and antenna system. The matching network includes: a primary circuit responsive to the transmitter, a secondary circuit including the antenna system, and magnetic or capacitive coupling between the primary and secondary circuits. The magnetic coupling is an air core transformer having first and second windings respectively included in the primary and secondary circuits. The matching network has a voltage versus frequency response including at least two horns spaced from each other such that the matching network has a pass band approximately equal to the modulation bandwidth.
    Type: Grant
    Filed: January 25, 2017
    Date of Patent: February 12, 2019
    Assignee: CONTINENTAL ELECTRONICS CORP.
    Inventor: David Lee Hershberger
  • Patent number: 10116579
    Abstract: A method for queue management in a packet-switched network including at an intermediate node receiving first packets belonging to a first class associated with a first queue management mechanism and second packets belonging to a second class associated with a second queue management mechanism; marking or dropping of the first packets in accordance with the first queue management mechanism and marking or dropping of the second packets in accordance with the second queue management mechanism; and coupling the marking or dropping of the second packets to the marking or dropping of the first packets.
    Type: Grant
    Filed: October 27, 2014
    Date of Patent: October 30, 2018
    Assignee: Alcatel Lucent
    Inventors: Koen De Schepper, Ing-Jyh Tsang
  • Patent number: 10101391
    Abstract: A system and method for sharing a communications link between multiple protocols is described. A system includes a communications interface configured to exchange information with other systems using at least one of a plurality of protocols; a protocol select register that stores a value that selects a protocol from among the plurality of protocols to become an active protocol; and a state machine accessible to the communications interface, the state machine used to control the exchange of information through the communications interface according to the active protocol. The active protocol is used by the communications interface to exchange information while the remaining protocols of the plurality of protocols remain inactive. The state machine sequences through a series of states that cause the communications interface to operate according to the active protocol, and that are designated as inert sequences under the remaining protocols.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: October 16, 2018
    Assignee: Texas Instruments Incorporated
    Inventor: Gary L. Swoboda
  • Patent number: 10103913
    Abstract: In some embodiments, improved routing strategies for small-world network-on-chip (SWNoC) systems are provided. In some embodiments, an ALASH routing strategy or an MROOTS strategy are used in order to improve latency, temperature, and energy use within a network-on-chip system. In some embodiments, millimeter-wave wireless transceivers are used to implement the long-distance links within the small-world network, to create a millimeter-wave small-world network-on-chip (mSWNoC) system. In some embodiments, non-coherent on-off keying (OOK) wireless transceivers are used to implement the wireless links.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: October 16, 2018
    Assignee: Washington State University
    Inventors: Partha Pande, Deukhyoun Heo
  • Patent number: 10050843
    Abstract: In an aspect, the present disclosure provides a method that comprises automatic generation of a NoC from specified topological information based on projecting NoC elements of the NoC onto a grid layout. In an aspect, the specified topological information, including specification of putting constraints on positions/locations of NoC elements and links thereof, can be input by a user in real space, and can then be projected on the grid layout.
    Type: Grant
    Filed: February 18, 2015
    Date of Patent: August 14, 2018
    Assignee: NetSpeed Systems
    Inventors: Pier Giorgio Raponi, Eric Norige, Sailesh Kumar
  • Patent number: 10011239
    Abstract: A communication system includes a control device and a plurality of electric units configured to be connected to the control device respectively to communicate with each other, and each of the plurality of electric units having a unique identifier. Each of the plurality of electric units comprises a resistor configured to set the corresponding identifiers. The respective resistors of the plurality of electric units are connected to each other in series to form a setting circuit. The control device is configured to determine the corresponding identifiers of the plurality of respective electric units based on magnitudes of respective voltages applied to the plurality of respective resistors in the setting circuit, and to send signals indicating the determined identifiers to the plurality of electric units, respectively.
    Type: Grant
    Filed: September 13, 2017
    Date of Patent: July 3, 2018
    Assignee: YAZAKI CORPORATION
    Inventor: Terumitsu Sugimoto
  • Patent number: 10003983
    Abstract: A radio communication apparatus receives control information on one or more control channel elements (CCEs) with consecutive CCE number(s). The radio communication apparatus first-spreads a response signal with a sequence defined by a cyclic shift value that is determined among a plurality of cyclic shift values from an index of physical uplink control channel (PUCCH), which is associated with a first CCE number of the one or more CCEs, and second-spreads the first-spread response signal with an orthogonal sequence that is determined among a plurality of orthogonal sequences from the index. One of cyclic shift values used for an orthogonal sequence is determined from an index of the PUCCH, which is associated with an odd CCE number, and another one of the cyclic shift values used for the same orthogonal sequence is determined from an index of the PUCCH, which is associated with an even CCE number.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: June 19, 2018
    Assignee: Godo Kaisha IP Bridge 1
    Inventors: Seigo Nakao, Daichi Imamura, Akihiko Nishio, Masayuki Hoshino
  • Patent number: 9979561
    Abstract: An information handling system is provided. The information handling system includes systems and methods for expanding the port count in a single Fiber Channel domain by adding modular Fiber Channel switches. Such a system includes a system enclosure that contains a plurality of Fiber Channel modules configured to send and receive Fiber Channel packets, the Fiber Channel modules providing a plurality of Fiber Channel ports and a switch processor coupled to the plurality of Fiber Channel ports and to a plurality of Ethernet ports. The switch processor is configured to apply a stacking header to Fiber Channel packets for transmission from one of the plurality of Ethernet ports over a stacking link to another switch processor in another system enclosure.
    Type: Grant
    Filed: May 9, 2016
    Date of Patent: May 22, 2018
    Assignee: DELL PRODUCTS L.P.
    Inventors: Hiren A. Desai, Haresh K. Shah, Krishnamurthy Subramanian, Swaminathan Sundararaman, Saikrishna M. Kotha
  • Patent number: 9967243
    Abstract: Disclosed are a method and a system for accessing data by a client device in a distributed network system having a central server system, at least one client device, and at least one business object server. The client device and business object server are coupled to the central server system via a communication network. In the business object server, a number of business objects are stored. Each business object server includes a number of offices; each business object is assigned to an office in the respective business object server. The central server system receives an access request message, which includes at least one unique client identifier; the central server system determines at least one access authorization by means of the client identifier, and generates access instructions for the business objects, which the client device is allowed to access. The business objects are read and are transmitted to the client device.
    Type: Grant
    Filed: May 5, 2015
    Date of Patent: May 8, 2018
    Assignee: OMS SOFTWARE GMBH
    Inventor: Christian Kramer
  • Patent number: 9960962
    Abstract: A smart communications controller for building equipment includes an equipment port connected to the building equipment and a plurality of autoconfiguration objects. Each of the autoconfiguration objects is configured to perform a protocol testing process for a particular communications protocol. The protocol testing process includes automatically determining whether the communications protocol is used by the building equipment connected to the equipment port. The smart communications controller further includes an autoconfiguration manager configured to cause the autoconfiguration objects to iteratively perform their protocol testing processes until the communications protocol used by the building equipment is identified. The smart communications controller further includes an equipment controller configured to use the identified communications protocol for the building equipment to generate protocol-specific control signals for the building equipment.
    Type: Grant
    Filed: June 10, 2015
    Date of Patent: May 1, 2018
    Assignee: Johnson Controls Technology Company
    Inventors: Eric W. Hamber, Vivek V. Gupta, Sergey A. Galchenko, Daniel F. Leising
  • Patent number: 9935920
    Abstract: Methods and apparatus are provided for controlling communication between a virtualized network and non-virtualized entities using a virtualization gateway. A packet is sent by a virtual machine in the virtualized network to a non-virtualized entity. The packet is routed by the host of the virtual machine to a provider address of the virtualization gateway. The gateway translates the provider address of the gateway to a destination address of the non-virtualized entity and sends the packet to the non-virtualized entity. The non-virtualized entity may be a physical resource, such as a physical server or a storage device. The physical resource may be dedicated to one customer or may be shared among customers.
    Type: Grant
    Filed: January 27, 2016
    Date of Patent: April 3, 2018
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Murari Sridharan, David A. Maltz, Narasimhan Venkataramaiah, Parveen K. Patel, Yu-Shun Wang
  • Patent number: 9804809
    Abstract: A print control system 1 includes a control server 10 that opens a communication path for asynchronous duplex communication, generates print data, and outputs the generated print data by the opened communication path; and a printer 12 that opens a communication path, receives the print data by the opened communication path, and prints based on the received print data.
    Type: Grant
    Filed: April 18, 2016
    Date of Patent: October 31, 2017
    Assignee: Seiko Epson Corporation
    Inventors: Shigeo Tajima, Koji Nishizawa, Yuichi Sugiyama
  • Patent number: 9807690
    Abstract: A method for performing outer loop power control in wireless communications includes initializing a time interval clock to count down a predetermined time interval; receiving and decoding a channel quality indicator (CQI) message; computing a decision metric value for each symbol in the decoded CQI message; determining whether the CQI message is erroneous; counting a number of erroneous CQI messages; and signaling a wireless/transmit receive unit to adjust an uplink transmission power on a condition that the time interval clock has expired and the number of erroneous CQI messages exceeds a threshold.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: October 31, 2017
    Assignee: SIGNAL TRUST FOR WIRELESS INNOVATION
    Inventors: Marian Rudolf, Stephen G. Dick, James M. Miller
  • Patent number: 9734116
    Abstract: Techniques and mechanisms for configuring an integrated circuit (IC) chip to implement a protocol stack. In an embodiment, a transaction layer of the IC chip is operable to exchange with a link layer of the IC chip transaction layer packets (TLPs) having a format compatible with one defined in a Peripheral Component Interconnect Express™ (PCIe™) specification. Configuration circuitry of the IC chip provides for configuration of a first protocol stack including the transaction layer, circuitry of the link layer and a first physical layer of the IC chip. The configuration circuitry further provides for an alternative configuration of a second protocol stack including the transaction layer, circuitry of the link layer and a second physical layer of the IC chip. In another embodiment, the first protocol stack supports single-ended signaling to communicate TLP information, whereas the second protocol stack supports differential signaling to communicate TLP information.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: August 15, 2017
    Assignee: Intel Corporation
    Inventors: Bryan L. Spry, Marcus W. Song, Deepak M. Rangaraj, Avinash N. Ananthakrishnan, Robert J. Hayes, Aimee D. Wood, Adam E. Letendre, Brent R. Boswell
  • Patent number: 9691081
    Abstract: Systems, methods and computer program products for providing an error-specific advertisement at a client computer. According to one embodiment, a method, implemented in a computer system, of providing an error-specific advertisement at a client computer is provided. The method may include determining that an error has occurred, identifying an advertisement for a product or a service relating to resolution of the error and/or generating an error message. The error message may include the advertisement and information regarding the error.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: June 27, 2017
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Barry A. Kritt, Sarbajit K. Rakshit
  • Patent number: 9673961
    Abstract: System, methods and apparatus are described that facilitate transmission of data over a multi-wire data communications link, particularly between two devices within an electronic apparatus. A clock extracted from a first sequence of symbols transmitted on a first lane of a multi-lane interface is used to receive and decode the first sequence of symbols and to receive and decode data and/or symbols transmitted on a second lane of the multilane interface. The clock signal may be derived from transitions in the signaling state of N wires between consecutive pairs of symbols in the first sequence of symbols. The first lane may be encoded using N! encoding and the second lane may be a serial or N! link.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: June 6, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Shoichiro Sengoku
  • Patent number: 9600436
    Abstract: A method of and apparatus for communicating between a host and an agent. The method includes the step of performing a first transaction between a host controller and a hub. The hub is operable to perform a single transaction with an agent based on the first transaction. The method then includes the step of performing a second transaction between the host controller and the hub. The second transaction is based on the single transaction.
    Type: Grant
    Filed: February 6, 2014
    Date of Patent: March 21, 2017
    Assignee: Intel Corporation
    Inventors: John I. Garney, John S. Howard