Input Or Output Circuit, Per Se (i.e., Line Interface) Patents (Class 370/359)
  • Patent number: 8018922
    Abstract: A network interface device having a first board to connect with a wired network to provide signal exchange, which is mounted in a network electronic device, a second board to connect with a wireless network to provide signal exchange, and a first and a second link portion provided at the first and the second boards to removably connect the first and the second boards, respectively.
    Type: Grant
    Filed: April 28, 2004
    Date of Patent: September 13, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Seung-soo Oak
  • Patent number: 8014383
    Abstract: A communication system capable of improving telephone communication service by effectively integrating communications with IP phones and with mobile phones. A connection controller controls a connection interface with a mobile phone and obtains the phone number of the mobile phone being connected thereto. A connect information transmitter transmits connect information including identification information and the phone number. A connect information manager stores and manages the received connect information. When a calling IP phone sends a request to call the mobile phone, a communication controller determines based on the connect information whether the mobile phone is connected to a receiving IP phone. If yes, the communication controller makes a call to the receiving IP phone to establish communication between the calling and receiving IP phones.
    Type: Grant
    Filed: February 10, 2005
    Date of Patent: September 6, 2011
    Assignee: Fujitsu Limited
    Inventors: Nobuhiko Eguchi, Kenji Yamada, Kaori Kai
  • Patent number: 8014413
    Abstract: In some embodiments, a shared IO device includes a plurality of packet filters associated with a plurality of virtual systems sharing the shared I/O device and a plurality of filter receive queues assigned to the plurality of packet filters. A processor is responsive to a receive packet to determine if the receive packet matches one of the plurality of packet filters and the processor, upon determining that there is a matched packet filter, is adapted to place the receive packet in the filter receive queue assigned to the matched packet filter.
    Type: Grant
    Filed: August 28, 2006
    Date of Patent: September 6, 2011
    Assignee: Intel Corporation
    Inventors: Gregory D. Cummings, Luke Chang
  • Patent number: 8015268
    Abstract: A synchronization scheme is provided that includes querying a managed device to obtain an initial device state, synchronizing the device state in a plurality of management processes, detecting a change in the initial device state, and maintaining a synchronized current device state between the managed device and the plurality of management processes.
    Type: Grant
    Filed: February 27, 2006
    Date of Patent: September 6, 2011
    Assignee: Genband US LLC
    Inventors: Mark Duffy, Ephraim Ezekiel, Robin Iddon, Eric Schott, Aruna Thirumalai, Chris Cook
  • Patent number: 7995568
    Abstract: The invention is directed to the capturing of user interface switch states. A method according to an embodiment of the invention includes: adding a state attribute to a UI switch control, the state attribute containing an expression; evaluating the expression relative to a UI binding of the UI switch control, if given, or a UI binding context node of the UI switch control, otherwise; and interpreting a result of the expression as a data layer node whose content is an ID reference to a case of UI controls that must be selected by the UI switch control.
    Type: Grant
    Filed: June 12, 2006
    Date of Patent: August 9, 2011
    Assignee: International Business Machines Corporation
    Inventors: John M. Boyer, Vladimir Trakhtenberg
  • Patent number: 7990991
    Abstract: The system of this invention for extending address on UTOPIA and the method thereof can extend the single PHY on the ATM switching chip bus to many PHY ports easily without increasing too much cost, and thus increase the application flexibility of corresponding ATM switching chips. Evidently, there would be still many other embodiments of the invention, the people skilled in the art can make a variety of corresponding changes and transformations in accordance with the invention without departing from its spirit and essential, but these corresponding changes and transformations should also be in the protection range of the claims of this invention.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: August 2, 2011
    Assignee: ZTE Corporation
    Inventors: Changkong Yao, Guosheng Wu, Weifeng Shi
  • Patent number: 7983249
    Abstract: A Mobile Enterprise Platform utilizes a web based service that synchronizes enterprise data between a plurality of disparate mobile devices and a plurality of backend enterprise resources. The Mobile Enterprise Platform creates a web service synchronization source instance using Hypertext Transfer Protocol (“HTTP”) for each application or database present on a plurality of mobile devices. Corresponding to each of these web service synchronization source instances is a web based synchronization service associated with a specific backend enterprise resource. Each synchronization service is web based and can thus live anywhere on the network or on a dedicated services tie as they need only to supply a small set of operations to offer synchronization capability to a variety of mobile devices.
    Type: Grant
    Filed: January 23, 2007
    Date of Patent: July 19, 2011
    Assignee: Oracle America, Inc.
    Inventors: John Galluzzo, George Nemitz
  • Patent number: 7984215
    Abstract: The router which relays a transfer request and a reply between master and slave components has request-control circuits provided therein. The request-control circuits judge the slave component to transfer a request from each master component to, and arbitrate the conflict between requests to one slave component. Further, for the router, a slave-component-allocation-control circuit which variably allocates the slave components to be connected to the request-control circuits to the request-control circuits is adopted. In case that a slave component in connection with one request-control circuit is subjected to no access, changing the allocation of the slave component in connection with the one request-control circuit makes possible to utilize the resource of the one request-control circuit.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: July 19, 2011
    Assignee: Renesas Electronics Corporation
    Inventor: Yoshitaka Tsujimoto
  • Patent number: 7965705
    Abstract: Embodiments of a circuit, a buffered crosspoint switch that includes the circuit and a computer system that includes the switch are described. In this circuit and switch, deep crosspoint buffers are replaced with smaller distributed buffers. This modification reduces the cost of the switch and improves the scaling properties of the architecture.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: June 21, 2011
    Assignee: Oracle America, Inc.
    Inventors: Georgios A. Passas, Hans Eberle, Nils Gura, Wladyslaw Olesinski
  • Patent number: 7961721
    Abstract: A router for a network is arranged for guiding data traffic from one of a first plurality Ni of inputs (I) to one or more of a second plurality No of outputs (O). The inputs each have a third plurality m of input queues for buffering data. The third plurality m is greater than 1, but less than the second plurality No. The router includes a first selection facility for writing data received at an input to a selected input queue of the input, and a second selection facility for providing data from an input queue to a selected output. Pairs of packets having different destinations Oj and Ok are arranged in the same queue for a total number of Nj,k inputs, characterized in that Nj,k<N for each j,k.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: June 14, 2011
    Assignee: NXP B.V.
    Inventors: Theodorus Jacobus Denteneer, Ronald Rietman, Santiago Gonzalez Pestana, Nick Boot, Ivo Jean-Baptiste Adan
  • Patent number: 7957370
    Abstract: A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: June 7, 2011
    Assignee: Lake Cherokee Hard Drive Technologies, LLC
    Inventors: Richard T. Behrens, Kent D. Anderson, Alan J. Armstrong, Trent Dudley, Bill R. Foland, Neal Glover, Larry D. King
  • Patent number: 7936748
    Abstract: A network device configured to allows the connection of the network device to a network in a daisy chain configuration using a single cable. The network device is connected to a cable with two conductors by a socket that is adapted to receive a plug connected to the end of the cable. When the plug on the end of a cable is inserted into the socket, a first conductor in the cable is connected to an input port of a network component and a second conductor of the cable is connected to an output port of a network component. A signal from the network is transmitted down a first conductor in a cable to a network device and the signal is then transmitted back from the network device down a second conductor in the same cable.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: May 3, 2011
    Assignee: Uponor Innovations AB
    Inventors: Jan Olof Andersson, Kenneth John Lockhart, Trevor Lewis Rossner, Jeffrey Paul Wiedemann, Logan Brent Grauer, Chris Edwin Kasian, William Andrew Perrin, Robert Christopher Kwong, Glenn William Nichols, Jason John Lemon
  • Patent number: 7924826
    Abstract: A “pinout mode” control capability incorporated into an integrated circuit device controls an internal mapping function, with the effect that the device pinout is adjusted by the setting of the pinout mode. An integrated circuit device includes a data interface with plural physical ports each having a physical port identifier and a mapper for mapping the physical port identifiers to logical port identifiers based on a selected mode setting, each mode setting defining a different port mapping. A data circuit is coupled to the data interface, the data circuit processing data sent to and received from the data interface based on the logical port identifiers.
    Type: Grant
    Filed: May 3, 2004
    Date of Patent: April 12, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Gary S. Muntz, Michael Fisher
  • Patent number: 7924846
    Abstract: A packet scheduling apparatus corrects an overhead amount between a DSL rate and a packet rate, converts DSL rate information to the packet rate, and shapes the IP packets from the Internet such that the IP packets are delivered at a transmission rate equal to or lower than the packet rate. An IP/ATM converter converts the IP packets from the packet scheduling apparatus to ATM cells. A DSL multiplexer has a DSL current rate detector for supplying DSL rate information indicative of a currently set DSL rate, and transmits the ATM cells from the IP/ATM converter or the IP packets from the packet scheduling apparatus to user terminals through DSL processing using telephone lines.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: April 12, 2011
    Assignee: NEC Corporation
    Inventors: Naoki Saikusa, Toshiyasu Kurasugi
  • Patent number: 7920553
    Abstract: A packet-based, hierarchical communication system, arranged in a spanning tree configuration, is described in which wired and wireless communication networks exhibiting substantially different characteristics are employed in an overall scheme to link portable or mobile computing devices. The network accommodates real time voice transmission both through dedicated, scheduled bandwidth and through a packet-based routing within the confines and constraints of a data network. Conversion and call processing circuitry is also disclosed which enables access devices and personal computers to adapt voice information between analog voice stream and digital voice packet formats as proves necessary. Routing pathways include wireless spanning tree networks, wide area networks, telephone switching networks, internet, etc., in a manner virtually transparent to the user.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: April 5, 2011
    Assignee: Broadcom Corporation
    Inventors: Joseph J. Kubler, Michael D. Morris
  • Patent number: 7907604
    Abstract: Routing between multiple hosts and adapters in a PCI environment is provided by a method and system. A Destination Identification (DID) field is inserted in a field of the PCI bus address (PBA) of transaction packets dispatched through PCI switches. A particular DID is associated with a particular host or system image, and thus identifies the physical or virtual end point of the packets. The method and system may track connections such that when particular host of a root node becomes connected to a specified switch, a PCI Configuration Master (PCM), residing in one of the root nodes, is operated to enter a destination identifier or DID into a table. The DID is then inserted in the PBA of packets directed through the specified switch from the particular host to one of the adapters.
    Type: Grant
    Filed: June 6, 2008
    Date of Patent: March 15, 2011
    Assignee: International Business Machines Corporation
    Inventors: William T. Boyd, Douglas M. Fremiuth, William G. Holland, Steven W. Hunter, Renato J. Recio, Steven M. Thurber, Madeline Vega
  • Patent number: 7907546
    Abstract: Method and system for network communication between a first network port and at least a second network port is provided. The method includes establishing bi-directional communication between the first network port and the second network port using a first set of port setting information. After establishing bi-directional communication, a second set of port setting information is sent from the first network port to the second network port. If a response to the second set of port setting information is not received from the second network port within a given duration or if an unacceptable response is received from the second network port, then the first set of port setting information is used for communication between the first and second network ports.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: March 15, 2011
    Assignee: QLOGIC, Corporation
    Inventor: Thomas R. Prohofsky
  • Patent number: 7894509
    Abstract: Certain embodiments of the present invention provide for a system and method for preserving bandwidth in data networks. The method includes determining whether to perform functional redundancy processing for a current data set. Determining whether to perform functional redundancy processing for a current data set may be conducted according to redundancy rules. In performing functional redundancy processing, the method includes searching at least one queue for a data set that is functionally redundant to the current data set. The searching may be conducted according to redundancy rules. If a queued data set is found to be functionally redundant to the current data set, the queued data set may be dropped from the queue and the current data set added to the queue. In such a manner, functionally redundant messages are dropped prior to transmission and bandwidth is optimized.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: February 22, 2011
    Assignee: Harris Corporation
    Inventors: Donald L. Smith, Anthony P. Galluscio, Robert J. Knazik
  • Patent number: 7885255
    Abstract: A synchronous read channel having a single chip integrated circuit digital portion which provides digital gain control, timing recovery, equalization, digital peak detection, sequence detection, RLL(1,7) encoding and decoding, error-tolerant synchronization and channel quality measurement is disclosed. The integrated circuit accommodates both center sampling and side sampling, and has a high degree of programmability of various pulse shaping and recovery parameters and the ability to provide decoded data using sequence detection or digital peak detection. These characteristics, together with the error-tolerant sync mark detection and the ability to recover data when the sync mark is obliterated, allow a wide variety of retry and recovery strategies to maximize the possibility of data recovery.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: February 8, 2011
    Assignee: Lake Cherokee Hard Drive Technologies, LLC
    Inventors: Richard T. Behrens, Kent D. Anderson, Alan J. Armstrong, Trent Dudley, Bill R. Foland, Neal Glover, Larry D. King
  • Patent number: 7885254
    Abstract: Provided is a delay insensitive (DI) data transfer apparatus with low power consumption. The apparatus, includes: N number of encoders configured to receive and encode input request and data signals, where each of the N number of encoders includes: a reference current source circuit configured to generate a current; and a voltage-to-current converter circuit configured to output a current having a level of 0, output the current having the level of I, and output the current having the level of 2I; and N number of decoders configured to recover the current-level signals, where each of the decoders includes: a threshold current source circuit configured to generate first and second threshold currents; an input current mirror circuit configured to differentiate the first and second threshold currents; and a current-to-voltage converter circuit configured to detect the threshold current, recover a voltage input value, and extract data and request signals.
    Type: Grant
    Filed: October 30, 2007
    Date of Patent: February 8, 2011
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Myeong-Hoon Oh, Seong-Woon Kim, Myung-Joon Kim
  • Patent number: 7876779
    Abstract: A device that schedules the transmission of information between system components, paired with different data adapters, allows for a system that can transmit data between unlike devices. The system focuses on allowing electronic devices to be used in more facets than the intended application. A user is able to hook up multiple source devices including computers, cable boxes, heating systems, et. al. and interact with them on different output devices. Based on the output device television, speakers, monitors, et. al. and the control device, i.e. a remote, keyboard, Wii Mote™, et. al. the interaction with the source device will be tailored to provide the most natural interaction. This will also allow unlike devices to be used together in order to create a synergistic effect.
    Type: Grant
    Filed: February 11, 2009
    Date of Patent: January 25, 2011
    Assignee: Ayaion, Inc.
    Inventor: Mathew Philip Wilson
  • Patent number: 7839808
    Abstract: Disclosed are an apparatus and method for removing noise contained within a usable frequency band of a mobile communication terminal. The apparatus includes a multiplier for multiplying a main clock of the mobile communication terminal by a predetermined integer to generate a reference signal; a multiplexer for multiplexing parallel signals, the parallel signals being transmitted to a peripheral device inside the mobile communication terminal, using the reference signal, and converting the parallel signals into serial signals; a demultiplexer for demultiplexing the serial signals to convert the serial signals into parallel signals; and a frequency divider for recovering the reference signal of the serial signals transmitted from the demultiplexer into the main clock.
    Type: Grant
    Filed: December 29, 2005
    Date of Patent: November 23, 2010
    Assignee: Samsung Electronics Co., Ltd
    Inventor: Nam-Hyung Kim
  • Patent number: 7830849
    Abstract: An object of the present invention is to provide a wireless communication print server 25 that makes a printer 20 connected the wireless communication print server 25 unavailable if a parameter 50 is in the initial state. When the wireless communication print server 25 receives a print request, determines whether or not the parameter 50 is in the initial state, and then rejects the print request if the parameter 50 is in the initial state. If the parameter 50 that has been changed by a change unit 60 is not in the initial state, the wireless communication print server makes the printer 20 connected with the wireless communication print server 25 available.
    Type: Grant
    Filed: January 2, 2008
    Date of Patent: November 9, 2010
    Assignee: Seiko Epson Corporation
    Inventors: Kazuhito Gassho, Susumu Shiohara
  • Patent number: 7814280
    Abstract: A shared memory is described having a plurality of receive ports and a plurality of transmit ports characterized by a first data rate. A memory includes a plurality of memory banks organized in rows and columns. Operation of the memory array is characterized by a second data rate. Non-blocking receive crossbar circuitry is operable to connect any of the receive ports with any of the memory banks. Non-blocking transmit crossbar circuitry is operable to connect any of the memory banks with any of the transmit ports. Buffering is operable to decouple operation of the receive and transmit ports at the first data rate from operation of the memory array at the second data rate. Scheduling circuitry is operable to control interaction of the ports, crossbar circuitry, and memory array to effect storage and retrieval of the data segments in the shared memory.
    Type: Grant
    Filed: August 18, 2005
    Date of Patent: October 12, 2010
    Assignee: Fulcrum Microsystems Inc.
    Inventors: Uri Cummings, Andrew Lines, Patrick Pelletier, Robert Southworth
  • Patent number: 7808992
    Abstract: A PVLAN having a primary and secondary VLAN's where the primary and secondary VLAN's have ports and the users connected to those ports. The MAC addresses of those users are learned in the primary or the secondary VLAN's and together with the port designation are stored preferably in tables associated with the VLAN's and the associated VLAN's. Processes are provided that replicate the tables in the other VLAN's so that the information necessary to transfer packets between source and destination ports is available to the associated VLAN's.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: October 5, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Sanjib Homchaudhuri, Senthil Arunacahalam, Sundher Narayanaswamy, Krishna Kumar Vavilala, Abhishek Gupta
  • Patent number: 7808996
    Abstract: Disclosed is a packet forwarding apparatus and method for a virtualization switch, applicable to switch environments built by Internet Small Computer System Interface (iSCSI) connections. The packet forwarding apparatus comprises a header extractor, a dispatcher, and a forwarding unit. After completion of the authorization for iSCSI session connections, the header extractor receives iSCSI packets and extracts the headers for the iSCSI packets. The dispatcher decides the flow directions for the received packets. The forwarding unit forwards the packets between the client-side connection and the storage-side connection of the virtualization switch, including converting virtual addresses into physical addresses for the received iSCSI packets, building the mapping between the client-side interface and the storage-side interface, and delivering the payload associated with the connections.
    Type: Grant
    Filed: June 24, 2008
    Date of Patent: October 5, 2010
    Assignee: Industrial Technology Research Institute
    Inventors: Yi-Cheng Chung, Stanley Lee, Yan-Hong Chiang, Chi-Chun Chen
  • Patent number: 7804824
    Abstract: A database correlating a specific set of linecard criteria, out of a plurality of sets of linecard criteria, to a template code is loaded into a linecard during manufacturing. A template code based on country-specific criteria is sent to the linecard at startup, whenever otherwise desired. The template code may also be periodically refreshed from a central authority that recognizes the address of a particular linecard.
    Type: Grant
    Filed: January 18, 2006
    Date of Patent: September 28, 2010
    Assignee: ARRIS Group, Inc.
    Inventor: Jeffrey S. Andrews
  • Patent number: 7792055
    Abstract: The present invention relates to a method for determining the topology of a network. The method, including the step of a generic agent communicating with a plurality of network devices, using a network management protocol, in order to extract data about the network; wherein the generic agent includes a communication algorithm and wherein each network device corresponds to one of a plurality of network device types and the algorithm is adjusted for each network device using a configuration schema based on the corresponding network device type.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: September 7, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Ajay Shrikant Chitale
  • Patent number: 7783784
    Abstract: A method for configuring a link aggregation module, including configuring the link aggregation module to use an initial network interface card (NIC) selection algorithm, servicing a first plurality of packets using a plurality of NICs in an aggregation group, wherein the initial NIC selection algorithm is used to select the one of the plurality of NICs to service at least one of the first plurality of packets, collecting a plurality of first packet distribution statistics for the aggregation group corresponding to the servicing of the first plurality of packets, and selecting a first alternate NIC selection algorithm based on the plurality of first packet distribution statistics.
    Type: Grant
    Filed: August 31, 2004
    Date of Patent: August 24, 2010
    Assignee: Oracle America, Inc.
    Inventors: Nicolas G. Droux, Sunay Tripathi, Paul Durrant
  • Patent number: 7778236
    Abstract: A method for implementing transport layer service of NGN, wherein the NGN includes a service layer and a transport layer, the method including: establishing an independent transport-layer control device in the control plane of the transport layer in the NGN network; establishing a transport connection in the user plane of the transport layer under the control of the transport-layer control device; bearing the NGN service through the transport connection. The present invention also discloses a system for implementing transport layer service of NGN. According to the present invention, the network design of NGN may be simplified, the cost of the transport layer network may be reduced, and a strict QoS guarantee for NGN services may be provided.
    Type: Grant
    Filed: September 5, 2005
    Date of Patent: August 17, 2010
    Assignee: Huawei Technologies, Co., Ltd.
    Inventor: Haoze Yu
  • Patent number: 7769002
    Abstract: Method and apparatus are disclosed for constrained dynamic path selection among multiple available communication interfaces. In some embodiments selection logic is operatively coupled with a number of link-layer interfaces to select a set of link-layer interfaces that satisfy a set of congestion constraint conditions. Metric logic is operatively coupled with the link-layer interfaces to calculate a metric value for each link-layer interface in the set. Switch logic is operatively coupled with the selection logic and metric logic to assign a data stream a link-layer interface in the set of interfaces according to its metric value to optimize communication performance.
    Type: Grant
    Filed: February 15, 2008
    Date of Patent: August 3, 2010
    Assignee: Intel Corporation
    Inventors: Xiaohong Gong, Anand Rangarajan
  • Patent number: 7764672
    Abstract: Disclosed is a packet communication device capable of flexibly adding a function easily without suspending the service. To the switch element (SWE), the interface element (IFE) and the controller (CTRL) are connected. The function processor (FP) can be connected to SWE in accordance with the necessary function and number. In the IFE, it is judged what kind of functional processing is required for an incoming packet, and through which output IFE, the transmission is performed to the outside, and the forwarding information when the packet is forwarded within the packet device on the basis of the judgment result will be imparted to the packet.
    Type: Grant
    Filed: January 20, 2004
    Date of Patent: July 27, 2010
    Assignee: Hitachi, Ltd.
    Inventor: Norihiko Moriwaki
  • Patent number: 7756123
    Abstract: A peripheral component interface express (PCIe) controller include a crossbar to reorder data lanes into an order compatible with PCIe negotiation rules. A full crossbar permits an arbitrary swizzling of data lanes, permitting greater flexibility in motherboard lane routing.
    Type: Grant
    Filed: December 21, 2006
    Date of Patent: July 13, 2010
    Assignee: Nvidia Corporation
    Inventors: Wei-Je Huang, Nathan C. Myers
  • Patent number: 7751377
    Abstract: Wireless network interference is mitigated with client devices having wireless network interference mitigation logic and/or utilizing a usable bandwidth channel quality metric. In a described example implementation, a client device includes wireless network interference mitigation logic that monitors at least one channel condition of a wireless network and participates in a wireless network interference mitigation procedure based on the at least one channel condition. In another described example implementation, a usable bandwidth of a wireless channel is ascertained with respect to a native network, the usable bandwidth reflecting a difference between (i) a total channel capacity of the wireless channel and (ii) a portion of the total channel capacity that is consumed by wireless communications of one or more foreign networks. By way of example only, the at least one channel condition may be usable bandwidth. The wireless network interference mitigation logic may also be employed in non-client devices.
    Type: Grant
    Filed: June 28, 2005
    Date of Patent: July 6, 2010
    Assignee: Microsoft Corporation
    Inventors: Fan Yang, Qian Zhang, Kun Tan
  • Patent number: 7746850
    Abstract: This invention discloses an interface card built in each single unit of a CTI system and connected to the Voice Processing Unit (VPU) of the single unit via local CT-BUS. On the transmitting side of an interface card, low-speed signals from the VPU in the single unit are multiplexed into a single high-speed signal and converted into LVDS signals. On the receiving side of the interface card, external high-speed LVDS signals are converted into low voltage TTL signals, demultiplexed into local CT-BUS compatible low-speed signals and sent to the VPU in the single unit. The invention also discloses a CTI system applying the interface card. The interface card and the CTI system applying the interface card feature low cost, simple and reliable connection, easy installation and operation, high reliability, large channel capacity and good expandability.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: June 29, 2010
    Assignee: Shenzhen Donjin Communication Tech Co., Ltd.
    Inventors: Yongkun Liao, Liangtian Wang
  • Publication number: 20100150146
    Abstract: Some demonstrative embodiments of the invention include a method device and/or system of communicating circuit switch information, e.g., between two or more circuit switch interfaces, over an analog modulation communication network. The method, according to some demonstrative embodiments may include synchronizing at least one slave clock of at least one respective local circuit switch interface to a master clock of a master circuit switch interface which communicates with the at least one local circuit switch interface over an analog modulation communication network. Other embodiments are described and claimed.
    Type: Application
    Filed: February 22, 2010
    Publication date: June 17, 2010
    Inventors: Raul Assia, Lev Razmat, Noam Swery, Oren Kedem, Yehuda Ben-Simon, Sara Zevin
  • Publication number: 20100142948
    Abstract: In one embodiment, the present invention is a framer/mapper/multiplexor (FMM) device that can simultaneously (i) send protection copies of both its working incoming high-speed (e.g., STS-12) signal and incoming low-speed signals to a protection FMM device, and (ii) receive corresponding protection signals from the protection FMM device. Furthermore, the FMM device can select between working and protection signals at a switching level (e.g., STS-1) lower than the high-speed level, allowing for 1+1 APS/MSP protection and equipment protection at the board level, the device level, and at the STS-1 level. Yet further, four or more FMM devices can be configured so that all FMM devices can communicate with their corresponding protection FMM devices using a single, shared, 4-pin link (e.g., quad-OC-3 mode), and still select between working and protection signals at the switching level (e.g., STS-1).
    Type: Application
    Filed: December 10, 2008
    Publication date: June 10, 2010
    Applicant: Agere Systems Inc.
    Inventors: Si Ruo Chen, Chenggang Duan, Lin Hua, Michael S. Shaffer, Qian Gao Xu
  • Patent number: 7729388
    Abstract: A processor includes at least a portion of a first split transmit and receive media access controller (MAC), the split transmit and receive MAC having a transmit unit and a receive unit physically separated from one another. An interface for directing signals between the transmit unit and the receive unit of the first split transmit and receive MAC is configurable to multiplex the signals with other signals directed between a transmit unit and a receive unit of at least a second split transmit and receive MAC. The interface may comprise a plurality of channels, each having one or more ports associated therewith, wherein a given signal to be directed between transmit and receive units of a given split transmit and receive MAC is assigned to a particular channel and port of the interface.
    Type: Grant
    Filed: March 12, 2004
    Date of Patent: June 1, 2010
    Assignee: Agere Systems Inc.
    Inventors: David Allen Brown, Amit Mahendra Shah
  • Publication number: 20100118867
    Abstract: A switching chassis includes more than one cascade unit and more than one switching unit, where: the cascade units have cascade interfaces to connect line processing chassis; the switching units have switching ports to connect the cascade interfaces; and any cascade interface of any cascade unit is connected to one switching port of any switching unit. A router cluster with the above switching chassis includes switching chassis and line processing chassis interconnected via optical fibers, where: any optical interface of any line processing chassis is connected to one cascade interface of any cascade unit; and any cascade interface of any cascade unit is connected to one switching port of any switching unit. With the present invention, the capacity of a router cluster can be expanded without the need to replace any component of the router cluster so that the expansion cost is lower.
    Type: Application
    Filed: January 21, 2010
    Publication date: May 13, 2010
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Dajun Zang, Lu Yang, Wenhua Du, Dongcheng Yang, Lingqiang Fan, Gang Gai, Da Zhou, Zhengjie Pu
  • Patent number: 7715364
    Abstract: The present invention is directed toward, a data sink/data source data transmission device and data terminal device for a circuit-switched and packet-switched network, the ability to eliminate the logical separation between applications, which are based on the circuit-switched network (e.g., PSTN, ISDN), and applications, which are based on the packet-switched network, (e.g., Internet). To this end, a data transmission device for transmitting and receiving data into/from the circuit-switched network includes controllable switchover parts. This data transmission device is or can be assigned to a universally useable unit for automatically processing data and for transmitting and receiving data to/from the packet-switched network and is assigned or can be assigned to the at least one data terminal device for transmitting and receiving data into/from the circuit-switched network.
    Type: Grant
    Filed: February 26, 2004
    Date of Patent: May 11, 2010
    Assignee: Siemens Aktiengesellschaft
    Inventors: Gunter Logemann, Hasan Palandöken, Frank Schäfer
  • Patent number: 7673030
    Abstract: A control system, method and computer program are provided for communicating control information in a control system. The control system includes a master controller and a plurality of devices. Each of the plurality of devices have a number of channels. Each channel has an identifying number and a plurality of channel states. The method includes at least initially directing one or more messages sent to and from each device to the master controller, sending a first type of control message from the master controller to respective devices, and sending a second type of control message and a third type of control message from the master controller to respective devices. A control message of the first type directs the respective device to place one of its channels in a specified channel state. A control message of the second type directs the respective device to set the level of a specified parameter to a certain value, and a control message of the third type comprises a character string of variable length.
    Type: Grant
    Filed: November 17, 2006
    Date of Patent: March 2, 2010
    Assignee: AMX LLC
    Inventors: Thomas D. Hite, Ronald W. Barber, Charles W. Partridge, Mark R. Lee, William B. McGrane, Aaron L. Myer, Mark S. Lewno
  • Patent number: 7672299
    Abstract: A method for virtualizing a network interface card includes creating a first plurality of virtual NICs, assigning each of a plurality of receive rings on the network interface card (NIC) to one of the first plurality of virtual NICs, and if the number of virtual NICs is greater than the number of receive rings on the NIC, creating a first software ring corresponding to one of the plurality of receive rings on the NIC, creating a first plurality of software receive rings associated with the first software ring, creating a second plurality of virtual NICs, and assigning each of the first plurality of software receive rings to one of the second plurality of virtual NICs, wherein the plurality of receive rings is less than a sum of the first plurality of virtual NICs and the second plurality of virtual NICs.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: March 2, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Nicolas G. Droux, Sunay Tripathi, Kais Belgaied
  • Patent number: 7668111
    Abstract: Methods and apparatus are provided for determining traffic characteristics and statistics for storage area network flows. An intelligent line card associated with a fibre channel switch is used to snoop selected flows in a storage area network. Flows are characterized using information that may include initiator target pairs and initiator target logical unit number (LUN) groupings. Selected flows are configured for monitoring and information about the selected flows is maintained. Selected flow information can be analyzed at a line card associated with a fibre channel switch.
    Type: Grant
    Filed: April 11, 2005
    Date of Patent: February 23, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Varagur Chandrasekaran, Giridhar Rajaram, Srinivas Avasarala, Sanjaya Kumar
  • Patent number: 7666099
    Abstract: A gaming machine with a communication multiplexer device that allows communications between the gaming machine and one or more game service servers all within a single network interface is described. The single network interface may be a wireless or wired network interface. The communication multiplexer device converts messages in native communication protocols used by the gaming machine to a network communication protocol such as TCP/IP for transmission over the single wired or wireless network interface. The communication multiplexer is designed such that the gaming machine may receive messages that have been transmitted using the native communication protocols without modifying regulated gaming software on the gaming machine.
    Type: Grant
    Filed: March 2, 2005
    Date of Patent: February 23, 2010
    Assignee: IGT
    Inventor: Hardy Lee Crumby
  • Patent number: 7646767
    Abstract: A method and system for routing fiber channel frames using a fiber channel switch element is provided. The switch element includes, a hashing module whose output is used to select the column from a look up table to route frames. The method includes, indexing a look up table using domain, area, virtual storage area network identifier, a hashing module output and/or AL_PA values; selecting a column from the look up table based on a column select signal; and routing a frame if a route is valid. The hashing module takes a fiber channel header to generate a pseudo random value used for selecting a column from the look up table. The hashing module uses same field values in an exchange to generate the pseudo random value. A hash function is used on a frame's OX_ID, D_ID, S_ID, and/or RX_ID to route fiber channel frames.
    Type: Grant
    Filed: July 20, 2004
    Date of Patent: January 12, 2010
    Assignee: QLOGIC, Corporation
    Inventors: Frank R Dropps, Edward C McGlaughlin, Steven M Betker
  • Patent number: 7639674
    Abstract: A data communications switch for dynamically distributing packet processing operations between an ingress and egress processor for load balancing is disclosed. The invention in the preferred embodiment features a switching device including a plurality of switching modules, each of the switching modules including a packet classifier for identifying one or more packet processing operations to be applied to an ingress packet and a controller adapted to allocate each of the identified one or more packet processing operations between a first set of packet processing operations and a second set of packet processing operations, execute the first set of packet processing operations at the ingress processor at which the packet was received, and transmit instructions to the egress processor to execute the second set of packet processing operations. The egress processor then executes the second set of packet processing operations, after which the packet may be transmitted toward its destination node.
    Type: Grant
    Filed: October 25, 2004
    Date of Patent: December 29, 2009
    Assignee: Alcatel Lucent
    Inventors: Chiang Yeh, Dennis Weaver
  • Patent number: 7639655
    Abstract: Switch and MAC layer components are located at a headend and PHY layer components for connecting a plurality of end-user devices are located remotely at nodes. Using SSMII technology, MAC layer ports can communicate with an equal number of PHY layer interface ports serially. Thus, the MAC layer connects to the PHY layer via fiber links, a separate link being used for each direction of traffic data flow. Information data is encoded along with a frame sync signal and a clock signal into a serial stream for transmission across the network. The serial stream is decoded at the other end, and the frame sync signal is extracted to provided timing functionality. This allows full duplex operation with the MAC layer separated from the PHY layer at distances greater than a few inches. Also, user device status may be monitored at the single switch location.
    Type: Grant
    Filed: December 20, 2002
    Date of Patent: December 29, 2009
    Assignee: Scientific-Atlanta, Inc.
    Inventor: Angelo A. Bione
  • Patent number: 7623519
    Abstract: A routing module applies a plurality of routing rules simultaneously to determine routing for a Fibre Channel frame. Each rule independently determines whether the rule applies to the frame as well as a routing result for the frame. The routing result includes a port address, a zoning indicator, and a priority designation that can be used to route the frame over a virtual channel in an interswitch link. A selector chooses between the results returned by the rules. A component receives routing results specifying an ISL group and selects a physical ISL for the frame. An in-band priority determined by the content of the frame header can also be used in place of the priority designation in the routing result.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: November 24, 2009
    Assignee: Brocade Communication Systems, Inc.
    Inventors: Anthony G. Tornetta, Jason Workman, Jerald W. Pearson, James C. Wright, Gregory L. Koellner
  • Patent number: 7616645
    Abstract: A frame forwarding apparatus is provided with a frame forwarding processing unit for converting a VLAN ID of a frame received from one subscriber terminal into a group VLAN ID and converting a group VLAN ID of a frame received from an ISP router into a subscriber VLAN ID, by referring to a VLAN bundling table. Each of the entries in the bundling table defines subscriber side line information including a line number of a physical line connected to one of the subscriber terminals and a subscriber VLAN ID, in association with a MAC address of the subscriber terminal and ISP router side line information including a line number of a physical line connected to the ISP router and a group VLAN ID.
    Type: Grant
    Filed: July 7, 2006
    Date of Patent: November 10, 2009
    Assignee: Hitachi Communication Technologies, Ltd.
    Inventors: Migaku Ota, Hiroaki Miyata, Masahiro Kimura, Jun Nakajima
  • Patent number: RE41397
    Abstract: Disclosed is a process for driving a network interface card. The process includes monitoring the status of a plurality of ports connected between a computer and a network. Detecting a failure in one of the plurality of ports connected to the network. Re-assigning data transmitted over the failed one of the plurality of ports to an active port of the plurality of ports selected in a round robin technique . The process further including receiving data over one of the plurality of ports designated as a primary receiving port. Preferably, when the failed one of the plurality of ports is the primary receiving port, the receiving tasks are assigned to a next active port selected in a round robin technique .
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: June 22, 2010
    Assignee: Adaptec, Inc.
    Inventors: Faisal Latif, Pramod Sharma, Suleman Saya, Jim J. Kuhfeld