Input Or Output Circuit, Per Se (i.e., Line Interface) Patents (Class 370/359)
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Patent number: 9391899Abstract: A method and system for detecting congestion in a network of nodes, abating the network congestion, and identifying the cause of the network congestion is provided. A congestion detection system may comprise a detection system, an abatement system, and a causation system. The detection system monitors the performance of network components such as the network interface controllers and tiles of routers to determine whether the network is congested such that a delay in delivering packets becomes unacceptable. Upon detecting that the network is congested, an abatement system abates the congestion by limiting the rate at which packets are injected into the network from the nodes. Upon detecting that the network is congested, a causation system may identify the job that is executing on a node that is the cause of the network congestion.Type: GrantFiled: December 15, 2014Date of Patent: July 12, 2016Assignee: Cray Inc.Inventors: Laurence S. Kaplan, Edwin Lloyd Froese, Christopher Brian Johns, Matthew Paul Kelly, Aaron Forest Godfrey, Brent Thomas Shields
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Patent number: 9391926Abstract: An information handling system is provided. The information handling system includes systems and methods for expanding the port count in a single Fiber Channel domain by adding modular Fiber Channel switches. Such a system includes a system enclosure that contains a plurality of Fiber Channel modules configured to send and receive Fiber Channel packets, the Fiber Channel modules providing a plurality of Fiber Channel ports and a switch processor coupled to the plurality of Fiber Channel ports and to a plurality of Ethernet ports. The switch processor is configured to apply a stacking header to Fiber Channel packets for transmission from one of the plurality of Ethernet ports over a stacking link to another switch processor in another system enclosure.Type: GrantFiled: October 26, 2012Date of Patent: July 12, 2016Assignee: Dell Products L.P.Inventors: Hiren A. Desai, Haresh K. Shah, Krishnamurthy Subramanian, Swaminathan Sundararaman, Saikrishna M. Kotha
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Patent number: 9391455Abstract: A system for switching between first and second voltage supply units, the system may include a first interface unit that is connected between a first voltage supply unit and an output unit, a second interface unit that is connected between a second voltage supply unit and the output unit; a controller that is arranged to select a selected voltage supply unit and to instruct the first and second interface units and the output unit to facilitate a provision of a selected supply voltage provided from the selected voltage supply unit to a load coupled to the output unit. Each interface unit may include a positive input port, a negative input port, a positive output port and a negative output port. The negative and positive output ports of the first interface unit are isolated from the negative and positive output ports of the second interface unit, respectively.Type: GrantFiled: August 29, 2013Date of Patent: July 12, 2016Assignee: Harmonic, Inc.Inventor: Nadav Harpaz
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Patent number: 9348548Abstract: A print control system 1 includes a control server 10 that opens a communication path for asynchronous duplex communication, generates print data, and outputs the generated print data by the opened communication path; and a printer 12 that opens a communication path, receives the print data by the opened communication path, and prints based on the received print data.Type: GrantFiled: October 28, 2014Date of Patent: May 24, 2016Assignee: Seiko Epson CorporationInventors: Shigeo Tajima, Koji Nishizawa, Yuichi Sugiyama
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Patent number: 9338404Abstract: A device may provide information for a virtual reality environment to a virtual reality device. The virtual reality device may be operated by a first party. The device may determine that the first party of the virtual reality device is placing a call to a second party from within the virtual reality environment. The device may determine connection information associated with the first party and the second party. The device may cause the call to be established between the virtual reality device and a second party device associated with the second party via a telephone network using the connection information and without the second party device connecting to the virtual reality environment. The telephone network may be located external to the virtual reality environment. The second party device may connect to the telephone network without connecting to the virtual reality environment.Type: GrantFiled: December 23, 2014Date of Patent: May 10, 2016Assignee: VERIZON PATENT AND LICENSING INC.Inventors: Christian Egeler, David B. Murray
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Patent number: 9239607Abstract: In one embodiment, the present invention includes a method for obtaining file information regarding a file to be downloaded from a remote location to a computing device, creating at least one empty file in a destination storage based on the file information and communicating block information regarding the empty file to a network interface, and receiving a data packet of the file in the network interface and directly sending a payload of the data packet from the network interface to the destination storage according to the block information, while a host processor of the computing device is in a low power state. Other embodiments are described and claimed.Type: GrantFiled: December 22, 2011Date of Patent: January 19, 2016Assignee: Intel CorporationInventors: Ren Wang, Christian Maciocco, Tsung-Yuan C. Tai, Ahmad Samih, Mona Vij, Arun Raghunath, John Keys, Scott Hahn, Raj Yavatkar
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Patent number: 9081908Abstract: Operating M-PHY communications protocol over a Serial Advanced Technology Attachment SATA-based interface and related devices, systems, and methods are disclosed. In one embodiment, the system operates the M-PHY communications over a SATA interface. Related cables, connectors, systems, and methods are also disclosed. In particular, embodiments of the present disclosure take the M-PHY standard compliant signals and direct them through a SATA compliant connector (and optionally cable) so as to allow two M-PHY standard compliant devices having SATA connectors to communicate.Type: GrantFiled: November 15, 2012Date of Patent: July 14, 2015Assignee: QUALCOMM IncorporatedInventors: Yuval Corey Hershko, Yoram Rimoni
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Patent number: 9065782Abstract: The disclosure discloses a method and apparatus for controlling information element switch. The method comprises the following steps: a switch board determines that it has received a link request information element from each ingress line card, wherein the link request information element carries the request time stamp information; the switch board performs link allocation according to each request time stamp information, wherein the link is the link connecting the switch board with each egress line card; and each ingress line card transmits a data information element according to the result of the link allocation. With the disclosure, the problems of time delay and jitter in an information element switch process are solved, the input end flow of the switch board can also be controlled, and the requirement for the egress line card cache and difficulty in data packet recombination are reduced.Type: GrantFiled: May 17, 2011Date of Patent: June 23, 2015Assignee: ZTE CORPORATIONInventors: Xingzi Wei, Jian Xu
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Patent number: 9031064Abstract: In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.Type: GrantFiled: February 21, 2014Date of Patent: May 12, 2015Assignee: Intel CorporationInventors: Sridharan Ranganathan, Mahesh Wagh, David J. Harriman
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Publication number: 20150049758Abstract: For a hot carrier injection tolerant network on chip (NoC) router architecture, a coupling module modifies couplings of connecting wires to input buffer data bits in an NoC data channel. A connection module modifies connection points of an input buffer to the connecting wires.Type: ApplicationFiled: October 17, 2013Publication date: February 19, 2015Applicant: UTAH STATE UNIVERSITYInventors: Dean Michael Ancajas, Koushik Chakraborty, Sanghamitra Roy
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Patent number: 8953504Abstract: Embodiments herein relate to a repeater for time division duplexed signals. The repeater comprises, for each channel of the time division duplexed signal, a pair of access points. The first access point of the pair being configured in a first mode, and the second access point of the pair being configured in a second mode. The pair of access points being linked by a broadband serial wired data connection. The invention further relates to a multi-band regenerator and a network comprising such a repeater.Type: GrantFiled: September 22, 2010Date of Patent: February 10, 2015Assignee: Universite de Quebec en Abitibi TemiscamingueInventor: Mohamed Ailas
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Publication number: 20150036681Abstract: Node locations in the topology of a cluster computer server are designated as input/output (I/O) nodes that provide input and output for the cluster computer server. Examples of I/O nodes include network nodes that provide an interface for the cluster computer server to an external network, and storage nodes that provide access to storage devices for the cluster compute server. The I/O nodes are configured to analyze received messages and identify whether the message is targeted to the receiving I/O node or to another node of the cluster compute server. Those messages targeted to the I/O node are provided to a processing module of the I/O node for processing.Type: ApplicationFiled: May 7, 2014Publication date: February 5, 2015Applicant: Advanced Micro Devices, Inc.Inventors: Sean Lie, Timothy Botsford, Min Xu
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Patent number: 8948013Abstract: At least one first frame of a first data flow can be received and passed to a general processor to inspect the at least one first frame. A flow acceleration request can be received including a set of conditions for accelerated processing, by a network processor, of a set of frames in the first data flow subsequent to the at least one first frame. At least one subsequent frame in the set of frames can be processed, using the network processor, in connection with forwarding of the subsequent frame to at least one remote network node, where processing of the subsequent frame is accelerated relative to processing of the at least one first frame and based, at least in part, on the set of conditions included in the flow acceleration request.Type: GrantFiled: June 14, 2011Date of Patent: February 3, 2015Assignee: Cisco Technology, Inc.Inventors: Bhagatram Yaugand Janarthanan, Imnaz Meher Jilani, Robert A. Mackie, Tzu-Ming Tsang, Walter Dixon
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Patent number: 8934344Abstract: In an embodiment, an apparatus is provided that may include an integrated circuit including switch circuitry to determine, at least in part, an action to be executed involving a packet. This determination may be based, at least in part, upon flow information determined, at least in part, from the packet, and packet processing policy information. The circuitry may examine the policy information to determine whether a previously-established packet processing policy has been established that corresponds, at least in part, to the flow information. If the circuitry determines, at least in part, that the policy has not been established and the packet is a first packet in a flow corresponding at least in part to the flow information, the switch circuitry may request that at least one switch control program module establish, at least in part, a new packet processing policy corresponding, at least in part, to the flow information.Type: GrantFiled: January 29, 2014Date of Patent: January 13, 2015Assignee: Intel CorporationInventors: Mazhar I. Memon, Steven R. King
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Patent number: 8929255Abstract: A network switch includes a first network port, a second network port, and a port virtualization module associated with the first network port. The port virtualization module determines that a device coupled to the first network port includes a first virtual network interface and provides a second virtual network interface on the first network port. The second virtual network interface is associated with the first virtual network interface. The network switch provides an aggregation zone including the second network port, the first virtual network interface, and the second virtual network interface.Type: GrantFiled: December 20, 2011Date of Patent: January 6, 2015Assignee: Dell Products, LPInventors: Hendrich M. Hernandez, Gaurav Chawla, Robert L. Winter
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Patent number: 8923302Abstract: A set of globally-reachable attachment registers is provided for objects in an internetwork of interconnected communications networks. “Objects” can be networks, hosts or terminals, or passive objects which themselves do not have a network interface. Each attachment register corresponds to an object in the internetwork. The attachment registers are not located with their respective object. Information is stored in the attachment registers that establishes one or more logical links between the attachment registers. The information is used to perform one or more network communication functions, and in particular to determine a locator by identifying a logical path, along the logical links between attachment registers, from a destination attachment register corresponding to the destination object. Other non-limiting example functions include location registration and update, name to global locator resolution, routing, multi-homing, dynamic ISP selection, and handover.Type: GrantFiled: March 30, 2012Date of Patent: December 30, 2014Assignee: Telefonaktiebolaget LM Ericsson (publ)Inventor: Anders E. Eriksson
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Patent number: 8908748Abstract: An interface circuit includes an interface terminal, a voltage detection device, an output driver and an enable logic. The interface terminal is configured to connect to an interface line. The voltage detection device is configured to detect a voltage present at the interface terminal. The output driver is configured to apply an output signal to the interface terminal. The enable logic is configured to generate an enable signal for the output driver based on an evaluation signal output by the voltage detection device, wherein the enable signal affects an enabling of the output driver if the evaluation signal shows that the voltage present at the interface terminal meets a given condition.Type: GrantFiled: October 15, 2012Date of Patent: December 9, 2014Inventors: Klaus Buchner, Klemens Kordik, Christian Unhold
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Patent number: 8902776Abstract: A deep packet inspection (DPI) allocator for managing bandwidth in a communication channel, the DPI allocator comprising: a DPI application for inspecting data packets propagating to a destination via the channel that enter the allocator; and at least one service application for processing data packets that enter the allocator.Type: GrantFiled: June 26, 2012Date of Patent: December 2, 2014Assignee: Alllot Communications Ltd.Inventors: Roni Keynan, Natan Yaron, Rami Rozen, Nimrod Schnabel, Ofer Shai
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Patent number: 8902883Abstract: An apparatus and method for scheduling within a switch is described. A set of input signals is received from input ports. The set of input signals is associated with a set of packets at the input ports. A request for each packet from the set of packets is generated based on the set of input signals. Each request has an input-port indicator, an output-port indicator and a service-level indicator. The packets are scheduled based on the service-level indicator.Type: GrantFiled: May 24, 2013Date of Patent: December 2, 2014Assignee: Altera CorporationInventor: Kamran Sayrafian-Pour
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Patent number: 8879547Abstract: Telephony application services are provided through use of a service delivery platform (SDP) and by implementing a service-oriented architecture (SOA)-based approach. Various “widgets” of telephony functionality are selected, each widget providing functionality such as call forwarding, call blocking, conferencing, etc. These widgets provide not only call manipulation, but can provide the logic used to process a call. An application or application service thus can combine and/or compose these widgets as needed to provide telephony functionality.Type: GrantFiled: June 1, 2010Date of Patent: November 4, 2014Assignee: Oracle International CorporationInventor: Stéphane H. Maes
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Patent number: 8880071Abstract: A composite quality measure helps determine a target for a vertical handover between different connection types. Various measurements are normalized, weighted and summed to produce composite quality measures. A composite quality measure may be compared to a target value and the corresponding connection may be added to a feasibility table if the composite quality measure is above the target.Type: GrantFiled: December 17, 2010Date of Patent: November 4, 2014Assignee: Intel CorporationInventors: Pouya Taaghol, Vivek Gupta
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Publication number: 20140321458Abstract: A network relay device capable of shortening retrieval time for an address table or reducing a capacity of the address table is provided. When a transmission-source address of a frame received at first and second port groups is learned, a frame processing unit performs a hash calculation by using the transmission-source address and a first internal identifier 0.1. Then, an internal identifier etc., corresponding to the receiving port is registered in an entry inside an address table obtained by the hash calculation. On the other hand, when a transmission-destination address of a frame received at the first and second pot groups is retrieved, the frame processing unit performs a hash calculation by using the transmission-destination address and 0.1, reads out an entry inside the address table obtained by the hash calculation, and compares the internal identifier inside the address table with an internal identifier corresponding to the receiving port.Type: ApplicationFiled: April 7, 2014Publication date: October 30, 2014Applicant: Hitachi Metals, Ltd.Inventor: Kazutoshi KARIYA
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Patent number: 8873529Abstract: A method of operating a mobile router comprises: storing priority information associated with predetermined types of download data and data rate information associated with the priority information; determining the priority of download data received via the wide area network interface; determining if data is being transferred via the local area network interface; and controlling the data rate for the download data based on the download data priority, the priority information, the data rate configuration information, and whether data is being transferred via the local area network interface.Type: GrantFiled: May 8, 2012Date of Patent: October 28, 2014Assignee: Autonet Mobile, IncInventors: Douglas S Moeller, Ronald W Pashby
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Patent number: 8873528Abstract: An embodiment of a mobile router, comprises: a wireless wide area network interface to access a cellular network; a local area network interface to provide access to devices for transfer of data; priority information associated with predetermined types of download data; data rate information associated with the priority information; first apparatus to determine the priority of download data via the wide area network interface; second apparatus to determine if data is being transferred via the local area network interface; and third apparatus to control the data rate for the download data based on the priority information, the data rate configuration information, and whether data is being transferred via the local area network interface.Type: GrantFiled: May 8, 2012Date of Patent: October 28, 2014Assignee: Autonet Mobile, Inc.Inventors: Douglas S Moeller, Ronald W Pashby
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Publication number: 20140314076Abstract: A method includes receiving flits forwarded from an upstream router into a first input virtual channel (VC) associated with an input port. The flits are associated with packets originated from a first Intellectual Property (IP) core and forwarded to a second IP core. The flits are stored in a VC storage associated with the first input VC. The method further includes performing link width conversion based on a width of the flits being different from a width of an output port. Link width conversion includes accumulation of the flits when the width of the output port is wider and unpacking of the flits when the width of the output port is narrower. Credits are generated based on the flits being forwarded from the first input VC to the output port. The credits are sent to the upstream router to enable receiving more flits from the upstream router.Type: ApplicationFiled: April 29, 2014Publication date: October 23, 2014Applicant: Sonics, Inc.Inventors: Liping Guo, Doddaballapur N. Jayasimha, Jeremy Chan
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Patent number: 8861513Abstract: A communications parallel bus receiver interface having N+1 data lines and method of operation. The parallel bus interface employs receiver redundancy at the bus level such that there are N+1 receiver devices. One of the N+1 data signals comprising a spare data signal when a failure occurs in a corresponding channel transmitting one of N parallel data signals. An input switching network is configured to receive and couple N+1 parallel data signals along respective paths to corresponding parallel-configured bit receiver devices, and adapted to couple one received data signal to two or three adjacent bit receivers. A calibration device calibrates one of the two or three adjacent bit receivers, and a qualification device qualifies data decisions made during calibration processes performed by the calibration device. The method cycles through N+1 receivers for periodic recalibration of each receiver (one at a time) while N+1 inputs are processed continuously and uninterrupted.Type: GrantFiled: January 8, 2013Date of Patent: October 14, 2014Assignee: International Business Machines CorporationInventors: Timothy O. Dickson, Daniel M. Dreps, Frank D. Ferraiolo
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Publication number: 20140254588Abstract: Techniques for power gating. A first on-die router has an output port to receive data from a switching fabric. The output port is placed in a power-gated state if there is no activity in the output port for a current cycle and no messages are to be received by the output port during a subsequent cycle. A second on-die router has an input port coupled with the output port of the first on-die router. The input port is placed in a power-gated state if an input port buffer is empty and the output port is not active. Power-gating of the input port and the output port are independent of each other.Type: ApplicationFiled: March 8, 2013Publication date: September 11, 2014Inventors: DONGKOOK PARK, AKHILESH KUMAR, DONGLAI DAI
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Patent number: 8830992Abstract: The fabric card includes at least one fabric card chip and at least two fabric card connector groups, where each fabric card connector group of the at least two fabric card connector groups includes at least two fabric card connectors, the number of fabric card chips is less than the number of at least two fabric card connector groups, each fabric card chip of the at least one fabric card chip connects to all fabric card connectors in at least one fabric card connector group, all fabric card connectors in the fabric card connector group that connect to the fabric card chip exchange data using the fabric card chip. This fully utilizes an exchange capability of the fabric card chip and saves system resources.Type: GrantFiled: February 25, 2014Date of Patent: September 9, 2014Assignee: Huawei Technologies Co., Ltd.Inventor: Guoqiang Ma
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Publication number: 20140247825Abstract: An output switch fabric is disclosed that comprises an interleaved plurality of multiplexers for switching channels between first and second busses. The busses run in tracks that form a grid pattern. The interleaving of the multiplexers is arranged according to the grid pattern for the busses.Type: ApplicationFiled: March 1, 2013Publication date: September 4, 2014Applicant: QUALCOMM IncorporatedInventors: Hari Rao, Ioannis Nousias, Sami Khawam
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Publication number: 20140247826Abstract: A fabric card and a communications device. The fabric card includes at least one fabric card chip and at least two fabric card connector groups, where each fabric card connector group of the at least two fabric card connector groups includes at least two fabric card connectors, the number of fabric card chips is less than the number of at least two fabric card connector groups, each fabric card chip of the at least one fabric card chip connects to all fabric card connectors in at least one fabric card connector group, all fabric card connectors in the fabric card connector group that connect to the fabric card chip exchange data using the fabric card chip. This fully utilizes an exchange capability of the fabric card chip and saves system resources.Type: ApplicationFiled: February 25, 2014Publication date: September 4, 2014Applicant: Huawei Technologies Co., Ltd.Inventor: Guoqiang Ma
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Patent number: 8811390Abstract: The present invention provides systems and methods for providing data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. According to one embodiment, the system of the present invention comprises a first and second media access control (MAC) interfaces to facilitate receipt and transmission of packets over an associated set of physical interfaces. The system also contemplates a first and second field programmable gate arrays (FPGA) coupled to the MAC interfaces and an associated first and second memory structures, the first and second FPGAs are configured to perform initial processing of packets received from the first and second MAC interfaces and to schedule the transmission of packets to the first and second MAC interface for transmission to one or more destination devices. The first and second FPGAs are further operative to dispatch and retrieve packets to and from the first and second memory structures.Type: GrantFiled: October 29, 2009Date of Patent: August 19, 2014Assignee: Foundry Networks, LLCInventor: Yuen Fai Wong
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Patent number: 8804709Abstract: A switching device in a network system for transferring data includes one or more source line cards, one or more destination line cards and a switching fabric coupled to the source line cards and the destination line cards to enable data communication between any source line card and destination line card. Each source line card includes a request generator to generate a request signal to be transmitted in order to obtain an authorization to transmit data. Each destination line card includes a grant generator to generate and send back a grant signal to the source line card in response to the request signal received at the destination line card to authorize the source line card to transmit a data cell to the destination line card.Type: GrantFiled: March 9, 2012Date of Patent: August 12, 2014Assignee: Juniper Networks, Inc.Inventors: Pradeep S. Sindhu, Philippe G. Lacroute, Matthew A. Tucker, John D. Weisbloom, David B. Winters
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Patent number: 8798044Abstract: An integrated circuit device for switching data has a plurality of input channels and a plurality of output channels. The device includes a switch for selectively connecting a subset of the output channels, mutually orthogonal, to the input channels by providing signal paths between the selected mutually orthogonal output channels and the input channels. The selected output channels are not orthogonal to the output channels that are not selected.Type: GrantFiled: April 27, 2011Date of Patent: August 5, 2014Assignee: Mindspeed Technologies, Inc.Inventor: Atul Krishna Gupta
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Patent number: 8792485Abstract: In some embodiments, a system includes a first switch fabric device, a second switch fabric device, a first access switch operatively coupled to the first switch fabric device by a first cable, and a second access switch operatively coupled to the second switch fabric device by a second cable. The second access switch is operatively coupled to the first access switch by a third cable. The first access switch is configured to send data to the first switch fabric device via the first cable. The first access switch is configured to send data to the second switch fabric device via the third cable, the second access switch, and the second cable.Type: GrantFiled: February 27, 2012Date of Patent: July 29, 2014Assignee: Juniper Networks, Inc.Inventors: Gunes Aybay, Jean-Marc Frailong
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Patent number: 8792353Abstract: A first set of frames is received in a data flow and tagged with respective serial numbers identifying an ordering of frames in the first set. The tagged first set is forwarded to a general processor for processing prior to being sent to a remote network element. A data flow policy is received from the general processor based on processing of the first set. A second set of frames of the data flow are received subsequent to forwarding the first set to the general processor. It can be verified, based on the assigned serial numbers, that each frame in the first set has been sent to the remote network element prior to sending frames in the second set. The second set is processed and sent to the remote network element by the network processor, bypassing the general processor, based on the data flow policy.Type: GrantFiled: June 14, 2011Date of Patent: July 29, 2014Assignee: Cisco Technology, Inc.Inventors: Bhagatram Yaugand Janarthanan, Robert A. Mackie, Farhad P. Sunavala, Walter Dixon
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Methods and apparatus for validation of equal cost multi path (ECMP) paths in a switch fabric system
Patent number: 8780896Abstract: An apparatus includes a replication engine of a switch module of a multi-stage switch. The replication engine is configured to receive a first validation packet from an input port of the switch module. The replication engine is configured to determine multiple output ports of the switch module to which a data packet can be sent to reach a destination device associated with the first validation packet. The replication engine is configured to define multiple second validation packets based on a number of output ports from the multiple output ports such that each second validation packet from the multiple second validation packets is uniquely associated with an output port from the multiple output ports. The replication engine is configured to send the multiple second validation packets to an output module configured to forward each second validation packet from the multiple second validation packets to its associated output port.Type: GrantFiled: December 29, 2010Date of Patent: July 15, 2014Assignee: Juniper Networks, Inc.Inventor: Ashwani Kumar Mehra -
Patent number: 8780927Abstract: A crossbar may be coupled between a plurality of PHY devices configured to provide physical layer functions according to an Open Systems Interconnection, OSI, model and a plurality of MAC devices configured to provide data link layer functions according to the OSI model. First data couplings may be provided through the crossbar between the plurality of PHY devices and the plurality of MAC devices during a first time period. Second data couplings may be provided through the crossbar between the plurality of PHY devices and the plurality of MAC devices during a second time period, with the first and second data couplings being different. Related network elements, interfaces, and networks are also discussed.Type: GrantFiled: March 15, 2011Date of Patent: July 15, 2014Assignee: Telefonaktiebolaget L M Ericsson (publ)Inventors: Martin Julien, Robert Brunner
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Patent number: 8774175Abstract: A relay system includes a first relay apparatus connected to a node through a first line and a second relay apparatus connected to the node through a second line. The first line and the second line belong to the same link aggregation group. The first relay apparatus includes a first control unit. The first control unit notifies, before relaying a received frame, the second relay apparatus of a source address included in the received frame in the absence of first relation information related to the source address in the first storage unit upon receiving the received frame via a port connected to the first line. The second relay apparatus includes a second control unit. The second control unit stores, in the second storage unit, second relation information regarding a relationship between the source address notified by the first relay apparatus and an output port connected to the second line.Type: GrantFiled: August 15, 2011Date of Patent: July 8, 2014Assignee: Fujitsu LimitedInventor: Osamu Shiraki
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Publication number: 20140185612Abstract: A universal network interface controller (UNIC) is provided for interfacing a host computer to a switch fabric, a packet network, or both. The UNIC includes encapsulation logic configured to encapsulate a CBP communication for transmission as switch fabric data on the switch fabric. Finally, the UNIC includes transmit logic configured to transmit the encapsulated CBP communication to the remote CBP device using the switch fabric.Type: ApplicationFiled: December 31, 2012Publication date: July 3, 2014Applicant: Broadcom CorporationInventors: Nicholas Ilyadis, Ariel Hendel, Karagada Ramarao Kishore, Gregory John Scherer
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Patent number: 8767693Abstract: A vehicle, comprises a vehicle network bus and a mobile router. The mobile router comprises a local area network interface comprising a first wireless transceiver of a first predetermined type to provide a link to first a local area network and a wide area network interface comprising a second wireless transceiver of a second predetermined type to provide a link to a wide area network. One of the wide area network interface and the local area network interface is selectively operable to establish a wireless communication link with a network management system comprising a communication server. The router further comprises an application executable by at least one processor to selectively acquire predetermined data from the vehicle network bus. The communication agent is operable to upload the predetermined data to the network management system.Type: GrantFiled: December 5, 2011Date of Patent: July 1, 2014Assignee: Autonet Mobile, Inc.Inventors: Douglas S Moeller, Ronald W Pashby
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Patent number: 8761671Abstract: A device having a first processing system for providing the functionality of the upper layers of a Bluetooth stack, including a first L2CAP layer, a Bluetooth Controller for providing the functionality of the lower layers of the Bluetooth stack, the first processing system and the Bluetooth Controller being connected by a Host Controller Interface (HCI), a second processing system including an implementation of a second L2CAP layer for transmission of data to the Bluetooth Controller for transmission over a Bluetooth Link established by the first processing system and L2CAP layer, and the first processing system being configured to distribute flow-control tokens between the first and second L2CAP layers both layers can transmit data to a remote device using the Bluetooth Link.Type: GrantFiled: October 6, 2011Date of Patent: June 24, 2014Assignee: Cambridge Silicon Radio LimitedInventors: Steven Singer, Allan Bogeskov
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Patent number: 8743865Abstract: The present invention provides, according to one example, a method of route aggregation in a network. The network may include at least two switches connected by a link. The method includes the steps of arranging virtual connection identifiers (VCIs) into groups based on a common prefix. Each of the groups corresponds to an outgoing port of a next switch. The method further includes the steps of allocating a VCI at the incoming port of the next switch, and informing the outgoing port of the previous switch of the allocated VCI number. The step of arranging may include splitting all available VCIs into N subgroups, where N is the number of outgoing ports on the switch on the other end of the link.Type: GrantFiled: March 6, 2007Date of Patent: June 3, 2014Assignee: Nokia CorporationInventors: Sergey Balandin, Michel Gillet
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Patent number: 8743878Abstract: Methods and systems for path resolving in a symmetric InfiniBand network are provided. One method includes transmitting, from a first node, a Management Datagram (MAD) to a second node, the MAD including a query for a Global Unique Identifier (GUID) for a port in the second node. The method further includes receiving the GUID for the port in response to the MAD and determining a Global Identifier (GID) for the port based on the received GUID. One system includes first and second nodes in communication with each other. The first node is configured to transmit a MAD to the second node, the MAD including a query for a GUID for a port in the second node. The first node is further configured to receive the GUID for the port in response to the MAD and determine a GID for the port based on the received GUID.Type: GrantFiled: August 30, 2011Date of Patent: June 3, 2014Assignee: International Business Machines CorporationInventor: Constantine Gavrilov
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Patent number: 8737390Abstract: In one embodiment, a converged protocol stack can be used to unify communications from a first communication protocol to a second communication protocol to provide for data transfer across a physical interconnect. This stack can be incorporated in an apparatus that includes a protocol stack for a first communication protocol including transaction and link layers, and a physical (PHY) unit coupled to the protocol stack to provide communication between the apparatus and a device coupled to the apparatus via a physical link. This PHY unit may include a physical unit circuit according to the second communication protocol. Other embodiments are described and claimed.Type: GrantFiled: April 25, 2013Date of Patent: May 27, 2014Assignee: Intel CorporationInventors: Sridharan Ranganathan, Mahesh Wagh, David J. Harriman
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Patent number: 8724621Abstract: The invention provides an electronic apparatus. In one embodiment, the electronic apparatus comprises a plurality of ports, an Ethernet circuit, a port switch, and a flow control scheduler. The Ethernet circuit generates a plurality of transmitted packets according to transmitted data sent from the host, and derives received data sent to a host from a plurality of received packets. The flow control scheduler receives a plurality of transmitting requests corresponding to the ports from the host, arbitrates between the transmitting requests corresponding to the ports to select a transmitting port from the ports, receives a plurality of receiving requests corresponding to the ports from the host, and arbitrates between the plurality of receiving requests corresponding to the ports to select a receiving port from the ports. The port switch sends the transmitted packets to the transmitting port, and receives the received packets from the receiving port.Type: GrantFiled: September 14, 2011Date of Patent: May 13, 2014Assignee: Mediatek Inc.Inventors: Chu-Ming Lin, Chih-Peng Chang
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Patent number: 8718051Abstract: The present invention provides systems and methods for providing data transmission speeds at or in excess of 10 gigabits per second between one or more source devices and one or more destination devices. According to one embodiment, the system of the present invention comprises a first and second media access control (MAC) interfaces to facilitate receipt and transmission of packets over an associated set of physical interfaces. The system also contemplates a first and second field programmable gate arrays (FPGA) coupled to the MAC interfaces and an associated first and second memory structures, the first and second FPGAs are configured to perform initial processing of packets received from the first and second MAC interfaces and to schedule the transmission of packets to the first and second MAC interface for transmission to one or more destination devices. The first and second FPGAs are further operative to dispatch and retrieve packets to and from the first and second memory structures.Type: GrantFiled: October 29, 2009Date of Patent: May 6, 2014Assignee: Foundry Networks, LLCInventor: Yuen Fai Wong
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Patent number: 8717870Abstract: A method of channel-to-port assignment is described where the distribution of channels is performed in the digital domain of the CATV/QAM upconverter/modulator. This channel distribution allows for the possibility of simple failover, power combining of multiple outputs, and a fine granularity of channel to port mapping, QAM or analog channel, in a multi-port device.Type: GrantFiled: January 28, 2011Date of Patent: May 6, 2014Assignee: Vecima Networks Inc.Inventors: Colin Howlett, Gerald Harron, Michael Jaspar
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Patent number: 8711848Abstract: A method includes appending a preamble to a data packet and transmitting the preamble and data packet over a communication channel in the network. The preamble may be a Beacon, Admission, Broadcast, or High-Throughput Preamble. The Beacon Preamble includes the following symbols SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, LS1, LS1, LS1, LS1, LS1, LS1, LS1, LS1, CP0, CEBeacon, CEBeacon. The Admission Preamble includes the following symbols SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, SS, LS1, LS1, LS1, LS1, LS1, LS1, LS1, LS1, CP0, CE, CE. The Broadcast Preamble includes the following symbols LS1, LS1, LS1, LS1, CP0, CE, CE. The high-throughput preamble includes the following symbols CP0, CE. The SS symbol includes 64 bits, the LS1, LS2, and CP0 symbols include 192 bits, the CE symbol includes 512 bits, and the CEBeacon symbol is a subset of CE.Type: GrantFiled: May 8, 2012Date of Patent: April 29, 2014Assignee: Entropic Communications, Inc.Inventor: Arndt Mueller
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Publication number: 20140112125Abstract: A fabric chip includes a plurality of port interfaces, in which each of the plurality of port interfaces includes a network chip interface (NCI) block having a port resolution module to determine which of the port interfaces is to receive a packet from the NCI block and a crossbar block communicatively coupled with each of the NCI blocks in the plurality of port interfaces. In addition, at least two of the plurality of port interfaces are to be connected to at least two port interfaces of another fabric chip as trunked links of a trunk. Moreover, the NCI blocks of the at least two of the plurality of port interfaces include a resource that keeps track of the port interfaces in the fabric chip that are connected to the trunk links of the trunk.Type: ApplicationFiled: August 8, 2011Publication date: April 24, 2014Applicant: HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.Inventors: Michael G. Frey, Vincent E. Cavanna, Trevor Joseph Switkowski
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Patent number: 8699593Abstract: A communication medium determining apparatus determines a communication medium in use for communication between two devices on a network. The apparatus includes a communication performance obtaining unit which obtains values indicating transmission speeds in a given communication path when a device which decreases transmission speed in a specific communication medium when activated, is active and when the device is inactive. The apparatus further includes a communication medium determining unit which determines whether or not the communication through the given communication path is performed using the specific communication medium. This determination is based on a speed decrease value indicating a decrease amount of the transmission speed in the specific communication medium caused by activation of the device, and a speed difference value which is a difference in the transmission speed obtained by the communication performance obtaining unit between when the device is active and when the device is inactive.Type: GrantFiled: November 18, 2010Date of Patent: April 15, 2014Assignee: Panasonic CorporationInventors: Yuki Ohira, Yosuke Matsushita