Abstract: The objective of the invention is to provide a type of data transfer system for generating plural timing signals, etc. for any device. Data transfer system A transfers plural data blocks received with one input channel to plural output channels. Each data block contains data, destination identification indicating the output channel to be transferred to, first timing information, and second timing information. System A has selection output unit 32. As a result, each received data block is sent to one output channel indicated by the destination identification in the data block. Also, system A has first timing control unit 300 and second timing control unit 302. As a result, the received data blocks are transferred at a first relative timing indicated by the first timing information or a second relative timing indicated by the second timing information with respect to a time standard.

Abstract: An apparatus and method for determining if an interface connector is coupled to a device of a first type, a device of a second type, or to a device of a third type or no device.

Abstract: A control apparatus for controlling a wireless communication system, which provide enhanced communication efficiency when a single apparatus performs a plurality of wireless communications. A timing signal generation logic circuit generates transmission and reception timing control signals for controlling timing of transmission and reception by respective ones of a Bluetooth module and a wireless LAN module based on respective states thereof. MAC sections of the respective modules control transmission and reception by the respective ones of the Bluetooth module and the wireless LAN module, based on the respective corresponding transmission and reception timing control signals generated by the timing signal generation logic circuit.

Abstract: A switch including a sealed housing; a magnetic sensor; and a control element configured to modify a control parameter for the switch in response to a signal from the sensor. In some aspects, the magnetic sensor is arranged to produce the signal in response to a magnetic field generated outside of the housing. In some aspects, the switch is a vibration switch, or is selected from the group consisting of a flow switch, a level switch, a temperature switch, a pressure switch, a proximity switch, and a velocity switch. In some aspects, the switch includes a two-wire configuration and first and second output pins arranged to provide an output signal for the switch and to receive a signal for programming the switch. In some aspects, the switch includes a two-wire configuration and a current-control element arranged to reduce current output for the switch.

Abstract: A disk controller has a channel adapter having a connection interface to a host computer or a disk drive; a memory adapter for temporarily storing data to be transferred between the host computer and disk drive; a processor adapter for controlling operations of the channel adapter and memory adapter; and a switch adapter for configuring an inner network by interconnecting the channel adapter, memory adapter and processor adapter, wherein the channel adapter, memory adapter, processor adapter and switch adapter each include a DMA controller for performing a communication protocol control of the inner network; and packet multiplex communication is performed among the DMA controllers provided in the adapters. The disk controller can realize a high transfer efficiency and a low cost while retaining a high reliability.

Abstract: Methods and apparatus are disclosed for a combined bulk and transactional database synchronization scheme. A dynamically changing primary database is initially duplicated to a secondary database using bulk and transactional updates. Then, the secondary database is maintained in synchronization with the primary database using transactional updates. In one implementation, the primary database is divided into synchronization groups. Initially, all the groups are marked as requiring bulk synchronization. Systematically, entries from a group are combined into a bulk update message and relayed to a secondary device or component to bulk update the secondary database. When a new update to the primary database is made, if the group to which it belongs is in the process of, or still requires bulk updating, this new update will be propagated to the secondary database in due course with a subsequent bulk update. Otherwise, the new update is placed in transactional update message.

Abstract: A method and device are disclosed which receives packets streamed over a packet network, decodes the packets received to generate a decoded signal stream and filters the decoded signal stream to generate a pulse code modulated (PCM) signal stream. The PCM signal stream may be tailored to conform to the target destination transport requirements, including call channels established over circuit-switched networks, whether wired or wireless, without modifying the capabilities associated with the network infrastructure or the client phone.

Abstract: A dial keypad is provided for use with a mobile device having a keyboard. The keypad has a push-through, hinge-spring design that activates only one of two keyboard keys underlying a dial key and allows backlighting transmissivity. A translucent material can be used to allow the keyboard key backlighting to be coupled through to a top dial key. The keypad creates an aesthetically balanced dial keypad arrangement over a QWERTY keyboard. A preferable mechanical implementation allows backlighting and has an offset contact and spring design to activate one of the two underlying keys. This activation simplifies the software implementation for executing the dial number since the signal is coming from one address rather than having to make a determination of whether it is coming from one or two addresses. Moreover, the resulting dial key press has a standard single click feel.

Abstract: A system and method for enabling a user to query availability, roaming history and/or modem statistics of a wireless device that can roam between at least two different wireless networks, without assistance from network service provider personnel.

Abstract: A drive unit for a machine, in particular a machine-tool, robot and the like, is described. The drive unit has several components, and each component has at least one associated component-specific function, and a uniform communication module that forms an interface with the other components. The interfaces of the various components can be connected by logical point-to-point connections or via a bus. Each component is designated with a particular type, and the communication between the components uses a type-specific communication protocol. A least one of the components is a hierarchically superior component.

Abstract: An apparatus and method for improving data transfers between a network and a network device is provided. The apparatus comprising a data input, a programmable counter adapted to counting the number of data packets received, an interrupt generator for signaling a microprocessor upon a signal from said programmable counter, a data processing block for examining the contents of data packets for an end-of-packet flag, and an output.

Abstract: A multiple-processor system in which a commit message is returned to a source processor that requests a memory access operation so as to indicate the apparent completion of the operation includes a multiple-level switch unit linking nodes that contain the processors. The switch unit includes multiple input switches each of which receives messages from multiple nodes, and a set of output switches whose inputs are the outputs of the input switches and whose outputs are the inputs of the nodes. Each switch processes messages in the order in which they are received by the switch and each output switch follows the same rule as the other output switches.

Abstract: A method for control of packet data transmissions in a TDMA wireless network to provide for additional choices in the allocation of communication channels. The fixed relationship in the timing of the downlink allocation signalling and subsequent uplink transmission is altered for certain classes of mobile station to avoid physical constraints. Examples of variations in USF signalling in GPRS are given.

Abstract: A trunk line bandwidth reservation system is applied to an asynchronous transfer mode switching system which is coupled to a plurality of terminals.

Abstract: A serial bus communication system for communication across the backplane of a node includes a control unit having a serial bus controller. A plurality of service units each include a serial bus terminator. A serial bus includes a discrete serial channel for each service unit. The serial channel connects the serial bus terminator to the serial bus controller. The serial bus controller is operable to direct a message for a service unit on the serial bus to only the serial channel of the service unit.

Abstract: The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S11). The output message identifier MID is reserved (S12), and the tag information and output MID are assigned to the BOM (S13). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S31 and S32). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S41 and S42). Then, the output MID is released (S43).

Abstract: A method and apparatus for generating configuration files using policy descriptions is provided. The present invention provides a method of generating a binary configuration file by receiving an identification encoded filename, parsing the identification encoded filename to determine identification parameters, matching the identification parameters to a set of configuration policy data to create configuration file parameters, and generating the binary configuration file from the configuration file parameters. The identification encoded filename can be can be run through an authentication check to provide increased security. Once created, the binary configuration file can also be validated, providing increased integrity. In one aspect of the present invention implemented is provided on a TFTP server. In another aspect of the invention an LDAP server is queried for certain configuration policy data, the configuration policy data being optionally cached on the TFTP server.

Abstract: In one embodiment, in a switching system, an ASIC device on a card coupled to a backplane communicates switched data to an outgoing network interface for the card without using the backplane, and remaining ASIC devices on the card communicate switched data, to other cards using the backplane for communication to outgoing network interfaces for the other cards. In another embodiment, an ASIC device includes a RAM storing a code for each first slot to combine with corresponding data from a first bus to specify an operation, a RAM applying the operation to generate modified data for each first slot, a RAM communicating as an address information specifying a second slot to correspond to each first slot, and a RAM locating the modified data for each first slot of a previous frame according to the address and communicating this modified data to a second bus in the corresponding second slot while the modified data for a current frame is being stored.

Abstract: A method for transmitting a data stream from a circuit unit to a memory cell array includes receiving the data stream and demultiplexing it in response to a control signal, thereby dividing the data stream into a storage data stream and a mask data stream. The storage data stream is then buffered into a register unit, where it is divided into data stream components buffered in corresponding data register components on the basis of a clock signal and an address signal provided to the register unit. Meanwhile, the mask data stream is buffered in a mask register of the register unit. A composite data stream is then formed by combining selected data stream components in response to information provided by a data mask unit from the mask data stream buffered in the mask register. Data corresponding to this composite data stream is then provided to the memory cell array for storage therein.

Abstract: A full service channel access protocol that supports the integrated transport of voice, video and data communications is provided by dividing a communication channel into a plurality of frames, dividing each of the frames into a plurality of slots, and dividing some of the plurality of slots into a plurality of mini-slots. The mini-slots are provided for use by the multiple communication sources to request the establishment of a new voice, data, or video transmission connection over the communication channel. Additionally, a second one of the plurality of slots is divided into a plurality of second mini-slots for use by the multiple communication sources to request the establishment of a new voice, data, or video transmission connection over the communication channel and for use by the multiple communication sources to augment an existing video connection over the communication channel. The method enables timely and power efficient communications over communication network.

Abstract: In hyperframe synchronization processing of a hyperframe including FEXT frames and NEXT frames, each difference between the number of consecutive FEXT frames and the number of consecutive NEXT frames is calculated, and a unique sequence of these differences is detected. When the unique sequence of differences can be detected from a received hyperframe, the position of a frame which is being received now in the hyperframe can be specified at that point in time. Hence, hyperframe synchronization can be established in a short time after frame synchronization is established.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: A method of identifying a target data packet from a series of data packets being received or transmitted by a communications device, each data packet having a series of data values. The method having the steps of establishing a condition for the target data packet, the condition having a particular data position value and an associated particular data value; storing the particular data position value in a first content addressable memory, the first content addressable memory receiving a value related to a data position of a data value and the first content addressable memory generating a position match indicator; storing the particular data value in a second content addressable memory, the second content addressable memory receiving the data value and the second content addressable memory generating the data value match indicator; comparing the position match indicator and the data value match indicator to determine if the condition for the target data packet has been satisfied by the transmitted data value.

Abstract: An architecture and coherency protocol for use in a large SMP computer system includes a hierarchical switch structure which allows for a number of multi-processor nodes to be coupled to the switch to operate at an optimum performance. Within each multi-processor node, a simultaneous buffering system is provided that allows all of the processors of the multi-processor node to operate at peak performance. A memory is shared among the nodes, with a portion of the memory resident at each of the multi-processor nodes. Each of the multi-processor nodes includes a number of elements for maintaining memory coherency, including a victim cache, a directory and a transaction tracking table. The victim cache allows for selective updates of victim data destined for memory stored at a remote multi-processing node, thereby improving the overall performance of memory.

Abstract: This invention relates to a cross connection element which comprises at least one input, output and branching means for forwarding through predetermined outputs at least some signal components of a first serial data signal received through the input. To provide such a cross connection element that considerably facilitates the management of the data transmission network, the branching means comprise means for transparently forwarding single signal components of a serial data signal received through said input, as serial data signals through the output indicated by the routing data stored in the memory means of the cross connection element. In addition, the cross connection element comprises at least one output for transparently forwarding a single signal component of a first serial data signal indicated by the routing data stored in the memory means.

Abstract: An input detection circuit includes a matrix of keys formed by the intersection of a plurality of columns of keys and a plurality of rows of keys, with a crossover capacitor connected across the intersecting row and column of one of the keys. The input detection circuit further includes circuits for generating a difference in voltage potential across the capacitor, and circuits responsive to the difference in voltage potential across the capacitor for generating a signal representative of the presence of the capacitor. By knowing which keys have been connected with a crossover capacitor, the processor of the telephone will also know what scan options have been programmed.

Abstract: In a storage type data communication terminal, a first switch section is connected to a power feeder and turned on/off by an operator. A second switch section is connected in parallel with the first switch section and turned on/off in accordance with a control signal. An external interface section performs connection to an external information processing device. A data storage section temporarily stores data received through the external interface section. An Air interface section sequentially transmits the data stored in the data storage section to a distant station through a communication channel in accordance with a communication sequence, and stores data received from the distant station. A control section switches the second switch section from an OFF state to an ON state at the same time when a connection phase of the communication sequence is completed.

Abstract: In a first node device of a network system wherein plural node devices are connected through N numbered channels for signal transmission, N numbered buffers temporarily store signals to be transmitted and transmission units send the signals from each buffer through the N numbered channels. A channel altering control unit controls the transmission units to alter the channels through which the buffer signals can be sent according to a predetermined pattern that prevents signals from plural buffers from being sent to the same channel at the same time and a buffer controller operating synchronously with the channel alteration, controls the buffers to read out signals through desired channels. A second node device receives the signals from the first node device through the N numbered channels.

Abstract: A switching network for the pick-up and forwarding of data streams has a plurality of input line units and output line units which respectively accept or output data streams in fixed multiplex frames, and which are connected in common to an exchange bus. A respective data memory whose memory cells are individually allocated to the bit places of a multiplex frame for the individual output line units is provided in the input line units. The data bits of a multiplex frame are entered bit-by-bit into the corresponding memory cells in the data memories based on the criterion of allocation information. The memory cells of the individual data memories are synchronously driven by a central control unit in a fixed sequence for the output of stored data bits onto the exchange bus. Only one of the data bits corresponding to one another in the individual data memories is thereby enabled based on the criterion of enable information, whereas the others are masked.

Abstract: An ATM switching system comprises a switch unit including a plurality of input ports and a plurality of output ports having the same cell transmission rate, and a multiplexer for multiplexing cell trains outputted from at least two output ports into a single cell train and outputting the cell train to a high-speed output line (and/or a demultiplexer for demultiplexing a cell train from an output port into a plurality of cell trains and outputting the cell trains to a plurality of low-speed output lines). The switch unit includes a buffer memory for temporarily storing cells inputted from the input ports while forming a queue chain for each output line to which each cell is to be outputted, a demultiplexer for distributing the cells read from the buffer memory among the output ports in circulation, and a buffer memory control circuit for controlling the write and read operation of cells with the shared buffer memory.

Abstract: A unique word detecting apparatus comprising a preamble code detecting circuit 202 for detecting a preamble code PR to be transmitted before the unique word UW, a unique word detecting circuit 204 for holding in advance the data of the unique word UW to be detected, an error detecting circuit 203 for comparing the external data with the unique word UW successively bit by bit only when and after the preamble code PR is detected and for outputting an error signal E when not coincide, and a unique word detecting circuit 204 for counting the number of outputs of the error signal E and for outputting a detecting signal DT indicating that the unique word UW has been detected when the count value is equal to or smaller than a predetermined value.