Abstract: An inter-repeater backplane that may operate in either a synchronous or asynchronous mode for data transmission. The inter-repeater backplane includes a bus of electrical signal conductors coupled between repeaters for communicating electrical signals and data transmission mode detector for determining whether to transmit data synchronously or asynchronously. Data is recovered from a received data packet and is reframed for transmission across the inter-repeater backplane. According to which mode of data transmission is selected, the data is then retimed and transmitted across the backplane. In the synchronous mode of data transmission, the data is synchronized with the system clock. When the asynchronous mode of data transmission is selected, the data is transmitted asynchronously with respect to the system clock. In the asynchronous mode, the recovered data is timed with a clock signal associated with the transmitting repeater.

Abstract: A bridge circuit providing for efficient data transfer between a first bus and a second bus in a computer system. The bridge circuit receives an address indicating a memory location storing a data segment requested to be transferred from the first bus to the second bus. Fetch circuitry fetches the requested data from the first bus and prefetches one or more additional data segments stored in memory locations sequentially following the memory location storing the requested data. The prefetched data segments are stored in a buffer for immediate access by subsequent data transfer requests. Supply circuitry transfers each data segment from the buffer to the second bus in response to receiving an address corresponding to the particular data segment on the address input circuitry.

Abstract: The packet communication system enables communication between a communication unit connected in a conventional telephone network and a communication unit in a packet mode network. A device for exclusively selecting the connection network is provided so that, at the time of transmission of a signal from one communication unit to another, the connection path is selected according to the kind of the network to which the other communication unit belongs. At the time of signal reception, the communication unit is connected to only one of the conventional telephone network and the packet mode network. The packet communication system includes a packet processor for converting an information signal, such as speech, inputted from an input unit (for example, a transmitter microphone of a handset) into the form of a packet.

Abstract: A method and a facility for communication between packet mode supporting units interconnected in the core of a communications installation by point-to-point links that are physically structured and time governed in identical manner, a packet being transmitted between two packet mode support units of the installation after the unit desiring to transmit has previously sent a request to the destination unit and the destination unit has responded with a corresponding acknowledgment. The communications facility constitutes a distributed type asynchronous switch in which each packet mode support unit includes a packet communication circuit to which the point-to-point links terminating at the unit are connected via a switching module. The communication circuit conditions each of the packets that is to be transmitted to another packet mode supporting unit of the installation in the form of a sequence of cells, and also performs inverse conditioning.

Abstract: A single chip router for a multiplex communication network comprises a packet memory for storing data packets, a Reduced Instruction Set Computer (RISC) processor for converting the packets between a Local Area Network (LAN) protocol and a Wide Area Network (WAN) protocol, a LAN interface and a WAN interface. A Direct Memory Access (DMA) controller transfers packets transferring packets between the packet memory and the LAN and WAN interfaces. A packet attribute memory stores attributes of the data packets, and an attribute processor performs a non-linear hashing algorithm on an address of a packet being processed for accessing a corresponding attribute of said packet in the packet attribute memory. An address window filter identifies the address of a packet being processed by examining only a predetermined portion of said address, and can comprise a dynamic window filter or a static window filter.

Abstract: A dataframe filter is provided a local area network bridge to monitor the dataframes transmitted on one network to determine those dataframes destined to be communicated to another network by the network bridge. The filter receives and examines the destination address of each dataframe communicated on the one filter and, searching through a database maintained by the filter, determine whether the destination address is located on the second network and, if so, signals the bridge to copy the dataframe to the second network.

Abstract: In a local network connected to other networks which employ an Internet Protocol, and wherein the local network includes nodes which cannot monitor all other nodes in the local network, an Internet Protocol address of a target node in the local network is translated at a gateway node in the local network to a network-specific local address of the target node without the use of broadcasting. The network specific local address of the target node is the address which is usable within the local network for forwarding a packet to the target node.

Abstract: A generic high bandwidth adapter providing a unified architecture for data communications between buses, channels, processors, switch fabrics and/or communication networks. Data is carried by data stream packets of variable lengths, and each packet includes a header control information portion required by communication protocols used to mediate the information exchange, and normally a data portion for the data which is to be communicated. A packet memory stores data packets arriving at a plurality of generic adapter input/output ports. The packet memory is segmented into a plurality of buffers, and each data packet is stored in one or more buffers as required by the length thereof.

Abstract: A system of the invention connects an Asynchronous Transfer Mode (ATM) data network to a plurality of host units. The data network transfers data in the form of ATM cells. A plurality of ATM termination units are connected between the network and the host units respectively. Each termination unit includes a virtual channel memory for storing ATM cells; a processor for segmenting and reassembling the ATM cells stored in the memory; a network interface for transferring ATM cells including segmented Conversion Sublayer Payload Data Units (CS-PDU)s between the memory, the processor and an ATM network; and a host interface for transferring unsegmented CS-PDUs between the memory, the processor and a host unit. The processor of each termination unit includes a computing unit, and a programmable instruction memory for storing a program for controlling the computing unit.

Abstract: A method for establishing and maintaining virtual network domains in a segmented computer network having a first domain and a second domain. A first table entry for a first endstation in a first forwarding table of a first switching fabric circuit is created. The first table entry includes domain information specifying that the first endstation is in the first domain and port information specifying that the first endstation is coupled to a first port. A packet having the first endstation as a source is received by the first port of the first switching fabric circuit, and a destination for the packet is determined. If the packet specifies a second endstation of the first domain as the destination, the packet is forwarded to the second endstation. If the destination for the packet specifies more than one endstation, the domain of the source of the packet is determined, and the packet is forwarded to the specified endstations of the first domain.

Abstract: A protocol and associated circuitry operable for efficiently extending serial bus capability into multi-level system environments is disclosed. The protocol is designed to coexist and be fully compatible with existing serial bus approaches, or being used as a standalone serial communications bus. The circuitry and protocol described enable the use of a common serial bus in a hierarchically arranged system or network, so that a primary serial bus master device can selectively access any device at any level or position in the network, and send and receive messages and commands to and from the device. The invention disclosed accomplishes this without modifying the existing serial bus protocol, without adding additional signals and without affecting the throughput rate of the serial bus it may be used with. Alternative embodiments applying the invention to a cabled system are described. Additional preferred embodiments are also disclosed.

Abstract: Support for a mixed network environment is provided which can contain multiple isochronous and/or non-isochronous LAN protocols such as Isochronous-Ethernet, Ethernet, isochronous-token ring, token ring, other isochronous-LAN or other LAN Systems. Support for a mixed environment includes a protocol detection mechanism which is embodied in a handshaking scheme. This handshaking scheme determines the signalling capability at the end points of the link and implements the correct protocol. This enables isochronous nodes and hubs to automatically detect the presence of Ethernet, token ring, or other LAN equipment at the other and of the network cable. If this detection occurs, the isochronous LAN equipment will fall-back to a LAN compliant mode of operation. Typically, only the hub will have the capability of operating in different networking modes, such as Ethernet, Token Ring isochronous modes.

Abstract: A data communication system includes an express bus, a plurality of local buses, and a plurality of local/express bridges, each local/express bridge connecting a corresponding local bus to the express bus. A plurality of local/local bridges each connect two corresponding local buses. The plurality of local buses and the plurality of local/local bridges comprise a local path.

Abstract: A connection apparatus connecting LANs includes LAN control sections, an address searching/registering section and a wiring network. The LAN control sections are respectively provided for LANs which transmit frames, and at least issue a request for address registering and a request for address searching. The address searching/registering section executes address searching/registering processing in accordance with the address searching/registering requests from the LAN control sections. The wiring network includes transmission lines for independently transmitting frames between the LAN control sections.

Abstract: A bus load distributing method suitable for data communications equipment and a bus switching control device for data communications equipment. The data communication equipment includes plural buses, a bus connecting unit for interconnecting the plural buses, and a control unit for connecting physically and selectively each module to one among the plural buses. The control unit connects plural modules to a bus to recognize, distribute and reduce the load on the bus. The control device also switches a bus to be connected in accordance with the traffic of each module to optimize the bus load.

Abstract: Four (4) unshielded twisted pairs of wires connect a hub and a computer in an Ethernet system: one (1) pair for transmission only, another for reception only and the other two (2) for transmission and reception. The signals in the wires are in packets each having timing signals defining a preamble and thereafter having digital signals representing information as by individual ones of three (3) amplitude levels. The signals received at the computer are provided with an automatic gain control (AGC) and then with digital conversions at a particular rate. A control loop operative upon the digital conversions regulates the AGC gain at a particular value. An equalizer operative only during the occurrence of the digital signals in each packet selects an individual one of the three (3) amplitude levels closest to the amplitude of each digital conversion at the time assumed to constitute the conversion peak.

Abstract: A high-speed bus system for a computer is constructed of a network of buses with parallel bit lines, each bus of which operates independently and supports serial packet communications, wherein transmit agents and receive agents associated with each communicating element in the bus system are connected to the bus system. Each transmit agent controls a single bus for transmission and each receive agent is connected to all other buses for reception in a diagonal topology. The architecture is based on use of a buffering element at each node in the bus structure, herein referred to as a cell bus interface (CBI) unit. Based on header data containing address information appended as part of a packet cell by a transmitting transmit agent, each receive agent decides whether the information provided on any bus is intended for it as a destination agent.

Abstract: An integrated telecommunications system includes a wired subsystem consisting of wired links for establishing communication with terminals connected thereto, a wireless subsystem consisting of a group of base stations for communicating over wireless links, and a common central switch for establishing interconnections between selected communications channels. A switching controller is connected to the central switch for controlling the establishment of interconnections between selected communication channels in the system. A group controller is connected to the central switch for ensuring message-based mobility management of the wireless subsystem independently of the first controller.

Abstract: A video teleconferencing system uses digital transcoding to obtain algorithm transcoding, transmission rate matching, and spatial mixing. The video teleconferencing system comprises a multipoint control unit (MCU) for allowing multiple audiovisual terminals, which send and receive compressed digital data signals, to communicate with each other in a conference. The MCU has a video processing unit (VPU) that performs algorithm transcoding, rate matching, and spatial mixing among the terminals within a conference. The VPU includes a time division multiplex pixel bus and a plurality of processors. Each processor is assignable to an audiovisual terminal in the conference and is coupled to the pixel bus. In a receive mode, each processor receives and decodes compressed video signals from its assigned terminal and puts the decoded signal onto the pixel bus. In a transmit mode, each processor receives from the pixel bus uncompressed video signals from any terminal in the conference.

Abstract: A system for interconnecting networks transparently extends the multiprotocol routing functionality of a router across a communication link to a remote LAN, while requiring a device on the remote LAN which operates independent of the higher layer protocol suites. A boundary router, having a local routing interface coupled to the first network, and a remote routing interface coupled to the communication link, provides the higher level protocol suite services for routing frames of data to terminals in the first and second networks. A routing adapter extends the remote routing interface of the boundary router transparently across the communication link to the second network.

Abstract: An internetwork routing protocol which supports virtual networks. Routing tables are maintained in routers or gateways which identify whether or not a destination is directly reachable by the router listed in the routing information entry, or whether it is merely part of a virtual network served by the listed destination routers. For directly reachable connections, datagrams may be directly delivered to any router claiming such status with respect to the network with assurance of likely delivery to the destination. Routers in communication with a virtual network must first be queried for the identity of a particular destination router address before packets are delivered to eliminate the need of packet forwarding.

Abstract: A method for providing a secure local area network includes the steps of receiving a data packet having a destination address and comparing the destination address to stored end station addresses. The data packet is disrupted on the repeater for the ports except the port with an associated stored end station address matching the destination address. Also, the disrupting of the data packet can be enabled on an individual port basis. A system includes a controller, a memory/comparator, and an inverse disrupt control mechanism. The inverse disrupt control mechanism produces a disrupt signal to disrupt the data packet on non-matching ports of the repeater when a match occurs within the repeater. The data packet is not disrupted on a port linking two repeaters when there is no match within the repeater. The inverse disrupt control can also be enabled or disabled on an individual port basis.