Abstract: A system and method for dynamically configuring communication components in a computer system. The method may operate in a computer system including a plurality of buffers, a plurality of bus master engines and a bus interface unit. A plurality of communication medium interfaces may be coupled to the bus interface unit. Bus master engines, buffers and communication medium interfaces are dynamically configurable so that a set or subset of bus master engine(s), buffer(s) and communication medium interface(s) can be used in either a single or multiple peripheral bus function(s).

Abstract: A computer system is presented which implements a “flush” operation providing a response to a source which signifies that all posted write operations previously issued by the source have been properly ordered within their targets with respect to other pending operations. The computer system includes multiple processing nodes within a processing subsystem and at least one input/output (I/O) node coupled to a processing node including a host bridge. The host bridge receives non-coherent posted write commands from the I/O node and responsively generates corresponding coherent posted write commands within the processing subsystem. Each posted write command has a target within the processing subsystem. The host bridge includes a data buffer for storing data used to track the status of non-coherent posted write commands. The I/O node issues a flush command to ensure that all previously issued non-coherent posted write commands have at least reached points of coherency within the processing subsystem.

Abstract: An electronic network system for implementing ARP (Address Resolution Protocol) and RARP (Reverse Address Resolution Protocol) type communication. ARP type communication is facilitated by including within the ARP response packet an offset address indicating the memory location of the software application that is the subject of the ARP type communication. RARP type communication is facilitated by providing each network node with a network unique ID and using the unique ID when generating RARP requests.

Abstract: A host apparatus incorporates a holding-tone generator. The holding-tone generator generates a holding-tone packet. The holding-tone packet is broadcast, as a broadcast packet, to network telephone terminals. Each network telephone terminal receives the holding-tone packet if it assumes a holding state.

Abstract: The combination of narrowband applications with broadband transport may be enabled with a communications architecture, in which one or more Media Gateways (MGs) that include broadband switching fabric are controlled by a Media Gateway Controller (MGC) that includes switching intelligence and narrowband switching fabric. A new data structure is provided in the MGC to identify bandwidth allocation on all traffic trunks interconnecting MGs controlled by the MGC. The new data structure can further maintain quality data representing the quality of packet transmissions in the broadband network data. The new data structure enables the MGC to monitor congestion in the broadband network and to allocate bandwidth more efficiently.

Abstract: A bridge for communicating between a first and a second bus includes a first interface unit, a second interface unit and a buffer unit. The first interface unit is adapted to be coupled to the first bus. The second interface unit is adapted to be coupled to the second bus. The buffer unit is coupled to the first and second interface units. The buffer unit is adapted to receive a posted transaction from one of the first and second interface units. The buffer unit includes a posting buffer and a discard timer. The posting buffer is adapted to store the posted transaction. The discard timer is adapted to generate a discard timer expired signal after a predetermined time interval that the posted transaction has resided in the posting buffer. A method for exiting from a potential deadlock situation includes posting a transaction, tracking the length of time the transaction has been posted, and discarding the transaction after a predetermined time interval that the transaction has been posted.

Abstract: A system and method for maximization of the global throughput of packet transport networks via traffic-load-adaptive TDM or WDM channelization. Architecturally the packet transport network is formed of logical packet transport buses that are configured in the network for transport of packets to one of the nodes of the network from the other nodes of the network. Each logical packet transport bus is dynamically channelized to create an adaptive full mesh connectivity among the nodes in the network, such that the capacity of each connection in the mesh is continuously optimized according to real-time inbound traffic patterns at the packet transport network, thereby globally optimizing the throughput of the network. The dynamic channelization of each bus is done under the control of its destination node based on the demand for transport capacity towards it presented by the individual nodes in the meshed packet transport network.

Abstract: A bus bridging method, a bus bridge and a bus agent are described. In a bus agent provides to a bus bridge a read data request targeting a data source bridged by the bus bridge. The read data request includes a read address indicating a starting storage location of the requested data, and a read size indicator indicating the size of the requested data. The bus bridge, in response, facilitates provision of the requested data to the bus agent. The facilitation includes streaming buffered ones of the requested data to the bus agent through one or more successive streaming connections to the bus bridge by the bus agent.

Abstract: A communications network includes a communications medium with a synchronous communications transport signal including time-division-multiplexed (TDM) channels, bridges having respective interfaces to different local area network (LAN) segments, and add-drop circuits coupling associated ones of the bridges to the communications medium. Each add-drop circuit groups TDM channels of the communications transport signal into a bundle, and schedules the use of the bundle to carry data traffic originated by the associated bridge and to carry data traffic originated by the other bridges. Data traffic originated by the associated bridge and destined for the other bridges is transmitted on the bundle in accordance with the scheduling. For data traffic received from the other bridges via the bundle, it is determined whether the received data traffic is destined for the associated bridge, and if so then it is forwarded to the associated bridge.

Abstract: A protocol converter appropriately converts communications directed from a device operating under a first protocol to a device operating a second protocol. The converter is coupled to the two devices and converts communications between the devices into the appropriate format for the receiving device. The converter preferably includes a programmable microprocessor which manipulates communications into the proper format for the receiving device and then transmits the manipulated communications to the receiving device. Preferably, the converter is coupled between two bus structures of different protocols, where one of the bus structures is an IEEE 1394-1995 bus structure. Alternatively, the converter and the devices are all coupled to the same bus structure. A protocol conversion program is preferably stored within a read only memory (ROM) and used by the microprocessor to perform the appropriate conversions.

Abstract: A technique efficiently correlates information pertaining to entities of a mixed Advanced Peer to Peer Networking (APPN) and Data Link Switching (DLSW) computer network. The entities comprise System Network Architecture (SNA) host mainframe (“host”) and physical unit (PU) entities, along with DLSw and APPN/DLSw devices. The technique involves identifying a SNA session path as using Dependent Logical Unit Requester (DLUR) services of the APPN/DLSw device and thereafter obtaining media access control (MAC)/service access point (SAP) information needed to correlate the SNA session to the DLSw peer devices. The inventive technique then proceeds to efficiently correlate information relating to the DLUR and PU with information relating to the devices to draw the mixed network topology needed to assist in problem isolation.

Abstract: A method and system for providing integrated control of communication services includes an Integrated Service Controller (ISC) to establish communications with one or more communications networks, such as the Public Switched Telephone Network or the Internet. The ISC is further configured to provide dynamic service profile merging of service specific parameters, which are settable by a customer and/or communications service. The service specific parameters may contain variable entries which each of the communication services provide. The ISC may logically merge the service specific parameters into a multi service profile which contains a master key as well as service specific fields unique to each communications services.

Abstract: A high-speed network switch includes a data bus for transmitting data between devices. The data bus includes a plurality of data lines and a clock line. As packet data is received by the high-speed network switch, the packet data is divided into byte-wide cells for transmission over the data lines. While the cells are transmitted over the data lines, a half-speed clock is transmitted over the clock line. Transitions in the half-speed clock occur during transmission of the cell data. The transitions are used by a receiving device to sample the byte-wide cells.

Abstract: A method and apparatus for interfacing a central processing unit to a network switch with an external memory that transfers data to the network switch at a different clock speed than transfers of data to the central processing unit provides an interlocking mechanism to prevent overwriting of data and underflows from occurring. The interlocking of the state machines, accomplished by the idling and advancing of a processor state machine and an external memory state machine, prevents either one of the separate state machines from outrunning the other state machine.

Abstract: This invention provides queue sharing methods and apparatus of a queuing system which includes queues of multiple priorities or classes. When data is received in a class queue, for example, and the class queue is full, the queue is in an overflow condition and the data is overflow data. The queue sharing apparatus processes the overflow data by determining whether the overflow data may be placed in one of the other class queues which are not full. If higher class queues have higher performances than lower class queues, then when lower class queues are full, overflow data of the lower class queues may be placed in higher class queues without performance penalties. When higher class queues are full, the overflow data from the higher class queues may be placed in lower class queues. However, in this situation, a higher class buffer threshold is generated for the lower class queue to indicate when the higher class performance may be compromised.

Abstract: This invention discloses a local area network including a hub, a plurality of nodes, communication cabling connecting the plurality of nodes to the hub for providing data communication, and a power supply distributor operative to provide at least some operating power to at least some of the plurality of nodes via the communication cabling.

Abstract: A method and device send information via a network of computers.

Abstract: A routing apparatus includes a plurality of routing units and function units. The routing unit receives a packet from each port, and uses header information contained in the packet to judge whether the packet should be transmitted to the function unit. In the case where the packet should be transmitted to the function unit, the routing unit adds a first identifier to the packet and transmits it to a transmission unit. The function unit receives the packet containing the first identifier from the transmission unit, and executes a predetermined processing for the packet. The function unit adds a second identifier to the packet and transmits it to the transmission unit.

Abstract: A packet routing apparatus has a plurality of routing units, connected by a first connecting mechanism. The plurality of routing units comprise a first routing unit, connected to at least one port, and a second routing unit, connected to an extended function processor. The first routing unit transmits a packet, received from the port, to another first routing unit and/or a second routing unit. The second routing unit transmits the packet, received from the first connecting mechanism, to the extended function processor.

Abstract: A bus system for providing a common data transmission path for N data sources that have M data bits. The N data sources are connected to M interconnections correspondingly through N bus cells each of which includes logic circuits for selectively providing the data bits of data sources into the interconnections. The bus cells are controlled to connect each of the data bits of the data sources to the selected one of the interconnections. The bus system is capable of adapting to delay times or loads of the data sources. The bus system reducing the number and the length of the interconnections.

Abstract: The invention relates to a bus system for transmitting data between a processing unit (10) and a memory unit (19) comprising memory cells (17), in which a plurality of logic addresses is available for each memory cell (17). Dependent on the kind of address used, the data transmitted through the data bus (13) are differently manipulated by a data modification unit (16) so that, for protection against abuse of data, the unchanged identical data are not present at the data bus (13).

Abstract: An asynchronous control mechanism packet is used to send control messages and information to one or more bridge devices within a network of buses of devices. The asynchronous control mechanism packet is addressed to a device on one of the buses and is intercepted by one or more appropriate bridge devices along the path to the destination device. The asynchronous control mechanism packet is targeted at a particular bridge device or used to send control messages and information to bridge devices along a particular communications route between two devices. The asynchronous control mechanism packet includes a designation specifying that it is an asynchronous control mechanism packet and should be treated accordingly. This designation is recognized by the appropriate bridge devices. Preferably, this designation is included within the extended transaction code field of the packet. In an alternate embodiment, the designation is included within a transaction code field of the packet.

Abstract: A scheduling method includes the steps of processing scheduling processes of all input lines according to a processing sequence in which a highest priority output line of a highest priority input line is processed with a first priority, in an environment in which a plurality of processing sequences have different scheduling targets among a plurality of input lines, and updating the highest priority input line and the highest priority output line of each input line for every scheduling cycle.

Abstract: Accordingly, the present invention provides a method and an apparatus of establishing multiple direct memory access connections between a peripheral and a main memory of a computer system. Each of the multiple direct memory access connection is managed in an improved manner such that one or more of the multiple direct memory access connections are non-real-time connections, but real-time operations may be performed the data carried by the non-real time connections. In another aspect of the present invention, a driver may be implemented on the computer system to facilitate the establishment and maintenance of the multiple direct memory access connections. The present inventions reduce arbitration and system interrupt latencies and reduces the management burden of the direct memory access connections on a central processing unit of the computer system.

Abstract: A bridge is disclosed for providing a connection between a MODBUS Plus network and an Ethernet network. The bridge includes a MODBUS circuit board, an Ethernet circuit board, and a CPU. The MODBUS circuit board is operably coupled to the local area network for receiving a message from an originating node having a five-byte routing path field. The CPU is operably connected to the circuit board for extracting a table location in response to a third byte within the routing path field. The Ethernet circuit board is operably connected to the CPU and the Ethernet network for forwarding the message to an IP destination in response to the table location.

Abstract: A generic access service is provided in a telephone system to enable users to get dialup access to different network access services. User profile data showing which network access services a user subscribes to is held on a database accessible to the service control subsystem of the telephone system. Upon detection of a particular phone number assigned to the generic access service an authentication procedure is initiated in the service control subsystem to identify the user. Once identified, the service control subsystem uses the user profile data to determine what access services are available to that user. Thereafter, a particular access service is selected and the number of a corresponding network access server derived.

Abstract: Bridges (10, 12, 14) are used to interconnect local area networks transparently. In the IEEE 802.1D standard for bridges, a spanning tree is built among the bridges for loop-free frame forwarding (FIG. 10). Although this approach is simple, it does not support all-pair shortest paths. A novel bridge protocol is employed that attempts to find and forward frames over alternate paths that are shorter than their corresponding tree paths on the standard spanning tree, and makes use of the standard spanning tree for default forwarding. The proposed protocol, referred to as the Spanning Tree Alternate Routing (STAR) Bridge Protocol, is backward compatible with the IEEE 802.1D standard and has a complexity that is comparable to that of the standard and other existing protocols.

Abstract: Systems and methods increase the available bandwidth for stations on a network, eliminate collisions during normal operations, do not require a network administrator, scale essentially linearly, are self-organizing, self-diagnosing and reporting, and are deterministic. One station becomes the starting bus master and creates a table of all the stations on the network along with their corresponding delays relative to the starting bus master. The stations communicate in an order determined by the starting bus master with the first station being a starting bus master and the last station an ending bus master. The starting bus master transmits a beginning of sequence message and the ending bus master generates an end of sequence message. The stations need not be limited to any specific wavelength nor need they be forced to transmit during any specific time slot. The network automatically adds or drops stations from the network.

Abstract: A FC controller that interfaces between a host system and a 10-bit FC interface is herein described. The FC controller acts as both a FCP initiator and FCP target device and has the capability to receive and process SCSI I/O requests received from a FC and a host system. The FC controller can process both multiple inbound and outbound sequences simultaneously since it does not employ a processor-based architecture. Rather, the FC controller relies on specialized circuitry that can operate in a relatively independent manner so that multiple tasks are performed concurrently thereby achieving a faster throughput and data transfer rate.

Abstract: A transmitting apparatus for transmitting a source packet constructed of a pair of data of a source packet data and a source packet header including a time stamp, has transmission packet generating means of investigating values of a predetermined portion of the time stamp included in the source packet when the source packet is inputted, unifying the source packets that have a same value for the predetermined portion and are inputted in series to output as one unit of transmission packet data; and

Abstract: The invention relates to a multiplexer bus comprising local bus nodes. In order to connect a plurality of transmitting-receiving circuits, the latter are connected to locally distributed bus nodes which, in turn, can be connected to additional transmitting-receiving circuits or to bus nodes. The bus nodes contain a first circuit for relaying a data signal if a control signal is transmitted in parallel with the data signal, and a second circuit for relaying the control signal.

Abstract: A communications system with a circuit having a plurality of communications ports capable of multispeed operation and operable in a first mode that includes address resolution and in a second mode that excludes address resolution and includes a first memory, a plurality of protocol handlers, a bus connected to the protocol handlers, a second memory connected to the bus and a memory controller connected to the bus and the second memory for selectively comparing addresses, transferring data between the protocol handlers and the second memory, and transferring data between the second memory and the first memory. A first embodiment is a local area network controller having a first circuit with a plurality of communications ports capable of multispeed operation and operable in a first mode that includes address resolution and in a second mode that excludes address resolution, and an address lookup circuit interconnected with the first circuit.

Abstract: A data processing system and method are described for determining a physical location of a client computer system. The client and server computer systems are coupled together to form a local area network. Identifying information is associated with a tag. The client computer system transmits a wireless query signal to a physical region. In response to the tag being located within the physical region, the tag receives the wireless query signal. In response to a receipt of the query signal by the tag, the tag transmits a reply signal. The reply signal includes the identifying information. In response to a receipt of the reply signal by the client computer system, the physical location of the client computer system is determined utilizing the identifying information.

Abstract: A data transmitting and receiving apparatus for transmitting and receiving data between an external device and a pertinent bus of a plurality of buses connected by a bridge, the external device forming one portion of the bridge is disclosed, that comprises a storing means for storing first information and second information, the first information representing whether the transmission source or the transmission destination of the data is the data transmitting and receiving apparatus, the second information representing whether or not to the data should be transmitted to the pertinent bus, a setting means for setting the first information and the second information stored in the storing means to a predetermined state corresponding to an external request, and a transmitting and receiving means for transmitting and receiving the data to/from the pertinent bus or the external device corresponding to the first information and the second information stored in the storing means.

Abstract: A large volume of digital media home information output from each of audio, visual, computer and communication (AVCC) apparatuses is transmitted to a digital media home information network at a high data speed and is received by one AVCC apparatus. Also, a small volume of digital environment home information output from each of self-management apparatuses such as an energy sensor, a security sensor and a health case sensor is transmitted to a digital environment home information network at a low data speed and is received by a digital information transmitting/receiving and protocol converting unit. In this unit, A protocol of the digital environment home information in the digital environment home information network is converted into that in the digital media home information network, and the data speed of the digital environment home information in the digital environment home information network is changed to that in the digital media home information network.

Abstract: A system and method for a Universal Serial Bus (USB) device supporting both PSTN and DECT external interfaces. A USB device has distinct and dedicated external interfaces for providing multi-functionality capabilities. The host PC coordinates device interfacing through separate interface drivers associated with the USB device external interfaces. Future replacement of either external interface functionality is allowed without effecting the host PC driver or firmware architecture.

Abstract: The invention relates to local area networks typically comprising a LAN hub, a plurality of outer hub devices connected to the LAN hub via a respective plurality of LAN links and a plurality of USB devices and/or LAN computers connected to the plurality of outer hub devices via a respective plurality of USB links. The outer end hubs communicate with the USB devices and LAN computers using USB protocol having time sensitive aspects. To satisfy the requirements of the USB protocol, the outer hub devices perform the time sensitive aspects of the USB protocol. The outer end hubs communicate with the LAN hub using a LAN protocol which permits the outer hub device to be further than 5 meters from the LAN hub. The LAN protocol is typically a variant of the USB protocol.

Abstract: An initialization of local buses 14a to 14n, a definition of topology and a management of isochronous resources are performed for every local bus. Each of portals 12a to 12n includes an asynchronous packet discriminator 215 which discriminates an asynchronous packet sent by a terminal device and transfers it. The portals 12a to 12n discriminate asynchronous packets sent by terminal devices in order to acquire isochronous resources and secure isochronous resources on different buses. The portals 12a to 12n transfer isochronous packets to different local buses by associating a received isochronous packet with a plug on the bridge bus side and a plug on the local bus side with an isochronous channel on the bus. Thus, the utilization efficiency of bus resource in a serial bus network is improved and a packet sent from a terminal device can be transferred to a different bus.

Abstract: Systems and methods by which voice/data communications may occur in multiple modes/protocols are disclosed. In particular, systems and methods are provided for multiple native mode/protocol voice and data transmissions and receptions with a computing system having a multi-bus structure, including, for example, a TDM bus and a packet bus, and multi-protocol framing engines. Such systems preferably include subsystem functions such as PBX, voice mail and other telephony functions, LAN hub and data router. In preferred embodiments, a TDM bus and a packet bus are intelligently bridged and managed, thereby enabling such multiple mode/protocol voice and data transmissions to be intelligently managed and controlled with a single, integrated system. A computer or other processor includes a local area network controller, which provides routing and hub(s) for one or more packet networks. The computer also is coupled to a buffer/framer, which serves to frame/deframe data to/from the computer from TDM bus.

Abstract: Provided is a 10/100Base-T MAC to PHY interface requiring only two wires (pins) per port, with two additional global wires: a clock wire (pin), and a synchronization wire (pin). This reduction in the number of pins associated with each port is achieved by time-division multiplexing wherein each time-division multiplexed wire combines a plurality of definitions from the conventional 100Base-T interface specified by IEEE 802.3u (clause 22). As a result, each port has its own pair of associated time-division multiplexed wires (pins) and the addition of each port simply requires two additional wires. According to a preferred embodiment of the present invention, information normally transferred on sixteen wires in a conventional 100Base-T interface at 25 MHz is time-division multiplexed onto two wires (corresponding to two pins) that transfer data at 125 MHz, five times the speed of conventional interfaces. Importantly, this multiplexing is done on a port by port basis.

Abstract: A LAN/WAN network topology and design methodology using Internet Protocol (IP) subnet topology, ATM WAN configuration, equipment placement, and device configuration to provide partitioning of a call processing application across multiple sites. The partitioning reduces latency for mission critical messages, while providing for necessary provisioning traffic needs. Further, the overall topology provides the redundancy and resiliency necessary for mission critical call processing application, utilizing the IP subnets, ATM permanent virtual circuits, network device configuration, and server segregation to achieve Quality of Service (QoS).

Abstract: An optimized CPU-memory high bandwidth multibus structure simultaneously supporting design reusable blocks. A system in accordance with the present invention communicatively couples the internal components (e.g., CPU, memory, etc.) and peripheral devices (e.g., display, keyboard, etc.) of a computer system by dividing the components into two logical subdivisions. One subdivision includes the memory and CPU(s) of the computer system while the other subdivision includes the remaining components. In accordance with the present invention, each subdivision of components is interconnected to the other components of its subdivision by a bus scheme. Both subdivision bus schemes are interconnected by circuitry referred to as a bridge, which enables them to intercommunicate. As such, the components connected to the separate subdivision bus schemes are able to intercommunicate.

Abstract: A bus switching structure and a computer using the same, wherein input/output (I/O) slot connections are switched to a desired I/O bus so that loads are distributed evenly over the I/O buses. The bus switching structure includes a switching unit and switching controller. The switching unit is located interposingly between an I/O slot and a plurality of I/O buses. The switching unit either connects or disconnects the I/O slot to or from each of the I/O buses in accordance with a switching signal. The switching controller outputs the switching signal to cause the switching unit to connect the I/O slot to one of the I/O buses and to disconnect the I/O slot from any of the other I/O bus, thereby effecting connection switchover between the I/O slot and the I/O buses.

Abstract: An improved frame processing apparatus for a network that supports high speed frame processing is disclosed. The frame processing apparatus uses a combination of fixed hardware and programmable hardware to implement network processing, including frame processing and media access control (MAC) processing. Although generally applicable to frame processing for networks, the improved frame processing apparatus is particular suited for token-ring networks and ethernet networks. The invention can be implemented in numerous ways, including as an apparatus, an integrated circuit and network equipment.

Abstract: A staged partitioned communication bus for interconnecting the ports of a multi-port bridge for a local area network. The communication bus is partitioned into a plurality of data bus segments. Each data bus segment is coupled to one or more ports of the multi-port bridge and includes a same number of signal lines. A multiplexer is coupled to each data bus segment and to a memory device. A bus controller is coupled to each port and to the multiplexer. Each port requests access to the memory device from the bus controller for storing packets in the memory device and for retrieving packets therefrom. In response, the bus controller conditions the multiplexer to provide a signal path between the memory device to and the data bus segment which includes the requesting port. The memory device temporarily stores packets undergoing communication between the ports.

Abstract: A remote communications server system enables multiple remote users simultaneous access to a network. The system connects a plurality of on-line sessions across multiple communication lines to the network. A unique combination of multiple buses, multiple processors, and a segmented design creates a distributed processing communications system having high throughput without the stability problems associated with gigabit bus speeds. Furthermore, the system supports a mixture of communication links and allows the substitution of one service type for another without affecting the remaining communication links. The system is scalable in that segments can be added as needed and the number of lines handled by a segment can be increased.

Abstract: The present invention relates to the communication between a client and a server. A communication control method has a step for specifying a relay apparatus corresponding to a designated apparatus to be communicated with based on relay definition information which relates information for specifying the apparatus to be communicated with to information for specifying the relay apparatus to relay the communication with the apparatus to be communicated with and a step for establishing a relay connection with the specified relay apparatus.

Abstract: A multi-communication rate switching physical device for a port of a mixed communication rate Ethernet repeater network. The present invention includes a physical device for recovering bits from a wire connection (e.g., fiber, twisted pair, etc.) that is coupled to computer system adapter. The physical device can be implemented on a single chip integrated within an Ethernet repeater hub within each hub port. The physical device chip of the invention includes a front end multiplexer coupled to channel information between a 10 Base T physical device circuit and a 100 Base T physical device circuit, depending on the result of an auto-negotiation circuit also on the physical device chip. The physical device chip also advantageously employs a second, back end multiplexer, that is coupled to channel data between either the 10 Base T physical device circuit or the 100 Base T physical device circuit and one of a multiple of media independent interfaces (MIIs).

Abstract: A controlling apparatus, record medium, and method, which include the steps of (a) obtaining control information from the electronic devices, the control information allowing the electronic devices to be controlled, (b) determining whether or not the electronic devices have a time setting function corresponding to the control information obtained at the step (a), (c) obtaining time information, and (d) setting the time information obtained at the step (c) to each of the electronic devices determined as devices having the time setting function at the step (b). Thus, even if an electronic device connected to a network system does not have a function for obtaining time information through the network system, time corresponding to time information can be set to the electronic device.

Abstract: Four (4) unshielded twisted pairs of wires connect a hub and a computer in an Ethernet system: one (1) pair for transmission only, another for reception only and the other two (2) for transmission and reception. The signals in the wires are in packets each having timing signals defining a preamble and thereafter having digital signals representing information as by individual ones of three (3) amplitude levels. The signals received at the computer are provided with an automatic gain control (AGC) and then with digital conversions at a particular rate. A control loop operative upon the digital conversions regulates the AGC gain at a particular value. An equalizer operative only during the occurrence of the digital signals in each packet selects an individual one of the three (3) amplitude levels closest to the amplitude of each digital conversion at the time assumed to constitute the conversion peak.