Automatic Baseline Or Threshold Adjustment Patents (Class 375/317)
  • Patent number: 6490326
    Abstract: Communication apparatus (100) corrects for amplitude imbalance caused by differences in circuitry that process in-phase and quadrature signals. The in-phase and quadrature signals are alternately routed in rapid succession through first and second parallel processing circuits or signal paths (140, 150) to cancel imbalances between the signal paths. Switches (132, 134) are employed at inputs to and outputs from corresponding portions of both signal paths, and these switches (132, 134) are synchronously operated in response to a control signal to interchange signals on the signal paths.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: December 3, 2002
    Assignee: Motorola, Inc.
    Inventors: Babak Bastani, Edwin E. Bautista, Joseph P. Heck
  • Publication number: 20020176518
    Abstract: A binary data signal of a very high speed rate travelling over a transport network is regenerated using two threshold levels. The first threshold, or the preset threshold is initially set by the performance monitor, and thereafter adjusted based on the current quality of the signal eye. The second threshold, or the decision threshold, is determined by the performance monitor based on the preset threshold and on the provisioned BER.
    Type: Application
    Filed: May 25, 2001
    Publication date: November 28, 2002
    Inventor: Yufeng Xu
  • Publication number: 20020176480
    Abstract: A method and system that reduces the peak-to-average power ratio of a reverse link signal is described. A baseband structure implements a peak reduction technique using peak windowing. A non-rectangular window is used to distort the signal. One embodiment of the window is an inverted-raised cosine with the peak reduction a function of the relative difference in the squared-magnitude of the envelope relative to that of the desired peak-to-average power ratio. Multiple passes through the peak-reduction function may be performed until a desired target peak-to-average power ratio is achieved.
    Type: Application
    Filed: May 22, 2001
    Publication date: November 28, 2002
    Inventors: Charles E. Wheatley, Rashid A. Attar
  • Patent number: 6476954
    Abstract: An optical communication device includes a receiving circuit that generates an accurate voltage signal from received light. The voltage signal is then used to quickly and accurately determine emission information which is used to adjust the emission level of an associated light emitting diode, by varying the drive current supplied to the light emitting diode. The receiving circuit has a light receiving element that generates a current from received light. The current is converted into first and second current signals using a fixed distribution ratio. First and second amplifiers convert the first and second current signals to first and second voltages. A current control circuit is connected to the light receiving element and the second amplifier and controls the amount of the first current signal using the second voltage.
    Type: Grant
    Filed: March 19, 1999
    Date of Patent: November 5, 2002
    Assignee: Fujitsu Limited
    Inventor: Kazunori Nishizono
  • Patent number: 6456669
    Abstract: The present invention makes it possible to transmit data while reducing the influence of fading caused on a transmission path. When communication data is transmitted by using a plurality of subcarriers arranged with a predetermined bandwidth, a data block consisting of a plurality of subcarriers arranged in rows in a time axis direction is used as a data unit. By implementing both a differential modulation process based on each phase difference in the frequency axis direction between a plurality of subcarriers and a differential modulation process based on each phase difference in the time axis direction between a plurality of subcarriers, a transmission signal with symbol data superposed on each phase difference between a plurality of subcarriers is generated and output.
    Type: Grant
    Filed: October 23, 1998
    Date of Patent: September 24, 2002
    Assignee: Sony Corporation
    Inventor: Kazuyuki Sakoda
  • Publication number: 20020122504
    Abstract: A receiver having a variable bit slicer for detecting bits in a demodulated signal, comprises a demodulator (14) for deriving a demodulated bit rate signal, means (36) for storing a plurality of threshold values, each of the threshold values being selectively adjustable, means (28, 38) for selecting the threshold value for comparison with the current bit signal (Sn) in response to a sequence of N bits (where N is at least 2) (Bn-1, Bn-2) received prior to the current bit (Bn) and means (38, 40) for using the current bit to update the selected threshold value.
    Type: Application
    Filed: December 10, 2001
    Publication date: September 5, 2002
    Applicant: KONINKLIJKE PHILIPS ELECTRONICS N.V.
    Inventors: Adrian W. Payne, Paul A. Moore, Brian J. Minnis
  • Patent number: 6442383
    Abstract: A demodulator for use with a digital wireless communication system is disclosed, that comprises a DC offset controller for removing a DC offset of a modulated signal that is input to the demodulator, a complex multiplying unit for complex-multiplying an output signal of the DC offset controller, a phase detector for detecting an amplitude error signal and a phase error signal from an output signal of the complex multiplying unit, an LPF (low pass filter) for outputting a low band component of the phase error signal, and an NCO (numerical controlled oscillator) for converting an output signal of the LPF into a sin component and a cos component that have orthogonal relation, wherein the sin component and the cos component are input to the complex multiplying unit, and wherein the amplitude error signal, the sin component, and the cos component are input to the DC offset controller.
    Type: Grant
    Filed: March 25, 1999
    Date of Patent: August 27, 2002
    Assignee: NEC Corporation
    Inventor: Takaya Iemura
  • Patent number: 6438178
    Abstract: An integrated circuit for receiving and recovering an incoming electrical signal of a digital data bit stream transmitted over a communication channel, and comprising an equaliser circuit adapted to reshape the electrical signal to be provided to, a CDR circuit adapted to receive the reshaped electrical signal and to recover data bit signal of the digital bit stream and to recover a clock signal encoded or embedded in the digital data stream.
    Type: Grant
    Filed: August 11, 1999
    Date of Patent: August 20, 2002
    Assignee: Intel Corporation
    Inventors: Henning Lysdal, Michael Liere, Henrik Ingvar Johansen
  • Patent number: 6415003
    Abstract: In a data communications system, a digitally implemented correction for baseline wander and the receipt of killer packets resulting from coupling transformers in the transmission channel is presented. The baseline wander correction is accomplished in a feedback loop that does not depend on models of the coupling transformers between the transmitter and the transport media and the receiver and the transport media. Additionally, a digital response to killer packets is presented that does not require the use of higher resolution analog-to-digital converters and does not require the use of a lower resolution in the analog-to-digital converter of the receiver. Instead, the reference voltage of the analog-to-digital converter is adjusted for short cables, where killer packets are a problem.
    Type: Grant
    Filed: September 11, 1998
    Date of Patent: July 2, 2002
    Assignee: National Semiconductor Corporation
    Inventor: Sreen A. Raghavan
  • Patent number: 6385238
    Abstract: An adaptive equalization and baseline wander correction circuit has an adaptive filter loop and an independent baseline wander correction loop by using dual halfwave rectifiers and peak detectors with capacitors to store the peak DC value of the incoming signal to be shared between the two loops.
    Type: Grant
    Filed: December 3, 1997
    Date of Patent: May 7, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Thai M. Nguyen
  • Patent number: 6377633
    Abstract: An apparatus and method for digitally decoding an asynchronous data signal is disclosed. Analog communication signals are converted into binary signal values. A negative peak register and a positive peak register store the negative and positive peak signal values corresponding to the negative and positive peak signal values of the analog communication signal. A negative peak comparator and a positive peak comparator compares the positive and negative signal peaks of the currently received binary signal value with minimum negative and maximum positive peak signal values stored within the negative and positive peak registers, and updates the negative and positive peak registers with any new minimum negative and maximum positive peak signal values. A subtraction circuit subtracts the positive peak signal value from the negative peak signal value to determine the magnitude signal value corresponding to the difference between a binary zero and one.
    Type: Grant
    Filed: October 9, 1998
    Date of Patent: April 23, 2002
    Assignee: Harris Corporation
    Inventor: David F. Schneider
  • Patent number: 6374035
    Abstract: A device is arranged to detect the level of an input digital signal by detecting a specific pattern from the input digital signal and to control the level of the input digital signal according to a result of the level detection. The arrangement enables the device to accurately detect the amplitude of a reproduced signal obtained at the detecting point of data which has the specific pattern, to keep the level of the reproduced signal unvarying at the data detecting point and to lessen errors of reproduced data.
    Type: Grant
    Filed: August 7, 1995
    Date of Patent: April 16, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shinichi Yamashita
  • Patent number: 6359941
    Abstract: A system and method for automatically setting an advantageous reference threshold in a burst mode receiver to reduce the burst mode penalty associated with prior art burst mode optical data transmissions, and to reduce duty cycle distortion at the receiver output. In a preferred embodiment, the maximum excursion of a received data signal is compared to an offset threshold equal to approximately twice the offset voltage supplied by an offset generator. If the data signal amplitude is less than the offset threshold, then the reference threshold voltage is set approximately equal to the offset voltage. If, on the other hand, the data signal amplitude is greater than or approximately equal to the offset threshold, then the reference threshold is set to one-half of the difference between the maximum and minimum excursions of the data signal (i.e. the difference amplitude).
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: March 19, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Ton den Bakker
  • Patent number: 6356606
    Abstract: A method and device for limiting peaks of an input signal. The device and method isolate peaks of an input signal based on a clipping threshold voltage, generate an extrema signal representing the local extrema of the peak isolated signal, filter the extrema signal based on an appropriate impulse filter response to generate a filter signal, and combine the filter signal with the input signal delayed by a predetermined time period to generate an impulse clipped signal. The impulse clipped signal has a reduced P/A ratio and is without significant out-of-band spectrum artifacts.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: March 12, 2002
    Assignee: Lucent Technologies Inc.
    Inventor: Mark David Hahm
  • Patent number: 6349121
    Abstract: A DC-coupled data slicer operates on a baseband signal based on a variable threshold and an AC-coupled data slicer operates on the baseband signal based on a fixed threshold. The variable threshold is initially set to a stored threshold value corresponding to a previously used value of the variable threshold. Differences between DC-coupled sliced data and the AC-coupled sliced data are determined and used to adjust the variable threshold. In one embodiment, the AC-coupled data slicer is characterized by a settling time constant. The variable threshold is not adjusted until expiration of a predetermined delay preferably set to be a multiple of the settling time constant. After expiry of the predetermined delay, adjustments to the variable threshold are made to correct any detected variances in the expected duty cycle of the DC-coupled data slicer output. In this manner, the present invention overcomes the problems resulting from settling times inherent in prior art techniques.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: February 19, 2002
    Assignee: MemoryLink, Inc.
    Inventor: Jason R. Anderson
  • Publication number: 20020001354
    Abstract: A method that calculates a threshold for a signal according to a first bandwidth if the signal is greater than the threshold plus a first value or if the signal is less than the threshold minus the first value. The method also calculates the threshold for the signal according to a second bandwidth if the signal is not greater than the threshold plus the first value and if the signal is not less than the threshold minus the first value. The first bandwidth is greater than the second bandwidth. Various apparati that perform the method are also described.
    Type: Application
    Filed: April 17, 2001
    Publication date: January 3, 2002
    Inventor: Conor J. McNally
  • Patent number: 6335815
    Abstract: An optical receiver includes a light-receiving device, an equalizing amplifier, a regenerating circuit, a timing signal extraction circuit, a reference voltage generation circuit, and a comparator. The light-receiving device converts input signal light into an electrical signal. The equalizing amplifier amplifies the electrical signal output from the light-receiving device and performs waveform shaping. The regenerating circuit regenerates data from an output from the equalizing amplifier on the basis of a retiming signal. The timing signal extraction circuit extracts a timing signal from an output signal from the equalizing amplifier. The reference voltage generation circuit generates a reference voltage changing in accordance with a variation in ambient temperature. The comparator compares an output signal from the timing signal extraction circuit with the reference voltage output from the reference voltage generation circuit and supplies the retiming signal to the regenerating circuit.
    Type: Grant
    Filed: May 14, 1998
    Date of Patent: January 1, 2002
    Assignee: NEC Corporation
    Inventor: Ippei Kobayashi
  • Patent number: 6304828
    Abstract: The system and method for calibrating a signal detection threshold circuit is used in a radio frequency (RF) receiver, such as a in an early warning radar (EWR) system, in which a signal detection threshold circuit rejects signals below a predetermined threshold setting and prevents noise signals from causing false alarms. The system and method include setting an initial threshold setting and receiving noise signals in one or more channels. A threshold comparison circuit rejects noise signals below the threshold setting, and a pulse repetition frequency (PRF) detection circuit detects noise pulses above the threshold setting and determines the PRF. An automatic threshold determiner and setter determines whether the PRF has reached a predetermined frequency (e.g., 400 kHz) and lowers the threshold setting until the predetermined frequency is reached. When the predetermined frequency is reached the threshold setting is stored as a noise measurement.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: October 16, 2001
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: David J. Swanick, William P. Huntley
  • Patent number: 6298098
    Abstract: A hybrid fiber/coax digital data transmission system in which data from a plurality of subscribers are transmitted upstream to a headend demodulator in a series of data bursts. The headend demodulator acquires and synchronizes a data burst by detecting a BPSK preamble having a repetitive one and zero pattern (10101010101000). The pattern is detected by integrating clock energy in an envelope of a preamble length transmission and using the last three symbols (0,0,0) as a frame marker after differential decoding. Noise in the system is periodically measured by detecting an empty burst placed periodically in the data stream. A first-in, first-out (FIFO) memory allows closer spacing for the data bursts by permitting asynchronous received and output clocks.
    Type: Grant
    Filed: February 12, 1998
    Date of Patent: October 2, 2001
    Assignee: Intel Corporation
    Inventors: Norman F. Krasner, Allen Ponsford Edwards, William G. Xenakis, Bruce J. Currivan
  • Publication number: 20010022821
    Abstract: A novel amplitude deviation correction circuit which corrects an amplitude deviation between an I signal and a Q signal is disclosed. An average amplitude deviation between an I signal amplified by a variable gain amplifier and a Q signal amplified by another variable gain amplifier is detected by an amplitude comparison circuit, and +1 volt or −1 volt is outputted in response to a result of the detection. An integration circuit integrates the output of the amplitude comparison circuit and controls the gains of the variable gain amplifiers in response to a result of the integration.
    Type: Application
    Filed: March 2, 2001
    Publication date: September 20, 2001
    Inventor: Masaki Ichihara
  • Patent number: 6289057
    Abstract: A system of energy detection for detecting a valid signal in a modem to enable power savings in receiver and transmitter circuits. The method of energy detection includes the steps of: (a) processing a prescribed number of signal samples (e.g. typically between 512 and 2048); (b) determining an average energy level for the prescribed number of signal samples; (c) determining a gain of an amplifier based on the processed signal samples; (d) comparing the average energy level with a prescribed energy level threshold; and (e) comparing the gain of the amplifier with a prescribed amplifier gain threshold. If the average energy level is greater than the prescribed energy level threshold and if the gain of the amplifier is less than the prescribed amplifier gain threshold then a valid signal is declared and the transmitter of the modem is activated.
    Type: Grant
    Filed: April 30, 1998
    Date of Patent: September 11, 2001
    Assignee: Nortel Networks Limited
    Inventors: Edgar Velez, Peter Noel, Sisay Yirga
  • Patent number: 6249556
    Abstract: The present invention discloses a method and apparatus for thresholding an input signal synchronous with a clock signal at a receiver. The input signal is compared with a threshold voltage to produce a difference signal. The difference signal is synchronized with the input signal to generate a feedback signal. The threshold voltage is adjusted based on the feedback signal.
    Type: Grant
    Filed: May 27, 1998
    Date of Patent: June 19, 2001
    Assignee: Intel Corporation
    Inventors: Roger R. Rees, Harry L. Hampton, III
  • Patent number: 6208696
    Abstract: A low power density radio system is provided using a simple FSK transmitter arranged to transmit very short bursts to a receiver at predetermined frequent intervals. Such a system can be used between a meter transponder and a reader in an AMR system to eliminate the need for a receiver in the transponder and still achieve extended battery life. The problems of detecting and demodulating the short burst are overcome by using a sample and hold circuit that detects a preamble signal of reversals to indicate the presence of the burst. The sample and hold circuit also provides the reference value to correct for the DC pedestal voltage that arises as a function of the transmitter and receiver frequency errors. The data signal that follows the preamble signal can then be detected, and is followed by a verifying signal as part of the signal burst. The burst signal is repeated at predetermined intervals and is preferably only {fraction (1/4000)} or less than the signal time interval.
    Type: Grant
    Filed: December 12, 1997
    Date of Patent: March 27, 2001
    Assignee: Ramar Technology Limited
    Inventor: Terence George Giles
  • Patent number: 6205172
    Abstract: The invention relates to a method for measuring the fade margin in a radio system. The system comprises at least one transmitter (11a; 11b) and at least one receiver (12b; 12a) which in an operational situation establish a fixed radio connection. In the method, the receiver is calibrated by supplying the receiver with an input signal at several different power levels and determining the correspondence between the supplied signal level and a quantity detected by the receiver.
    Type: Grant
    Filed: February 24, 2000
    Date of Patent: March 20, 2001
    Assignee: Nokia Networks Oy
    Inventor: Jarmo Makinen
  • Patent number: 6191879
    Abstract: An optical receiver having a photodiode and a preamplifier includes a charge controller which charges a capacitor depending on an received voltage signal at each burst timing of the burst-mode signal and then discharges the capacitor with a predetermined time constant to produce an amplitude-varying offset component. The current signal of the photodiode is controlled so that the amplitude-varying offset component is canceled out.
    Type: Grant
    Filed: July 23, 1998
    Date of Patent: February 20, 2001
    Assignee: NEC Corporation
    Inventor: Hiroki Yanagisawa
  • Patent number: 6188738
    Abstract: Disclosed is a clock extraction circuit for extracting a clock signal which furnishes timing for discriminating a data signal, from the data signal. The clock extraction circuit has a timing extraction unit for extracting the clock signal from the data signal, and a filter, which is provided in front of the timing extraction unit, having an upper limited frequency sufficiently lower than the bit rate of the data. The data signal is input to the timing extraction unit via the filter.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: February 13, 2001
    Assignee: Fujitsu Limited
    Inventors: Hisaya Sakamoto, Akihiko Sugata, Akimitsu Miyazaki, Tetsuya Kiyonaga
  • Patent number: 6173018
    Abstract: In a demodulator circuit including a multi-level comparator, the demodulator circuit obtaining output data through comparison, made in a four-level comparator and a NRZ comparator, of a signal obtained by subjecting a received signal to a process of detection and predetermined threshold levels, comprises a level detector circuit for detecting the level of the received signal transmitted through the process of detection and a control circuit for controlling relative magnitudes of the level detected in the level detector circuit of the signal transmitted through the process of detection and the predetermined threshold levels for the four-level comparator and the NRZ comparator, whereby stabilized output data conforming to changes in the level of the detected output are made obtainable.
    Type: Grant
    Filed: November 20, 1997
    Date of Patent: January 9, 2001
    Assignee: Sony Corporation
    Inventor: Shouichi Kuroki
  • Patent number: 6169770
    Abstract: A preemptive processor for a tactical collision avoidance system (TCAS) selects mode S squitter messages from closer airplanes on a priority basis. The receiver has a higher sensitivity level to receive squitter messages at greater ranges. The high-level squitter messages preempt the lower-level squitter messages. The preemptive processor can be implemented as part of a application-specific integrated circuit (ASIC).
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: January 2, 2001
    Assignee: Rockwell Collins, Inc.
    Inventor: Steven J. Henely
  • Patent number: 6167080
    Abstract: A closed feedback loop controls the adaptive equalization of an incoming data signal received via a cable. Detected signal information about the positive and negative peaks of the incoming data signal during different windows in time is processed to generate a set of adaptive equalization control signals which identify differences, if any, between the positive and negative peaks of the present data signal and those which are desired. These equalization control signals control an input signal equalization circuit which adaptively adjusts the waveshape of the present data signal to bring it into conformance with the desired waveshape.
    Type: Grant
    Filed: May 12, 1998
    Date of Patent: December 26, 2000
    Assignee: National Semiconductor Corporation
    Inventors: Wong Hee, Abhijit Phanse
  • Patent number: 6163580
    Abstract: A method and apparatus for detecting data is accomplished by an enhanced adaptive threshold which is coupled to receive a data signal and a first reference value. The enhanced adaptive threshold, based on the inputs, provides a threshold to a mixing circuit which, in turn, mixes the threshold with the data signal. The output of the mixer is then subsequently compared with a reference signal to provide an indication of the data signal and preserving its pulse width. The threshold produced by the adaptive threshold circuit is a fixed value when the relationship between the data signal and the first value is in the first state (i.e., the data signal is less than the first value) and the threshold is a proportional threshold when the data signal and the first value are in a second relationship (i.e., the data signal is greater than the first value).
    Type: Grant
    Filed: June 9, 1997
    Date of Patent: December 19, 2000
    Assignee: Sigmatel, Inc.
    Inventors: H. Spence Jackson, Mathew A. Rybicki, Shahriar Rokhsaz
  • Patent number: 6163276
    Abstract: A remote data collection system for collecting usage data from an endpoint includes a monitoring module coupled to the endpoint, the monitoring module having a wireless transmitter to transmit the usage data. The system also includes a receiver to receive usage data from the wireless transmitter of the monitoring module, the receiver capable of receiving in parallel data transmitted at arbitrary frequencies within a radio channel.
    Type: Grant
    Filed: May 17, 1999
    Date of Patent: December 19, 2000
    Assignee: CellNet Data Systems, Inc.
    Inventors: Clive Russell Irving, Gregory Vincent Luxford, Andrew Gordon Summers, Colin Richard Smithers
  • Patent number: 6151150
    Abstract: In a method for deciding the level of an input signal, positive and negative signals are provided in response to the input signal. A peak of the positive signal is detected to provide a positive-peak value. A peak of the negative signal is detected to provide a negative-peak value. The positive signal and the negative-peak value are combined to provide a first combination signal. The negative signal and the positive-peak value are combined to provide a second combination signal. The first and second combination signals are compared to provide an output signal of zero or one.
    Type: Grant
    Filed: October 2, 1997
    Date of Patent: November 21, 2000
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Osamu Kikuchi
  • Patent number: 6148025
    Abstract: An improved invention providing a solution to a problem endemic to conventional adaptive equalizer systems, a problem known as baseline wander. The invention brings the baseline back down when it has drifted up due to baseline wander. The invention brings the baseline back up when it has drifted down due to baseline wander. The end result is that the invention keeps the data centered about the common mode, thus helping to ensure that the data is equalized properly without distortion.
    Type: Grant
    Filed: April 17, 1998
    Date of Patent: November 14, 2000
    Assignee: Lucent Technologies, Inc.
    Inventors: Ramin Shirani, Saied Benyamin, Michael A. Brown
  • Patent number: 6134279
    Abstract: A peak detector for a maximum likelihood decoding system, using an automatic threshold control (ACT), and a method therefor are provided. In the peak detector, positive and negative peak values are detected from an input signal having digital information, based on positive and negative threshold values, and then each threshold value is evaluated according to positive and negative values of the input signal, to reset each threshold value to a predetermined value based on the detected peak value having the opposite polarity thereto. Accordingly, data can be detected exactly, improving performance of Viterbi decoding.
    Type: Grant
    Filed: February 9, 1998
    Date of Patent: October 17, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Iwamura Soichi, Jin-kyu Jeon
  • Patent number: 6122495
    Abstract: A device and method for digitizing a RSSI signal in a wireless transmission system is disclosed, which comprises a micro-controller having a ring counter and a controller, a low-pass filter, and a comparator. To start a digitization process, the controller gradually increases a numeric control signal to control a ring counter to generate a square wave with different duty cycle. Subsequently, the square wave is filtered by a low-pass filter to obtain a DC threshold voltage. If the threshold voltage is larger than the RSSI voltage, the digitization process is complete and the final numeric control signal represents the digitized RSSI signal.
    Type: Grant
    Filed: November 13, 1998
    Date of Patent: September 19, 2000
    Assignee: Winbond Electronics Corp.
    Inventors: Hsing-Ya Chiang, Hsiang-Te Ho
  • Patent number: 6118829
    Abstract: A method and apparatus are shown for automatically adjusting a response bandwidth and input sensitivity of a communications receiver responsive to a frequency of a received data signal. The response bandwidth is adjusted by switching a low pass filter into a receive path of the receiver when the received data signal is a low speed data signal and switching the low pass filter out of the receive path when the received data signal is a high speed data signal. The input sensitivity is adjusted by either changing a detection threshold of a comparator in the receive path or varying a gain of an input amplifier in the receive path. The high speed data signal is discerned when the low pass filter limits the response bandwidth of the receiver by a mode selection circuit which examines the duration of multiple pulses in a pulse train in the received data signal.
    Type: Grant
    Filed: October 1, 1997
    Date of Patent: September 12, 2000
    Assignee: Integration Associates, Inc.
    Inventor: Brian B. North
  • Patent number: 6118828
    Abstract: A digital super-regenerative receiver has an analog RF detector and a regenerative oscillator. An output signal of the analog RF detector is used to generate a digital signal from which an oscillator bias is adjusted in order to maintain the oscillator start-up time at a fixed level. The circuit senses through the use of a multi-level threshold detector if the start-up time is earlier or later than the predetermined start-up time and produces an output signal when the majority of the start times are ahead of the expected start time.
    Type: Grant
    Filed: August 8, 1997
    Date of Patent: September 12, 2000
    Assignee: The Chamberlain Group, Inc.
    Inventor: Fred Freybler Schleifer
  • Patent number: 6115429
    Abstract: A data receiving method used in a powerline environment is used for converting a modulated signal received from a powerline over a data period within a predetermined clear zone after one zero crossing point of the powerline into a data bit. Each data period includes at least one predetermined bit period. The modulated signal is received within the bit period of one data period. The method includes: detecting zero crossing points of the powerline and generating a SYNC signal when a zero crossing point is detected; converting signals contained within the bit period of a data period after each SYNC signal into digital samples; generating an adaptive threshold according to the digital samples converted from the bit periods of a plurality of data periods; and converting the digital samples converted from the modulated signal into the data bit by using the adaptive threshold.
    Type: Grant
    Filed: August 4, 1995
    Date of Patent: September 5, 2000
    Inventor: Shih-Wei Huang
  • Patent number: 6094461
    Abstract: A transmitter (20) having means (206, 207) to encode an input signal to form coded data, each element of said coded data having one of at least two discrete signal magnitude levels, the encoding means including in the coded data a periodic training sequence of data (T); and a receiver (30) to receive the coded data and, on the basis of the received training sequence, to adapt a threshold or thresholds to allow the discrete levels to be distinguishable from each other. The training sequence T may comprise a plurality of elements at least one of which, in turn, represents each one of the discrete signal levels. The receiver generates a look-up-table to store the adapted thresholds.
    Type: Grant
    Filed: September 10, 1996
    Date of Patent: July 25, 2000
    Assignee: British Telecommunications public limited company
    Inventor: Andrew Peter Heron
  • Patent number: 6084904
    Abstract: A method of adjusting a power control setpoint threshold (216) in a wireless communication system is provided. The method includes the steps of receiving at a receiver, a communication signal from a mobile communication unit to form a received communication signal, generating a first signal quality indicator (193) based on the received communication signal, generating a second signal quality indicator (194) based on the received communication signal, and generating an estimated signal-to-noise ratio (98). The method further includes setting a predetermined reference region (605) centered around a second signal quality indicator reference (206) where the second signal quality indicator reference (206) is related to the first signal quality indicator (193), and adjusting the power control setpoint threshold (216) based on a comparison between the second quality indicator (194) and the predetermined reference region (605).
    Type: Grant
    Filed: July 25, 1997
    Date of Patent: July 4, 2000
    Assignee: Motorola, Inc.
    Inventors: Michael Mao Wang, Fuyun Ling, Robert T. Love, Lee Michael Proctor
  • Patent number: 6081362
    Abstract: An optical receiver can operate in response to an input optical signal to produce an output electrical signal. The optical receiver comprises a photo diode (340) for transducing the input optical signal into an electrical signal, a plurality of limit amplifier circuits (310-1, 310-2, . . . , and 310-n) which are connected in series which are connected in series to one another and which have offset compensation functions determined by controllable offset compensation time constants, respectively. The plurality of limit amplifier circuits amplify the electrical signal to produce an amplified and controlled electrical signal in dependency upon the offset compensation time constants controlled. The optical receiver further comprises adjusting circuits (320-1, 320-2, . . .
    Type: Grant
    Filed: October 17, 1997
    Date of Patent: June 27, 2000
    Assignee: NEC Corporation
    Inventors: Ichiro Hatakeyama, Takeshi Nagahori
  • Patent number: 6055279
    Abstract: A DC coupled burst mode optical receiver circuit having improved sensitivity and improved dynamic range. The output of the receiver's photodiode is single endedly amplified by a main preamplifier and the main preamplifier's output is then converted, using an operational amplifier, e.g., with a gain of 1, to a differential signal which swings symmetrically around a threshold level. More specifically, the output of the main preamplifier is connected to one input of the operational amplifier. The output of a tracking preamplifier, which is identical to the main preamplifier, is coupled to the other input of the operational amplifier. The output of the tracking preamplifier is used to match the DC voltage of the main preamplifier, e.g., by being noise-free and by tracking changes in supply voltage, temperature, and the like. It is used to set the DC reference voltage for the standard operational amplifier functions.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: April 25, 2000
    Assignee: Lucent Technologies Inc.
    Inventor: Yusuke Ota
  • Patent number: 6047032
    Abstract: In a digital communication system, analog equalization and data recovery are provided with non-linear digital feedback at the receiver, to overcome frequency domain distortion imposed by the communications channel. Digital information from the clock and data recovery circuit is non-linearly filtered and then fed back so as to modulate the threshold of a slicer which receives the signal which has been analog equalized. Thereby any shortcomings in the equalization, slicer, or clock and data recovery are overcome by adjusting the slicer threshold at each clock cycle in response to the recovered clock and data signals.
    Type: Grant
    Filed: November 7, 1997
    Date of Patent: April 4, 2000
    Assignee: Integrated Circuit Systems, Inc.
    Inventors: Anthony E. Zortea, Todd A. Wey
  • Patent number: 6047031
    Abstract: An error correction circuit compensates for baseline wander which can occur when a data signal is passed through a DC isolation stage. The data signal, and its inverse are compared with a common reference level, and the error signal modifies the charge on a capacitor which forms part of a pair of negative feedback loop to control the baseline level.
    Type: Grant
    Filed: March 31, 1997
    Date of Patent: April 4, 2000
    Assignee: Mitel Semiconductor Limited
    Inventors: Stephen Allott, Craig M Taylor
  • Patent number: 6041084
    Abstract: A slicer circuit receives a binary signal to be sliced at the midpoint of its amplitude with the portions of the sliced signal above the slicing level corresponding to a binary 1 and the portions below corresponding to a binary 0. The slicer has a fixed threshold level for slicing and a variable offset voltage is combined with the voltage level of the received binary signal to maintain the mid-point of the binary signal applied to the slicer at the slicer fixed threshold slicing level, which preferably is at a zero voltage level.
    Type: Grant
    Filed: August 15, 1997
    Date of Patent: March 21, 2000
    Assignee: Lucent Technologies, Inc.
    Inventor: Krishnaswamy Nagaraj
  • Patent number: 6040719
    Abstract: The present invention provides an input receiver that slows the signal fluctuation by limiting the amount of electrical currents flowing through the input receiver. The limiting of electrical current flowing through the input receiver slows the input signal of the receiver which in effect filters out some level of glitches of an input signal. In one embodiment, the input receiver is constructed and implemented in a structure similar to a differential amplifier for a single interface. In another embodiment, the input receiver is constructed and implemented in a modified differential amplifier for a single interface. In a further embodiment, the input receiver is constructed and implemented in a modified differential amplifier for multiple interfaces.
    Type: Grant
    Filed: March 17, 1998
    Date of Patent: March 21, 2000
    Assignee: Vanguard International Semiconductor Corporation
    Inventor: Jeffrey S. Earl
  • Patent number: 6038049
    Abstract: In an infrared data-receiving circuit wherein an output electric current of a photodiode is current-to-voltage converted by a preamplifier and, after having been amplified by an amplification circuit, is subjected to a waveform-shaping operation in a comparator by using a predetermined threshold value, the threshold voltage, upon receipt of a low signal voltage, is set at the average value Vav that has been formed by two LPFs and, upon receipt of a high signal voltage, is also set at a shift value that has been obtained by allowing the voltage, which has been generated by shifting of a level shift circuit, to be sampled by a peak-hold circuit constituted of a differential amplifier. Thus, the apparatus is allowed to deal with a wide dynamic range. Moreover, in this arrangement, a single capacitor may be commonly used for an integrating operation in the LPFs and for a holding operation in the peak-hold circuit so as to provide a simple construction that is preferably applied to an integrated circuit.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: March 14, 2000
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Takayuki Shimizu, Naruichi Yokogawa
  • Patent number: 6038266
    Abstract: The invention is a receiver front end for a data communications system having adaptive correction for intersymbol interference, DC offset, baseline wander, and flat loss and related method. Each of the compensation circuits is adaptive and is controlled by adaptation logic via a digital feedback loop including a digital integrator for providing perfect or near-perfect integration of the adaptation algorithm feedback error signal. The architecture further utilizes multiple comparators, including continuous-time and clocked comparators, for separately detecting various aspects of the received data signals that are used to determine the signal degradation characteristics needed to generate error signals for the adaptation feedback loops.
    Type: Grant
    Filed: September 30, 1998
    Date of Patent: March 14, 2000
    Assignee: Lucent Technologies, Inc.
    Inventors: Kathleen Otis Lee, Robert Henry Leonowich, Ayal Shoval
  • Patent number: 6028898
    Abstract: The invention seeks to provide an improved, bandwidth-efficient method and apparatus for acquiring and tracking bursts of data, or continuous data, of varying and unpredictable amplitude, extinction ratio, and phase.The system avoids the use of digital signal processing which is not practical at high data signal rates. The system also obviates encoding of the data signal using a line code, thereby extending the existing technology to give a significant increase in data throughput for the same available bandwidth.The system may treat acquisition of each data burst, comprising alternate synchronisation parts and data parts, ab initio.
    Type: Grant
    Filed: April 24, 1997
    Date of Patent: February 22, 2000
    Assignee: Nortel Networks Corporation
    Inventors: Adrian Paul Sparks, Piers James Geoffrey Dawe, Robert William Spagnoletti
  • Patent number: 6018550
    Abstract: A system and method for the superimposition of differential signals on binary signals. The technique can be performed on busses, and in many kinds of storage media. It can be accomplished in many ways depending on the noise that is to be tolerated, and depending on the sophistication of the encoding means.
    Type: Grant
    Filed: May 28, 1998
    Date of Patent: January 25, 2000
    Assignee: International Business Machines Corporation
    Inventors: Philip George Emma, Rajiv Vasant Joshi, William Robert Reohr