Abstract: In a radio reception apparatus, a judgement unit judges inter-transmission users. A controller specifies the number of inter-transmission users in accordance with the judgement result. The controller calculates a power value of a received signal per one person of inter-transmission user from both of a power value of the received signal and the number of inter-transmission users. The controller estimates a power value in the case where all the members of inter-communication users come into inter-transmission users from both of the calculated power value and the number of inter-communication users.

Abstract: Demodulating a DPSK encoded data signal. The received signal has a symbol tracking value determined in a synchronization circuit. Doppler error in the signal is estimated. The signal, the symbol tracking value, and the estimated Doppler error are applied to a demodulator within which the signal is multiplied by a signal at a frequency which is the negative of the estimated Doppler error to remove that Doppler error. The resulting signal is filtered and decimated and normalized to generate the arctangent of the in-phase and quadrature components of the baseband signal. This arctangent signal is stripped of phase angle modulation and applied through loops to remove derivatives of the input phase signal. The arctangent and the resulting angles are mapped in a nearest neighbor map circuit, and the difference between successive angles is applied to a gray code to binary mapping circuit which detects the encoded data.

Abstract: A demodulator arrangement, suitable to demodulate data symbols modulated in accordance with a predefined constellation diagram and sent as part of information bursts (A1, B1, C1, D1, A2, B2, C2, D2) over a transmission medium with substantially stable attenuation characteristics, detects the amplitude of the data symbols in a coherent way and detects the phase of the data symbols in a differential way.

Abstract: Receiver module and receiver formed from several cascaded modules. The module comprises inputs (E1, E2, E3, E4) and outputs (S1, S2, S3, S4) connected to selection means (44), to switching means (45) and to decoding means (46, 58, 60). Such modules can be cascaded by simply connecting the corresponding inputs and outputs. The final module delivers the transmitted information. Application to differential phase modulation and orthogonal modulation spread spectrum digital transmission.

Abstract: An image reject mixer arrangement 1 comprises a transconductor 2, first and second mixer cores 3 and 4, first and second phase shifters 5 and 6 and a summer or combiner 7. The mixer arrangement 1 receives a single-ended RF voltage signal on a terminal 8, a differential local oscillator signal on I-LO terminals indicated at 9 and a 90° phase shifted differential local oscillator signal on Q-LO terminals 10, and provides differential IF output signals on output terminals 11. From the output of the transconductor 2 to the output of the combiner 7, the image reject mixer arrangement 1 carries signals in what can be described as a “current mode”, i.e. it is the current, not the voltage, which conveys the desired signal. In this current mode, it is advantageous to provide each active circuit block with a high output impedance and a low input impedance wherever possible.

Abstract: A method of distributed loop control is described. The method includes receiving at a service unit downstream control and telephony information modulated on orthogonal carriers in a first frequency bandwidth over a distribution network. The method further includes transmitting from the service unit upstream telephony information and control data modulated on orthogonal carriers in a second frequency bandwidth over the distribution network. In addition, the method includes adjusting at least one local transmission characteristic when an adjustment command from a head end terminal is received in the downstream control data. The downstream control data is based on prior upstream transmissions from the service unit.

Abstract: A system for communicating signals between a transmitter and a receiver using digital modulation techniques is provided. This invention is particularly adapted to meet the requirements of power line communication. In one preferred embodiment of this invention the modulation technique is differential binary phase shift key modulation. This system provides a low cost, simple delay and multiply process for the modulation and demodulation of data. This system lends itself to an ASIC implementation, thereby further reducing the cost of the system while improving the reliability of the system in a noisy environment.

Abstract: A simplified method for sampling timing adjustment and frequency offset estimation in a TDMA cellular PCS environment using &pgr;/4 - shifted DQPSK comprises the steps of oversampling a received signal resulting from transmission of sequences of complex-valued symbols at a rate N times the symbol rate thereof so as to produce N sets of samples, comparing for each set of samples the differential phase angle between successively received complex-valued symbols, and determining which set of the N sets of samples has differential phase angles closest to ideal values to thereby obtain an optimal sampling timing. The differential phase angles are measured by multiplying a complex conjugate of a received complex-valued symbol and a succeeding symbol to produce a comparison vector having an angle equal to the differential phase angle between the received complex-valued symbol and the succeeding symbol. The differential phase angles are optionally rotated so that the angle thereof is between 0° and 90°.

Abstract: A system for and method of modulating and demodulating a communication signal using differential quadrature phase shift keying (DQPSK) can include, upon receiving an inbound communication signal, demodulating the inbound communication signal by obtaining Pi/4 differential quadrature phase shift keying (DQPSK) symbols, translating the Pi/4 DQPSK symbols into quadrature phase shift keying (QPSK) symbols, and mapping the QPSK symbols to a pair of bits. Upon initiating an outbound communication signal, the system and method can include modulating the outbound communication signal by obtaining communication bits indicative of the outbound communication signal, translating the communication bits to three communication bits, and mapping the translated bits to DQPSK symbols.

Abstract: A method of determining an integral portion of a carrier offset &Dgr;fc of an RF signal transmitted from a transmitter at a transmit carrier frequency fct and an apparatus for carrying out the method. The signal consists of at least two data symbols S1 and S2, each having a useful part preceded by a cyclic prefix containing a tail portion of the useful part, such that in the time domain the useful part occupies a symbol interval Ts and the cyclic prefix occupies a guard interval Tg. The carrier offset &Dgr;fc between a receive carrier frequency fcr and the transmit carrier frequency fct is calculated in the form of an integral multiple of the inverse 1/Ts of the symbol interval. The method is especially useful in application to data symbols which are multiplexed by the orthogonal frequency division multiplexing (OFDM) and are constructed from sub-symbols ck belonging to a 2m-ary constellation of complex values equally spaced in phase, such as phase-shift keyed (PSK) constellations, e.g.

Abstract: An orthogonal frequency division multiplexed wideband communication system provides improved time and frequency synchronization by inserting an unevenly spaced pilot sequence within the constellation data. A receive correlates the received data using the unevenly spaced pilot sequence. The pilot sequence is generated with a maximum length pseudo random noise code and inserted into frequency bins having prime numbers.

Abstract: A tangent angle computation device and associated DQPSK decoder. The computation device uses an eight-bit divider and a four-quadrant technique for finding a quantized angular value from an incoming signal. The quantized angular value is subsequently used to decode the incoming signal.

Abstract: A method for phase encoding DPSK and N-PSK which maintains phase continuity and which does not require any reference symbols when using N-PSK. A sequence of known DPSK phases are encoded with respect to an initial phase. The N-PSK phases are then all offset by this same initial phase. The known DPSK phases can be used at a receiver to determine a sum consisting of the initial phase and any further phase shift introduced by the channel, and this sum is used to decode the unknown N-PSK phases. The method is more generally applicable to any case where a switch between a phase encoding method which requires an absolute phase reference and a phase encoding method which does not have an absolute phase reference is to be implemented on a single carrier or channel.

Abstract: A system for and a method of demodulating a received VHF radio frequency signal, for example on an aircraft, the radio frequency signal including a baseband signal with differential phase shift keying encoded data, to obtain the encoded data. The signal is received by a signal receiver (20), and a symbol tracking select value is determined in a symbol synchronization circuit (22). Doppler error in the received signal is estimated in a Doppler estimator (24). The received signal, the symbol tracking select value, and the estimated Doppler error are applied to a symbol demodulator (32) within which the received signal is multiplied in a multiplier (42) by a signal at a frequency which is the negative of the estimated Doppler error to remove that Doppler error. The resulting signal is filtered and decimated by a decimating low pass filter (48) and normalized by a signal generator (52) which generates the arctangent of the in-phase and quadrature components of the baseband signal.

Abstract: A differential detection receiver with a reduced power consumption is provided by simplifying constituent circuits of the differential detection receiver. An arctangent calculator is realized without using an multiplier or a conversion table. Without using a D/A converter, a level adjusting circuit for adjusting the absolute value of a vector (Ax, Ay) given as input signals Ax and Ay so as to make it one. The power consumption of a differential detection demodulator is reduced by eliminating power consuming circuits such as a multiplier and a large conversion table from the system. There are disclosed some embodiments.

Abstract: A receiver for receiving an analog signal that is digitally modulated using differential binary phase shift keying (DBPSK) and demodulated by a quadrature demodulator into two signals. The receiver converts the two signals into two digital signals using 2-bit analog-to-digital converters. Samples of these digital signals are then encoded according to a maximum likelihood criteria algorithm and decisions are made based on the signal constellation, which identifies the original data transmitted.

Abstract: A differential detector generates, for each symbol, a phase difference between phase information received from a phase detector and one-symbol-delayed phase information of the received phase information. The one-symbol-delayed phase information is transferred to a differential detector, which generates, for each symbol, a phase difference between the one-symbol-delayed phase information and two-symbol-delayed phase information. The generated phase differences are fed to another differential circuit, which in turn generates, for each symbol, a difference between both received phase differences to produce phase-difference difference information. A clock regenerator circuit extracts symbol timing from the phase-difference difference information and regenerates clock signals synchronizing with the extracted symbol timing.

Abstract: A system is disclosed for providing communication across a wireless network. The system includes a transmitter transmitting a modulated signal across a radio channel, wherein the transmitter includes first input means for receiving a primary data signal to be transmitted, second input means for receiving a secondary data signal to be transmitted, a combiner associated with the first and second input means for combining the primary and secondary data signals, and a modulator receiving the combined primary and secondary data signals from the combiner and sequentially developing a modulated signal including a string of phase values with each phase value containing information relative to both the primary and secondary data signals. The system also includes a receiver for receiving the modulated signal, wherein the receiver includes means for separating the received modulated signal into primary and secondary phase values representative of the primary and secondary data signals.

Abstract: According to the present invention a method and a receiver for high-frequency signals is provided. The receiver comprises a power divider (4) to divide a modulated RF input signal in at least two branches. At least one delay line (5, 6) provides for a delay of the branches relatively to each other by a predetermined delay constant. A calculation circuit (7, 8) calculates at least three power levels based on combinations (12, 13, 14) of the two branches of the input signal relatively delayed (5, 6) to each other. A processing means (10) calculates the phase and the amplitude of a complex signal representing the relation between the two branches of the input signal relatively delayed to each other, on the basis of the said at least three power levels (8). The invention therefore provides for a direct 6-port receiver based on non-coherent detection. The concept of the invention is inherently cheap and features high integration ability and low-cost processes.

Abstract: A differential detector produces, for each symbol, a phase difference from a difference between phase information received from a phase detector and one-symbol-delayed phase information of the received phase information to deliver the phase difference to a differential circuit and a phase corrector. The one-symbol-delayed phase information is supplied to another differential detector, which produces, for each symbol, a phase difference from a difference between the one-symbol-delayed phase information and two-symbol-delayed phase information of the received phase information. The phase difference is fed to the differential circuit, which produces, for each symbol, phase-difference difference information from a difference between both of the received phase differences.

Abstract: A method of coding information for transmission over a communication channel involves differentially coding selected bits of an input sequence with respect to bits of a previous input symbol to generate a transmit sequence comprising a plurality of transmit symbols. The differential coding method can be used in combination with unequal error protection and interleaving to protect bits during transmission.

Abstract: A receive integrated circuit for a mobile telephone comprising a variable gain amplifier for amplifying a received signal with a variable gain, a low-pass filter for attenuating harmonic components of the signal amplifier by the variable gain amplifier, and a QPSK demodulator for demodulating by quadri-phase shift keying the signal having passed through the low-pass filter, wherein signal lines interconnecting the variable gain amplifier, the low-pass filter and the quadri-phase shift keying demodulator are balanced.

Abstract: Apparatus and methods for adaptively, reliably, and accurately measuring the frequency of an alerting or other signaling tone. A tone detector measures the frequency of a tone (continuous or pulsed) with a high degree of accuracy (e.g., to within 1 part in 10,000). Two lower order or smaller DFTs measure the energy level in two separate but intersecting frequency ranges. A simple ratio is determined from the relative energy measured from discrete Fourier transforms relating to each of the two separate frequency ranges, and an actual measured frequency is determined.

Abstract: Disclosed is a delay detection demodulation system which has: a plurality of receiving systems; a plurality of instantaneous phase detecting circuits for detecting an instantaneous phase from the output of each of the plurality of receiving systems; a plurality of phase difference operating circuits for determining a phase difference in one symbol section from the output of each of the plurality of instantaneous phase detecting circuits; a combining circuit for combining the outputs of the plurality of operating circuits; a delay detection circuit for conducting error diffusion type delay detection after the combining of the combining circuit; and a demodulation logical circuit for conducting demodulation logical operation.

Abstract: A phase detector using simple arithmetic operations to measure phase errors in the carrier-recovery mechanism for a DQPSK digital communications receiver. The carrier-recovery mechanism is a feedback loop that provides a synchronization between the oscillators in the transmitter and receiver of the communications system; the phase detector measures deviations from this synchronization and generates a phase-error signal used in the feedback loop to synchronize the oscillators. To perform this measurement, the phase detector takes the received signal as input and compares it against a local oscillator in the receiver to generate two digital signals: the in-phase (I) and quadrature-phase (Q) components of the received signal. These signals are the input to a logic unit, which uses these two signals to determine the phase-error signal.

Abstract: A multi-path demodulator is provided for a mobile radiotelephone that includes a maximum likelihood sequence estimator in parallel with a symbol-by-symbol detector to demodulate the received signals. In a preferred embodiment, an adaptive equalizer is used in a dual-path demodulator in parallel with a differential detector. As each frame of data is demodulated, a determination is made from channel decoder information from each path about which demodulated bit stream to use (e.g., from either the estimator or detector). The performance of the demodulator is thus optimized for both non-time-dispersive and time-dispersive radio signals.

Abstract: A method and apparatus for receiving and reconstitution an input digital data signal representing a sequence of values. The input data signal is oversampled at a plurality of times during each of the values. These samples are stored storing in a known order in a sequence of latches as they are received. The sequences of latches stores the samples corresponding to each of the values. The difference in phase between the input digital data signal and a reference signal forms a digital phase signal. This digital phase signal is decoding, preferably by detecting adjacent digital phase signals in the sequence that differ. The location within the sequence of latches corresponding to an edge in the waveform of the input digital data signal is detected. The method and apparatus, selects on of the samples of the waveform from a regions remote from the detected edges.

Abstract: A method and a system for detecting a user signal in a CDMA network. (Coded) user message bits are grouped into successive groups. A differential phase is generated for each message bit group by mapping each message bit group on to a predetermined PSK constellation. An absolute phase is generated for each message bit group based on the differential phase for the current message bit group and the absolute phase for the preceding message bit group. The absolute phase signal is phase keyed to an RF carrier to form an RF signal. The RF signal is spread using two code sequences and the spread RF signal is transmitted. At the receiver, the RF signal is received and non-coherently demodulated. The demodulated RF signal is despread using the code sequences. Successive blocks of the demodulated, despread RF signal are phase compared for extracting the differential phase signal carrying the (coded) user message. Lastly, the user message is recovered.

Abstract: A differential detector imparted with error correcting function for detecting a differentially phase shifted signal while performing error correction includes a one-symbol differential detector for performing phase comparison between a current input signal and a signal preceding by one symbol, a delay circuit for delaying a one-symbol differential detection signal by two symbol periods, a two-symbol differential detector for performing phase comparison between the current input signal and an input signal preceding by two symbol periods, a four-symbol differential detector for performing phase comparison between the current input signal and an input signal preceding by four symbol periods, and two error correction circuits.

Abstract: Various modem designs are described, along with systems that use the modem designs for communicating data between a large number of remote locations and one or more central locations preferably over CATV. One aspect features a modem having a transmitter which uses a state machine and digital waveform signals stored in a memory to create a modulated signal. Another aspect features a modem having a receiver which uses a digital correlator including an SRAM for detecting a bipolar phase shift keyed signal. Still another aspect features a modem comprising an oscillator circuit having a feedback loop, wherein the feedback loop utilizes a downlink signal, and a protection circuit which prevents a malfunction in the modem from causing system-wide shutdown.

Abstract: A differential detection receiver with a reduced power consumption is provided by simplifying constituent circuits of the differential detection receiver. An arctangent calculator is realized without using a multiplier of a conversion table. Without using a D/A converter, a level adjusting circuit for adjusting the absolute value of a vector (Ax, Ay) given as input signals Ax and Ay so as to make it one. The power consumption of a differential detection demodulator is reduced by eliminating power consuming circuits such as a multiplier and a large conversion table from the system.

Abstract: A digital communication system having a transmitter and a receiver. The receiver transmits a radio-frequency (RF) signal that is continuous phase modulated by digital data. The receiver having a converter, a differential detector, and a sequential decoder. The receiver receives the RF signal. The RF signal is converted into a baseband signal by the converter. The baseband signal is received by the differential detector wherein the continuous phase modulation of the baseband signal is detected. The detected signal is received and the digital data is decoded by the sequential decoder. The sequential decoder has a Viterbi decoder to compensate for intersymbol interference caused by the differential detector. The Viterbi decoder performs reduced Viterbi decoding utilizing a feedback loop (FB) for reducing computing inaccuracies due to the reduction of the number of trellis states.

Abstract: A differentially phase shift keyed demodulator for use in an interrogator of a remote intelligent communication system. The demodulator includes a quadrature combiner delaying one of the quadrature signals and thereafter combining the delayed and undelayed signals along with a FIR matched filter, which filters the combiner output whereby the differentially phase shift keyed data on a sub-carrier can be demodulated using a simple delay and multiplying scheme in response to the filtered output.

Abstract: A method of transmitting and receiving a differential self-clocking data stream. The communications link comprises the coding of information signals onto two signal wires using two logic levels on each wire for a total of four possible coding symbols. The four symbols are utilized to encode data and control-states in both electrically differential and common mode manner upon the two signal wires. The coding sequence is chosen so as to facilitate the communications of binary data and control signals along with demarcation of each successive bit boundary by utilizing the consecutive symbol sequences which are nonrepetitive.

Abstract: A data receiver for transmitting data by changing the data into transmitted frames and by phase-modulating the data in a digital manner has a demodulation circuit for demodulating a phase-modulated signal by sync detection, a conversion circuit for converting the phase of an output from the demodulation circuit into a correct phase, and a sync detection circuit for detecting sync data of the transmitted frames from an output from the conversion circuit and for controlling the conversion circuit on the basis of a sync data undetected condition.

Abstract: A receiver configured to measure phase change (.DELTA..phi.) in a signal transmitted from a microwave signal source, such as a cell site for cellular telephones, the transmitted signal including a carrier signal (F.sub.1) added to a modulation signal (F.sub.MOD), the receiver providing the phase change measurement (.DELTA..phi.) without further reference to the modulation signal (F.sub.MOD). Utilizing (.DELTA..phi.), distance from the transmitter can be calculated. The receiver includes one or more mixers for receiving the transmitted signal from the cell site and downconverting relative to an intermediate frequency signal (F.sub.IF) to produce an IF mixed signal including a sum IF mixed signal (F.sub.IF +F.sub.MOD) and a difference IF mixed signal (F.sub.IF -F.sub.MOD). The receiver then further includes components to demodulate the IF mixed signal to provide the modulated signal (F.sub.MOD) and the phase change measurement (.DELTA..phi.) with tracking of the intermediate frequency signal (F.sub.IF).

Abstract: A robust encoding and decoding system of the present invention for communicating binary information using angular modulation system is disclosed. Binary information to be transmitted is data words consisting of 8 data bits, a parity bit, and two additional coding bits at the end of the data word. A transmitter transmits the data words using a binary phase-shift keying (BPSK) modulated signal. The receiver compares the phase of incoming BPSK modulated signal against a local reference signal and records the phase characteristics of the BPSK signal. The receiver also records the amplitude of the recovered data signal. The receiver demodulates and decodes the BPSK signal using a rotating frame of reference that tracks the current phase of the recovered data signal. The receiver tests the parity bit of each word to detect errors. If an error is detected, the receiver attempts to correct the error using the record phase and amplitude information.

Abstract: A differential detecting apparatus includes samplers 1 and 2, differential detection calculating unit 3, and two post-detection filters 4 and 5. Differential detection calculating unit 3 performs a differential detection with time-division multiplexing on data output from these samplers and alternately outputs a data sequence of a part of cosine component of the phase difference of the modulated signal and a data sequence of the rest of the cosine component. Differential detection calculating unit 3 also alternately outputs a data sequence of a part of sine component of the phase difference and a data sequence of the rest of the sine component. Each of post-detection filters 4 and 5 includes linear interpolating filter 35 and integral filter 36 which are connected in series. The linear interpolating filter 35 obtains a moving average from successive three pieces of input data weighted by 1:2:1 and the integral filter 36 obtains an integral value from successive k pieces of input data.

Abstract: This invention is a method for detecting received signal sequences of a communication system transmitting differentially encoded MPSK (Multiple Phase Shift Keying) signal sequences. This invention uses previously received signal samples and previously decided data phases to generate a phase reference for the current operation of detecting the received signal sample. The phase reference can be easily generated by a recursive form.

Abstract: For decoding a diphase-coded signal the signal level is sampled with a sample signal of frequency equal to that of the bit clock pulse and each sample value is logically linked to the preceding sample value in accordance with an XOR function. This is preferably done by means of a microcontroller using interrupt routines for the sampling. The method is particularly advantageously applicable to transponder systems, for example contactless identification systems, the coding signal being modulated by the transponder onto a carrier signal; both the bit clock pulse and the sample signal of equal frequency thereto can be obtained by frequency division of the carrier signal.

Abstract: The circuit has two parallel channels for the processing of two components in phase (I) and in quadrature (Q). Each channel has filtering means (50(I)) and delay means (60(I)). The circuit also incorporates a multiplication circuit (70), an integration circuit (80) and a programming circuit (90). Several circuits of this type can be connected in cascade.

Abstract: A reduced complexity maximum likelihood multiple symbol differential detector which utilizes a maximum likelihood sequence estimation of the transmitted phase and does so by expanding the observation window to observe the received symbol over N signal intervals and making a simultaneous decision on N-1 symbols. The phase of the received signal is calculated up front and thus the detector requires only real subtractions and real additions as opposed to complex multiplications and additions. Furthermore, the detector does not sacrifice performance over conventional prior art detectors.

Abstract: A data transmission system in which an on/off keyed (OOK) AM/DPSK modulated data signal with an on/off ratio exceeding about 80 dB which has been modulated on a carrier is received at a compact, easily fabricated and battery powered data receiver which operates without automatic gain control and which includes a double loop antenna (diameter of about two inches) with a trimmer capacitor center tapped to the antenna for providing a conjugate impedance match between the antenna and a low noise amplifier. In the receiver, a square-law detection AM demodulator for demodulating the amplified signal is in a bipolar silicon IC, and a DPSK data detector for decoding the demodulated signal is in a separate digital CMOS IC.

Abstract: A digital radiocommunication receiver includes a demodulation device for a one-symbol unit for detecting a received signal in a unit of one symbol and for outputting a received bit sequence. The demodulation device includes a maximum likelihood sequence estimation for outputting a received bit sequence from a received signal sequence concerning a plurality of symbols. A sync word detecting device determines the detection or nondetection of a sync word from the received bit sequence outputted from the demodulating device for a one-symbol unit. A timing of the bit sequence is made to coincide with a timing of the bit sequence outputted from the demodulating device involving the maximum likelihood sequence estimation. A synchronization controlling device determines a timing of a received frame and controls, as required, a transmission timing using information on the sync word detection.

Abstract: A method of estimating signal quality in a radio demodulator receiving an input stream of symbols includes the steps of sampling a phase-only portion of each of the symbols in the input stream, determining a phase error for each of the samples of the phase-only portions, and calculating a signal quality estimate from a plurality of the sample phase errors. The signal quality estimate may be an average magnitude of a predetermined number of sample phase errors. The input stream may be symbols in the preamble, or symbols in the data signal that follows.

Abstract: A signal adding device and a differential signal detecting device, wherein the signal adding device adds n input signals using n A/D converters, a selector and a lowpass filter. The n input signals are sampled in sequence by the A/D converter and digitized. Each digitized data is time-division multiplexed by the selector and input to the lowpass filter. The output of the lowpass filter is equal to an added signal of n input signals. The differential signal detecting device detects from inphase and quadrature-phase baseband signals the sine and cosine components of a phase difference at two instants of the phase-modulated signal. Two A/D converters digitize and convert the inphase and quadrature-phase baseband signals to inphase data and quadrature-phase data at predetermined intervals. A cosine component calculating unit calculates the cosine component by alternately selecting the inphase data and the quadrature-phase data.

Abstract: A decoding apparatus (200) decodes a coherent, differentially encoded multi-level phase shift keying (DEPSK) modulated signal. A coherent receiver (101) receives and, subsequently, outputs the coherent DEPSK modulated signal to a metric computer (201). The metric computer (201) generates a soft decision metric .LAMBDA.(s(n)) corresponding to the coherent DEPSK modulated signal which is outputted to a forward error correction (FEC) decoder (107). The FEC decoder (107) decodes the coherent DEPSK modulated signal in accordance with the soft derision metric .LAMBDA.(s(n)) corresponding to the coherent DEPSK modulated signal.

Abstract: A control unit (102) efficiently decodes burst signal transmissions in a TDMA-based telecommunication system (100) by decimating down the number of samples requiring processing during symbol detection. The control unit (102) includes a sampling receiver (304) that inputs burst signals from cable access units, converts them to a pair of baseband quadrature signals, I and Q. The sampling receiver (304) also includes an A/D converter (314) that samples the I and Q signals at preferably four times the symbol rate. A digital signal processor circuit (306) produces a timing error signal for substantially all of the samples. The digital processor circuit (306) also accumulates a timing error sum for each of the four samples. The processor circuit (306) selects the optimum sample as the sample between the samples having the largest positive and negative error sums. The processor circuit (306) also includes a .pi./4-DQPSK differential detector that processes the optimum sample of each symbol for symbol detection.

Abstract: An instantaneous phase detecting circuit for detecting the phase of a digital phase modulation wave signal which includes first and second logic circuits, first and second phase detecting circuits, and a third logic circuit. The first and second logic circuits receive the modulation wave signal, the first logic circuit receives a first carrier signal, and the second logic circuit receives a second carrier signal, the phase of the second carrier signal being delayed by a fixed period with respect to the phase of the first carrier signal. The first and second logic circuits generate first and second arithmetic outputs which are received by the first and second phase detecting circuits which detect the phases of the first and second arithmetic outputs to generate first and second detection output signals respectively.

Abstract: Frame synchronization for data transmitted using quadrature amplitude modulation is achieved by providing that one symbol per frame is chosen from a larger signal point constellation than the remaining symbols. Thus, bits are assembled into groups of unequal size to control the mapping between the data and the signal points. Where constellations having a number of points not equal to a power of two, these may be coded in groups; or the data may be converted into a mixed-base number the bases of which correspond to the number of points in the respective constellations.