Plural Phase (>2) Patents (Class 375/332)
  • Patent number: 7903760
    Abstract: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.
    Type: Grant
    Filed: October 8, 2004
    Date of Patent: March 8, 2011
    Assignee: Sony Corporation
    Inventors: Kazuji Sasaki, Masaya Takano
  • Patent number: 7844011
    Abstract: An apparatus and method for improving a symbol error rate of an M-ary phase shift keying (M-PSK) system having a quadrature error are provided. The apparatus includes: a conversion parameter detector that detects a conversion parameter and converts a symbol decision region using the quadrature error and at least one pair of first received symbols; and a converter & determiner converting a pair of second received symbols using the detected conversion parameter, and determining a transmission symbol according to a symbol of the converted pair of second received symbols. An increase in a symbol error rate due to the quadrature error can be prevented and the quadrature error can be easily estimated.
    Type: Grant
    Filed: November 2, 2006
    Date of Patent: November 30, 2010
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung Keun Park, Jin A Park, Pyung Dong Cho, Hyeong Ho Lee
  • Patent number: 7831215
    Abstract: Embodiments of methods, transceiver circuits, and systems can compensate an IQ mismatch (e.g., Tx or Rx) or a carrier leakage using a plurality of local oscillators. One embodiment of a transceiver can include a first up-conversion IQ mixer, a second up-conversion IQ mixer, a first down-conversion IQ mixer with an input to receive an output of the second up-conversion IQ mixer, a second down-conversion IQ mixer with an input to receive an output of the first up-conversion IQ mixer, a first local oscillator to generate a first IQ LO signal for the first up-conversion IQ mixer and the first down-conversion IQ mixer, and a second local oscillator to generate a second IQ LO signal for the second up-conversion IQ mixer and the second down-conversion IQ mixer.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: November 9, 2010
    Assignee: GCT Research, Inc.
    Inventors: Joonbae Park, Kyeongho Lee
  • Patent number: 7826565
    Abstract: A multiple stage band pass filter of a Radio Frequency (RF) Integrated Circuit is provided with a low pass mixer output filter coupled to receive a down sampled analog information signal, a buffer coupled to an output of the low pass mixer output filter, a low pass buffer output filter coupled to an output of the buffer and a plurality of band pass filters coupled to an output of the low pass buffer output filter.
    Type: Grant
    Filed: May 12, 2009
    Date of Patent: November 2, 2010
    Assignee: Broadcom Corporation
    Inventors: Qiang (Tom) Li, Hooman Darabi
  • Patent number: 7809088
    Abstract: A multiphase receiver to compensate for intersymbol interference in the sampling of an input signal includes a first integrating receiver to integrate and sample data of the input signal on a first phase of a clock and a second integrating receiver to integrate and sample data of the input signal on a second phase of the clock. The multiphase receiver also includes an equalization circuit to adjust integration by the first integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the first integrating receiver, and to adjust integration by the second integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the second integrating receiver.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: October 5, 2010
    Assignee: Rambus Inc.
    Inventors: Jared L. Zerbe, Bruno W. Garlepp, Pak S. Chau, Kevin S. Donnelly, Mark A. Horowitz, Stefanos Sidiropoulos, Billy W. Garrett, Jr., Carl W. Werner
  • Patent number: 7809083
    Abstract: A differential receiver which provides for estimation and tracking of frequency offset, together with compensation for the frequency offset. Estimation and tracking of the frequency offset is undertaken in the phase domain, which reduces computational complexity and allows frequency offset estimation and tracking to be accomplished by sharing already-existing components in the receiver. Compensation for the frequency offset can be performed either in the time domain, before differential detection, or in the phase domain, after demodulation, or can be made programmably selectable, for flexibility.
    Type: Grant
    Filed: August 8, 2006
    Date of Patent: October 5, 2010
    Assignee: Marvell International Ltd.
    Inventors: Songping Wu, Hui-Ling Lou
  • Patent number: 7792223
    Abstract: Method and system for demodulating data signals. According to an embodiment, the present invention provides a method for demodulating data signals. The method includes a step for receiving modulated data over a medium. The modulated data represents a plurality of bits, which includes at least a first bit. For example, the first bit is modulated by a number of modulation processes using a sequence of modulation symbols, and each of the sequence of modulation symbols is selected from a first plurality of modulation symbols. The method also includes a step for processing information associated with the first plurality of modulation symbols and the number of modulation processes. Also, the method includes a step for determining a plurality of sequences of modulation symbols based on at least information associated with the first plurality of modulation symbols and the number of modulation processes.
    Type: Grant
    Filed: March 24, 2007
    Date of Patent: September 7, 2010
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Shaoming Li
  • Patent number: 7787528
    Abstract: Disclosed is a semiconductor IC device using a low-price oscillator, which is capable of bidirectional communication with a host and features a low price. In bidirectional communication between a host and a device, the device comprises a synchronization establishment unit, a frequency difference detector, a frequency generator, and an oscillator providing a reference signal. The synchronization establishment unit to which an output signal from the host is inputted outputs a received signal, a synchronization establishment signal and a reception data. The frequency difference detector detects a frequency difference between a received signal and a transmitting signal, and outputs a frequency coordination signal to the frequency generator. The number of frequency division of the frequency generator is controlled by the frequency coordination signal, and the frequency generator is capable of matching the frequency of the transmitting signal which is an output signal with the frequency of the received signal.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: August 31, 2010
    Assignee: Renesas Technology Corp.
    Inventors: Takashi Kawamoto, Tomoaki Takahashi, Shinya Kikuchi, Yoshimi Ishida, Hiromitsu Nishio
  • Patent number: 7778361
    Abstract: A method and apparatus for decoding digital quadrature phase shift keying data includes converting and intermediate frequency signal from an analog signal to a digital signal and digitally processing the digital signal to detect and decode the digital quadrature phase shift keying and extract encoded data.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: August 17, 2010
    Assignee: Texas Instruments Incorporated
    Inventors: Steven R. Jahnke, Mikio Takano
  • Patent number: 7778344
    Abstract: A system for combining a plurality of signals of various phases having a wide frequency range includes a signal transmuter configured to receive a plurality of input signals of different phases. The signal transmuter is also configured to generate at least one output signal based on one or more of the input signals. The system also includes at least one switch configured to receive a control signal and operable to selectively couple at least one associated capacitor to the at least one output signal. The coupling is such that the capacitor is coupled to the at least one output signal when the switch is closed. The control signal is set to substantially reduce the saturation of the at least one output signal.
    Type: Grant
    Filed: May 25, 2006
    Date of Patent: August 17, 2010
    Assignee: Fujitsu Limited
    Inventor: Weixin Gai
  • Patent number: 7769112
    Abstract: A method (1300) is provided for generating one or more waveforms (130, 140). The method includes: generating a first toggle signal (1130, 1330) in response to a clock signal (1110), the first toggle signal having one of a first positive shape, a null shape, and a first negative shape for each cycle of the clock signal; multiplying the first toggle signal by a first coefficient signal to create a first intermediate signal (1440); generating a second toggle signal (1140, 1330) in response to the clock signal, the second toggle signal having one of a second positive shape, the null shape, and a second negative shape for each cycle of the clock signal; multiplying the second toggle signal by a second coefficient signal to create a second intermediate signal (1440); and generating a first output signal (1170) by adding the first intermediate signal and the second intermediate signal together (1350).
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: August 3, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventor: John W. McCorkle
  • Patent number: 7769118
    Abstract: The present invention is related to a method and apparatus for blindly equalizing received signals in the time domain based on independent component analysis (ICA). Received signals are demodulated and over-sampled by a rate at least twice the symbol rate to populate a mixing matrix. The received signal samples are cast into the form of a signal separation problem as represented by the multiplication of the mixing matrix with the transmitted symbols such that the unknowns can be solved by ICA. Applying ICA to the received signal samples provides a de-mixing matrix which can be multiplied by the received signal samples to estimate the transmitted symbol sequence. The proposed ICA-based equalization method simultaneously corrects other transmission imperfections, such as DC-offset, carrier phase offset and in-phase and quadrature imbalance, all in the time domain. As an alternative to over-sampling, multiple copies of the received signals are received via a plurality of antennas.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: August 3, 2010
    Assignee: InterDigital Technolgy Corporation
    Inventor: Afshin Haghighat
  • Patent number: 7751503
    Abstract: Embodiments of the invention consist in a method of carrier synchronization, comprising determining a frequency offset estimate from a rate of change of a phase difference between a local oscillator signal and a carrier signal of a received signal; and adjusting a frequency of the local oscillator signal by the frequency offset estimate.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: July 6, 2010
    Assignee: Jennic Limited
    Inventors: Ivan Lawrow, Stephen Bate
  • Patent number: 7711073
    Abstract: The invention relates to a method and a circuit arrangement for determining the carrier frequency difference during the demodulating of received symbols (P1, P2) in the complex phase space (I, Q; R, ?) of a quadrature modulation method (QAM), wherein to determine the frequency the received symbols are compared with symbols (S1, S2) at nominal positions in the complex signal space. In order to make the determination independent of a rotation of the coordinate system of the received signals with respect to the coordinate system of the symbols, it is proposed to determine the angle (?(P1, P2)) between two received signal values (P1, P2) and compare it to possible nominal angles of the quadrature modulation method. An angle deviation between the determined angle of the received signal values and the nominal angle can be used as a direct measure of a frequency deviation (?f).
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: May 4, 2010
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Christian Bock, Carsten Noeske
  • Publication number: 20100098192
    Abstract: A system and method are provided for generating bit log likelihood ratio (LLR) values for two-layered Quadrature Phase-Shift Keying (QPSK) turbo decoding in a wireless communications user terminal (UT). The method includes receiving a two-layered QPSK signal with an energy ratio that is unknown, but typically defined as either k12 or k22. The method selects a mismatched energy ratio (k2) between k12 and k22, and generating bit LLR values for two-layered QPSK turbo decoding, using the mismatched k2 energy ratio. For example, if the received two-layered QPSK signal is known to have an energy ratio of about 4 or about 6.25. Then, k2 is selected to be about 5.0625. Alternately stated, the mismatched k2 energy ratio in selected by determining the approximate midpoint between k12 and k22.
    Type: Application
    Filed: December 23, 2009
    Publication date: April 22, 2010
    Applicant: QUALCOMM Incorporated
    Inventors: Fuyun Ling, Seong Taek Chung, Jinxia Bai, Thomas Sun
  • Publication number: 20100098193
    Abstract: A receiver supports a single carrier (SC) form of modulation and a multi-carrier form of modulation such as orthogonal frequency division multiplexing (OFDM). Upon receiving a signal, the receiver determines a maximum fluctuation range (MFR) as a function of at least a fourth-order cumulant of a received signal; and classifies a modulation type of the received signal as a function of the determined maximum fluctuation range. After determining the modulation type of the received signal, the receiver switches to that modulation mode to recover data from the received signal.
    Type: Application
    Filed: March 16, 2007
    Publication date: April 22, 2010
    Inventors: Peng Liu, Li Zou
  • Patent number: 7693242
    Abstract: Methods (1500) and corresponding systems (400, 500) for determining and correcting a DC offset in a receiver operate to sample (1503) a signal to provide complex samples; estimate (1505) a Direct Current (DC) offset corresponding to each of the complex samples, the estimating the DC offset further including solving a plurality of equations relating to the plurality of complex samples, e.g., N simultaneous equations in N samples with a power of the signal invariant across the N samples, to deterministically derive offset values; and then remove (1517) the DC offset from the signal.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: April 6, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Charles L. Sobchak, Mahibur Rahman
  • Patent number: 7689189
    Abstract: A method and circuit for receiving a radio frequency signal by receiving and amplifying the radio frequency signal to produce a received signal and generating first and second clock signals corresponding to first and second channel signals, respectively, of the received signal and multiplying the received signal with the clock signals to obtain the channel signals. Pre-selectivity filtering of the received signal is performed by filtering the first channel using a first impedance, filtering the second channel using a second impedance, and converting the first and second impedances with respect to one another through a first gyrator. Amplitude limiting of the first and second channels is performed to obtain first and second amplitude limited channels. Poly-phase selectivity filtering of the first and second amplitude limited channels is performed to obtain first and second selectivity filtered channels. The selectivity filtered channels are demodulated to obtain a data signal.
    Type: Grant
    Filed: April 6, 2006
    Date of Patent: March 30, 2010
    Assignee: Silicon Laboratories Inc.
    Inventor: Hendricus C. De Ruijter
  • Patent number: 7675998
    Abstract: The invention relates to a method for determining the sampling instant of a clock signal (ti) for a circuit for determining symbols (Se) from a digitized signal (sd, S) which is coupled to at least one quadrature signal pair of a modulation method (QAM), wherein the digitized signal is converted to polar signal coordinates (R, ?) with a radial component (R).
    Type: Grant
    Filed: April 22, 2005
    Date of Patent: March 9, 2010
    Assignee: Trident Microsystems (Far East) Ltd.
    Inventors: Christian Bock, Franz-Otto Witte, Carsten Noeske
  • Patent number: 7672411
    Abstract: A radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: March 2, 2010
    Inventors: Morgan James Colmer, Martin John Brennan
  • Patent number: 7660368
    Abstract: A system and method are provided for generating bit log likelihood ratio (LLR) values for two-layered Quadrature Phase-Shift Keying (QPSK) turbo decoding in a wireless communications user terminal (UT). The method includes receiving a two-layered QPSK signal with an energy ratio that is unknown, but typically defined as either k12 or k22. The method selects a mismatched energy ratio (k2) between k12 and k22, and generating bit LLR values for two-layered QPSK turbo decoding, using the mismatched k2 energy ratio. For example, if the received two-layered QPSK signal is known to have an energy ratio of about 4 or about 6.25. Then, k2 is selected to be about 5.0625. Alternately stated, the mismatched k2 energy ratio in selected by determining the approximate midpoint between k12 and k22.
    Type: Grant
    Filed: January 11, 2006
    Date of Patent: February 9, 2010
    Assignee: QUALCOMM Incorporated
    Inventors: Fuyun Ling, Seong Taek Chung, Jinxia Bai, Thomas Sun
  • Patent number: 7660369
    Abstract: In a radio-controlled device for measuring time, a demodulating unit demodulates the time information from the received electric signal based on amplitude information of the target radio wave. The amplitude information is obtained from in-phase and quadrature-phase components of the target radio wave. A phase calculator calculates phase data associated with a phase of the target radio wave based on the in-phase and quadrature-phase components. A variability calculator calculates a variability of the phase data of the target radio wave relative to a reference phase. The reference phase changes at a constant rate in time according to a frequency error. The frequency error is contained in the reference signal relative to a frequency of the target carrier wave. A reception determining unit determines whether reception of the radio-controlled device is good based on the calculated variability.
    Type: Grant
    Filed: January 30, 2007
    Date of Patent: February 9, 2010
    Assignee: DENSO CORPORATION
    Inventors: Takamoto Watanabe, Sumio Masuda
  • Patent number: 7643581
    Abstract: A system comprises a decoder that generates user data based on a received symbol sequence. The decoder comprises a slicer that generates constellation points in a signal constellation of the received symbol sequence based on in-phase and quadrature components of a demodulated symbol sequence. The demodulated symbol sequence is based on the received symbol sequence. The decoder derotates the signal constellation based on the received symbol sequence and a conjugate of a channel response of the system.
    Type: Grant
    Filed: May 7, 2008
    Date of Patent: January 5, 2010
    Assignee: Marvell International Ltd.
    Inventors: Hui-Ling Lou, Kok-Wui Cheong
  • Publication number: 20090296858
    Abstract: A DEM (dynamic element matching) system in which a digital signal is inputted, has a switching circuit which, being equipped with a plurality of switches, each of the plurality of switches is subjected to on/off control based on a switch control signal, receives a first thermometer code in which the total number of logic ones and logic zeros corresponding to the digital signal is “n” and outputs a second thermometer code in which the total number of logic ones and logic zeros is “n” (where “n” is an integer equal to or larger than 2), a latch circuit which latches the second thermometer code output from the switching circuit and outputs the second thermometer code, and a switch control signal generating circuit which generates the switch control signal using the digital signal or the second thermometer code output from the latch circuit and outputs the switch control signal.
    Type: Application
    Filed: September 5, 2008
    Publication date: December 3, 2009
    Inventors: Mai NOZAWA, Takeshi UENO, Masanori FURUTA
  • Patent number: 7613253
    Abstract: A method of demodulating digital data using M'ary QAM has been disclosed, comprising the steps of detecting a complex symbol vector D, establishing within which reference symbol boundaries the detected symbol vector D falls, the given reference symbol boundaries being associated with a complex reference vector R. Quadrature components (E_I and E_Q) of an error vector (E) constituting the difference between the detected vector D and the associated reference vector R are found and an error control signal (E?) as feed back signal in the demodulation stage is approximated. The influence of thermal noise in the receiver stage has been limited by a weighting and/or by noise balancing.
    Type: Grant
    Filed: July 3, 2002
    Date of Patent: November 3, 2009
    Assignee: Telefonaktiebolaget L M Ericsson (PUBL)
    Inventor: Dan Rutger Weinholt
  • Patent number: 7613254
    Abstract: A phase detector that compares the phases of data and four-phase first to fourth clocks having a half rate of the data and being 90° out of phase with one another. Exemplary embodiments of the phase detector include first to fourth sampling circuits that sample the data by the four-phase first to fourth clocks; a first comparator that compares sampling data obtained by sampling according to the adjacent two-phase first and second clocks using the first and second sampling circuits, respectively, and when the sampling data is different, outputs a first up signal; and a second comparator that compares sampling data obtained by sampling according to the adjacent two-phase fourth and first clocks using the fourth and first sampling circuits, respectively, and when the sampling data is different, outputs a first down signal.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: November 3, 2009
    Assignee: Kawasaki Microelectronics, Inc.
    Inventor: Ryuichi Moriizumi
  • Patent number: 7606332
    Abstract: A variable signal delaying circuit comprising an analog delay line having a control input for controlling the variable delay. A phase detector compares the input and output signals of the delaying circuit and supplies an output signal to a charge pump and integrator. A pulse stream generating arrangement produces pulse streams of different pulse widths and pulse control logic controls a selector for selecting any one of the pulse streams. In a first mode of operation, the control logic monitors the charge pump/filter output and selects the pulse stream which minimizes change in the output. The selection is fixed and the output of the charge pump/filter is then supplied as a correction signal to the control input of the analog delay line. Such an arrangement may be used to maintain minimum phase imbalance in I and Q signal paths of a quadrature frequency converter.
    Type: Grant
    Filed: June 8, 2006
    Date of Patent: October 20, 2009
    Assignee: Intel Corporation
    Inventors: Ali Isaac, Nicholas Paul Cowley, David Albert Sawyer
  • Patent number: 7599452
    Abstract: A method and system of improving sensitivity in the demodulation of a received signal over an arbitrary measurement time epoch, the method comprising the steps of: correlating the received signal in a coherent fashion (80); and utilizing a Viterbi phase state keying trellis demodulation with a variable resolution of phase states over 360° to demodulate the radio frequency phase trajectory of the signal throughout the measurement time epoch (70); and the system comprising a receiver for receiving a direct sequence spread spectrum signal, the receiver comprising: an antenna (10) for receiving the direct sequence spread spectrum signal; a downconverter (40) for downconverting the received signal, producing a downconverted signal; an analog to digital converter (60) to convert the downconverted signal to a digital signal; a despreader (80) for despreading and coherently correlating the digital signal to a known signal, creating a despread signal; and a processor (70) for applying a Viterbi algorithm to the despre
    Type: Grant
    Filed: November 27, 2002
    Date of Patent: October 6, 2009
    Assignee: Research In Motion Limited
    Inventor: Jorgen S. Nielsen
  • Publication number: 20090238307
    Abstract: Digitally controlled phase interpolator circuit. A phase selection control word undergoes decoding to generate a switch control word. The phase selection control word includes 2 quadrant indicating bits and phase interpolating bits for a 4 clock scheme (e.g., 4 clocks having phases 0°, 90°, 180°, and 270°). Such a phase selection control word could includes 3 sector indicating bits and phase interpolating bits for an 8 clock scheme (e.g., 8 clocks having phases 0°, 45°, 90°, 135°, 180°, 225°, 270°, and 315°). The gates of a number of differential pairs of transistors receive the various clock signals. A number of switching circuits direct current from corresponding current sources/supplies to coupled sources of the differential pairs of transistors, and an output clock is taken from coupled drains of the differential pairs of transistors. One or more current sources/supplies can be implemented to provide continuous current (e.g., in an always on manner) to the differential pairs of transistors.
    Type: Application
    Filed: March 21, 2008
    Publication date: September 24, 2009
    Applicant: Broadcom Corporation
    Inventor: Ullas Singh
  • Patent number: 7583759
    Abstract: A communications system reduces downconverter inaccuracies in time-domain measurements or samples of received microwave communications I and Q complex signals by converting received signal to baseband taking measurements or samples of the I and Q waveforms at differing phase shifts of a demodulating carrier signal for a local oscillator or carrier tracking loop used during downconversion so that I and Q imbalances may be detected and removed by lowpass equivalent averaging for improved characterization of downconverters or for improved signal reception. In the preferred form, the phase shifts are 0 and ?/2 for a conventional measurement, and then at ?, and ?+?/2, with ?=?/4+m?/2 for an integer m for the second measurement where I and Q imbalances and baseband nonlinearities are indicated by differences between the two measured or sampled signals, where ? provides for optimum error detection for reducing the errors by averaging the measurements.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: September 1, 2009
    Assignee: The Aerospace Corporation
    Inventors: Andrew Alfred Moulthrop, Michael Steven Muha, Christopher Patrick Silva
  • Patent number: 7573943
    Abstract: A DSL or other communication system includes a modem or other communication device having at least one antenna that is configured to collect interference data relating to interference noise affecting communication signals being received by the communication device. The interference may include RF interference, such as AM radio interference, crosstalk and other types of interference from various sources. The interference data collected by the antenna is used by an interference canceller to remove and/or cancel some or all of the interference affecting received signals. In some embodiments of the present invention, more than one antenna may be used, wherein each antenna can collect interference data pertaining to a single source of interference noise. Where a modem or other communication device is coupled to multiple telephone lines, only one of which is being used as the active DSL line, wires in the remaining telephone lines or loops can be used as antennas.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: August 11, 2009
    Assignee: Adaptive Spectrum and Signal Alignment, Inc.
    Inventor: John M. Cioffi
  • Patent number: 7545889
    Abstract: Configuring a multiple stage band pass filter of a radio frequency receiver commences by setting a corner of a low pass mixer output filter that receives a down sampled analog information signal. Operation continues with setting a buffer output filter corner of a low pass buffer output filter coupled to an output of low pass mixer output filter via a buffer. Then, operation includes setting the poles and zero of a plurality of band pass filters coupled to the output of the low pass buffer output filter is performed. This operation includes first setting a zero of a respected band pass filter and then setting the plurality of poles of the band pass filter. Finally, operation concludes with setting a combined gain of the combination of the low pass mixer output filter, the low pass buffer output filter, and the plurality of band pass filters.
    Type: Grant
    Filed: October 26, 2005
    Date of Patent: June 9, 2009
    Assignee: Broadcom Corporation
    Inventors: Qiang Tom Li, Hooman Darabi
  • Patent number: 7529534
    Abstract: A signal converter for converting a start signal into an end signal includes means for copying the start signal to obtain a plurality of copied start signals, wherein a copied start signal may be fed into a processing branch as a branch signal. Further, the signal converter includes a first branch processing means in a first processing branch for processing a first branch signal according to a first processing regulation to obtain a first processed branch signal. Further, the signal converter includes a second branch processing means in a second processing branch for processing a second branch signal according to a second processing regulation to obtain a second processed branch signal, wherein the second processing regulation is different from the first processing regulation and wherein the first processing regulation and the second processing regulation are implemented to cause a low-pass polyphase filtering of the copied start signals.
    Type: Grant
    Filed: December 13, 2005
    Date of Patent: May 5, 2009
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventor: Stefan Koehler
  • Publication number: 20090110119
    Abstract: When a satellite broadcasting receiving device 5 is initially set up, a receivable channel is searched for each satellite. In this search, a wider frequency acquisition range than a frequency acquisition range which is generally used is set for a QPSK demodulation IC 15, while the frequency of a PLL 9 is fixed. Then, in the wider frequency acquisition range, an offset is shifted by a frequency step Fstep? by using a function for setting a frequency offset, the function being included in the QPSK demodulation IC 15. Thus, a signal search is carried out throughout a reception frequency range.
    Type: Application
    Filed: October 23, 2008
    Publication date: April 30, 2009
    Inventor: Hitoshi Ikeda
  • Patent number: 7492835
    Abstract: Synchrodyning apparatus in which a PAM IF signal is mixed with unmodulated carriers nominally at the frequency of the carrier, which unmodulated carriers are in quadrature with respect to each other. E.g., the PAM IF signal may be an intermediate-frequency 8VSB digital television signal. The baseband signals resulting from the mixing procedures are additively combined and differentially combined to generate real and imaginary components of a complex baseband signal. The real component of the complex baseband signal is processed for reproducing the digital signal used to modulate the transmitted RF carrier. An automatic frequency and phase control (AFPC) signal for controlling the oscillator circuitry generating the unmodulated carriers is generated by an AFPC detector responding to the imaginary component of the complex baseband signal or to both components of the complex baseband signal.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: February 17, 2009
    Inventor: Allen LeRoy Limberg
  • Patent number: 7492838
    Abstract: An apparatus for compensating for a phase mismatch in a Quadrature Phase Shift Keying (QPSK) demodulator that includes a phase mismatch extractor module for generating a signal including a phase mismatch function by mixing an I-channel demodulation signal and a Q-channel demodulation signal, which are output signals of a phase shifter, and extracting the phase mismatch function by filtering the generated signal; and a phase mismatch compensator module for digital-converting the phase mismatch function, mapping the digital-converted phase mismatch function to a first compensation signal, generating a second compensation signal by mixing the digital-converted phase mismatch function with a baseband I-channel signal, generating a third compensation signal by adding a baseband Q-channel signal to the second compensation signal, and mixing the first compensation signal with the third compensation signal.
    Type: Grant
    Filed: January 5, 2006
    Date of Patent: February 17, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Tae-Hui Cho
  • Patent number: 7483498
    Abstract: A frequency separating system is described utilising tuneable frequency shifting complex converters in which the centre frequency of the band extracted and the bandwidth extracted can be varied depending upon the parameters chosen by the user. A single output band may contain multiple target carrier signals for separation using fine-tuning shaping filters. The local oscillators provide a stream of coefficient values for multiplying the digital signal sample values to perform part of the frequency extraction operation. These local oscillators may be numerically controlled oscillators with the stream of generated co-efficient values being selected from different sets of such coefficient values depending upon the desired frequency extraction.
    Type: Grant
    Filed: July 1, 2003
    Date of Patent: January 27, 2009
    Assignee: R.F. Engines Limited
    Inventors: John Lillington, Antonio R. Russo
  • Patent number: 7480351
    Abstract: A technique for demodulating secondary data from a hierarchically modulated signal includes a number of steps. A gray coded eight phase shift key (8-PSK) hierarchically modulated signal is received that includes primary data and secondary data. An imaginary portion of the signal is determined and a real portion of the signal is determined. An absolute value of the real portion of the signal may then be subtracted from an absolute value of the imaginary portion of the signal to provide the secondary data. The gray coded 8-PSK hierarchically modulated signal may be a uniform gray coded 8-PSK hierarchically modulated signal or a non-uniform gray coded 8-PSK hierarchically modulated signal.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: January 20, 2009
    Assignee: Delphi Technologies, Inc.
    Inventors: Michael L. Hiatt, Jr., Eric A. DiBiaso, Glenn A. Walker
  • Patent number: 7477708
    Abstract: The method of selecting an optimum mode of operation of the QAM modem comprising (A) using a host interface to select a pair of states, the first state being an initial state; the second state being an intermediate state; and (B) causing a state machine to progress from the initial state to a final state via the intermediate state to optimize the performance of the QAM modem.
    Type: Grant
    Filed: April 15, 2006
    Date of Patent: January 13, 2009
    Assignee: Wideband Semiconductors, Inc.
    Inventors: David Bruce Isaksen, Mark Fong
  • Patent number: 7477879
    Abstract: A transceiver system including a common receiver and transmitter oscillator. The transceiver system may include transmitter circuitry, receiver circuitry, and a first oscillator. The first oscillator may provide a transmit frequency to a mixer in the transmitter circuitry to generate a transmitter RF signal. Furthermore, the first oscillator may also provide the transmit frequency to a first stage mixer in the receiver circuitry to down-convert a receiver RF signal from a receive frequency to an intermediate frequency (IF). The receiver circuitry may include a second oscillator and a second stage mixer. The second oscillator may provide an IF frequency to the second stage mixer to down-convert receiver signals at IF to a lower frequency. The receiver circuitry may filter out transmitter RF feedthrough signals without using a SAW filter. The transmitter circuitry, the receiver circuitry, and the first oscillator may be included in a single IC.
    Type: Grant
    Filed: June 30, 2005
    Date of Patent: January 13, 2009
    Assignee: Silicon Laboratories, Inc.
    Inventors: Ramkishore Ganti, Caiyi Wang
  • Patent number: 7471134
    Abstract: A mixer (114) includes a phase clock generator (404), a latch (420), and a multiplier (118). The phase clock generator (404) provides a plurality of phase clock signals. The latch (420) is coupled to the phase clock generator (404) via a first plurality of conductors (410) and provides a plurality of resynchronized phase clock signals. The multiplier (118) is coupled to the latch (420) via a second plurality of conductors (430) and mixes an input signal using the plurality of resynchronized phase clock signals to provide a mixed output signal. The second plurality of conductors (430) is characterized as having a lower end-to-end impedance than an end-to-end impedance of the first plurality of conductors (410).
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: December 30, 2008
    Assignee: Silicon Laboratories, Inc.
    Inventor: Andrew W. Dornbusch
  • Patent number: 7469022
    Abstract: Methods and apparatuses employing symmetrical phase-shift keying (SPSK) for data modulation and demodulation. Each symbol in a transmission signal carries n-bit information and is transmitted with one of 2n+1 directions. Half directions among the 2n+1 directions are regarded as default directions and the remaining are regarded as complementary directions. Each default direction has a corresponding complementary direction with a phase difference of ? and representing the same n-bit information as the default direction. The phase difference between any two successive symbols after modulation is less than or equal to ?/2.
    Type: Grant
    Filed: November 23, 2004
    Date of Patent: December 23, 2008
    Assignee: Via Technologies, Inc.
    Inventor: Chin Lee
  • Patent number: 7466769
    Abstract: Briefly, a method and apparatus to calculate cross-correlation values of complex binary sequences are provided. The apparatus may include a transformation unit and a cross-correlator. The cross-correlator may include a cross-correlation controller to provide, based on a type bit and a sign bit, a real component and/or an imaginary component of signals of complex binary sequences to a real accumulator and/or to an imaginary accumulator.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: December 16, 2008
    Assignee: Marvell World Trade Ltd.
    Inventors: Kobby Pick, Yona Perets
  • Publication number: 20080240299
    Abstract: In one embodiment, a demapper uses two hybrid-QPSK constellations to demap pairs of equalized data symbols recovered from 16-QAM, DCM OFDM symbols, wherein the equalized data symbols in a pair correspond to the same four-bit group. A first hybrid-QPSK constellation is generated by combining the real components of both 16-QAM mapping constellations onto one coordinate plane. The demapper generates a first set of two decision variables by combining the real components of each equalized data symbol in a pair to correspond to the first hybrid-QPSK coordinate plane. A log-likelihood ratio is then calculated for both decision variables in the set to determine likelihood estimates for the first and second bits of the four-bit group. This process is repeated for the imaginary components of each corresponding pair of equalized data symbols to generate likelihood estimates for the third and fourth bits of the four-bit group.
    Type: Application
    Filed: March 28, 2007
    Publication date: October 2, 2008
    Inventors: Xiaojing Huang, Yunxin Li, Darryn Lowe
  • Patent number: 7411931
    Abstract: The invention is a terminal, system and method for providing inter-frequency and inter-system handovers. A terminal 20? in accordance with the invention includes at least one radio transceiver including P radio receivers and at least one transmitter (16) with P being an integer at least equal to 2. Each radio receiver includes an antenna (41) which receives M encoded data streams. A terminal controller 18 controls the that at least one radio transceiver.
    Type: Grant
    Filed: March 3, 2004
    Date of Patent: August 12, 2008
    Assignee: Nokia Corporation
    Inventors: Harri Holma, Antti Toskala
  • Patent number: 7376208
    Abstract: A decoding method is carried out in a receiver configured to accept format information relating to sequences of input data, to use format information in the decoding of each input sequence, and to issue an acknowledgement signal in the event that an input sequence is successfully decoded. The method involves receiving a format message pertaining to a new input sequence, searching a candidate set of format indices an index best satisfying a criterion for matching to the format message, and selecting the index giving the best match. Before searching, the receiver reads the acknowledgement signals issued in response to the decoding or attempted decoding of recent input sequences. If the acknowledgement signals satisfy an appropriate condition, the search is limited to fewer than all the indices in the candidate set. The format information that corresponds to the selected index is used in decoding the new input sequence.
    Type: Grant
    Filed: May 13, 2004
    Date of Patent: May 20, 2008
    Assignee: Lucent Technologies Inc.
    Inventors: Francis Dominique, Hongwei Kong, Ashok Armen Tikku
  • Publication number: 20080112509
    Abstract: The invention relates to a method for determining the sampling instant of a clock signal (ti) for a circuit for determining symbols (Se) from a digitized signal (sd, S) which is coupled to at least one quadrature signal pair of a modulation method (QAM), wherein the digitized signal is converted to polar signal coordinates (R, ?) with a radial component (R). In order to implement an optimization of the sampling instant independently of the frequency or phase offset of the carrier control on which the symbols depend, it is proposed that the rate-of-occurrence distribution of the signals over the radii, which are assigned to the modulation method within the complex plane, be considered at different sampling phases (?i, ?i2) as the quality value (G, G*), and that the better quality value be selected from among the multiple rate-of-occurrence determinations. The variation of the sampling phase assigned to this value is subsequently employed to correct the sampling clock signal (ti).
    Type: Application
    Filed: April 22, 2005
    Publication date: May 15, 2008
    Inventors: Christian Bock, Franz-Otto Witte, Carsten Noeske
  • Patent number: 7336731
    Abstract: A demodulator with a phase-adjusting function including a detector including a delay detector delaying an input signal in delaying stages using a first clock obtained by frequency-dividing a sampling-clock at a first-ratio to output a delayed modulated signal, the sampling-clock having a predetermined frequency and a predetermined clock number, and a phase-adjustor which, when the stage number of the delaying stages obtained by dividing the predetermined clock number at the first-ratio does not become an integer, delays the input modulated signal using a second clock, the second clock obtained by frequency-dividing the sampling clock at a second-ratio, a ratio between the second-ratio and the first-ratio corresponding to a shortage in a final delaying stage to produce a phase-adjusted modulated signal that has been adjusted to cause the phase of the input modulated signal to coincide with the phase of the delayed modulated signal.
    Type: Grant
    Filed: January 13, 2004
    Date of Patent: February 26, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Kei Marume
  • Patent number: RE40206
    Abstract: At the transmitter side, carrier waves are modulated according to an input signal for producing relevant signal points in a signal space diagram. The input signal is divided into, two, first and second, data streams. The signal points are divided into signal point groups to which data of the first data stream are assigned. Also, data of the second data stream are assigned to the signal points of each signal point group. A difference in the transmission error rate between first and second data streams is developed by shifting the signal points to other positions in the space diagram expressed at least in the polar coordinate system. At the receiver side, the first and/or second data streams can be reconstructed from a received signal. In TV broadcast service, a TV signal is divided by a transmitter into low and high frequency band components which are designated as first and second data streams respectively.
    Type: Grant
    Filed: August 7, 2003
    Date of Patent: April 1, 2008
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Mitsuaki Oshima, Seiji Sakashita
  • Patent number: RE40695
    Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: April 7, 2009
    Assignee: Fujitsu Limited
    Inventors: Takanori Iwamatsu, Hiroyuki Kiyanagi