Abstract: A serial communication system includes a receiver that incorporates an amplitude monitor, which may be used to set and maintain appropriate termination-resistance values and transmit pre-emphasis and receive equalization settings. The amplitude monitor can note the presence or absence of input signals, as is required by some communication standards, such as those that require support for “out-of-band” (OOB) signaling for e.g. rate negotiation. The amplitude monitor compares the input signal with a reference level in response to a sample clock. The sample clock is periodically phase shifted with respect to the incoming data so the amplitude monitor is sure to sample an incoming data eye at or near the peak amplitude over a selected sample period. The amplitude detector notes the detection of an input signal if the input signal surpasses the reference level for any sample phase.

Abstract: Certain aspects of a method and system for RC-CR quadrature generation with wideband coverage and process compensation may include determining an amplitude mismatch between an in-phase (I) component and a quadrature (Q) component of a signal generated in a radio frequency (RF) transmitter or receiver. A variation in resistance of a quadrature network associated with the I component and Q component may be determined. The determined amplitude mismatch and the determined variation in the resistance of the quadrature network may be compensated by adjusting a resistance of a portion of the quadrature network associated with the I component and a resistance of a portion of the quadrature network associated with the Q component.

Abstract: The invention relates to a method and/or a device for determining a constellation from a plurality of possible constellations with a constellation identification device which is used to determine the constellation of the signal from a plurality of possible constellations. This is advantageously achieved when a converter is arranged to convert the signal into polar coordinates provided with a radial component, and to provide a radius as a radial component of the signal, wherein the constellation identification device is constructed so as to determine the constellation of the signal from the radius.

Abstract: A novel and useful apparatus for and method of nonlinear adaptive phase domain equalization for multilevel phase coded demodulators. The invention improves the immunity of phase-modulated signals (PSK) to intersymbol interference (ISI) such as caused by transmitter or receiver impairments, frequency selective channel response filtering, timing offset or carrier frequency offset. The invention uses phase domain signals (r, ?) rather than the classical Cartesian quadrature components (I, Q) and employs a nonlinear adaptive equalizer on the phase domain signal. This results in significantly improved ISI performance which simplifies the design of a digital receiver.

Abstract: A method of generating a phase value representative of a phase of a complex signal that includes an in-phase component and a quadrature-phase component includes determining a first sign for a first value and a second sign for a second value based on a quadrant occupied by the complex signal. The in-phase component is multiplied by the first value with the first sign, thereby generating a first multiplication result. The quadrature-phase component is multiplied by the second value with the second sign, thereby generating a second multiplication result. The first multiplication result, the second multiplication result, and a bias value are added, thereby generating the phase value for the complex signal.

Abstract: A receiver includes a signal input for receiving a differentially-encoded quadrature phase-shift keyed (DEQPSK) communication signal. A demodulator performs bit decisions on a received coherent symbol and bit decisions on a received differential symbol. A processor is operative with the demodulator and scales a soft decision by a factor from 0 to 1 when the results of the bit decisions on the received coherent branch and differential branch are different.

Abstract: Method and apparatus for providing link quality feedback to a transmitter. In one embodiment, a periodic link quality message is transmitted on a gated channel, while continuous differential indicators are transmitted. Between quality messages, the differential indicators track the quality of the link. In one embodiment, a parity check is provided with the quality message. In another embodiment, the frequency of transmission for the quality messages is determined by the channel quality. When the receiver anticipates reception of a transmission, the quality messages are generated; else the quality messages are halted.

Abstract: The present invention provides a low intermediate frequency receiver for receiving radio frequency signal and provides the sampling method thereof. The low intermediate frequency receiver firstly samples the radio frequency signal so as to convert it into digital signal of non-zero frequency domain. Secondly it compensates the digital signal of non-zero frequency domain to filter out the interfering signal therein. Finally, the compensated digital signal is frequency-shifted to the zero frequency domain. By using the low intermediate frequency receiver and the sampling method thereof according to the present invention, the interference at the zero frequency, like DC drift and intermodulation component, could be easily filtered out without imposing any great influence on the useful signals.

Abstract: Embodiments of the present invention provide for adaptive cyclic delay diversity to be used in wireless transmissions to mobile devices. The cyclic delay diversity may be adapted through cyclic delay parameters determined based at least in part on a determined speed of the mobile device. Other embodiments may be described and claimed.

Abstract: A method of automated acquisition of a QAM signal is provided. The method employs a State machine progressing from an initial State to a final State. The State machine comprises: a symbol timing recovery loop; a carrier loop; a coarse frequency loop; and an equalizer. The method comprises: (A) Performing an automatic gain control (AGC) operation on an incoming QAM signal; (B) Performing a symbol timing recovery of an input QAM signal by adjusting a sampling clock of the symbol timing recovery loop; (C) Performing a Blind Equalization of the QAM signal without carrier lock; (D) Performing a carrier recovery of the QAM signal; and (E) Performing a decision directed equalization (DDE) of the QAM signal by updating a set of coefficients of the equalizer by using a decision based algorithm.

Abstract: A wireless communications system including an antenna configured to receive a sequence of symbols through a channel, in which the sequence of symbols comprise bits of user data that have been previously mapped to the sequence of symbols. The wireless communications system further includes a demodulator configured to generate a sequence of demodulated symbols by multiplying the sequence of symbols by a conjugate of a channel response of the channel; a demultiplexer configured to generate an in-phase component and a quadrature component of each demodulated symbol in the sequence of demodulated symbols; a slicer configured to, for each demodulated symbol, generate a decoded symbol by performing a hard decision based on the in-phase component and the quadrature component of the demodulated symbol; and a bit mapping module configured to determine the bits of user data associated with each decoded symbol.

Abstract: A signals reception chain including: an input interface receiving a signal and transforming the received signal into at least two signals correlated in phase or in opposite phase, each of the correlated signals being distributed on at least one channel, the channels being identical, at least one analog-digital converter that operates on 1 bit of the signals in phase or in opposite phase, on each of the channels, and a digital processor for processing the converted signals stemmed from the channels, and performing operations between the converted signals in phase or in opposite phase.

Abstract: A mixer circuit accumulates I signal (digital signal of first channel) having its band limited by low-pass filter and first carrier signal to perform two-phase shift keying modulation thereon. An adder adds fundamental-wave component of bit clock signal BCK into Q signal (digital signal of second channel) having its band limited by the another low-pass filter to obtain a resultant added-up signal. Another mixer circuit accumulates the added-up signal and second carrier signal to perform two-phase shift keying modulation thereon. Output signals of the mixer circuits are input to another adder so that they may be added up to obtain a QPSK signal as a modulated quadrature signal. The QPSK signal contains frequency signals whose frequencies are a sum of bit clock frequency and carrier frequency and a difference between them. When demodulating, the carrier signal and the bit clock signal are reproduced using the frequency signals.

Abstract: An apparatus and method for improving a symbol error rate of an M-ary phase shift keying (M-PSK) system having a quadrature error are provided. The apparatus includes: a conversion parameter detector that detects a conversion parameter and converts a symbol decision region using the quadrature error and at least one pair of first received symbols; and a converter & determiner converting a pair of second received symbols using the detected conversion parameter, and determining a transmission symbol according to a symbol of the converted pair of second received symbols. An increase in a symbol error rate due to the quadrature error can be prevented and the quadrature error can be easily estimated.

Abstract: Embodiments of methods, transceiver circuits, and systems can compensate an IQ mismatch (e.g., Tx or Rx) or a carrier leakage using a plurality of local oscillators. One embodiment of a transceiver can include a first up-conversion IQ mixer, a second up-conversion IQ mixer, a first down-conversion IQ mixer with an input to receive an output of the second up-conversion IQ mixer, a second down-conversion IQ mixer with an input to receive an output of the first up-conversion IQ mixer, a first local oscillator to generate a first IQ LO signal for the first up-conversion IQ mixer and the first down-conversion IQ mixer, and a second local oscillator to generate a second IQ LO signal for the second up-conversion IQ mixer and the second down-conversion IQ mixer.

Abstract: A multiple stage band pass filter of a Radio Frequency (RF) Integrated Circuit is provided with a low pass mixer output filter coupled to receive a down sampled analog information signal, a buffer coupled to an output of the low pass mixer output filter, a low pass buffer output filter coupled to an output of the buffer and a plurality of band pass filters coupled to an output of the low pass buffer output filter.

Abstract: A differential receiver which provides for estimation and tracking of frequency offset, together with compensation for the frequency offset. Estimation and tracking of the frequency offset is undertaken in the phase domain, which reduces computational complexity and allows frequency offset estimation and tracking to be accomplished by sharing already-existing components in the receiver. Compensation for the frequency offset can be performed either in the time domain, before differential detection, or in the phase domain, after demodulation, or can be made programmably selectable, for flexibility.

Abstract: A multiphase receiver to compensate for intersymbol interference in the sampling of an input signal includes a first integrating receiver to integrate and sample data of the input signal on a first phase of a clock and a second integrating receiver to integrate and sample data of the input signal on a second phase of the clock. The multiphase receiver also includes an equalization circuit to adjust integration by the first integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the first integrating receiver, and to adjust integration by the second integrating receiver dependent on a result of integration of data previously received by an integrating receiver distinct from the second integrating receiver.

Abstract: Method and system for demodulating data signals. According to an embodiment, the present invention provides a method for demodulating data signals. The method includes a step for receiving modulated data over a medium. The modulated data represents a plurality of bits, which includes at least a first bit. For example, the first bit is modulated by a number of modulation processes using a sequence of modulation symbols, and each of the sequence of modulation symbols is selected from a first plurality of modulation symbols. The method also includes a step for processing information associated with the first plurality of modulation symbols and the number of modulation processes. Also, the method includes a step for determining a plurality of sequences of modulation symbols based on at least information associated with the first plurality of modulation symbols and the number of modulation processes.

Abstract: Disclosed is a semiconductor IC device using a low-price oscillator, which is capable of bidirectional communication with a host and features a low price. In bidirectional communication between a host and a device, the device comprises a synchronization establishment unit, a frequency difference detector, a frequency generator, and an oscillator providing a reference signal. The synchronization establishment unit to which an output signal from the host is inputted outputs a received signal, a synchronization establishment signal and a reception data. The frequency difference detector detects a frequency difference between a received signal and a transmitting signal, and outputs a frequency coordination signal to the frequency generator. The number of frequency division of the frequency generator is controlled by the frequency coordination signal, and the frequency generator is capable of matching the frequency of the transmitting signal which is an output signal with the frequency of the received signal.

Abstract: A system for combining a plurality of signals of various phases having a wide frequency range includes a signal transmuter configured to receive a plurality of input signals of different phases. The signal transmuter is also configured to generate at least one output signal based on one or more of the input signals. The system also includes at least one switch configured to receive a control signal and operable to selectively couple at least one associated capacitor to the at least one output signal. The coupling is such that the capacitor is coupled to the at least one output signal when the switch is closed. The control signal is set to substantially reduce the saturation of the at least one output signal.

Abstract: A method and apparatus for decoding digital quadrature phase shift keying data includes converting and intermediate frequency signal from an analog signal to a digital signal and digitally processing the digital signal to detect and decode the digital quadrature phase shift keying and extract encoded data.

Abstract: A method (1300) is provided for generating one or more waveforms (130, 140). The method includes: generating a first toggle signal (1130, 1330) in response to a clock signal (1110), the first toggle signal having one of a first positive shape, a null shape, and a first negative shape for each cycle of the clock signal; multiplying the first toggle signal by a first coefficient signal to create a first intermediate signal (1440); generating a second toggle signal (1140, 1330) in response to the clock signal, the second toggle signal having one of a second positive shape, the null shape, and a second negative shape for each cycle of the clock signal; multiplying the second toggle signal by a second coefficient signal to create a second intermediate signal (1440); and generating a first output signal (1170) by adding the first intermediate signal and the second intermediate signal together (1350).

Abstract: The present invention is related to a method and apparatus for blindly equalizing received signals in the time domain based on independent component analysis (ICA). Received signals are demodulated and over-sampled by a rate at least twice the symbol rate to populate a mixing matrix. The received signal samples are cast into the form of a signal separation problem as represented by the multiplication of the mixing matrix with the transmitted symbols such that the unknowns can be solved by ICA. Applying ICA to the received signal samples provides a de-mixing matrix which can be multiplied by the received signal samples to estimate the transmitted symbol sequence. The proposed ICA-based equalization method simultaneously corrects other transmission imperfections, such as DC-offset, carrier phase offset and in-phase and quadrature imbalance, all in the time domain. As an alternative to over-sampling, multiple copies of the received signals are received via a plurality of antennas.

Abstract: Embodiments of the invention consist in a method of carrier synchronization, comprising determining a frequency offset estimate from a rate of change of a phase difference between a local oscillator signal and a carrier signal of a received signal; and adjusting a frequency of the local oscillator signal by the frequency offset estimate.

Abstract: The invention relates to a method and a circuit arrangement for determining the carrier frequency difference during the demodulating of received symbols (P1, P2) in the complex phase space (I, Q; R, ?) of a quadrature modulation method (QAM), wherein to determine the frequency the received symbols are compared with symbols (S1, S2) at nominal positions in the complex signal space. In order to make the determination independent of a rotation of the coordinate system of the received signals with respect to the coordinate system of the symbols, it is proposed to determine the angle (?(P1, P2)) between two received signal values (P1, P2) and compare it to possible nominal angles of the quadrature modulation method. An angle deviation between the determined angle of the received signal values and the nominal angle can be used as a direct measure of a frequency deviation (?f).

Abstract: A system and method are provided for generating bit log likelihood ratio (LLR) values for two-layered Quadrature Phase-Shift Keying (QPSK) turbo decoding in a wireless communications user terminal (UT). The method includes receiving a two-layered QPSK signal with an energy ratio that is unknown, but typically defined as either k12 or k22. The method selects a mismatched energy ratio (k2) between k12 and k22, and generating bit LLR values for two-layered QPSK turbo decoding, using the mismatched k2 energy ratio. For example, if the received two-layered QPSK signal is known to have an energy ratio of about 4 or about 6.25. Then, k2 is selected to be about 5.0625. Alternately stated, the mismatched k2 energy ratio in selected by determining the approximate midpoint between k12 and k22.

Abstract: A receiver supports a single carrier (SC) form of modulation and a multi-carrier form of modulation such as orthogonal frequency division multiplexing (OFDM). Upon receiving a signal, the receiver determines a maximum fluctuation range (MFR) as a function of at least a fourth-order cumulant of a received signal; and classifies a modulation type of the received signal as a function of the determined maximum fluctuation range. After determining the modulation type of the received signal, the receiver switches to that modulation mode to recover data from the received signal.

Abstract: Methods (1500) and corresponding systems (400, 500) for determining and correcting a DC offset in a receiver operate to sample (1503) a signal to provide complex samples; estimate (1505) a Direct Current (DC) offset corresponding to each of the complex samples, the estimating the DC offset further including solving a plurality of equations relating to the plurality of complex samples, e.g., N simultaneous equations in N samples with a power of the signal invariant across the N samples, to deterministically derive offset values; and then remove (1517) the DC offset from the signal.

Abstract: A method and circuit for receiving a radio frequency signal by receiving and amplifying the radio frequency signal to produce a received signal and generating first and second clock signals corresponding to first and second channel signals, respectively, of the received signal and multiplying the received signal with the clock signals to obtain the channel signals. Pre-selectivity filtering of the received signal is performed by filtering the first channel using a first impedance, filtering the second channel using a second impedance, and converting the first and second impedances with respect to one another through a first gyrator. Amplitude limiting of the first and second channels is performed to obtain first and second amplitude limited channels. Poly-phase selectivity filtering of the first and second amplitude limited channels is performed to obtain first and second selectivity filtered channels. The selectivity filtered channels are demodulated to obtain a data signal.

Abstract: The invention relates to a method for determining the sampling instant of a clock signal (ti) for a circuit for determining symbols (Se) from a digitized signal (sd, S) which is coupled to at least one quadrature signal pair of a modulation method (QAM), wherein the digitized signal is converted to polar signal coordinates (R, ?) with a radial component (R).

Abstract: A radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.

Abstract: In a radio-controlled device for measuring time, a demodulating unit demodulates the time information from the received electric signal based on amplitude information of the target radio wave. The amplitude information is obtained from in-phase and quadrature-phase components of the target radio wave. A phase calculator calculates phase data associated with a phase of the target radio wave based on the in-phase and quadrature-phase components. A variability calculator calculates a variability of the phase data of the target radio wave relative to a reference phase. The reference phase changes at a constant rate in time according to a frequency error. The frequency error is contained in the reference signal relative to a frequency of the target carrier wave. A reception determining unit determines whether reception of the radio-controlled device is good based on the calculated variability.

Abstract: A system and method are provided for generating bit log likelihood ratio (LLR) values for two-layered Quadrature Phase-Shift Keying (QPSK) turbo decoding in a wireless communications user terminal (UT). The method includes receiving a two-layered QPSK signal with an energy ratio that is unknown, but typically defined as either k12 or k22. The method selects a mismatched energy ratio (k2) between k12 and k22, and generating bit LLR values for two-layered QPSK turbo decoding, using the mismatched k2 energy ratio. For example, if the received two-layered QPSK signal is known to have an energy ratio of about 4 or about 6.25. Then, k2 is selected to be about 5.0625. Alternately stated, the mismatched k2 energy ratio in selected by determining the approximate midpoint between k12 and k22.

Abstract: A system comprises a decoder that generates user data based on a received symbol sequence. The decoder comprises a slicer that generates constellation points in a signal constellation of the received symbol sequence based on in-phase and quadrature components of a demodulated symbol sequence. The demodulated symbol sequence is based on the received symbol sequence. The decoder derotates the signal constellation based on the received symbol sequence and a conjugate of a channel response of the system.

Abstract: A DEM (dynamic element matching) system in which a digital signal is inputted, has a switching circuit which, being equipped with a plurality of switches, each of the plurality of switches is subjected to on/off control based on a switch control signal, receives a first thermometer code in which the total number of logic ones and logic zeros corresponding to the digital signal is “n” and outputs a second thermometer code in which the total number of logic ones and logic zeros is “n” (where “n” is an integer equal to or larger than 2), a latch circuit which latches the second thermometer code output from the switching circuit and outputs the second thermometer code, and a switch control signal generating circuit which generates the switch control signal using the digital signal or the second thermometer code output from the latch circuit and outputs the switch control signal.

Abstract: A method of demodulating digital data using M'ary QAM has been disclosed, comprising the steps of detecting a complex symbol vector D, establishing within which reference symbol boundaries the detected symbol vector D falls, the given reference symbol boundaries being associated with a complex reference vector R. Quadrature components (E_I and E_Q) of an error vector (E) constituting the difference between the detected vector D and the associated reference vector R are found and an error control signal (E?) as feed back signal in the demodulation stage is approximated. The influence of thermal noise in the receiver stage has been limited by a weighting and/or by noise balancing.

Abstract: A phase detector that compares the phases of data and four-phase first to fourth clocks having a half rate of the data and being 90° out of phase with one another. Exemplary embodiments of the phase detector include first to fourth sampling circuits that sample the data by the four-phase first to fourth clocks; a first comparator that compares sampling data obtained by sampling according to the adjacent two-phase first and second clocks using the first and second sampling circuits, respectively, and when the sampling data is different, outputs a first up signal; and a second comparator that compares sampling data obtained by sampling according to the adjacent two-phase fourth and first clocks using the fourth and first sampling circuits, respectively, and when the sampling data is different, outputs a first down signal.

Abstract: A variable signal delaying circuit comprising an analog delay line having a control input for controlling the variable delay. A phase detector compares the input and output signals of the delaying circuit and supplies an output signal to a charge pump and integrator. A pulse stream generating arrangement produces pulse streams of different pulse widths and pulse control logic controls a selector for selecting any one of the pulse streams. In a first mode of operation, the control logic monitors the charge pump/filter output and selects the pulse stream which minimizes change in the output. The selection is fixed and the output of the charge pump/filter is then supplied as a correction signal to the control input of the analog delay line. Such an arrangement may be used to maintain minimum phase imbalance in I and Q signal paths of a quadrature frequency converter.

Abstract: A method and system of improving sensitivity in the demodulation of a received signal over an arbitrary measurement time epoch, the method comprising the steps of: correlating the received signal in a coherent fashion (80); and utilizing a Viterbi phase state keying trellis demodulation with a variable resolution of phase states over 360° to demodulate the radio frequency phase trajectory of the signal throughout the measurement time epoch (70); and the system comprising a receiver for receiving a direct sequence spread spectrum signal, the receiver comprising: an antenna (10) for receiving the direct sequence spread spectrum signal; a downconverter (40) for downconverting the received signal, producing a downconverted signal; an analog to digital converter (60) to convert the downconverted signal to a digital signal; a despreader (80) for despreading and coherently correlating the digital signal to a known signal, creating a despread signal; and a processor (70) for applying a Viterbi algorithm to the despre

Abstract: Digitally controlled phase interpolator circuit. A phase selection control word undergoes decoding to generate a switch control word. The phase selection control word includes 2 quadrant indicating bits and phase interpolating bits for a 4 clock scheme (e.g., 4 clocks having phases 0°, 90°, 180°, and 270°). Such a phase selection control word could includes 3 sector indicating bits and phase interpolating bits for an 8 clock scheme (e.g., 8 clocks having phases 0°, 45°, 90°, 135°, 180°, 225°, 270°, and 315°). The gates of a number of differential pairs of transistors receive the various clock signals. A number of switching circuits direct current from corresponding current sources/supplies to coupled sources of the differential pairs of transistors, and an output clock is taken from coupled drains of the differential pairs of transistors. One or more current sources/supplies can be implemented to provide continuous current (e.g., in an always on manner) to the differential pairs of transistors.

Abstract: A communications system reduces downconverter inaccuracies in time-domain measurements or samples of received microwave communications I and Q complex signals by converting received signal to baseband taking measurements or samples of the I and Q waveforms at differing phase shifts of a demodulating carrier signal for a local oscillator or carrier tracking loop used during downconversion so that I and Q imbalances may be detected and removed by lowpass equivalent averaging for improved characterization of downconverters or for improved signal reception. In the preferred form, the phase shifts are 0 and ?/2 for a conventional measurement, and then at ?, and ?+?/2, with ?=?/4+m?/2 for an integer m for the second measurement where I and Q imbalances and baseband nonlinearities are indicated by differences between the two measured or sampled signals, where ? provides for optimum error detection for reducing the errors by averaging the measurements.

Abstract: A DSL or other communication system includes a modem or other communication device having at least one antenna that is configured to collect interference data relating to interference noise affecting communication signals being received by the communication device. The interference may include RF interference, such as AM radio interference, crosstalk and other types of interference from various sources. The interference data collected by the antenna is used by an interference canceller to remove and/or cancel some or all of the interference affecting received signals. In some embodiments of the present invention, more than one antenna may be used, wherein each antenna can collect interference data pertaining to a single source of interference noise. Where a modem or other communication device is coupled to multiple telephone lines, only one of which is being used as the active DSL line, wires in the remaining telephone lines or loops can be used as antennas.

Abstract: Configuring a multiple stage band pass filter of a radio frequency receiver commences by setting a corner of a low pass mixer output filter that receives a down sampled analog information signal. Operation continues with setting a buffer output filter corner of a low pass buffer output filter coupled to an output of low pass mixer output filter via a buffer. Then, operation includes setting the poles and zero of a plurality of band pass filters coupled to the output of the low pass buffer output filter is performed. This operation includes first setting a zero of a respected band pass filter and then setting the plurality of poles of the band pass filter. Finally, operation concludes with setting a combined gain of the combination of the low pass mixer output filter, the low pass buffer output filter, and the plurality of band pass filters.

Abstract: A signal converter for converting a start signal into an end signal includes means for copying the start signal to obtain a plurality of copied start signals, wherein a copied start signal may be fed into a processing branch as a branch signal. Further, the signal converter includes a first branch processing means in a first processing branch for processing a first branch signal according to a first processing regulation to obtain a first processed branch signal. Further, the signal converter includes a second branch processing means in a second processing branch for processing a second branch signal according to a second processing regulation to obtain a second processed branch signal, wherein the second processing regulation is different from the first processing regulation and wherein the first processing regulation and the second processing regulation are implemented to cause a low-pass polyphase filtering of the copied start signals.

Abstract: When a satellite broadcasting receiving device 5 is initially set up, a receivable channel is searched for each satellite. In this search, a wider frequency acquisition range than a frequency acquisition range which is generally used is set for a QPSK demodulation IC 15, while the frequency of a PLL 9 is fixed. Then, in the wider frequency acquisition range, an offset is shifted by a frequency step Fstep? by using a function for setting a frequency offset, the function being included in the QPSK demodulation IC 15. Thus, a signal search is carried out throughout a reception frequency range.

Abstract: An apparatus for compensating for a phase mismatch in a Quadrature Phase Shift Keying (QPSK) demodulator that includes a phase mismatch extractor module for generating a signal including a phase mismatch function by mixing an I-channel demodulation signal and a Q-channel demodulation signal, which are output signals of a phase shifter, and extracting the phase mismatch function by filtering the generated signal; and a phase mismatch compensator module for digital-converting the phase mismatch function, mapping the digital-converted phase mismatch function to a first compensation signal, generating a second compensation signal by mixing the digital-converted phase mismatch function with a baseband I-channel signal, generating a third compensation signal by adding a baseband Q-channel signal to the second compensation signal, and mixing the first compensation signal with the third compensation signal.

Abstract: Synchrodyning apparatus in which a PAM IF signal is mixed with unmodulated carriers nominally at the frequency of the carrier, which unmodulated carriers are in quadrature with respect to each other. E.g., the PAM IF signal may be an intermediate-frequency 8VSB digital television signal. The baseband signals resulting from the mixing procedures are additively combined and differentially combined to generate real and imaginary components of a complex baseband signal. The real component of the complex baseband signal is processed for reproducing the digital signal used to modulate the transmitted RF carrier. An automatic frequency and phase control (AFPC) signal for controlling the oscillator circuitry generating the unmodulated carriers is generated by an AFPC detector responding to the imaginary component of the complex baseband signal or to both components of the complex baseband signal.

Abstract: A frequency separating system is described utilising tuneable frequency shifting complex converters in which the centre frequency of the band extracted and the bandwidth extracted can be varied depending upon the parameters chosen by the user. A single output band may contain multiple target carrier signals for separation using fine-tuning shaping filters. The local oscillators provide a stream of coefficient values for multiplying the digital signal sample values to perform part of the frequency extraction operation. These local oscillators may be numerically controlled oscillators with the stream of generated co-efficient values being selected from different sets of such coefficient values depending upon the desired frequency extraction.

Abstract: The present invention relates to a clock phase detecting circuit and a clock regenerating circuit each arranged in a receiving unit of multiplex radio equipment. The receiving unit of the multiplex radio equipment includes an identifying circuit for identifying a signal obtained by demodulating a multilevel orthogonal modulation signal; a clock regenerating circuit for regenerating a signal identification clock for the identifying circuit to supply the clock to the identifying circuit; an equalizing circuit for subjecting the signal obtained by demodulating a multilevel orthogonal modulation signal to an equalizing process. A clock phase detecting unit detects the phase component of the signal identification clock based on signals input to or output from the equalizing circuit and then supplies the phase component to the clock regenerating circuit.