Abstract: Aspects of the disclosure provide a method for detecting marks. The method includes receiving a data signal from a channel. Further, the method includes matching the data signal to a template that corresponds to a predetermined pattern transmitted over the channel to detect marks, prior to decoding the data signal into a decoded bit stream.

Abstract: Systems, methods, and other embodiments associated with preamble detection based on repeated preamble codes are described. According to one embodiment, an apparatus is provided that wirelessly receives a signal and calculates a differential output corresponding to a multiplication of the signal and a delayed version of the signal. A cross correlation is performed between the differential output and a known preamble pattern to produce a cross correlation output. A moving average calculation is performed on the cross correlation output to produce an average cross correlation. One or more peaks are detected in the average cross correlation when the average cross correlation has an amplitude greater than a threshold. When the one or more detected peaks meets predetermined criteria, the apparatus provides information about at least one of the detected peaks for subsequent signal processing.

Abstract: In some embodiments, the inventions includes a transmitter including a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: Certain aspects of a method and system for a delay locked loop for a rake receiver are disclosed. Aspects of one method may include normalizing a signal power of a first control channel based on a threshold value. A sampling time associated with at least one or more of the following: the first control channel, a second control channel, an on-time control channel, and a data channel, may be adjusted based on a comparison between the normalized signal power of the first control channel and a signal power of the second control channel. The second control channel may be delayed with respect to the first control channel by a particular time period. The first and second control channels may be common pilot control channels (CPICHs). The combined signal power of the first control channel may be normalized based on said threshold value.

Abstract: A radio transmission device and a radio communication method employ sequence length decision units which hold a correspondence in which one basic sequence length is set for a plurality of transmission bandwidths. The sequence length decision units acquire transmission bandwidth information and decide a sequence length corresponding to the acquired transmission bandwidth information. A decision is made as to which of the cyclic extension process or the truncation process is to be executed on a Zadoff-Chu sequence according to the sizes of the acquired transmission bandwidth information and the basic sequence length. Then, a difference between the transmission bandwidth and the basic sequence length, i.e., the number of possible cyclic extension/truncation symbols, is obtained.

Abstract: A method of processing first and second corresponding signals having a delay therebetween. The method includes introducing a plurality of different delays between the first and second signals, successive delay amounts differing from each other by less than the interval between chip boundaries, and for each introduced delay, summing samples of the second signal which are obtained at the times of, at least, chip boundaries between bits of the first signal which have the same state, to obtain a value; thereby to obtain a representation of how the value varies according to the introduced delay, which representation contains a level change associated with an introduced delay which bears a predetermined relationship to the delay between the first and second signals.

Abstract: A signal generation system maintains a phase relationship between output signals of first and second signal generators even when the sampling clock frequency is changed. The signal generators are coupled via a communication means including a dedicated cable where the delay amount of the communication means is known and fixed. The first signal generator provides sampling clock, sequence clock and trigger/event signals to the second signal generator and CPUs of the generators share information via the cable. When the frequency of the sampling clock is changed, the CPU of the first or second signal generator calculates the clock number of the frequency changed sampling clock equivalent to the delay amount of the communication means. A delay circuit of the first signal generator 100 delays the waveform data by one sampling clock based on the calculated value for adjusting phase relationship between the waveform data in the signal generators 1.

Abstract: A noise cancellation system has a first transformer with an input side and an output side, the input side having first and second taps coupled to a signal provider, and a center tap providing a first common-mode voltage signal. A first digital subscriber line (xDSL) modem has an input coupled to the output side of the first transformer and an output coupled to customer premises equipment (CPE) for providing an xDSL signal to the CPE. A second transformer has an input side and an output side, the input side having first and second taps coupled to a signal provider, and a center tap providing a second common-mode voltage signal. A second xDSL modem is coupled to the output side of the second transformer. The difference between the first and second common-mode voltage signals is provided to at least one of the first and second xDSL modems to filter out noise from the xDSL signal provided by that modem.

Abstract: A method of establishing communications with a remote receiver (300) that receives data signals (612, 614) from other transmitters is disclosed. The method includes producing a preamble (602) and producing guard bands (800, 802) between the preamble and the data signals. The preamble is transmitted (111) to the remote receiver.

Abstract: A positioning system comprises a plurality of controllers, each controller comprising a wideband receiver and a narrow band transmitter, the each controller configured to receive a wideband positioning frame using the wideband receiver from one or more devices and to transmit acknowledgement frames using the narrow band transmitter that include timing and control data for use by the devices to establish timing for transmission of the positioning frame; and at least one device comprising a wideband transmitter and a narrow band receiver, the device configured to transmit a positioning frame to the plurality of controllers using the wideband transmitter and to receive an acknowledgement frame from one or more controllers using the narrow band receiver, extract timing and control information from the frame, and adjust the timing and synchronization of the wideband transmitter using the timing and control information.

Abstract: A carrier frequency offset (CFO) estimation and synchronization method and apparatus of an orthogonal frequency division multiplexing (OFDM) receiver receiving an OFDM modulated signal. The OFDM receiver's CFO synchronization method includes step (a) performing an initial CFO estimation pull-in step using double correlation, step (b) performing a coarse residue CFO estimate acquisition step using independent combination of the double correlation and auto-correlation, and step (c) performing a small residue CFO tracking step by using the double correlation. Aspects of the invention solves the problems in the related art that a CFO tracking range cannot be reliably used in practice when the CFO tracking range is too narrow and a CFO estimation error increases when the CFO tracking range is too wide.

Abstract: In a signal processing apparatus a synchronizer acquires synchronization with the spreading code of an intermediate frequency signal converted from a signal received from a satellite in a global positioning system. A demodulator then demodulates a message contained in the intermediate frequency signal. A measuring unit outputs a primary signal to a predetermined signal line, the primary signal expressing positioning results for the apparatus as measured on the basis of the demodulated message. A secondary signal output unit attaches a predetermined header to a secondary signal and outputs the result to the predetermined signal line, the secondary signal containing at least the intermediate frequency signal, or a signal generated from the intermediate frequency signal.

Abstract: A data receiver circuit includes: a clock/data recovery circuit to recover a clock and data from a received signal; a fixed pattern generation circuit to generate fixed pattern data; a first selection circuit to select and output one of the fixed pattern data generated by the fixed pattern generation circuit and recovered data recovered by the clock/data recovery circuit; a second selection circuit to select and output one of a reference clock and recovered clock recovered by the clock/data recovery circuit; and a switching circuit to make the first selection circuit output the fixed pattern data and to make the second selection circuit output the reference clock, when an input signal is lost or the clock/data recovery circuit is in a loss-of-lock state.

Abstract: A method and system for reducing power consumption of OFDM (Orthogonal Frequency Division Multiplexing) signal synchronization circuit comprises a sync setting, a sync controller, a sync pipeline and a data corrector. The sync setting dynamically changes correlation data sample rate based on synchronization statuses and results. The sync controller controls and schedules frame and symbol synchronizations, and turns on and off the sync pipeline based on synchronization activities. The sync pipeline integrates frame and symbol synchronization operations, synchronizes receiving signal with scalable synchronization window, synchronization sequence length, synchronization delay and variable data sample rate. Data corrector adjusts input data with coarse timing and fine frequency offsets estimated in sync pipeline, and generates corrected output data for further processing. By using the above techniques, the power consumption of signal synchronization circuit is reduced.

Abstract: A method of achieving reduced modulation range requirement in a Digitally Controlled Oscillator (DCO) which is deployed as part of a DRP (Digital Radio Processor) and tuned to a tuning frequency range having operating-channel center-frequencies, wherein phase difference between consecutive samples is termed as FCW (Frequency Control Word), uses the steps of digitally modifying and limiting the FCW so that the FCW does not exceed known FCW thresholds, e.g., chosen from ?/2, ?/4, ?/8, and redistributing the FCWs while maintaining a cumulative sum of phases and without significant EVM (Error Vector Magnitude) degradation. The FCW threshold can be chosen arbitrarily and need not be in the form of ?/2n. The method uses a FCW limiting algorithm which reduces supply voltage sensitivity of the DCO and enables significant reduction in area of capacitor bank which would be otherwise needed.

Abstract: The present invention relates to a system and method that enable transmission of multiple data packet lines as an optical time-division multiplexed signal. The invention provides a method and system that can synchronize data packet signals to a clock and convert them into return-to-zero signals. When multiple data packet lines are converted, they can be multiplexed together and transmitted according to well-known methods.

Abstract: A circuit and method of operation for a circuit of a radio system in which a system time is divided into symbols, in which a system clock generator is activated in an operating mode, so that the system time is determined from an output clock signal of the system clock generator by counting, in which the system clock generator is deactivated in a sleep mode, in which an output clock signal of a sleep clock generator is blanked as a function of an output signal of a modulo divider in the sleep mode, and the system time is determined by counting, wherein an output frequency of the output clock signal of the sleep clock generator is a non-integer multiple of a symbol frequency, in which the modulo divider divides the output clock signal of the sleep clock generator by a division factor, and in which the division factor of the modulo divider is produced by changing between at least two integer divisor values.

Abstract: Embodiments of methods and apparatus for wirelessly communicating signals include one or more transmitters configured to generate a plurality of wireless signal for transmission. Each of the wireless signals includes a plurality of pilot signals represented in a plurality of unevenly spaced, in-band subcarriers. Pilot signals of each wireless signal are positioned at subcarriers that are orthogonal in frequency with subcarriers at which pilot signals of all other wireless signals are positioned. According to an embodiment, subcarrier indices each the plurality of pilot signals are determined using a third order or higher order polynomial parameterization of pilot subcarriers in conjunction with a convex optimization algorithm to produce pilot signals having near-optimal channel estimate mean square error (MSE) performance. The wireless signals are simultaneously radiated over a wireless communication channel using a plurality of co-located or distributed antennas.

Abstract: A method for generating a preamble of a data unit for transmission via a communication channel includes generating a first field of the preamble using one of a first sequence or a second sequence, such that the first sequence and the second sequence are complementary sequences such that a sum of out-of-phase aperiodic autocorrelation coefficients of the first sequence and the second sequence is zero; generating, using the other one of the first sequence or the second sequence, an indicator of a start of a second field of the preamble, the second field associated with channel estimation information, such that the indicator of the start of the second field immediately follows the first field; and generating the second field of the preamble.

Abstract: An embodiment for wirelessly communicating a signal includes a transmitter combining a plurality of phase shifted input data signals with a plurality of synchronization/pilot sequences to produce a plurality of combined signals, performing frequency domain-to-time domain transformations of the combined signals to produce a plurality of candidate signals, determining peak-to-average ratios for at least some of the plurality of candidate signals, identifying a selected signal from the plurality of candidate signals based on the peak-to-average ratios, and transmitting the selected signal over a wireless communication channel.

Abstract: A passive phase jitter modulation (PJM) tag is charged with power in a continuous wave (CW) section. When receiving a command from a reader, the passive PJM tag must recognize the command and determine exactly when to begin demodulating the command. Only then can the passive PJM tag demodulate the command. To this end, a synchronization apparatus for accurately demodulating a signal input to a PJM tag includes a plurality of correlators correlating a received phase jitter-modulated signal with a template of an internal matched filter which is in the same form as at least a portion of a modified frequency modulation (MFM) flag.

Abstract: A first phase adjustment circuit adjusts phases of a data decision clock signal and a first boundary decision clock signal according to a phase adjustment amount based on an output signal of a data decision circuit and an output signal of a first boundary decision circuit. A second phase adjustment circuit adjusts a phase of a second boundary decision clock signal according to a result of adding the phase adjustment amount and a phase adjustment amount offset. An adaptive equalization control circuit adjusts an equalization coefficient of an equalization circuit according to a data width of an output signal of the equalization circuit based on a logical comparison result between the output signal of the data decision circuit and an output signal of a second boundary decision circuit when the phase adjustment amount offset is changed.

Abstract: Methods and apparatuses for retiming of multirate system for clock period minimization with a polynomial time without sub-optimality. In an embodiment, a normalized factor vector for the nodes of multirate graph is introduced, allowing the formulation of the multirate graph retiming constraints to a form similar to a single rate graph. In an aspect, the retiming constraints are formulated to allowed the usage of linear programming methodology instead of integer linear programming, thus significantly reducing the complexity of the solving algorithm. The present methodology also uses multirate constraints, avoiding unfolding to single rate equivalent, thus avoiding graph size increase. In a preferred embodiment, the parameters of the multirate system are normalized to the normalized factor vector, providing efficient algorithm in term of computational time and memory usage, without any sub-optimality.

Abstract: An intermittent operative communication apparatus can send data, received from a source communication device, to any receiver communication device at a predetermined interval and wait for receiving data at the predetermined interval. The communication apparatus has a selector for selecting one or multiple receiver communication devices as a reference communication device that gives a reference timing at which the communication apparatus waits for receiving data, and a timing controller for setting a timing, at which the communication apparatus waits for receiving data, to a timing according to operation of any reference communication device.

Abstract: Synchronization of satellite and terrestrial broadcasts in a shared frequency arrangement is use in order to facilitate simultaneous reception of the broadcasts. A delay value is adjusted based on a synchronization between a first terrestrial broadcast and a satellite broadcast, and a delay value for a second terrestrial broadcast is adjusted based on a synchronization between the second terrestrial broadcast, the first terrestrial broadcast and the satellite broadcast. The adjustment of the relative delay values provides an improved reception pattern based on receipt of a shared frequency communication from multiple sources by improving a signal quality factor within at least selected regions of the coverage areas in which the relative delay values permit synchronization.

Abstract: An approach is provided for supporting carrier synchronization in a digital broadcast and interactive system. A carrier synchronization module receives one or more signals representing a frame that includes one or more overhead fields (e.g., preamble and optional pilot blocks and one or multiple segments separated by pilot blocks). The module estimates carrier frequency and phase on a segment by segment basis and tracks frequency between segments. Carrier phase of the signal is estimated based upon the overhead field. Estimates carrier phase of random data field are determined based upon the estimated phase values from the overhead fields, and upon both the past and future data signals. Further, the frequency of the signal is estimated based upon the overhead fields and/or the random data field. The above arrangement is particularly suited to a digital satellite broadcast and interactive system.

Abstract: A method and an apparatus for estimating a symbol timing offset in an Orthogonal Frequency Division Multiplexing (OFDM) based communication system are provided. A Carrier to Interference Ratio (CIR) of an Reference Signal (RS) is acquired using received pilot signals. The RS CIR includes power information on channel components of the RS. A CIR of a Secondary Synchronization Channel (S-SCH) is acquired using the received pilot signals. The S-SCH CIR includes power information on channel components of the S-SCH. Unnecessary channel components are suppressed from the RS CIR using the S-SCH CIR. Real channel components of the RS remain. An observation window is set having a predetermined duration for windowing the real channel components of the RS. A first arriving channel component is searched for within the observation window. A start point of data is estimated using the first arriving channel component.

Abstract: A disclosed data processing apparatus includes: a binarization unit binarizing input data based on a threshold voltage; a capture unit capturing data from a binary output binarized by the binarization unit; a duty cycle detection unit detecting a duty cycle of the binary output; and a control unit controlling a level of the input data based on the duty cycle detected by the duty cycle detection unit.

Abstract: An apparatus and method for transmitting/receiving an S-SCH in an Institute of Electrical and Electronics Engineers (IEEE) 802.16m wireless communication system are provided. A method for transmitting, by a transmitter, a Secondary Synchronization CHannel (S-SCH) in a communication system includes generating a sequence depending on a cell IDentification (ID), determining a subcarrier set comprising subcarriers to map the generated sequence, based on a Fast Fourier Transform (FFT) size and a segment ID, and mapping the generated sequence to the subcarriers of the determined subcarrier set.

Abstract: An OFDM transmitter and receiver realizing high-speed cell search and having a reducible circuit scale. An OFDM transmitter includes an SCH inserting section for constructing a frame where a synchronization sequence in a predetermined position from the head of a first sub-frame is arranged and a synchronization sequence composed of the symbols of the former synchronization sequence and the symbols whose I, Q components are interchanged is arranged in a predetermined position from the head of a second sub-frame adjacent in the time-axis direction to the former sub-frame, an IFFT section, a P-SCH conversion section, and an RF transmitting section for transmitting this frame. Thus, the receiving end of the frame can locate the position of either synchronization sequence and determine the frame timing from that position, thereby increasing the speed of the cell search.

Abstract: An effective data sequence based timing error detector (EDS-TED) for baseband transmission system using Tomlinson-Harashima Precoder is disclosed. The EDS-TED extracts timing error information embedded in the received signal to build up autocorrelation between the ESD signals and minimize the mean square error between the received and desired EDS so as to improve the performance of the TED in terms of Peak-to-Peak Jitter and TED gain. Thus the quality of the received signal increases and the error rate decreases.

Abstract: An approach is provided for supporting frame synchronization in a digital broadcast and interactive system. A transmitter includes an encoder that outputs a Low Density Parity Check (LDPC) codeword. The transmitter also includes a framing module generates a LDPC coded frame in response to the LDPC codeword, and appends a physical layer signaling field to the LDPC codeword for specifying modulation and coding information associated with the LDPC coded frame. The physical layer signaling field is encoded with a Forward Error Correction (FEC) code and has an embedded framing structure to assist with frame synchronization. The above arrangement is particularly suited to a digital satellite broadcast system.

Abstract: Apparatus, systems, and methods are provided for transmitting messages over a serial interface. A method comprises receiving a first signal at a first time and receiving a second signal at a second time, the second time being after the first time. If a difference between the second time and the first time is less than a threshold time period, the method comprises generating a first message that is representative of the first signal and the second signal and transmitting the first message over the serial interface. In accordance with one embodiment, the threshold time period is equal to one half of an interface acquisition delay time period associated with the serial interface.

Abstract: A system including a magnitude measuring module, an energy normalization module, and a metric generation module. The magnitude measuring module is configured to measure magnitudes of real portions of differentially demodulated signals, wherein the differentially demodulated signals are generated by differential demodulation of signals received from a base station. The energy normalization module is configured to generate a sum of energies of a plurality of subcarriers included in the signals received from the base station. The metric generation module is configured to generate a plurality of metrics for a plurality of symbols included in the signals received from the base station. The metric generation module is further configured to detect, based on the plurality of metrics, a preamble symbol included in the signals received from the base station.

Abstract: Some embodiments include a transmitter having a cycle encoding circuit to receive a data input signal and to provide a full cycle encoded signal in response thereto by continuously joining portions of different encoding signals. Some of the encoding signals have a different frequency than others of the encoding signals and some of the encoding signals have a different phase than others of the encoding signals. Data is represented in data time segments of the full cycle encoded signal and no data time segment has more than one cycle of an encoding signal. In some embodiments, a receiver receives the cycle encoded signal and recovers data of the data input signal.

Abstract: The invention performs frequency estimation over both the burst preamble, during which known symbols are transmitted, and also during the burst's data packet, which is subsequent to the preamble and extracted by the local detector. During the preamble, an initial frequency estimate is obtained. This estimate is based on a time average of either phase or correlation samples. Atypical phase or correlation samples, attributable to detector symbol errors during the data packet, are detected and filtered, so as to avoid including the atypical samples in a time-averages used to provide the frequency estimate. In a first embodiment correlation samples are time averaged, and atypical correlation samples are suppressed prior to correlation time averaging. In a second embodiment, phase slope values are time averaged, and atypical values of phase slope are suppressed prior to phase slope time averaging.

Abstract: A method of determining a residual frequency offset between a transmitter and a receiver in a transmission of data via a communication channel, is described, wherein the message is transmitted from the transmitter to the receiver via the communication channel and the message comprises at least one short preamble (201), at least one long preamble (202) and user data (203). The at least one long preamble (202) comprises residual frequency offset determination information based on which the residual frequency offset is determined.

Abstract: A high speed transceiver without using an external clock signal and a communication method used by the high speed transceiver which applies a clock recovery circuit including a coarse code generator, a frequency detector, and a linear phase detector to the receiver so as to solve problems such as skew between a reference clock and data that may occur during data transmission and jitter of a recovered clock while an embedded clock method of applying clock information to data is used.

Abstract: An audio receiver's output clock is synchronized based on a number of input and output audio samples measured over a predetermined sample period. In one embodiment, a sample difference may be determined by subtracting the measured number of input audio samples from the measured number of output audio samples. This sample difference may then be compared to a predetermined threshold. In one embodiment, if the absolute value of the sample difference is less than the predetermined threshold, no adjustment to the output clock may be needed. When the absolute value of the sample difference is greater than the predetermined threshold, the output clock rate may be adjusted either upwards or downwards.

Abstract: A method and apparatus for processing a radio frequency (RF) signal is provided. The method includes generating a periodic square wave local oscillator (LO) signal of a first phase, a periodic square wave LO signal of a second phase, and a chopping signal. The method further includes coding the periodic square wave LO signal of the first phase and the periodic square wave LO signal of the second phase synchronously with the chopping signal to generate a first set of synchronized signals (116, 118) and a second set of synchronized signals (120, 122), respectively. A phase difference between the first phase and the second phase is a predefined value. The RF signal is processed with the first set of synchronized signals (116, 118) and the second set of synchronized signals (120, 122) to obtain an in-phase intermediate frequency (IF) signal (132) and a quadrature-phase IF signal (142), respectively.

Abstract: A method and apparatus for time synchronization (TS) method using GPS information in a communication system synchronizing the time of slave nodes, which do not have a GPS receiver, by using GPS information of a node having a GPS receiver. The method includes the steps of extracting 1PPS, TOD, 1PPS_en, and clocks using GPS signals by a grand master node having a GPS receiver, stabilizing the signals, generating a sync message for TS, and transmitting the sync message to a slave node; receiving the sync message by the slave node and conducting a TS operation using OFCC synchronization technology extracting 1PPS, TOD, and 1PPS_en signals using the modified TOD information by the block and delivering to a stabilization block of the slave node for stabilization; and redelivering to the TS block to update TOD information and generate a sync message for TS of a second slave node.

Abstract: Techniques for generating preamble sequences for OFDM and OFDMA communication systems based on CAZAC sequences with desired properties of constant amplitudes (CA) and zero autocorrelation (ZAC). Such preamble sequences may be used for synchronization and identification of individual transmitters. For example, the OFDMA symbol is constructed using a CAZAC sequence in the frequency-domain and the resulting time-domain waveform is a near-CAZAC sequence.

Abstract: An apparatus and method is disclosed for synchronizing a timing signal for a computational system to different reference clock signals without impairing the operation of the computational system. A corresponding “offset” register is provided for each of the reference clock signals (RCS) for storing signal timing differences between the timing signal and RCS. When one of the reference clock signals not used for synchronizing the timing signal, is selected as the signal for synchronizing the timing signal, the corresponding offset register R0 (for the newly selected reference clock signals) retains its last value prior to the switch, and another register R1 stores subsequent signal timing differences between the timing signal and the newly selected reference clock signals.

Abstract: The present invention is a noise tolerant communication protocol device and method where a clock signal input triggers an internal delay clock in an integrated circuit. Data is presented to an input pin and sampled prior to the next external clock pulse based on the internal delay clock. A data pulse value is distinguished by input signal voltage level and not by pulse length. Sampling of data bits is deferred until a signal level is most likely stable, thereby avoiding sampling during periods around edges of changing data values. Therefore, error detection and correction circuitry is not required. A time reference pulse, produced by a bus master, is measured by the protocol device to determine a data transmission rate by the master. The timing of sampling of input signaling from the master is determined by the protocol device from measurement of the time reference pulse magnitude.

Abstract: A synchronization method and related apparatus of an OFDM digital communication system are disclosed for determining a position of a synchronization byte in a received signal. The method includes extracting a transmission parameter signal (TPS) from the received signal, determining a symbol number and a frame number corresponding to a symbol according to the TPS, and determining the position of the synchronization byte according to the frame number and the symbol number.

Abstract: Apparatus and methods for accessing a wireless telecommunications network by transmitting a random access signal. The random access signal includes a random access preamble signal selected from a set of random access preamble signals constructed by cyclically shift selected root CAZAC sequences. The random access signal may be one or more transmission sub-frames in duration, the included random access preamble sequence's length being extended with the signal to provide improved signal detection performance in larger cells and in higher interference environments. The random access signal may include a wide-band pilot signal facilitating base station estimation of up-link frequency response in some situations. Each of the plurality of available random access preamble sequences may be assigned a unique information value. The base station may use the information encoded in the random access preamble to prioritize responses and resource allocations.

Abstract: An embodiment for wirelessly communicating a signal includes a transmitter generating and transmitting a wireless signal over a wireless communication channel. The wireless signal includes a guard band, data represented within a plurality of data-bearing subcarriers, and a plurality of pilot signals represented within a plurality of pilot subcarriers. In an embodiment, the plurality of pilot signals have variable pilot signal parameters selected from a group of parameters that includes pilot power and pilot spacing with respect to adjacent pilots. An embodiment further includes a receiver receiving a channel-affected version of the wireless signal, and producing a corrected signal by applying corrections to the received signal based on estimated channel perturbations within the received signal, where the estimated channel perturbations are determined based on the plurality of pilot signals. The receiver also produces an output data symbol from the corrected signal.

Abstract: A signal processing circuit detects a pulsative change point of an input signal and sets a phase point which is shifted by a predetermined phase difference from the detected pulsative change point of the input signal as the timing for sampling the input signal.

Abstract: An offset determination arrangement includes a comparator device to compare an input signal with a reference value. A synchronization unit is provided to forward a comparison result of the comparator device as a function of a synchronization signal which can be generated by a synchronization clock generator. The synchronization signal includes clock pulses in which at least one clock period between adjacent clock pulses is shorter than a precedent clock period. The offset determination arrangement further includes an approximation unit to generate a compensation signal corresponding to an offset of the input signal as a function of the forwarded comparison result.

Abstract: A radio communication apparatus connected to a device including a digital signal processing unit generating a clock signal, the apparatus includes an acquisition unit acquiring frequency information concerning the clock signal from the digital signal processing unit, a first measurement unit measuring a signal power in a first frequency band, a comparison unit comparing the signal power with a threshold, a first selection unit selecting, from the first frequency band, a second frequency band necessary for data communication, a bandwidth of the first frequency band whose signal power is lower than the threshold being more than a bandwidth of the second frequency band, a second selection unit selecting an optimum communication scheme from a plurality of communication schemes of the data communication according to the frequency information, and a communication unit using the optimum communication scheme to perform the data communication in the second frequency band.