Frequency Or Phase Control Using Synchronizing Signal Patents (Class 375/362)
  • Patent number: 11502812
    Abstract: A system includes a plurality of line cards and a timing card. A clock generation circuit on the timing card generates a clock signal which is pulse width modulated according to information to be transmitted. A clock line supplies the pulse width modulated clock signal to the line cards. The timing card sends a first control word to the plurality of line cards over the clock line after sending a beacon. The first control word includes a size field specifying a first length of first data following the first control word. The timing card sends time of day information over the clock line to the line cards following the first control word. The time of day information may be encrypted. A second control word follows the time of day information. One or more additional control words can follow the second control word before the next beacon.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: November 15, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventor: Vivek Sarda
  • Patent number: 11438114
    Abstract: Different filtered-orthogonal frequency division multiplexing (f-OFDM) frame formats may be used to achieve the spectrum flexibility. F-OFDM waveforms are generated by applying a pulse shaping digital filter to an orthogonal frequency division multiplexed (OFDM) signal. Different frame formats may be used to carry different traffic types as well as to adapt to characteristics of the channel, transmitter, receiver, or serving cell. The different frame formats may utilize different sub-carrier (SC) spacings and/or cyclic prefix (CP) lengths. In some embodiments, the different frame formats also utilize different symbol durations and/or transmission time interval (TTI) lengths.
    Type: Grant
    Filed: July 17, 2020
    Date of Patent: September 6, 2022
    Assignee: Huawei Technologies Co., Ltd.
    Inventors: Kelvin Kar Kin Au, Jianglei Ma, Liqing Zhang
  • Patent number: 11381377
    Abstract: Provided are a data signal detection device, and mobile industry processor interface radio frequency front-end device and system. The device includes: a first acquisition circuit, a second acquisition circuit and a selection output circuit. A first input terminal of the first acquisition circuit is connected to a second input terminal of the second acquisition circuit, and a second input terminal of the first acquisition circuit is connected to a first input terminal of the second acquisition circuit. Output terminals of the first acquisition circuit and the second acquisition circuit are connected to two input terminals of the selection output circuit. The acquisition circuit is configured to verify whether an acquisition signal meets a characteristic of a data signal; and the selection output circuit selects an acquisition signal from a received acquisition signal and a received invalid signal for output.
    Type: Grant
    Filed: August 8, 2019
    Date of Patent: July 5, 2022
    Inventors: Shining Zhu, Yibo Wang
  • Patent number: 11342939
    Abstract: It is proposed to divide data read from a memory into groups and to perform a syndrome calculation iteratively based on each of the individual groups. The syndromes may be calculated by means of random access to the individual groups.
    Type: Grant
    Filed: August 6, 2020
    Date of Patent: May 24, 2022
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Bernd Meyer, Gerd Dirscherl
  • Patent number: 11323191
    Abstract: There is disclosed a method of operating a radio node in a wireless communication network. The method includes communicating using a selected signaling beam from a set of signaling beams, the selected signaling beam being selected based on a delay characteristic and a beam signaling characteristic of the signaling beams of the set of signaling beams. The disclosure also pertains to related devices and methods.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: May 3, 2022
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Joao Vieira, Robert Baldemair, Jung-Fu Cheng, Muris Sarajlic
  • Patent number: 11290250
    Abstract: A line card in a network box receives a SyncE clock signal and an input SYNC signal. A phase-lock loop (PLL) in the line card receives the SyncE clock signal as a reference clock signal and generates an output SyncE clock signal. The line card regenerates a SYSCLK signal using a digitally controlled oscillator that receives a timing signal from the SyncE PLL and receives a control signal from control logic on the line card. The frequency and phase information contained in the SYNC signal is utilized to control the DCO. The SYSCLK signal is divided to generate an output SYNC signal. The control logic uses the time difference between the input SYNC signal and a SYNC feedback signal to control the DCO to provide a zero delay SYNC output signal. The output SYNC signal and the SYSCLK signal control a time of day counter in the line card.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: March 29, 2022
    Assignee: Skyworks Solutions, Inc.
    Inventor: Vivek Sarda
  • Patent number: 11282473
    Abstract: Disclosed are a method and an apparatus for identifying a rising/falling edge and a display panel. The method for identifying a rising/falling edge includes the following steps: acquiring a real-time voltage increment of the current signal; determining whether or not a variation mode of the voltage increment is linear variation; and determining that a rising/falling edge of the current signal reaches at current moment.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: March 22, 2022
    Assignees: HKC Corporation Limited, Chongqing HKC Optoelectronics Technology Co., Ltd.
    Inventor: Mingliang Wang
  • Patent number: 11234200
    Abstract: The present disclosure relates to methods and devices for synchronizing one or more radio devices with a radio access node. A method of providing synchronization with a radio access node for radio communication to one or more radio devices is disclosed. The method comprises or triggers transmitting a configuration message to at least one of the radio devices, where the configuration message is indicative of a synchronization signal configuration for a configurable synchronization signal. The method further comprises or triggers transmitting the configurable synchronization signal to the at least one radio device in accordance with the synchronization signal configuration and communicating one or more decodable signals between the radio access node and the at least one radio device using radio resources in accordance with the configurable synchronization signal. A corresponding method of synchronizing the radio device with the radio access node for radio communication is disclosed.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: January 25, 2022
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Magnus Åström, Johan Bergman, Andreas Höglund, Xingqin Lin, Anders Wallén
  • Patent number: 11219025
    Abstract: Provided in various embodiments are a method by which a D2D terminal transmits a reference signal (RS) for a PDoA in a wireless communication system, and a device therefor. Disclosed are a method by which a D2D terminal transmits a reference signal (RS) for a PDoA, and a device therefor, the method comprising the steps of: determining, on the basis of the maximum value of a difference between indexes of subcarriers of a resource block for the transmission of a reference signal (RS), an index set for RS mapping among preconfigured index sets; mapping the RS to the subcarriers of the resource block having indexes corresponding to each of the indexes included in the index set for the RS mapping; and transmitting the resource block to which the RS is mapped, wherein the preconfigured index sets include indexes in which differences between two pairs of indexes are not the same for each number of indexes.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: January 4, 2022
    Assignee: LG Electronics Inc.
    Inventors: Hyukjin Chae, Myeongjin Kim, Sangrim Lee
  • Patent number: 11160043
    Abstract: Devices including a wireless receiver, e.g., indoor CBSDs, in a local network, e.g. a campus network, monitor for wireless signals conveying synchronization information. Different devices in the local area network may detect wireless signals conveying synchronization information from one or more different sources. A device detecting a source of synchronization information generates and sends a timing signal accuracy report to a switch, e.g. an intelligent IDF switch, included in the local network. The switch receives multiple timing signal accuracy reports, selects a “best” sync source and designates the particular device, e.g., particular CBSD, which reported the best sync source, to be the current master timing device for the local network. The switch communicates the address, e.g., IP address, of the selected master to the devices within the local network.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: October 26, 2021
    Assignee: Charter Communications Operating, LLC
    Inventor: Saran Khalid
  • Patent number: 11133885
    Abstract: A method for assisting in synchronization of slave clocks in a communication network comprises receiving, in a node of the communication network, a message comprising a value of a synchronization accuracy (?rec) of a first upstream node in the communication network. A value of an accuracy (?link) of a link latency unbalance between forward and reverse signalling in a link on which the node received the message is obtained. A value of a total synchronization accuracy (?tot) of the node comprises at least the accuracy (?link) of the link latency unbalance of the link on which the node received the message is calculated. A node for assisting in synchronization of slave clocks in a communication network is also presented.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: September 28, 2021
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Stefan Andersson
  • Patent number: 11070350
    Abstract: An electronic device includes processing circuitry outputting first to third signals, delaying first to third signals to output fourth to sixth signals, generating a pulse signal based on the fourth signal, the fifth signal, and the sixth signal, detecting lengths of intervals, and adjusting at least one of a first code, a second code, and a third code based on fourth codes.
    Type: Grant
    Filed: August 11, 2020
    Date of Patent: July 20, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Woongki Min
  • Patent number: 10944616
    Abstract: The present invention provides a method for estimating a sampling frequency offset of a receiver supporting ATSC 3.0 standard is disclosed. The method includes the steps of: receiving a bootstrap signal comprising a plurality of symbols; performing an autocorrelation operation on a first symbol of the plurality of symbols to generate a first correlation result; performing the autocorrelation operation on a second symbol of the plurality of symbols to generate a second correlation result; and determining the sampling frequency offset according to the first correlation result and the second correlation result.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 9, 2021
    Assignee: Realtek Semiconductor Corp.
    Inventor: Wen-Yu Huang
  • Patent number: 10943127
    Abstract: This disclosure relates to a computer implemented method of media processing, computer program and media processing system. Source media relating to a mass participation event is received, wherein the source media includes a source video of the mass participation event. A plurality of video segments in the source video are identified, wherein each different video segment relates to a different participant in the mass participation event one of the plurality of video segments are matched to a particular participant of the mass participation event. A media clip is then output relating to the particular participant, wherein the media clip comprises the video segment that has been matched to the particular participant.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: March 9, 2021
    Assignee: StageClip Limited
    Inventors: Rupert Forsythe, James Pain, Mark Andrew
  • Patent number: 10931435
    Abstract: A system may include a clock and data recovery circuit that includes one or more analog components. The system may also include processing circuitry configured to control the clock and data recovery circuit. The processing circuitry and the clock and data recovery circuit may be formed on a single substrate.
    Type: Grant
    Filed: March 5, 2019
    Date of Patent: February 23, 2021
    Assignee: II-VI DELAWARE, INC.
    Inventor: Jason Y. Miao
  • Patent number: 10908941
    Abstract: A network traffic monitoring system is provided. The system includes a host computer executing a plurality of virtual machines (VMs), including a monitoring VM and a virtual switch (vSwitch). The vSwitch includes a plurality of virtual Network Interface Cards (vNICs) associated with the plurality of VMs. The monitoring VM is coupled to the vSwitch and executed by the host computer. The vSwitch is configured to mirror a plurality of data packets exchanged between two communicating VMs to a vNIC associated with the monitoring VM. The monitoring VM is configured to retrieve the plurality of mirrored data packets from the vNIC associated with the monitoring VM. The monitoring VM is further configured to generate timestamps indicative of packet arrival time at the vSwitch for each data packet in the retrieved plurality based, at least in part, on a computed base time.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: February 2, 2021
    Assignee: Tektronix Texas, LLC
    Inventors: Tianlin Zhou, Yang He
  • Patent number: 10878869
    Abstract: A memory device may be configured to receive a differential data strobe signal and an external data signal from outside the memory device, the memory device may include control circuitry configured to, extract a common mode of the differential data strobe signal to generate a common mode signal, generate an internal data signal based on the external data signal and the common mode signal, and generate an internal data strobe signal based on the differential data strobe signal, the internal data strobe signal associated with latching the internal data signal.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: December 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ju-ho Jeon, Han-gi Jung, Hun-dae Choi
  • Patent number: 10715372
    Abstract: The present invention discloses a method for obtaining information for a cyclic prefix (CP) in a wireless communication system by a terminal and a device for the same. Specifically, a method for obtaining information for a cyclic prefix (CP) in a wireless communication system by a terminal includes: detecting a specific synchronization signal received from a base station via a first symbol of a first subframe; detecting the specific synchronization signal received from the base station via a second symbol of a second subframe; and obtaining information for the CP applied to transmission of the specific synchronization signal based on an offset value between an index of the first symbol and an index of the second symbol.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: July 14, 2020
    Assignee: LG ELECTRONICS INC.
    Inventors: Seokmin Shin, Hanjun Park, Hyunsoo Ko, Kijun Kim, Byounghoon Kim, Eunsun Kim
  • Patent number: 10681610
    Abstract: A network includes at least one node to communicate with at least one other node via a wireless network protocol. The node includes a network configuration module to periodically switch a current node function of the node between an intermediate node function and a leaf node function. The switch of the current node function enables automatic reconfiguration of the wireless network based on detected communications between the at least one node and at least one intermediate node or at least one leaf node via the wireless network protocol.
    Type: Grant
    Filed: May 10, 2017
    Date of Patent: June 9, 2020
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ariton E. Xhafa, Jianwei Zhou, Xiaolin Lu
  • Patent number: 10553258
    Abstract: Managing temperature of a semiconductor device having a temperature inverted processor core and stacked memory by operation of an integrated thermoelectric cooler. The thermoelectric cooler is operated to pump heat from a stacked memory device that requires a cool operating temperature to a temperature inverted processor core that maintains a higher operating temperature until threshold operating temperatures are achieved.
    Type: Grant
    Filed: December 21, 2018
    Date of Patent: February 4, 2020
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Wei Huang
  • Patent number: 10546620
    Abstract: Devices and techniques are disclosed herein for determining, using a host device, a timing relationship between a data strobe signal, such as from an embedded MultiMediaCard (eMMC) device, and an internal clock signal. The host device can control a delay circuit using the determined timing relationship, such as to align received read data for sampling, or to determine or adjust a delay value of the delay circuit.
    Type: Grant
    Filed: June 28, 2018
    Date of Patent: January 28, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Claudio Giaccio, Ferdinando Pascale, Erminio Di Martino, Raffaele Mastrangelo, Ferdinando D'Alessandro, Andrea Castaldo, Cristiano Castellano
  • Patent number: 10509625
    Abstract: An electronic device that reduces relative drift is described. In particular, an interface circuit in the electronic device may calculate, based on differences between transmit times when packets were transmitted by a second electronic device and receive times of the packets, relative drift as a function of time between a clock in the interface circuit and a second clock in the second electronic device. Then, the interface circuit may adjust, based on the relative drift, a clock circuit that provides the clock to eliminate the relative drift, and may store the adjustments to the clock circuit. Furthermore, when a wireless reset occurs, the interface circuit may adapt the clock circuit based on the stored adjustments to reduce the relative drift while the interface circuit restores frequency lock with the second clock based on additional packets with additional transmit times that are received from the second electronic device.
    Type: Grant
    Filed: May 18, 2019
    Date of Patent: December 17, 2019
    Assignee: EVA Automation, Inc.
    Inventors: Leo Lay, Adrian Harold Chadd, Haisong Wang, Shiwei Zhao, Li Li, Gaylord Yu
  • Patent number: 10425218
    Abstract: The present disclosure relates to phase alignment, in particular to phase alignment circuitry (and parts thereof) for example for use in a multiplexer or other circuitry in which data is transmitted from one stage to another. Consideration is given to phase detection and phase rotation. Such circuitry may be implemented as integrated circuitry, for example on an IC chip.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: September 24, 2019
    Assignee: SOCIONEXT INC.
    Inventors: Adam James Coulthard, Atheer Sami Barghouthi
  • Patent number: 10379211
    Abstract: Disclosed is a method for generating a quality measure for a frequency set. The quality measure indicates the quality of the frequency set for use in a multi frequency ranging method for estimating the range to an object. The method for generating a quality measure comprises the steps of determining the smallest distance between any two range lines of a set of range lines in an N-dimensional phase space. The N-dimensional phase space comprises at least a first dimension representing a first phase difference, and a second dimension representing a second phase difference. The N-dimensional phase space has a dimension equal to the number of phase differences used by the multi frequency ranging method. The range lines represent all theoretical possible combinations of the phase differences.
    Type: Grant
    Filed: September 11, 2015
    Date of Patent: August 13, 2019
    Assignee: Weibel Scientific A/S
    Inventor: Jens Jørgen Nielsen
  • Patent number: 10263766
    Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method includes recovering a first clock signal from transitions between pairs of symbols representative of successive signaling states of a 3-wire interface, where a pulse in the first clock signal is generated in response to an earliest-occurring transition between the first and second symbols in one of three difference signals representative of differences in state between two wires, determining direction of voltage change of a first transition detected on a first difference signal, providing a value selected based on the direction of voltage change as value of the first difference signal in the second symbol, and providing a value of a second difference signal captured during the first symbol as the value of the second difference signal when the second difference signal does not transition between the first symbol and the second symbol.
    Type: Grant
    Filed: June 11, 2018
    Date of Patent: April 16, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: George Alan Wiley, Chulkyu Lee
  • Patent number: 10250378
    Abstract: According to one embodiment, a base station apparatus includes: a radio equipment control that generates a baseband signal including data; a microwave apparatus that modulates the baseband signal to a microwave to transmit by radio; a microwave apparatus that demodulates the received first microwave to the baseband signal, then extracts a clock from a cycle of the data included in the baseband signal, imports the baseband signal in synchronization with the clock, and plays back the data; and a radio equipment that modulates the data played back by the microwave apparatus to a high-frequency signal, and the microwave apparatus outputs dummy data instead of the played back data when a frequency fluctuation amount of the clock exceeds a predetermined range.
    Type: Grant
    Filed: September 10, 2015
    Date of Patent: April 2, 2019
    Assignee: NEC CORPORATION
    Inventor: Hiroto Iizuka
  • Patent number: 10243703
    Abstract: Systems and methods are disclosed for detection of a selected signal pattern, such as a servo sector preamble, and for frequency offset determination. A circuit may be configured to divide a signal into detection windows of a selected size, and sample the signal a selected number of times within each detection window. The circuit may then determine an error value for each detection window based on values of the samples for each detection window, and determine the preamble is detected when a threshold number of most-recently sampled detection windows have error values below a threshold value. The circuit may then organize the sample values corresponding to the preamble into groups, and calculate phase estimates representing a phase at which the groups were sampled. The circuit may determine a frequency offset based on the phase estimates, and modulate the sampling frequency according to the frequency offset.
    Type: Grant
    Filed: November 13, 2017
    Date of Patent: March 26, 2019
    Assignee: Seagate Technology LLC
    Inventors: Jason Vincent Bellorado, Marcus Marrow
  • Patent number: 10205541
    Abstract: An integrated circuit is described herein. According to one or more embodiments, the integrated circuit includes a local oscillator with a voltage-controlled oscillator (VCO) that generates a local oscillator signal. Further, the integrated circuit includes a frequency divider coupled to the VCO downstream thereof. The frequency divider provides a frequency-divided local oscillator signal by reducing the frequency of the local oscillator signal by a constant factor. A first test pad of the integrated circuit is configured to receive a reference oscillator signal. Further, the integrated circuit includes a first mixer that receives the reference oscillator signal and the frequency-divided local oscillator signal to down-convert the frequency-divided local oscillator signal.
    Type: Grant
    Filed: August 20, 2018
    Date of Patent: February 12, 2019
    Assignee: Infineon Technologies AG
    Inventors: Oliver Frank, Guenter Haider, Jochen O. Schrattenecker
  • Patent number: 9941952
    Abstract: A satellite terminal and a machine-implemented method are provided for encoding a burst header of a burst for transmission on an inroute. One component of a group of satellite terminal components consisting of an ASIC, a FPGA, and a DSP, generates a burst header having five information bits encoded therein. The five information bits may be encoded using a Reed-Muller code, a (32, 5) block code or a convolutional code having a code rate of either 1/5 or 1/10. The five information bits may represent one or more of a modulation type for a payload of the burst, a code rate for encoding the payload, a code type, and a spreading factor for spreading the payload during transmission. A satellite gateway and a machine-implemented method are also provided for decoding a burst header of a burst received on an inroute as described above.
    Type: Grant
    Filed: February 21, 2017
    Date of Patent: April 10, 2018
    Assignee: Hughes Network Systems, LLC
    Inventors: Yezdi Antia, Mustafa Eroz, John Alfred Schmid
  • Patent number: 9929732
    Abstract: First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an input circuit and a differential output driver connected to the single pair of LVDS signal paths. An input to the input circuit is also connected to the input of the driver. The input circuit may also receive an offset voltage. In response to its inputs, the input circuit in each device can use comparators, gates and a multiplexer to determine the logic state being transmitted over the pair of LVDS signal paths from the other device. This advantageously reduces the number of required interconnects between the first and second devices by one half.
    Type: Grant
    Filed: October 5, 2017
    Date of Patent: March 27, 2018
    Assignee: Texas Instruments Incorporated
    Inventor: Lee D. Whetsel
  • Patent number: 9848286
    Abstract: A method and apparatus for adjusting device-to-device (D2D) timing in a wireless communication system is provided. The method includes detecting a signal on a second D2D group, and adjusting D2D timing of the first D2D group based on the detected signal on the second D2D group. The first D2D group includes a first device and a second device which perform D2D operation in the first D2D group, and the second D2D group includes a third device and a fourth device which perform D2D operation in the second D2D group.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: December 19, 2017
    Assignee: LG ELECTRONICS INC.
    Inventors: Youngdae Lee, Sunghoon Jung
  • Patent number: 9832093
    Abstract: A method of operating a data processing system to generate a jitter-injected signal from an input signal that is a function of time is disclosed. A time offset corresponding to a first time is generated according to a jitter specification that specifies the offset as a function of time. The jitter-injected signal at the first time is generated by evaluating the input signal at a time equal to a sum of the time offset and the first time. If the jitter specification only provides offsets at signal crossing times, interpolation is used to derive time offsets at non-signal crossing times.
    Type: Grant
    Filed: February 26, 2014
    Date of Patent: November 28, 2017
    Assignee: Keysight Technologies, Inc.
    Inventors: Chia Jui Hsu, Fangyi Rao
  • Patent number: 9692672
    Abstract: A communication system for interfacing a transmitting circuit with a receiving circuit includes a transmission interface for receiving data from the transmitting circuit and transmitting the data received over at least one data line in response to a transmission clock signal. The communication system also includes a reception interface configured for receiving the data in response to a reception clock signal and transmitting the data received to the receiving circuit. In particular, the system is configured for generating a plurality of clock signals that have the same frequency but are phase-shifted with respect to one another. In addition, during a calibration phase, the system is configured for selecting one of the clock signals for the transmission clock signal or reception clock signal via selecting at least one of the clock signals for transmission of test signals via the transmission interface and verifying whether the test signals received via the reception interface are correct.
    Type: Grant
    Filed: January 23, 2015
    Date of Patent: June 27, 2017
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Daniele Mangano, Salvatore Pisasale
  • Patent number: 9680562
    Abstract: A satellite terminal and a machine-implemented method are provided for encoding a burst header of a burst for transmission on an inroute. One component of a group of satellite terminal components consisting of an ASIC, a FPGA, and a DSP, generates a burst header having five information bits encoded therein. The five information bits may be encoded using a Reed-Muller code, a (32, 5) block code or a convolutional code having a code rate of either 1/5 or 1/10. The five information bits may represent one or more of a modulation type for a payload of the burst, a code rate for encoding the payload, a code type, and a spreading factor for spreading the payload during transmission. A satellite gateway and a machine-implemented method are also provided for decoding a burst header of a burst received on an inroute as described above.
    Type: Grant
    Filed: September 11, 2014
    Date of Patent: June 13, 2017
    Assignee: Hughes Network Systems, LLC
    Inventors: Yezdi Antia, Mustafa Eroz, John Alfred Schmid
  • Patent number: 9673962
    Abstract: An apparatus comprising: a signal detection circuit determine a count reached by a counter between successive detected edge signals and to provide an indication of whether successive detected edge signals are separated from each other by at least a prescribed time interval; a clock circuit that produces clock signal pulses in response to a provided indication of an occurrence of a succession of detected edge signals each separated from a previous edge signal of the succession by at least the prescribed time interval; phase matching circuitry configured to align the produced clock signal pulses with detected edge signals; and a pattern matching circuit that that samples a sequence of detected edge signals aligned with the produced clock signal pulses to detect a data packet.
    Type: Grant
    Filed: February 17, 2016
    Date of Patent: June 6, 2017
    Assignee: Analog Devices Global
    Inventors: Muhammad Kalimuddin Khan, Kenneth J. Mulvaney, Philip P. E. Quinlan, Shane O'Mahony
  • Patent number: 9613679
    Abstract: A controller includes first and second functional units, first and second clock-signal sources that provide corresponding first and second clock signals that drive the first and second functional units respectively. The second clock-signal generates its second clock-signal based on the first clock-signal. The clock-retardation unit dynamically causes the second clock-signal to have a target time-domain offset relative to the first clock-signal.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: April 4, 2017
    Assignee: Cavium, Inc.
    Inventors: David Da-Wei Lin, Edward Wade Thoenes
  • Patent number: 9601181
    Abstract: An apparatus for data processing includes first and second functional units driven by corresponding first and second clock-signal sources, and a clock-retardation unit. The clock-retardation unit is configured to cause the second clock-signal to sustain a temporal offset that causes an offset between the first and second clock-signals to step toward a target time-domain offset between the first and second clock-signals.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: March 21, 2017
    Assignee: Cavium, Inc.
    Inventors: David Da-Wei Lin, Edward Wade Thoenes, Vasudevan Kandadi
  • Patent number: 9553635
    Abstract: A method, an apparatus, and a computer program product for data communication over a multi-wire, multi-phase interface are provided. The method may include providing a sequence of symbols to be transmitted on a 3-wire interface, each symbol in the sequence of symbols defining one of three voltage states for each wire of the 3-wire interface, driving all wires of the 3-wire interface to a common voltage state during a transition from a first transmitted symbol to a second transmitted symbol, driving each wire of the 3-wire interface in accordance with the second transmitted symbol after a predetermined delay. Each wire may be in a different voltage state from the other wires of the 3-wire interface during transmission of the each symbol. The common voltage state may lie between two of the three voltage states.
    Type: Grant
    Filed: July 24, 2015
    Date of Patent: January 24, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Dhaval Sejpal, Chulkyu Lee, George Alan Wiley
  • Patent number: 9444566
    Abstract: Methods of performing time-of-day synchronization in a packet processing network include accumulating timestamps transmitted in packets between master and slave devices, which are synchronized to respective master and slave clocks and separated from each other by the packet processing network. Operations are also performed to determine whether first timestamps accumulated in a first direction across the packet network demonstrate that a first packet delay variation (PDV) sequence observed from the first timestamps is stationary. A phase offset between the master and slave clocks is then adjusted using a time-of-day (ToD) estimation algorithm. This adjusting can include evaluating a location-dependent statistic of the first PDV sequence.
    Type: Grant
    Filed: March 7, 2014
    Date of Patent: September 13, 2016
    Assignee: INTEGRATED DEVICE TECHNOLOGY, INC.
    Inventors: Frederic Mustiere, Felix Duong, Alain Trottier, Russell Smiley, Peng Xiao
  • Patent number: 9418495
    Abstract: A locking device comprising: a code generation means for generating a plurality of access codes in a first series and a second series, each access code being valid for a predetermined period of time, a code input means for receiving an input code, and a code comparison means, wherein the code comparison means is configured to unlock the lock in response to input of a code that corresponds to a currently valid access code, wherein the period of validity of each access code in first series partially overlaps the period of validity two adjacent access codes in the second series.
    Type: Grant
    Filed: January 15, 2015
    Date of Patent: August 16, 2016
    Assignee: PARCELHOME LIMITED
    Inventors: Gregory Mackin, Jean-Michel Huten, Julien Vassallo
  • Patent number: 9397764
    Abstract: A carrier frequency offset calibration method and a carrier frequency offset calibration system are provided. The carrier frequency offset calibration method is adapted to calibrate the carrier frequency offsets of a transmission signal which includes a primary carrier and a secondary carrier. In the carrier frequency offset calibration method, the transmission signal is analyzed according to known carrier frequencies, a primary feedback value and a secondary feedback value, so as to obtain a primary carrier offset value and a secondary carrier offset value. The relationship between the primary carrier offset value and the secondary offset value is considered to determine whether to adjust the primary feedback signal and the secondary feedback signal.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: July 19, 2016
    Assignee: Novatek Microelectronics Corp.
    Inventor: Yuan-Hau Yang
  • Patent number: 9374754
    Abstract: A method for synchronising a receiving device with a transmitting device in a wireless communication network comprising forming a synchronisation sequence that has a frequency spectrum comprising peaks at multiple discrete fundamental frequencies, a signal power of the synchronisation sequence being concentrated at those frequencies, and transmitting said synchronisation sequence from the transmitting device to the receiving device.
    Type: Grant
    Filed: June 12, 2012
    Date of Patent: June 21, 2016
    Assignee: Neul Ltd.
    Inventor: Robert Young
  • Patent number: 9356853
    Abstract: A device is disclosed including a memory configured to store a user data frame. The user data frame includes a first portion that includes traffic data. The user data frame also includes a second portion that includes a set of stuff bits arranged in a detectible pattern wherein a count of the set of stuff bits is associated with a measure of transport utilization of a data communication channel over which the user data frame is transported.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: May 31, 2016
    Assignee: AT&T Intellectual Property I, L.P.
    Inventor: Arvind R. Mallya
  • Patent number: 9225505
    Abstract: The receiver includes a first buffer configured to buffer a data to generate a first internal data, a first delay unit configured to retard the first internal clock signal by a first delay period to generate a first delayed internal clock signal, and a second buffer configured to buffer the first internal data to generate a first input data.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: December 29, 2015
    Assignee: SK Hynix Inc.
    Inventor: Keun Soo Song
  • Patent number: 9184904
    Abstract: A communication system includes: a plurality of lanes; a plurality of transmission circuits respectively outputting data to the lanes in accordance with a transmission clock; and a plurality of reception circuits respectively receiving data from the lanes, each reception circuit includes: a clock data recovery circuit extracting own clock information from received data: a clock information switch circuit selecting either one of the own clock information of the reception circuit or another own clock information of an another reception circuit; a phase shifter generating a phase adjusted clock from a common reception clock source in accordance with clock information selected by the clock information switch circuit; and an input circuit taking in transmitted data in accordance with the adjusted clock, and the clock information switch circuit selects the own clock information in a normal operation and selects the another own clock information in an eye-opening measurement operation.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: November 10, 2015
    Assignee: FUJITSU LIMITED
    Inventor: Yoshiyasu Doi
  • Patent number: 9077594
    Abstract: A system including a midamble detection module and a processing module. The midamble detection module is configured to detect a midamble of a packet transmitted via a channel, where the packet includes (i) a preamble, (ii) the midamble, and (iii) a plurality of data fields, where the preamble includes (i) a first short training field, (ii) a first long training field, and (iii) a signal field, where the midamble includes (i) a second short training field and (ii) a second long training field, and where the midamble follows the preamble and is between two or more of the data fields. The processing module is configured to determine that the channel is busy in response to detecting the midamble in the packet.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 7, 2015
    Assignee: Marvell International LTD.
    Inventors: Raja Banerjea, Hongyuan Zhang
  • Patent number: 9071327
    Abstract: Methods are presented herein for estimating at least a frequency (offset) for a block of received symbols using two or more estimation stages. These methods may allow reducing the computational complexity of a frequency estimator while maintaining large frequency offset coverage and high frequency estimation accuracy. Also presented herein are satellite communication systems employing a burst transmission or continuous transmission, and configured to estimate at least a frequency (offset) for a received burst or a block of received symbols using two or more estimation stages. In some embodiments, a received burst or a received block of symbols may include a Unique Word located at or about the center of the received burst or the block of symbols.
    Type: Grant
    Filed: November 19, 2013
    Date of Patent: June 30, 2015
    Assignee: Gilat Satellite Networks Ltd.
    Inventors: Uzi Ram, Oded Bialer
  • Patent number: 9065630
    Abstract: Systems and methods are provided for detecting a received synchronization signal. The method includes receiving, at a receiver, a signal from a transmitter, where one or more portions of the received signal include the received synchronization signal. The method includes processing the one or more portions of the received signal to obtain a differential signal, and processing the differential signal and a plurality of candidate differential synchronization signals to obtain a plurality of cross-correlation signals. Each candidate differential synchronization signal is associated with one cross-correlation signal.
    Type: Grant
    Filed: September 16, 2013
    Date of Patent: June 23, 2015
    Assignee: MARVELL INTERNATIONAL LTD.
    Inventors: Chusong Xiao, Qing Zhao, Manyuan Shen, Leilei Song, Hui-Ling Lou
  • Patent number: 9036759
    Abstract: A method performed by a device for performing synchronization between devices for a Device-to-Device (D2D) communication is provided. The method includes setting, according to a process of the device, the device to a group of devices for performing a dynamic switching; outputting a synchronization signal corresponding to the set group as a signal for setting synchronization in a physical layer; controlling, upon receiving another synchronization signal from another device, the outputting of the synchronization signal by applying a time offset according to a relation between the set group that includes the device and the group that includes the another device; and setting, if the synchronization signal and the another synchronization signal are converged, synchronization of the device based on a time point where the synchronization signal is output.
    Type: Grant
    Filed: October 24, 2012
    Date of Patent: May 19, 2015
    Assignee: Samsung Electronics Co., Ltd
    Inventors: Seung-Hoon Park, Chi-Woo Lim, Nam-Yoon Lee, Kyung-Kyu Kim
  • Patent number: 9037092
    Abstract: A method of determining at a receiver whether a received signal comprises a pure tone signal component. The method comprises: measuring a received signal over a measurement period; calculating, using maximum likelihood hypothesis testing, a likelihood ratio value for the measured signal and, determining, based on said likelihood ratio value, whether the measured signal comprises a pure tone signal component. The likelihood ratio value is a value indicative of the ratio of a likelihood LFSC that the measured signal comprises a pure tone signal component, and a likelihood LnoFSC that the measured signal does not comprise the pure tone signal component.
    Type: Grant
    Filed: September 30, 2013
    Date of Patent: May 19, 2015
    Assignee: BROADCOM CORPORATION
    Inventors: Morten R. Hansen, Lars P. B. Christensen