Synchronizers Patents (Class 375/354)
  • Patent number: 11510273
    Abstract: The present disclosure describes techniques and systems for wireless communications between a base station [120] and a user equipment [110] using an enhanced radio-resource control idle mode. The described techniques and systems enable a user equipment [110] to receive a radio-resource control release message [410] that includes a cell radio-network temporary-identifier and, in response, enter [415] the enhanced radio-resource control idle mode. While in the enhanced radio-resource control idle mode, the user equipment [110] may receive a message [420] in accordance with the cell radio-network temporary-identifier and present the received message.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: November 22, 2022
    Assignee: Google LLC
    Inventors: Jibing Wang, Erik Richard Stauffer
  • Patent number: 11500786
    Abstract: A method for protecting data includes encrypting information to generate a first tweak, combining a data block with the first tweak, encrypting the tweaked data block to form encrypted data, combining the encrypted data with the first tweak, and providing the combined encrypted data for storage in a memory address. Storing the combined encrypted data at the memory address generates a first stimulus different from a second stimulus generated by storing same encrypted data combined with a second tweak at the memory address. The first stimulus is generated based on the first tweak and the second stimulus is generated based on the second tweak.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: November 15, 2022
    Assignee: NXP B.V.
    Inventors: Miroslav Knezevic, Vitaly Ocheretny
  • Patent number: 11490783
    Abstract: An endoscope system includes at least any one of a processor device that is attachable to and detachable from an endoscope or a light source device that is attachable to and detachable from the endoscope. In a case where the endoscope is mounted on the processor device or the light source device, the processor device or the light source device performs a request sequence in which a request signal, for requesting a start of execution of encoding processing with respect to digital image signals, is transmitted to the endoscope.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: November 8, 2022
    Assignee: FUJIFILM Corporation
    Inventors: Shingo Masuno, Yusuke Kurioka
  • Patent number: 11483127
    Abstract: Apparatus including a shared device in communication with a plurality of computing machines external to the shared device, the shared device including at least one PTP domain coefficient storage area, the at least one PTP domain coefficient storage area receiving a PTP coefficient from a computing machine having a PTP client, and providing the PTP coefficient to a computing machine not having a PTP client. Related apparatus and methods are also provided.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: October 25, 2022
    Assignee: MELLANOX TECHNOLOGIES, LTD.
    Inventors: Ariel Almog, Thomas Kernen, Alex Vainman, Nir Nitzani, Dotan David Levi, Ilan Smith, Rafi Wiener
  • Patent number: 11481217
    Abstract: A data transmitting and receiving system includes a first device including an encoder configured to encode row data to generate precoding data and a transmitter configured to transmit the precoding data through a transmission channel and a second device including an integrator configured to perform an integral on the precoding data, an integral sampler including a plurality of samplers configured to output sampling data based on an offset value and an output value of the integrator, a decoder configured to decode outputs of some of the samplers to generate decoded data, and a phase detector configured to detect a phase difference between the precoding data and a clock based on the decoded data and an output of another one of the samplers.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 25, 2022
    Assignees: SAMSUNG ELECTRONICS CO., LTD., IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)
    Inventors: Kyoungho Kim, Changsik Yoo, Baekjin Lim
  • Patent number: 11458391
    Abstract: A method for cloud gaming. The method including generating a video frame when executing a video game at a server. The method including performing a scan-out process to deliver the video frame to an encoder configured to compress the video frame, wherein the scan-out process begins at a flip-time of the video frame. The method including transmitting the video frame that is compressed to a client. The method including determining at the client a target display time for the video frame. The method including scheduling at the client a display time for the video frame based on the target display time.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: October 4, 2022
    Assignee: Sony Interactive Entertainment Inc.
    Inventors: Roelof Roderick Colenbrander, Mark E. Cerny
  • Patent number: 11456748
    Abstract: In one embodiment, a local clock is synchronized to a master clock using a Kalman filter to determine state variables using a state transition matrix that includes at least one coefficient that is associated with a digital-to-analog converter (DAC), where the state variables include a unit step variable indicative of a unit step for the system. The local clock is controlled based on the state variables determined using the Kalman filter. The unit step is indicative of an amount by which the frequency of the local clock signal changes in response to a change in the digital input of the DAC.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: September 27, 2022
    Assignee: CommScope Technologies LLC
    Inventor: Stuart D. Sandberg
  • Patent number: 11451220
    Abstract: In a delay circuit, first and second sets of transistors are connected in series between a supply voltage and a ground. The first and second sets of transistors both include a current source transistor, a cascode transistor, and a control transistor. The first set of transistors generates a current that charges a capacitor to generate a ramp signal with a positive slope. A first bias transistor may cause the ramp signal to be biased to ground upon activating the first set of transistors. The second set of transistors generates a current that discharges the capacitor to generate the ramp signal with a negative slope. A second bias transistor may cause the ramp signal to be biased to the supply voltage upon activating the second set of transistors. The delay circuit transitions the state of the output signal based on a voltage level of the ramp signal.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: September 20, 2022
    Assignee: Silanna Asia Pte Ltd
    Inventors: Joseph H. Colles, Steven E. Rosenbaum, Stuart B. Molin
  • Patent number: 11435463
    Abstract: A communication device including a clock, a memory, and at least one processor is disclosed. The at least one processor is configured to execute instructions stored in the memory that cause the at least one processor to perform operations including receiving at least one message from a second communication device of a plurality of communication devices over a preconfigured time duration, determining a first local time of the clock of the communication device at which the at least one message from the second communication device is received, and determining a sync-time of the second communication device based on the at least one message from the second communication device. The operations include mapping the sync-time of the second communication device based on the first local time and the determined sync-time of the second communication device and adjusting a sync-time of the communication device based on the second local time.
    Type: Grant
    Filed: June 3, 2020
    Date of Patent: September 6, 2022
    Assignee: Forkbeard Technologies AS
    Inventors: Endre Bakka, Wilfred Edwin Booij
  • Patent number: 11410280
    Abstract: The present application provides a salt and pepper noise filtering method and device based on morphological component analysis. The method comprises: obtaining a to-be-filtered image containing salt and pepper noise; calculating the dimension of the to-be-filtered image, labeled as [n, m]; initializing an n*m-dimensional all-1 labeled matrix as a salt and pepper noise labeled map; obtaining a preset region centered on a pixel point with a pixel value of 0 or 255, and calculating a noise variance between the pixel points in the preset region; labeling the position of a salt and pepper noise point in the salt and pepper noise labeled map according to the noise variance between the pixel points in the preset region, and updating and determining the salt and pepper noise labeled map. The salt and pepper noise is filtered through the method based on morphological component analysis, which improves the quality of the image.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: August 9, 2022
    Inventors: Kuntao Ye, Baoyi Zhu, Wen Li, Chao Yin, Sheng Li, Guangxue Le
  • Patent number: 11392166
    Abstract: A system receives a first clock signal with a first frequency and a second clock signal having a second frequency lower than the first frequency. The system generates a new second clock signal aligned with the first clock signal based on a known phase/frequency relationship between the clock signals. A counter counts cycles of the first clock signal. The system generates a new second clock signal with an edge aligned with a first clock signal when the counter reaches a predetermined count value and the system resets the counter. A window opens that includes a time period when the edge of the first clock signal is expected. If an edge of the first clock signal is detected outside of the window, the counter is reset responsive to the detected edge.
    Type: Grant
    Filed: November 25, 2019
    Date of Patent: July 19, 2022
    Assignee: Silicon Laboratories Inc.
    Inventor: Vivek Sarda
  • Patent number: 11387914
    Abstract: Embodiments herein describe sub-picosecond accurate two-way clock synchronization by optically combining received optical pulses with optical pulses generated locally in a photonic chip before the optical signals are then detected by a photodetector to obtain an interference measurement. That is, the optical pulses can be combined to result in different interference measurements. Optically combining the pulses in the photonic chip avoids much of the jitter introduced by the electronics. Further, the sites can obtain multiple interference measurements which can be evaluated to accurately determine when the optical pulses arrive at the site with femtosecond accuracy.
    Type: Grant
    Filed: August 4, 2020
    Date of Patent: July 12, 2022
    Assignee: Vector Atomic, Inc.
    Inventors: Arman Cingoz, Abijith Sudarsan Kowligy, Jonathan David Roslund
  • Patent number: 11366779
    Abstract: A chip-carrier package includes a data processing system having one or more slave dies, a master die and a system bus. Each slave die includes a slave device and a slave-side wireless bus interface (WBI) coupled to the slave device. The master die includes a master device, one or more bus-side WBIs coupled to the master device. Each bus-side WBI is configured to be wirelessly coupled to at least one slave-side WBI of the one or more slave dies and a system bus. The system bus includes the one or more bus-side WBIs and the slave-side WBIs of the one or more slave-side dies. The system bus is configured to exchange information between the master device and the slave devices of the one or more slave dies.
    Type: Grant
    Filed: November 15, 2019
    Date of Patent: June 21, 2022
    Assignees: Arm Limited, ECS Partners Limited
    Inventors: Benjamin James Fletcher, James Edward Myers, Shidhartha Das, Terrence Sui Tung Mak
  • Patent number: 11356140
    Abstract: Circuits and methods for performing a clock and data recovery are disclosed. In one example, a circuit is disclosed. The circuit includes an FSM. The FSM includes: a first accumulator, a second accumulator, and a third accumulator. The first accumulator is configured to receive an input phase code representing a phase timing difference between a data signal and a clock signal at each FSM cycle, to accumulate input phase codes for different FSM cycles, and to generate a first order phase code at each FSM cycle. The second accumulator is coupled to the first accumulator and configured to accumulate the input phase codes and first order phase codes for different FSM cycles, and to generate a second order phase code at each FSM cycle. The third accumulator is coupled to the second accumulator and configured to accumulate the input phase codes and second order phase codes for different FSM cycles, and to generate a third order phase code at each FSM cycle.
    Type: Grant
    Filed: May 14, 2021
    Date of Patent: June 7, 2022
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Hsiang Lan, Cheng-Hsiang Hsieh
  • Patent number: 11353827
    Abstract: The frequency stability of an optical local oscillator is improved by locking a laser to a silicon Fabry-Perot cavity operating at a temperature near 124 K, where the coefficient of thermal expansion of silicon is near zero. The cavity is mounted inside a cryostat housed in a temperature-stabilized vacuum system that is surrounded by an isolating enclosure and supported by an active vibration platform. Laser light is steered with a superpolished mirror toward a superpolished focusing optic that couples the laser light into the cavity. Light reflected from the cavity is used to stabilize the laser via the Pound-Drever-Hall technique, while light transmitted through the cavity is used to stabilize the laser power. A resonant transimpedance amplifier allows the laser power to be reduced, which reduces heating of the cavity caused by residual absorption of the light.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: June 7, 2022
    Assignees: The Regents of the Univ. of Colorado, a body corp., Government of the United States of America, as represented by the Secretary of Commerse
    Inventors: Jun Ye, Eric G. Oelker, William R. Milner, John M. Robinson, Colin J. Kennedy, Tobias Bothwell, Dhruv Kedar, Terry Brown
  • Patent number: 11316605
    Abstract: A method for synchronizing a logical clock in a device comprising a physical clock, an input port, and an output port, the device further comprising a logical clock and a time compensation clock sharing the physical clock, the time compensation clock making it possible to determine a residence time, comprising obtaining a theoretical residence time, during a pre-synchronization phase according to which the logical clock is not synchronized, adding a value representative of the obtained theoretical residence time to a residence time value stored in a synchronization message to be forwarded, during a synchronization phase according to which the logical clock is synchronized, obtaining a residence time and adding a value representative of the obtained residence time to a residence time value stored in a synchronization message to be forwarded, and synchronizing the logical clock as a function of a residence time value stored in a received synchronization message.
    Type: Grant
    Filed: December 4, 2017
    Date of Patent: April 26, 2022
    Assignee: Canon Kabushiki Kaisha
    Inventors: Romain Guignard, Yacine El Kolli, Lionel Le Scolan, Arnaud Closset
  • Patent number: 11310092
    Abstract: An interface is provided for processing digital signals in a standardized format in a distributed antenna system. One example includes a unit disposed in a distributed antenna system. The unit includes an interface section and an output section. The interface section is configured for outputting a first complex digital signal and a second complex digital signal. The first complex digital signal is generated from a digital signal in a standardized format received from a digital base station. The output section is configured for combining the first complex digital signal and the second complex digital signal into a combined digital signal. The output section is also configured for outputting the combined digital signal. The combined digital signal comprises information to be wirelessly transmitted to a wireless user device.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: April 19, 2022
    Assignee: CommScope Technologies LLC
    Inventors: Thomas Kummetz, Christopher Goodman Ranson
  • Patent number: 11307544
    Abstract: Embodiments relate to a predictor device for controlling at least one actuating variable of a plant having at least one actuator, which can be controlled by the actuating variable, and a state with at least one controlled variable that can be detected by a sensor. The predictor has an adaptation device and an L1-adaptive control apparatus. The predictor has a state modelling device for estimating a behavior of the plant and outputs an estimated state with at least one estimated variable. The embodiments relate to an aircraft with such a control device for flight control. The embodiments also relate to an L1-adaptive control method using an L1-adaptive control apparatus, an adaptation device generating a matched uncertainty signal and an unmatched uncertainty signal, and a predictor having a state modelling device. The embodiments relate to an aircraft with a control device for flight control, which executes such a method.
    Type: Grant
    Filed: December 10, 2019
    Date of Patent: April 19, 2022
    Assignee: Airbus Defence and Space GmbH
    Inventors: Fabian Hellmundt, Jens Dodenhöft
  • Patent number: 11303479
    Abstract: A communication device for a vehicle includes: a transmitting section that transmits differential signals from a first control section to a second control section via a transmission path; a receiving section that receives the differential signals that were transmitted to the second control section by the transmitting section; a skew measuring section that measures a signal difference of the differential signals on the transmission path; and a transmitting/receiving skew correcting section that, based on the signal difference measured by the skew measuring section, corrects both transmitting time differential signals that are transmitted from the first control section and receiving time differential signals that are received at the second control section.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: April 12, 2022
    Assignee: TOYOTA JIDOSHA KABUSHIKI KAISHA
    Inventor: Yoshiroh Hirata
  • Patent number: 11295654
    Abstract: A delay adjustment circuit, comprising: a detection circuit configured to output a control signal upon detecting a data signal edge; a timing circuit configured to obtain a setup time and a hold time according to the control signal; a computation circuit configured to perform a computation with respect to a plurality of setup times and a plurality of hold times so as to obtain time information of a row data signal; and an adjustment circuit configured to correspondingly adjust, according to the time information and a preset relative time delay, a relative time delay between an output data signal and a clock signal.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: April 5, 2022
    Assignee: HKC CORPORATION LIMITED
    Inventor: Mingliang Wang
  • Patent number: 11265084
    Abstract: A method, system, and apparatus enabled to selectively choose a baud rate for communication of optical data using a modem enabled to operate with an optical signal modulated at plurality of finely tuned baud rates.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: March 1, 2022
    Assignee: Acacia Communications, Inc.
    Inventor: Jonas Geyer
  • Patent number: 11259058
    Abstract: Techniques are disclosed for measuring propagation delay of a media distribution system based on content output by rendering devices. An output from an output device of the media distribution system may be captured and a token may be detected from the captured content. A timecode may be derived from the detected token. The system's propagation delay may be determined from the derived timecode and may provide a basis to analyze system delays and other processing artifacts. In this manner, propagation artifacts may be estimated between multiple rendering devices that lack controls to synchronize their operation.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: February 22, 2022
    Assignee: Apple Inc.
    Inventors: Simon Goldrei, Steven E. Saunders, Roger N. Pantos, John Matienzo
  • Patent number: 11228977
    Abstract: A base station can enable a terminal in a communication system to monitor a radio link between the terminal and the base station. The base station can transmit a first message to the terminal. The terminal configured to not communicate data with the base station via the radio link during an inactive phase. The first message setting a threshold value for comparison of the threshold value with a duration of the inactive phase.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: January 18, 2022
    Inventors: Osman Nuri Can Yilmaz, Andreas Höglund, Stefan Wager
  • Patent number: 11221644
    Abstract: A system for transceiving data based on a clock transition time is provided. A transmitting device included in the system includes at least one first transmitting circuit configured to transmit data via a wired channel by changing a clock transition time based on the data, wherein the at least one first transmitting circuit includes a skew controller configured to output a skew clock generated by controlling a duty ratio and a skew of an input clock, and a phase-difference modulator configured to output a transmission signal including information about the data generated by changing a transition time of the skew clock based on the data.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: January 11, 2022
    Assignees: Samsung Electronics Co., Ltd., Postech Academy-Industry Foundation
    Inventors: Sooeun Lee, Byungsub Kim
  • Patent number: 11206156
    Abstract: The present application discloses a method for storing data of a transmission signal, which includes: upon the reception of the transmission signal, analyzing a clock signal corresponding to the transmission signal to obtain a signal frequency of the clock signal; according to the signal frequency, acquiring zero-volt time points of a clock signal after signal superposition with the transmission signal; acquiring a preset time length, and according to the zero-volt time points and the preset time length, generating data storage time periods with each of the zero-volt time points as a central time point; and storing data of the transmission signal within each of the data storage time periods. The present application further provides an apparatus for storing data of a transmission signal and a computer readable storage medium.
    Type: Grant
    Filed: September 27, 2020
    Date of Patent: December 21, 2021
    Assignees: HKC Corporation Limited, Chongqing HKC Optoelectronics Technology Co., Ltd.
    Inventor: Mingliang Wang
  • Patent number: 11172515
    Abstract: A communication method and a system that combines fifth generation (5G) communication systems with internet of things (IoT) technologies to support much higher data rates than fourth generation (4G) communication systems are provided. Based on 5G communication technologies and IoT technologies, the present disclosure can be applied to intelligent services, such as smart home, smart building, smart city, smart car or connected cars, health care, digital education, retail business, and security and safety measure. A method of communication for a user equipment includes receiving a random access channel (RACH) configuration from a base station (an evolved nodeB (eNB)), and transmitting to the eNB a random access preamble (RAP) message in an uplink subframe of an unlicensed band matching a subframe configured as a RACH resource according to the RACH configuration.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: November 9, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seunghoon Park, Jungmin Moon
  • Patent number: 11172244
    Abstract: A method is provided for coordinating preparation of video-on-demand (VOD) products that are to be delivered as adaptive-bit-rate (ABR) video streams. In the method, actual start and actual stop times are received from a video product generator for each of a plurality of VOD products processed by the video product generator. The video product generator is configured to create VOD products in video transport streams from source assets. Responsive to receipt of the start and stop times, a transcoder is instructed to insert into a video transport stream for each of the VOD products encoder boundary points and IDR frames at specified times in each of the VOD products. The specified times include offset start and offset stop times of each of the VOD products.
    Type: Grant
    Filed: April 27, 2019
    Date of Patent: November 9, 2021
    Assignee: ARRIS Enterprises LLC
    Inventor: Matthew A. Milford
  • Patent number: 11156704
    Abstract: Method for secure distance measurement comprising the following steps: transmitting from a verifier (V) to a prover (P) a challenge message comprising a challenge bit sequence (C); transmitting from the prover (P) to the verifier (V) a response message comprising the response bit sequence (R); verifying, in the verifier (V), the response message on the basis of the response bit sequence (R); and determining, in the verifier (V), the distance between the verifier (V) and the prover (P) on the basis of the time difference between the challenge message and the response message.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: October 26, 2021
    Assignee: 3DB ACCESS AG
    Inventor: Boris Danev
  • Patent number: 11151392
    Abstract: Embodiments of the present disclosure provide a method and an apparatus for camera calibration processing, a device for vehicle control and a storage medium. In the method according to the embodiments of the present disclosure, at least one pair of images collected by a camera and a vehicle position at a collection time of each of the images are acquired during a process of a vehicle travelling along a straight line, where each pair of images includes images taken by the camera at two different positions, and two images in each pair of images include a common static feature point. A current installation angle of the camera is calculated according to the at least one pair of images and the vehicle position at the collection time of each of the images.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: October 19, 2021
    Assignee: BEIJING BAIDU NETCOM SCIENCE TECHNOLOGY CO., LTD.
    Inventors: Tong Wu, Gaifan Li, Xun Zhou, Shirui Li
  • Patent number: 11140097
    Abstract: Some embodiments provide a network device that may receive alignment information at each physical connection of a network interface of the network device. Each alignment information includes a unique value for identifying a unique logical lane associated with the corresponding physical connection. The network device may determine the order of the unique logical lanes associated with the several physical connections based on the received alignment information. The network device may configure a cross point switch of the network device to reorder the physical connections so that the unique logical lanes associated with the physical connections are ordered according to a defined order.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: October 5, 2021
    Assignee: Arista Networks, Inc.
    Inventors: Andrew Bruce Bridger, Marc Durrenberger
  • Patent number: 11140239
    Abstract: In aspects of shareable devices, a shareable device implements a device sharing module that can maintain an interactive session of a user on the shareable device. The shareable device can detect that the user has moved away from the shareable device during the interactive session, and obscure personalized content associated with the user who has moved away from the shareable device. The device sharing module is implemented to detect, without user input, a user condition indicative of an intent to end or share the interactive session. The device sharing module can determine a status of an executing application associated with the interactive session of the user. The device sharing module can then end or share the interactive session based on the detected user condition and the determined status of the application.
    Type: Grant
    Filed: December 30, 2019
    Date of Patent: October 5, 2021
    Assignee: Motorola Mobility LLC
    Inventors: John J. Gorsica, IV, Rachid M. Alameh, Robert S. Witte
  • Patent number: 11134459
    Abstract: In a base station, a signal synchronization unit detects a received timing of a signal from a mobile station. A correlation position protection unit corrects the received timing on the basis of time from a transmitting timing at which a signal transmitting operation to the mobile station is started to the received timing. A transmitting timing generation unit generates, on the basis of the received timing after the correction, a transmitting timing at which a subsequent signal transmitting operation to the mobile station is started. Further, an FB frame generation unit generates frame period information that indicates a correction value by the correlation position protection unit, and a transmitting processing unit transmits, to the mobile station, a signal including the frame cycle information in response to the generation of the transmitting timing.
    Type: Grant
    Filed: August 22, 2019
    Date of Patent: September 28, 2021
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Daiki Hoshi, Hiroki Kato, Tatsuhiro Nakada
  • Patent number: 11108681
    Abstract: Disclosed herein is a system (10) for transmitting a data stream (12). The system (10) is configured to receive the data stream (12). The data stream (12) carries a plurality of orders that are destined for a market (24) configured for electronic trading. The system (10) is configured to transmit the data stream (12) carrying the plurality of orders. The system (10) is configured to process at least the plurality of orders (12) to determine trading risk information (14) indicative of trading risk. The system (10) is configured to determine if the trading risk indicated by the trading risk information (14) satisfies a trading risk condition (16). The system (10) is configured to cease transmitting the data stream (12) carrying the plurality of orders if the trading risk condition is determined to be satisfied and commenced transmitting another data stream (18) destined for the electronic market. Also disclosed herein is a method for transmitting a data stream (12).
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: August 31, 2021
    Assignee: Arista Networks, Inc.
    Inventor: David Snowdon
  • Patent number: 11102735
    Abstract: Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. According to one embodiment of the present invention, a method of a base station in a wireless communication system can comprise the steps of: generating a first synchronization signal; confirming symbol index information on a plurality of symbols transmitted through beams in directions different from each other; and transmitting the first synchronization signal and the symbol index information in each of the plurality of symbols.
    Type: Grant
    Filed: February 17, 2017
    Date of Patent: August 24, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyunyong Lee
  • Patent number: 11088682
    Abstract: Described is a circuit and architecture that combines phase interpolator (PI) mixer with duty cycle correction (DCC), to prevent cross contention between the tristate inverter pairs of the mixer. The control code for the p-type and n-type networks in the PI mixer are decoupled, and DCC mechanism are blended in the PI mixer code decoding scheme to enable a low latency phase interpolation and duty cycle correction. The circuit comprises a first mixer circuitry controllable by a first code; a second mixer circuitry controllable by a second code; a node coupled to outputs of the first and second mixers; and a keeper circuitry coupled to the node, wherein the first and second mixers are tri-stable mixers.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: August 10, 2021
    Assignee: Intel Corporation
    Inventors: Ee Wah Lim, Lay Leng Lim
  • Patent number: 11088816
    Abstract: A line card receives a SYNC input signal and a first system clock signal. The line card generates a second system clock signal in a PLL and generates a SYNC output signal by dividing the second system clock signal in a divider circuit. The SYNC output signal is fed back as a SYNC feedback signal. The line card determines determining a closest edge of the first system clock signal to a transition of the SYNC input signal and determines a time difference between the closest edge of the first system clock signal and a transition of the SYNC feedback. The SYNC output signal is adjusted based on the time difference using a coarse adjustment by adjusting a divide ratio of the divider circuit and using a fine adjustment in the PLL based on a residue of a remainder of the time difference not accounted for by the coarse time adjustment.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: August 10, 2021
    Assignee: Silicon Laboratories Inc.
    Inventor: Vivek Sarda
  • Patent number: 11088819
    Abstract: A line card of a network box receives a SYNC input signal and generates a first time stamp based on receipt of the SYNC input signal. The line card generates a system clock signal in a phase-locked loop and generates a SYNC output signal by dividing the system clock signal in a divider circuit. The SYNC output signal is fed back to an input terminal as a SYNC feedback signal. A time stamp is generated based on receipt of the SYNC feedback signal. The line card determines a time between the SYNC input signal and the SYNC feedback signal based on the first time stamp and the second time stamp. The timing of the SYNC output signal is adjusted based on the time difference using a coarse time adjustment by adjusting a divide ratio of the divider circuit and using a fine time adjustment in the phase-locked loop based on a residue of a remainder of the time difference not accounted for by the coarse time adjustment.
    Type: Grant
    Filed: March 31, 2020
    Date of Patent: August 10, 2021
    Assignee: Silicon Laboratories Inc.
    Inventor: Vivek Sarda
  • Patent number: 11025252
    Abstract: A failure determination circuit includes a latch circuit that receives an internal clock from a clock latch that rises in response to an external clock rising. In response to a rising edge of the external clock, the circuit generates a rising edge of a fault flag. In response to a rising edge of the internal clock if it occurs, the fault flag falls. The fault flag is then latched. The latched fault flag indicates a single bit upset in the clock latch if the falling edge of the fault flag was not generated prior to latching, if the clock latch is in an active mode, and indicates a single bit upset in the clock latch if the falling edge of the fault flag was generated prior to latching, if the clock latch is in an inactive mode.
    Type: Grant
    Filed: September 23, 2019
    Date of Patent: June 1, 2021
    Assignee: STMicroelectronics International N.V.
    Inventors: Shishir Kumar, Tanuj Kumar, Deepak Kumar Bihani
  • Patent number: 11018844
    Abstract: A method for synchronizing a cascaded RADAR system (80) includes modulating (320) with a master RADAR system (12), an amplitude of a sequence of clock cycles of a clock (70) in response to a Ramp Frame Start (RFS) signal (92). The master RADAR system determines (322) a duration (310, 312, 314) of the sequence of clock cycles based on a code. A slave RADAR system (14) demodulates (324) the sequence of clock cycles to recover the clock and the RFS signal, wherein a clock leading edge of the clock is phase aligned to an RFS leading edge of the RFS signal. The slave RADAR system decodes (326) the code from the duration of the sequence of clock cycles, wherein the code determines an action performed by the slave RADAR system in response to receiving a data signal from the master RADAR system.
    Type: Grant
    Filed: June 6, 2019
    Date of Patent: May 25, 2021
    Assignee: NXP USA, INC.
    Inventors: Andres Barrilado Gonzalez, Olivier Vincent Doaré, Didier Salle
  • Patent number: 11013062
    Abstract: This disclosure provides systems, methods and apparatus, including computer programs encoded on computer storage media, for fast role switching between master and slave roles among wireless nodes. In one aspect, wireless nodes, such as wireless earbuds, coupled to a wireless source, may dynamically and intelligently swap master and slave roles to optimize battery life in the wireless nodes.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: May 18, 2021
    Assignee: QUALCOMM Incorporated
    Inventors: Dishant Srivastava, Mayank Batra
  • Patent number: 10986612
    Abstract: [Object] To adaptively adjust a symbol interval in accordance with a communication environment. [Solution] An apparatus including: a communication unit configured to perform radio communication; and a control unit configured to perform control such that control information for adjusting a symbol interval in a complex symbol sequence into which a bit sequence is converted is transmitted from the communication unit to a terminal, the control information being set on a basis of a predetermined condition.
    Type: Grant
    Filed: July 12, 2016
    Date of Patent: April 20, 2021
    Assignee: SONY CORPORATION
    Inventors: Ryota Kimura, Ryo Sawai
  • Patent number: 10965290
    Abstract: Methods and systems are described for generating, with a local oscillator and an adjustable phase interpolator, a data-sampling clock and a variable-phase-offset eye-measurement clock, forming a received data signal using a multi-input comparator, generating, using a data slicer and the data sampling clock, a receive sample of the received data signal, and generating, using at least one eye slicer and the variable-phase-offset eye-measurement clock, a plurality of eye characteristic measurements by adjusting a sampling threshold of the at least one eye slicer and a phase offset of the variable-phase-offset eye-measurement clock.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 30, 2021
    Assignee: KANDOU LABS, S.A.
    Inventor: Armin Tajalli
  • Patent number: 10958410
    Abstract: There are provided examples of receivers, controller units and related methods, wherein one receiver includes: an adjustable sample provider configured to provide samples of an input signal using an adjustable sample timing; a feedback path configured to provide a feedback signal to the adjustable sample provider on the basis of a timing error, wherein the feedback path includes a loop filter configured to provide sample timing information to the adjustable sample provider; and a replacement value provider configured to provide a replacement sample timing information replacing the sample timing information provided by the feedback path when an input signal does not fulfil a predetermined requirement for a feedback-based sample timing adaptation, wherein the replacement value provider is configured to provide the replacement sample timing information considering a timing error information, or a quantity derived from the timing error information, over a longer time period when compared to a time period consider
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: March 23, 2021
    Assignee: Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V.
    Inventors: Christian Rohde, Carmen Wagner, Stefan Lipp
  • Patent number: 10951264
    Abstract: Ultra-Wideband (UWB) technology exploits modulated coded impulses over a wide frequency spectrum with very low power over a short distance for digital data transmission. Such UWB systems through their receivers may operate in the presence of interfering signals and should provide for robust communications. Accordingly, an accurate and sharp filter that operates at low power is required and beneficially one that does not require a highly accurate power heavy clock. Further, many UWB applications require location and/or range finding of other elements and it would therefore be beneficial to provide a UWB based range finding and/or location capability removing the requirement to add additional device complexity and, typically significant, power consumption.
    Type: Grant
    Filed: July 23, 2020
    Date of Patent: March 16, 2021
    Assignee: Transfert Plus, Societe en Commandite
    Inventors: Frederic Nabki, Dominic Deslandes, Mohammad Taherzadeh-Sani, Michiel Soer, Rabia Rassil
  • Patent number: 10931486
    Abstract: Highly efficient digital domain sub-band based receivers and transmitters.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: February 23, 2021
    Assignee: TECHNION RESEARCH AND DEVELOPMENT FOUNDATION LTD.
    Inventors: Moshe Nazarathy, Alex Tolmachev
  • Patent number: 10928882
    Abstract: A processing system includes multiple processors in which first processor operates at a first clock frequency and first supply voltage at all times. At least one processor is dynamically switchable to operate at the first clock frequency and first supply voltage resulting in the first and second processors providing symmetrical multi-processing (SMP) or at a second clock frequency and a second supply voltage resulting in the first and second processors providing asymmetrical multi-processing (ASMP). A third processor may be included that also operates at the first clock frequency and the first supply voltage at all times. Various criteria can be used to determine when to switch the at least one switchable processor to improve power consumption and/or performance. A controller enables control and fast-switching between the two modes for the switchable processor.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: February 23, 2021
    Assignee: Futurewei Technologies, Inc.
    Inventors: Wei Chen, Konggang Wei, Tongzeng Yang
  • Patent number: 10911161
    Abstract: A transmitter for an RF communications system, that includes an auxiliary receiver for capturing transmit signal data for use in compensating/correcting transmit signal impairments (such as for DPD, QMC, LOL). The transmitter (such as Zero IF) includes analog chain elements that introduce transmit signal impairments (such as PA nonlinearities). The auxiliary receiver is configured to receive loopback transmit RF signals, and includes an RF direct sampling ADC to convert the loopback transmit RF signals to digital transmit RF signals. Digital down conversion circuitry is configured to downconvert the digital transmit RF signals to captured digital transmit baseband signals, and data capture circuitry is configured to generate the transmit signal data based on the captured digital transmit baseband signals.
    Type: Grant
    Filed: November 27, 2019
    Date of Patent: February 2, 2021
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Sandeep Oswal, Visvesvaraya Pentakota, Jagannathan Venkataraman, Jaiganesh Balakrishnan, Francesco Dantoni
  • Patent number: 10911930
    Abstract: A communication system as an example of an exemplary embodiment includes two mobile terminals and two BLE terminals. The mobile terminals establish connections with the BLE terminals. Specifically, one of the mobile terminals and one of the BLE terminals are connected together such that the mobile terminal is a central and the BLE terminal is a peripheral. In the state of being connected to the mobile terminal, the BLE terminal communicates with the other BLE terminal in the state of being connected to the other mobile terminal. The BLE terminals may establish a connection with each other and communicate with each other, or may communicate with each other without establishing a connection with each other.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: February 2, 2021
    Assignee: NINTENDO CO., LTD.
    Inventors: Hiroyuki Takeuchi, Yoshitaka Imura
  • Patent number: 10892852
    Abstract: A master includes a transmission and receiving unit that transmits and receives signals to and from a slave, and the transmission and receiving unit receives read data read out from the slave, and typically drives the second bit of a preamble transmitted/received subsequent to the read data. The master can notify the slave that communication is or is not interrupted at some midpoint, on the basis of the second bit of the preamble. The present technology can be applied to a bus IF that communicates pursuant to, for example, the specification of I3C.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: January 12, 2021
    Assignee: Sony Corporation
    Inventors: Hiroo Takahashi, Takashi Yokokawa, Sonfun Lee, Naohiro Koshisaka
  • Patent number: 10884451
    Abstract: A cascaded clock ring network includes a clock path that transmits a source clock through series-connected processing nodes, from a first processing node to a last processing node. A data path transmits data through the processing nodes in response to the transmitted source clock, from the first processing node to the last processing node. The last processing node provides the transmitted source clock as an end clock signal, and provides the transmitted data as end data values. The end data values are written into a FIFO memory in response to the end clock signal. The end data values are subsequently read from the FIFO memory using the source clock signal, and are provided to the first processing node. A synchronizing circuit ensures that a plurality of end data values are initially written into the FIFO memory before an end data value is read from the FIFO memory.
    Type: Grant
    Filed: May 1, 2018
    Date of Patent: January 5, 2021
    Assignee: DeGirum Corporation
    Inventor: Winston Lee