Abstract: A method and apparatus for estimating the timing position of data bursts received in a data stream, where each data burst includes a number of bits comprising a training sequence in a fixed location. The receiver includes circuitry for estimating the timing position of the data bursts received in the data stream. For each of the first N received data bursts, the receiver estimates a plurality of timing locations of the training sequence, correlates the training sequence for each estimated timing location, and determines the timing location associated with the highest correlation value. The receiver then determines the average timing location of the highest correlation values for each of the first N data bursts. For the next M data bursts the receiver estimates the timing location of each data burst based on the average timing location for the first N data bursts.

Abstract: The invention provides for an apparatus for decoding a serial datastream of channel words into a datastream of information words. The apparatus comprises an input terminal (10) for receiving the serial data stream of channel words, a serial-parallel converter unit (16) means for serial-to-parallel conversion of the serial datastream into a parallel datastream of n-bit intermediate channel words. Further, a clock signal generation unit (14) is present for deriving a first clock signal of a specific frequency from the serial datastream of channel words. A frequency division unit (18) is present for dividing the frequency of the clock signal generated by the generation means by a factor of n, so as to obtain a second clock signal of a reduced frequency. A sync word detection unit (24) is available for detecting sync words present in said serial datastream of channel words.

Abstract: A method and apparatus for data retrieval from a storage media, such as magnetic disk drive. A synchronization detector decodes the synchronization information from either the first or second synchronization mark. A later stage detector then carries out several decoding iterations using the synchronization information from the synchronization detector and data stored in the first and second memories. Loss of the data between the first synchronization mark and the second synchronization mark, if there is a problem with the first synchronization mark, is avoided because the bit stream is stored in the first memory.

Abstract: A timing acquisition algorithm for locating the sync timing position of a sync word embedded in a received signal for achieving synchronization between the received signal and a base station, e.g., a base station receiving the received signal, within a wireless telecommunications system. The timing acquisition algorithm is preferably a set of programmable instructions incorporated within a software package and processed by a processor at the within the wireless telecommunications system, such as at the base station. The timing acquisition algorithm gets rid of the unlikely sync timing position for each branch of an adaptive antenna array in the first step; gets rid of the unlikely sync timing position for all branches in the second step; and uses optimal diversity combining for the remaining timing position and uses the conventional correlation or mean-square-error (MSE) approach on the combined data in the third step to finally locate the timing position of the sync word.

Abstract: Data transactions are partitioned to transfer data across a communication connection requiring naturally aligned data transfers of quad-words. It is determining from byte enable signals whether the bytes of the data to be transferred start in the high order dword or end in the low order dword of a quad-word. The transaction is separated into two transactions if the bytes of the data to be transferred start in the high order dword or end in the low order dword of a quad word. A second transaction is created by pre-appending if the bytes of the data to be transferred start in the high order dword. A second transaction is created by post-appending if the bytes of the data to be transferred end in the low order dword of a quad word.

Abstract: A method and a communication system are in which a first synchronization message identifying a data transmission method with the highest-level error protection that a first device is capable of executing is transmitted from said first device to a second device. In the second device, the data transmission method is detected from the first synchronization message. In case the detected data transmission method is supported by the second device, a second synchronization message is sent to the first device identifying the detected data transmission method. In the first device, the data transmission method is detected from the second synchronization message, and in case the detected data transmission method can be executed by the first device, the devices are synchronized with the data transmission method.

Abstract: In the transmission device, a synchronization pattern made by arranging a predetermined basic pattern consisting of a combination of a predetermined number of symbols and a reversal basic pattern made by reversing a polarity of each symbol of the basic pattern, in the order according to a reversal pattern, is generated, and transmission data obtained by adding thus obtained synchronization pattern at predetermined timing is transmitted. In the reception device, the basic pattern and reversal basic pattern in the synchronization pattern are correlated with each other by a matched filter (11) corresponding to the basic pattern, and the correlation of the reversal pattern which appears in a signal obtained as a result, is taken by a matched filter consisting of delay portions (12), multipliers (13) and an adder (14).

Abstract: A method employing multisignal encoded start pulses and end pulses for data transmission by use of radio waves, carries out encoding so that a very large number of kinds of patterns (not less than 1014 kinds are possible) can be effected with one frequency. In the binary system, encoding needs a large number of signal pulses and high frequency, and the frequency of the carrier wave becomes very high also. The multisignal method of this invention makes it possible to reduce the encoding bits and the carrier wave frequency by using level sensing and width comparison techniques. This method also removes noise owing to its level sensing and width comparison techniques which have not been used in conventional digital communication systems. Therefore, the reception of erroneous information, the occurrence of unclear audio-visual images, and noise trouble are prevented in the use of radio waves.

Abstract: A data file having a plurality of frames is received, with each frame having a syncword located at a first predefined length from a known data value that is inconsistent with a data pattern of the syncword. A data string including a plurality of potential syncwords is identified. A first portion of the data string in excess of a second predefined length is skipped from syncword verification processing. The second predefined length includes the first predefined length plus the length of the syncword. A second remaining portion of the data string is processed for syncword verification.

Abstract: A chirp waveform is employed in establishing timing synchronization between nodes of a data communication network. In one embodiment, the chirp waveform is combined with a waveform modulated with data to form a synchronization waveform. The receiver of the synchronization waveform determines an alignment of the chirp waveform to a template chirp waveform to synchronize timing between nodes.

Abstract: In an alignment/frame synchronization apparatus, a RSB frequency-dividing circuit generates a second clock. A data width extension circuit extends eight input data into 16 output data. A byte alignment circuit generates byte signals, and byte-aligns the output signals in accordance with a byte alignment control signal. A control circuit outputs byte alignment control signals to the byte alignment circuit in correspondence with the byte signals in accordance with detection of A1A1 and A2A2 patterns, and outputs an A1/A2 consecutive pattern signal indicating the reception of a predetermined number of consecutive A1 and A2 frame patterns. A frame pulse generating circuit generates a frame pulse signal when an A2 frame pattern is received following an A1 frame pattern. A frame sync detection circuit generates a frame sync signal when the frame pulse signal output is consecutively received a first predetermined number of times.

Abstract: A synchronization method for received sign and its apparatus capable of increasing accuracy of detection of a receiving signal, of estimating a frequency and of improving reliability in the synchronization of received signal are provided. A signal intensity detecting section is used to detect some peak values and timing values of signals obtained in a first frame and to store them into a memory. A signal extracting section is used to estimate timing, in a second frame, by obtaining a largest synthesized peak value in both frames from the peak value and timing value supplied by a timing estimating section. In a frame following the second frame, frequency data estimated based on a frequency estimating signal with an estimated timing and frequency data estimated based on a frequency estimating signal corresponding to the estimated timing in the frame following the second frame are synthesized and an estimated frequency error is obtained from the synthesized frequency data.

Abstract: The present invention provides a frame synchronous circuit wherein the number of devices handling a high-speed digital signal is limited to the minimum without deteriorating frame pull-in time and an erroneous synchronization rate. For the sake of it, synchronous word decision devices decide frame synchronization from four lines of low-speed digital signals into which the high-speed digital signal is converted by a serial-parallel converter. An OR circuit synthesizes respective outputs of the synchronous word decision devices, and an aperture circuit applies an aperture to the output synthesized. A selection circuit fetches only one output corresponding to the change of the apparent synchronous word after establishment of synchronization. A frame counter circuit estimates a predetermined position of the next frame at the time of applying a narrow aperture. A leading-edge positioning/column change circuit performs leading-edge positioning and column change of data to the output of the selection circuit.

Abstract: A method is disclosed to distinguish a first type of control channel from a second type of control channel. The method includes steps of (a) transmitting a carrier of the first type of control channel so as to include a first symbol sequence that results, when demodulated, in a sine wave having a frequency with a first offset from the carrier; (b) transmitting a carrier of the second type of control channel so as to include a second symbol sequence that results, when demodulated, in a sine wave having a frequency with a second offset from the carrier; and (c) demodulating a received carrier and detecting whether the carrier includes the first type of control channel of the second type of control channel. In the preferred embodiment of this invention the first symbol sequence is an all zeroes sequence, and the second type of symbol sequence is an alternating ones and zeroes sequence, which results in the first offset being a positive offset, and the second offset being a negative offset.

Abstract: In this demodulation method, a receive signal is demodulated estimating the fading distortion of data by detecting the fading distortion of unique word as pilot signal inserted into multiple sections of the receive signal. The method has the steps of: comparing a unique word in the multiple sections of receive signal and a known unique word and thereby detecting the fading distortion of unique word in the multiple sections; calculating a spline interpolation curve based on the fading distortion of unique word in the multiple sections; estimating the fading distortion of data in the receive signal from the spline interpolation curve; and demodulating the data in the receive signal based on the fading distortion of the data.

Abstract: A method is provided for transmitting control information in a digital audio broadcasting system. The method comprises the steps of transmitting a plurality of control bits in each of a plurality of control frames, wherein a first sequence of the control bits represents a transmission mode, and a second sequence of the control bits represents a control data synchronization word. The plurality of control bits can further include a third sequence of bits representative of an interleaver synchronization word. A method performed in a radio receiver for determining transmission mode and synchronization for a digital audio broadcasting signal is also provided. The method comprises the steps of receiving a plurality of interleaver frames containing digital information, wherein each of the interleaver frames includes a plurality of control frames.

Abstract: In order to obtain a digital radio communication receiver having a preferable frame-structure decision probability, a frame synchronization state is decided in accordance with separately detected frame-synchronization synchronous words and a frame-structure is decided in accordance with a frame-structure synchronous word and to output the frame synchronization state and the frame structure.

Abstract: A method for improving the performance of a random access communications system in a variable radio environment is disclosed, whereby at least one valid set of burst signatures is used for transmission by one or more mobile stations. Each set includes at least one signature with a different signature-length than the signatures in other sets. The different signature-lengths can be optimized for the operational environments involved (e.g., longer signatures for slower-moving mobile stations, and shorter signatures for high-speed mobile stations). Alternatively, at least one differentially-encoded signature is used for random access transmissions, in order to reduce the radio channel's sensitivity to large doppler spreads and frequency errors.

Abstract: A frame synchronizer for use in a receiver that receives an encoded signal from a transmitter includes a conjugation unit, a delay unit and multiplier coupled together to process the encoded signal. The multiplier multiplies either the received encoded signal by a conjugated, delayed version of the received encoded signal or multiplies a conjugated version of the received encoded signal by a delayed version of the received encoded signal to produce a first product signal. A further multiplier multiplies the first product signal with a locally-stored signal to generate a second product signal. An accumulator accumulates the second product signal over a plurality of bit times to generate an accumulated signal having a magnitude representing a time synchronization offset between the receiver and the transmitter and phase representing a frequency synchronization offset between the receiver and the transmitter.

Abstract: A received communications signal is correlated with a common synchronization code to produce a synchronization detection signal. A component of the synchronization detection signal associated with a known synchronization signal is canceled from the synchronization detection signal to produce an interference-canceled synchronization detection signal. Timing of a synchronization signal is determined from the interference-canceled synchronization detection signal. According to one aspect, interference cancellation is achieved by generating a correlation of an estimated received known synchronization signal with the common synchronization code, canceling the correlation of the estimated received known synchronization signal with the common synchronization code from the synchronization detection signal to produce the interference-canceled synchronization detection signal.

Abstract: A data recording and reproducing apparatus for recording and reproducing video signals in a plurality of formats with different rates to/from a record medium is disclosed. In the data recording and reproducing apparatus, a video signal in a selected format is converted into video data packets and audio data packets whose lengths are optimally designated corresponding to the selected format. With a video data packet and an audio data packet, a video sync block and an audio sync block whose lengths are different are formed, respectively. The video sync block and the audio sync block are encoded with respective error correction codes. The resultant data is recorded as record data to a record medium. Corresponding to the data rate of the video signal, at least one data packet is placed in one video sync block. A synchronization detecting apparatus automatically and accurately detects sync blocks with different lengths from a data sequence of record data reproduced from a record medium.

Abstract: In transmitting ten-bit word string data including synchronous word data converted, at a transmitting side, from eight-bit word string data, representing signal information data synchronization required for reproducing the signal information is reliably established at a receiving side. An additional word data group containing eight-bit synchronous word data is inserted between words of the eight-bit word string data. Then, 8B-10B conversion is performed on the eight-bit word string data, thereby obtaining ten-bit word string data. In this case, the additional word data group is selected so that a running disparity of the ten-bit synchronous word data contained in the additional word data group of the composite ten-bit synchronous word data is consistently positive or negative.

Abstract: In a mobile radio communication system, a transmitter of a base station transmits broadcast information to receivers of mobile stations in the form of frames. The transmitter produces a long frame composed of a plurality of frames each including a first bit sequence and part of the broadcast information following the first bit sequence, and a second bit sequence located at the head of the long frame. Each of the first bit sequences and the second bit sequence is used for establishing synchronization between the transmitter and each of the receivers. Upon receipt of the long frame from the transmitter, the receiver establishes synchronization of the long frame based on the foregoing second bit sequence.

Abstract: A data file (22) having a plurality of frames is received, with each frame having a syncword. A data string (52) including at least one potential syncword (54) is identified in the data file (22). A subsequent potential syncword address for the potential syncword (54) is determined. A pointer address corresponding to a potential syncword following the data string (52) in the data file (22) is identified. The pointer address is compared to the subsequent potential syncword address. The data file (22) is decoded based on the potential syncword following the data string in response to the pointer address corresponding to the subsequent potential syncword address.

Abstract: A method is disclosed for receiving a transmitted signal in a communication system employing CDMA techniques wherein the transmitted signal includes a plurality of short codes, each of which is transmitted repetitively over a fixed period of time and where the received signal has CW interference in addition to the transmitted signal. The method includes using a Sequential Ratio Probability Test (SPRT) for detecting the presence of the short code in a plurality of time phases of the received signal by calculating a likelihood ratio for each phase. A likelihood ratio is a comparison of the signal's Probability Distribution Function (PDF) with a background noise PDF. The background noise PDF is calculated by combining in the RAKE the current short code with the input signal.

Abstract: This invention pertains to the discovery that inhibition of phosphatidylinositol 3-kinase (PI3K) in human fetal undifferentiated cells induces morphological and functional endocrine differentiation. This is associated with an increase in mRNA levels of insulin, glucagon, and somatostatin, as well as an increase in the insulin protein content and secretion response to secretagogues. Blockade of PI3K also increases the proportion of pluripotent precursor cells coexpressing multiple hormones and the total number of terminally differentiated cells originating from these precursor cells.

Abstract: A system and method are provided for achieving slot synchronization in a Wideband CDMA system in the presence of large initial frequency errors. A FSC matched filter having a reduced coherence window is provided for reducing degradation of a symbol due to carrier phase rotation resulting from oscillator error, thereby preventing severe loss of signal energy at the peaks of the FSC matched filter output. Additionally, a circular sliding integrator is provided to combine the accumulated disbursed signal energies due to the oscillator error and multipath interference, thereby allowing easier identification of the time index representing the time slot boundary. Further, a sorter is provided for determining a predetermined number of time index candidates representing the time slot boundary, thereby increasing the possibility that the true time index boundary is sent to the second stage of synchronization.

Abstract: The timing of an access burst received in a base station of a wireless communications system is determined by detecting one or more zero bit fields, constituting predetermined sequences of identical consecutive symbols in the access burst. For each possible timing of the access burst, whether a predetermined sequence is present in the respective position in the access burst is detected by predicting a sample of the received signal in the current symbol period from a sample of the received signal in the preceding symbol period assuming identity of symbols in the current and preceding symbol periods, producing a squared distance between predicted and received samples for the current symbol period, producing a threshold in dependence upon a power of the received signal for the preceding symbol period to accommodate fading, and comparing the squared distance with the threshold, continuing for successive current symbol periods until the end of the sequence or until the respective threshold is exceeded.

Abstract: Control information is processed in synchronism with audio and video data according to a protocol such as RTP (Real-time Transfer Protocol). In one embodiment, a payload handler receives incoming data packets and forwards them to either a data control filter or an audio packet handler. The data control filter determines whether the data payload contains video data or control information and forwards video data to a video data packet handler and data control information to a data handler. The data control information can include an action identifier field (e.g., containing a “display” command) and a data object field (e.g., identifying a file location in a memory) so that the data control filter can display the identified file with the presentation of the other video and audio data.

Abstract: A synchronization detector has three registers to memorize individual patterns of three successive frames. A decoder produces a frame location signal on the basis of the individual patterns. A pointer circuit counts the number of the frame location signal to produce a pointer signal. The decoder produces a count-up signal when it can decode the individual patterns. The decoder produces a reset signal when it can not decode the individual patterns. A counter counts the count-up signal and is reset by the reset signal. A register holds a predetermined value. A comparator compares the count value of the counter with the predetermined value. The comparator produces a comparing order signal when the predetermined value is less than the count value. A comparing circuit compares the frame location signal with the pointer signal. If the frame location signal is not equal to the pointer signal, it happens that an optical head skips a few frames or slips to a next truck.

Abstract: Coarse symbol synchronization is carried out during reception, for tuning, the signal being correlated in the time domain with various copies of itself which are shifted in time and correspond to the possible transmission modes. The present mode, the present guard interval and a sampling window are derived from this.

Abstract: A system and method for user information transfer before modem connection. The invention makes high-speed modems more efficient, particularly for transaction and Internet applications, by providing for transmission of pre-connection user data during modem training. A training sequence for a modem in accordance with the invention may be summarized as follows: beginning training of the modem at a first data rate using a defined training sequence; after a selected amount of training, transmitting pre-connection user data from the modem at up to the first data rate while continuing training of the modem; ending training; and enabling transmission of user data at a full connected data rate of the modem.

Abstract: Method for synchronizing frames by using pilot patterns in a compressed mode. In a case a W-CDMA mobile communication system is operated in a compressed mode, the present invention permits to restore perfect frame synchronization words in frames by using dedicated pilot sequence pattern, and achieve frame synchronization by using correlation of the restored frame synchronization words, even if all the 15 slots of one frame are not transmitted.

Abstract: The invention is a novel method enabling a base station receiver to quickly and accurately validate a coded digital verification color code (CDVCC) vector received from a mobile station against a locally stored CDVCC vector identifying the cell to which it belongs. At the base station receiver, the received signal is sampled at twice the transmitted symbol rate, producing complex-valued samples of the received symbol envelope. These contain the received CDVCC vector and a known SYNC vector, and are assumed to have undergone dispersion characterized by several dispersion coefficients. The SYNC vector is detected with relative ease, allowing the establishment of a reference sample time. This is followed by the receiver determining a plurality of possible starting times (or “shifts”) for the CDVCC vector relative to the reference sample time.

Abstract: The present invention provides a method of generating a data stream comprising: generating a first slot having a first data field; generating a second slot; and providing the second slot within the first data field of the first slot. The present invention additionally provides methods of validating an integrated circuit and communicating a data stream.

Abstract: In accordance with this invention, a data capture circuit of a data receiver captures data from a data stream of a data transmitter operating at a different phase or frequency from the system clock of the data receiver. In one embodiment, the data receiver determines the number of clock periods of a clock signal in a data period of the data stream. Specifically, a signal detection circuit receives a signal having a periodic and distinctive feature. The period of the periodic and distinctive feature is related to the data period by a fixed scaling factor. A counter counts the number of clock periods of the clock signal between a first occurrence of the periodic and distinctive feature and a second occurrence of the periodic and distinctive feature. A multiplier/divider circuit divides or multiples the content of the first counter by the scaling factor to determine the integer clock period count. The results of the multiply or divide is stored in a count register.

Abstract: A method and system for time aligning a frame (60) in a communication network (10) involves the steps of; i) determining if a frame needs to be advanced at a BTS (14), and ii) sending a shortened synchronization pattern from the BSC (12). The BTS (14) then determines if a short or long synchronization pattern has been sent by determining (256) if the received data stream matches a long synchronization pattern and setting a first flag when they do match. If the received data stream does not match the long synchronization pattern and the first flag is set (264), the data stream is compared (266) to the short synchronization pattern. When they match a second flag is set (268).

Abstract: A bit shift value of a synchronizing signal is detected. That is, after respective hamming distances between data from the first part of the synchronization signal and the respective pre-detects words, which are calculated by hamming distance calculators, are respectively compared with a predetermined value by comparators, the compared results are encoded by an encoder and the results are output as the bit shift value. Such bit shift value may be utilized to shift positions of the synchronizing signals of synchronizing blocks.

Abstract: A fast acquisition method is described that combines timing, gain and, if required, equalizer acquisition in one go with word synchronization. At the heart of the method is a preamble that begins with a repetition of identical words P whose length matches the code-word length. Preferably the method ends with a frame-sync word based on the bit-by-bit inverse of P. Main attractions of the technique are simplicity, speed, and robustness.

Abstract: A de-framer (72) in a communications gateway (22) translates videoconferencing information from a circuit-switched format to a packet-switched format. A demultiplexor (78) extracts a bitstream containing video information that includes error-correction-code fields disposed at predetermined locations with respect to synchronization bits spaced by a synchronization interval and forming a predetermined synchronization sequence. A frame checker (88) for checking the error-correction code finds codeword boundaries by comparing the predetermined synchronization sequence with sequences of synchronization-interval-spaced video-bitstream bits until it finds a match. To do so, the frame checker (88) takes a group of video-bitstream words offset from each other by the synchronization interval. It compares each word in the group with a respective synchronization word consisting of a word-width replication of a respective synchronization bit.

Abstract: There is provided an apparatus for detecting a synchronizing signal, including a first circuit for extracting bit clocks from serial data received, a shift register for shifting the serial data bit by bit on the basis of the bit clocks, and latching the thus shifted serial data, a second circuit for counting the bit clocks, and generating word clocks in accordance with the number of count of the bit clocks for outputting parallel data, a third circuit for detecting a synchronization pattern from the serial data stored in the shift register, and generating a first synchronization-detecting signal, a fourth circuit for detecting a synchronization pattern from the parallel data, and generating a second synchronization-detecting signal, and a fifth circuit for determining whether frame synchronization is made, by the first and second synchronization-detecting signals, and generating a frame synchronization indication signal indicative of whether frame synchronization is made or not.

Abstract: A method, apparatus and article of manufacture are described. In particular two network interface devices that are connected over apath that includes a digital trunk using robbed-bit signaling use a technique to identify the presence of robbed-bit signaling. The network interface devices synchronize to bytes that are subject to robbed-bit signaling. The network interface devices must synchronize to the robbed-bit signaling to avoid transmitting information or receiving information in these signaling positions. The network interface devices then take advantage of the least significant bit positions of frames that are not used for robbed-bit signaling. This results in an increase in data carrying capacity from 56 kps to 62.7 kps.

Abstract: The present invention describes a method of estimating the symbol time offset in a received signal of a data modem using only one received synchronization symbol. This estimate of the offset is used for a rapid synchronization during the starting phase or for resynchronization during a micro-interruption. The method estimates the offset by comparing the frequency domain constellation obtained by transforming the received synchronization symbol using the current sample pointer setting with the frequency domain constellations stored as templates. (A constellation point for a channel is phase and magnitude values in frequency domain for the channel). It chooses the template which is closest to the received constellation and declares the offset corresponding to the chosen template as the estimated offset for the received symbol. The templates are obtained by the following process.

Abstract: A network interface in a workstation computer includes a pattern matching circuit to enable the workstation computer to wake up to perform prescribed operations requested by a remote workstation. The pattern recognition circuit includes a pattern memory configured for storing a pattern entry for at least a portion of a predetermined pattern. The pattern entry includes a pattern data field and a second field specifying a number of bytes in the input data stream to be ignored prior to comparison with the pattern data field. The pattern matching circuit also includes a comparator for comparing the pattern data field with a selected group of bytes from the data stream. Pattern match logic determines whether the received data packet includes the predetermined pattern based on the comparison result.

Abstract: Phases of the spread spectrum signal are corrected with a high degree of accuracy by a minimum of circuitry. One of phase correction circuits 31-34 of the receiver corresponds to each path. The I-component and Q-component of a despread output are supplied to the phase correction circuits 31-34. A phase error extractor 1 extracts the first phase error from a received pilot block. A phase corrector 2 corrects the phase error of a received information symbol using a correction vector that has been calculated based on the first phase error. The RAKE synthesizer 25 synthesizes the corrected received signal with outputs of the phase correction A circuits of other paths and outputs the synthesized signal to a temporary determiner 3 which temporarily determines an information symbol to be processed. The phase error is modified in a correction vector modifier 4 using the temporary determination result. A new correction vector is calculated based on the modified phase error.

Abstract: Synchronization words, contained within a data transmission are detected by oversampling the incoming data transmission by a factor of M. Each of M samples are stored in a respective register on an ongoing basis and a receiver is activated to monitor the contents of all registers to determine if they contain a synchronization word. Commonly a plurality of registers may detect the presence of a synchronization word simultaneously. The one having the largest amplitude bit samples is selected and the receiver changes mode to monitor the output of that register while another receiver is activated to monitor all registers. This is particularly useful in detecting synchronization words or flags in data packets, particularly in modem to modem communications.

Abstract: In a Sync signal detection circuit for detecting a Sync signal included in a television signal transmitted in a digital mode, pattern check means 2 checks a pattern of a Sync signal which is super imposed on a series of input data with a reference pattern. Based on a check result, Sync detection determination means 5 outputs a Sync detected signal or a Sync non-detected signal. Sync detection initialization means is further provided to this detection circuit for outputting forcibly a Sync non-detected signal when a signal of a series of input data is switched over. As a result, a Sync signal can be detected within a shorter period than the conventional circuit structure.

Abstract: There is provided a method of transmitting and receiving a frame including unique pattern information indicative of a starting point of digital information. Step (a) performs a receive synchronizing process in which the frame is pulled in a given phase of a machine cycle equal to m which is equal to (1/N).times.L where L denotes the number of bits forming the frame, N is a positive integer and m is a positive integer larger than 2. Step (b) performs, in a receive process executing phase forming part of a same machine cycle as that of the step (a), a receive process in which receive control channel data contained in a received frame is written into a shared memory in accordance with first m-bit stream program information which defines the receive process and is stored in the shared memory.

Abstract: A Kronecker product code structure for a synchronization word is presented which permits the use of dual-mode sequential matched filter. This matched filter permits a large reduction in acquisition time since the number of frequency bins that must be searched is greatly reduced when there is a large frequency uncertainty. In the first mode of operation the output of a filter matched to the high rate code is non-coherently integrated in a post-detection integrator to obtain reliable but ambiguous acquisition of the synchronization word. In the second mode of operation the ambiguity is resolved.

Abstract: An audio decoder decodes audio frames included in a Motion Picture Experts Group (MPEG) bitstream for presentation or playing. Each audio frame includes a synchronization code and a frame header, followed by audio data. The synchronization codes are detected, and it is determined that the decoder is synchronized to the bitstream after a first predetermined number, for example three, of successive valid audio frames have been detected. It is similarly determined that the decoder is unsynchronized to the bitstream after a second predetermined number, which can also be three, of successive invalid audio frames have been detected. Each and every frame is determined to be valid if its header parameters are valid, it passes the CRC error check (optional), no syntax errors are detected and its frame length (interval) is as expected.