Abstract: A method, system, and computer program product for facilitating power instability in a central electronics complex (CEC) of data storage computing environment in advance of a potential power failure is provided. Upon receipt of a first early power off warning (EPOW) signal indicating power instability, a first priority of execution of a first data storage task to be performed pursuant to a new data storage request is decreased, while a second priority of execution of a second data storage task to destage data in nonvolatile storage (NVS) to disk is increased. Upon receipt of a second EPOW signal indicating power failure, a system shutdown procedure is executed.

Abstract: One disclosed method involves providing a first device comprising a sensor configured to sense a stimulus experienced by the first device, a controller configured to process data received from the sensor and thereby obtain processed sensor data, a transmitter configured to wirelessly transmit the processed data, and a battery configured to supply power to at least the controller and the transmitter. The first device is operated in a first operational mode in which the sensor, the controller, and the transmitter are used at least occasionally to obtain and transmit processed data. When the battery is in a low power condition, the first device is operated in a second operational mode wherein the sensor, controller, and transmitter are not used to obtain and transmit processed sensor data, but wherein the first device at least occasionally transmits a signal that indicates a low power condition of the battery.

Abstract: A battery powered device is able to maintain a clock value when the battery is removed for a short period. During a first time period, while the battery is in the device, clock pulses derived from a first oscillator are counted at a first rate in a first counter that represents the clock value. During a second time period following the first time period, while the battery is removed, the value of the first counter is maintained independent of any clock pulses derived from the first oscillator, clock pulses derived from a second low power oscillator are counted in a second counter. During a recovery time period following the second time period, clock pulses derived from the second oscillator are again counted in the second counter, while clock pulses derived from the first oscillator are counted in the first counter at a second rate higher than the first rate, the duration of the recovery time period being determined based on the number of pulses counted in the second counter during the second time period.

Abstract: One disclosed method involves providing a first device comprising a sensor configured to sense a stimulus experienced by the first device, a controller configured to process data received from the sensor and thereby obtain processed sensor data, a transmitter configured to wirelessly transmit the processed data, and a battery configured to supply power to at least the controller and the transmitter. The first device is operated in a first operational mode in which the sensor, the controller, and the transmitter are used at least occasionally to obtain and transmit processed data. When the battery is in a low power condition, the first device is operated in a second operational mode wherein the sensor, controller, and transmitter are not used to obtain and transmit processed sensor data, but wherein the first device at least occasionally transmits a signal that indicates a low power condition of the battery.

Abstract: A ripple counter circuit supports two modes of operation, a user mode and a test mode. In the user mode, the circuit functions as a standard ripple counter, counting in response to first edges (e.g., rising edges) on a clock input signal. In the test mode, the ripple counter circuit alternates between two states. In the first state, the bits all toggle from their initialization values to new values. In the second state, the circuit operates in the same fashion as the user mode. Therefore, the ripple counter circuit counts by one, returning all of the bits to their initialization values. This capability significantly simplifies the testing process, particularly for long ripple counters. Some embodiments of the invention include various control circuits coupled to provide an internal clock signal and/or an initialization signal.

Abstract: An integrated circuit which includes not only a real time clock, but also an elapsed time counter, and a third counter. The elapsed time counter measures the total number of seconds during which a system has been powered up. The third counter is a "cycle counter," which measures the number of times a power cycle (power-up and power-down) has occurred. Thus, by reading the cycle counter and the elapsed time indicator, the general power history of a system can readily be determined, even if the system itself has totally failed. This integrated circuit is battery backed, and is advantageously combined with a system for which power history must be maintained.

Abstract: A parking lot traffic control and fee collection system is disclosed for use in stadium type parking lots. A vehicle counter installed in a portable traffic pylon is provided at the entry point for each entrance lane of the parking lot for marking the station of the parking attendant. The vehicle counter is installed in a tamper-proof arrangement and the cumulative count of vehicles is presented on a display device which is viewable without opening the enclosure provided by the pylon. A parking supervisor may read the cumulative count at any time and pick-up the receipts from the parking attendant during or at the completion of the parking process. The amount of the receipts collected is compared with the reading on the display device and discrepancies are noted by the supervisor. The vehicle counter is provided with a tamper-proof reset switch.

Abstract: A rotor movement sensing system in a postage meter permits detection of the printing of postage even if power is lost during the printing cycle. A sensor senses a magnet on a disk when the rotor is substantially past its home position. A second sensor has a magnetic memory element. When the magnet on the disk passes near the memory element, that element is magnetized. A Hall-effect sensor at the memory element provides an interrupt to a processor to indicate magnetization of the memory element. A winding is provided around the memory element. The processor has an output which, when asserted, causes current flow through the winding, demagnetizing the memory element. Alternatively a reed switch senses rotor rotation, a flip-flop provides a bistable latch and its output provides a datum for the processor.

Abstract: An evaluation device with an absolute value counter is provided in an incremental position measuring system, which determines the absolute position even in case of loss of the main power supply. The evaluation device is operated by means of an emergency power supply while the main power supply is out. Following the restoration of the main power supply, counting pulses are supplied to a follow-up counter (11) by a pulse emitter, until the follow-up counter has reached the counter reading of the absolute value counter. Two rectangular signals, which are phase-shifted by 90.degree. in relation to each other, are formed as a function of the counting signals, which are present at the evaluation device in the form of output signals.

Abstract: A time registering electric energy meter for measuring usage of an AC energy quantity includes primary and secondary DC power supplies and a microprocessor, having a realtime clock maintained by the 60 Hz AC energy quantity, for maintaining realtime and for generating AC energy usage information determined by a number of time-related events. The meter further includes power outage recovery circuitry for measuring the duration of an outage of the AC energy quantity and for restoring the amount of lost realtime to the realtime clock of the microprocessor upon resumption of the AC energy quantity. The power outage recovery circuitry includes apparatus for iteratively updating the microprocessor realtime clock while comparing the updated realtime with the clock calendar times of the number of time-related events to account for the occurrence of such events during the outage of the AC energy quantity.

Abstract: When an IC card is attached to a terminal unit, a counter counts pulses of an external clock signal and a switching circuit outputs the external clock signal to an internal circuit in place of an internal clock signal if a NAND gate determines that the count of pulses of the external clock signal by the counter is a predetermined value. When the IC card is ejected from the terminal unit, pulses of the internal clock signal are counted by a counter and when the count attains a predetermined value, the counter is cleared and the switching circuit outputs the internal clock signal to the internal circuit in place of the external clock signal in response to the output of the NAND gate. Thus, it can be correctly determined whether the IC card is operated in the form of a single body or in the form attached to any terminal unit.

Abstract: A distance measuring device that can be easily retrofit to a recreational vehicle includes a sensor unit that easily attaches to the wheel of the vehicle, a counter unit 12 for processing the sensor signals, a display unit 13 for providing a numeric display of the distance traveled, a reset unit 14 for allowing the vehicle operator to reset the count to zero and to initiate a timing cycle, during which timing cycle movement of the vehicle must either start or continue, and a time limit unit 16 for automatically resetting the timing cycle to lengthen the cycle under appropriate circumstances. The timing cycle will terminate when no sensor signals are received during the timing cycle, and as a result, the counting circuits and the sensor will be driven low to clear memory and preserve power. In the new embodiment, a display present unit 50 can be used to cause a predetermined count to be displayed on the display unit 13.

Abstract: A gated shift register includes a first set of 16 storage devices and a second set of 16 storage devices with interconnection circuitry for configuring the first set of 16 storage devices as a 16 bit shift register. The second set of storage devices is coupled between the outputs of the first set of storage devices and 16 output terminals of the gated shift register and transfers the outputs from the first storage devices to the output terminals when a transfer input terminal is at a first logic state, and isolates the first storage devices from the output terminals and retains the data at the output terminals when the transfer input signal switches to a second logic state. The gated shift register also includes power monitor and control circuitry for supplying standby battery voltage to the circuit when the primary power source becomes unavailable.

Abstract: A distance measuring device that can be easily retrofit to a recreational vehicle includes a sensor unit that easily attaches to the wheel of the vehicle, a counter unit (12) for processing the sensor signals, a display unit (13) for providing a numeric display of the distance traveled, a reset unit (14) for allowing the vehicle operator to reset the count to zero and to initiate a timing cycle, during which timing cycle movement of the vehicle must either start or continue, and a time limit unit (16) for automatically resetting the timing cycle to lengthen the cycle under appropriate circumstances. The timing cycle will terminate when no sensor signals are received during the timing cycle, and as a result, the counting circuits and the sensor will be driven low to clear memory and preserve power.

Abstract: A method for the non-volatile storage of the counter reading of a digital counter including storage locations for receiving counter readings and state information of a counting cycle, includes successively storing an actual counter reading in two independent counter reading registers, initially marking one of the registers containing a preceding counter reading, at least up to completion of a counter reading transfer into the other of the registers, subsequently marking the other register, and after a voltage interruption, transferring the counter reading of the marked register into the counter for presetting and selectively incrementing by 1, and an apparatus for carrying out the method.

Abstract: A device for detecting a momentary cutoff of an AC power source which is used with a data processing apparatus or the like. The device determines that a momentary cutoff has occurred in the AC power source when an actual rotation speed of a motor energized by the AC power source for rotation is lower than a predetermined rotation speed.

Abstract: An electronic multiple-setback thermostat for residential and commercial use includes an internal clock having a week-long cycle. The thermostat is programmed by the operator, usually manually actuable input devices, to control the furnace/air conditioning system to achieve a schedule of temperatures over the weekly period by simply inputting the temperature desired to be attained at the time of entry. Each temperature entry may be programmed to reoccur on a daily basis or to modify the program on a once-a-week basis. The thermostat employs an internal clock which controls memory addresses so that each memory location is representative of a short time period during the weekly cycle. A desired temperature signal is entered in a memory location determined by the clock state at the time of entry and is read out to the control system each time that time state reoccurs.

Abstract: This invention concerns counters.More specifically, it relates to a non-volatile counting decade, comprising five flipflops, the outputs of which represent the decimal contents of the decade in the Johnson code. In this code, no flipflop changes its state more than twice in the course of a counting cycle from 0 to 10. The state of the counter is safeguarded on every incrementation, in separate safeguard circuits for each flipflop, formed of MNOS or floating-base transistors. However, any flipflop output state is safeguarded only if its state has changed after incrementation, this being detected by a logic circuit, which selects the safeguard signal for each flipflop.By means of an extremely simple combinative circuit, this invention thereby greatly reduces the number of writing cycles to be performed by the MNOS or floating-base transistors, which cannot withstand an excessive number of writing cycles.