Measuring External Leads Patents (Class 382/146)
  • Publication number: 20090010525
    Abstract: A method for detecting positions of a plurality of electrode pads of semiconductor chips formed on a semiconductor wafer includes: setting an imaging target region greater than a semiconductor chip on the semiconductor wafer; performing split imaging so as to entirely cover the imaging target region; and detecting positions of electrode pads of the semiconductor chip by processing images obtained by the split imaging. The split imaging is performed by using an imaging device which enlarges and images a region smaller than the imaging target region by one imaging.
    Type: Application
    Filed: January 22, 2008
    Publication date: January 8, 2009
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Yoshihito MARUMO
  • Patent number: 7453777
    Abstract: A method for optical shape recording and/or evaluation of optically smooth, glossy or optically rough surfaces wherein a photometric stereo method and a deflectometric method are combined using a scattering body so that the positions on the scattering body surface are two-dimensionally encoded.
    Type: Grant
    Filed: November 22, 2003
    Date of Patent: November 18, 2008
    Assignee: Obe Ohnmacht & Baumgartner GmbH & Co. KG
    Inventors: Christoph Wagner, Reiner Wagner
  • Publication number: 20080232673
    Abstract: A method for manufacturing an electronic device is provided. The method includes: pressure-bonding a plurality of terminals of an electronic component to a plurality of electrodes formed on a surface of a transparent substrate, respectively, via an anisotropic conductive film to mount the electronic component on the transparent substrate; obtaining an image of the electrodes by imaging the transparent substrate with the electronic component mounted thereon from backside of the transparent substrate; measuring the number of indentations for each said electrode using the image of the electrode, the indentation being formed when the electrode is pressed by a conductive particle in the anisotropic conductive film; calculating an average and a standard deviation of the number of indentations per electrode throughout the transparent substrate; and calculating a probability that the number of indentations per electrode is less than a reference value on basis of the average and the standard deviation.
    Type: Application
    Filed: March 18, 2008
    Publication date: September 25, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Takashi Miyauchi
  • Patent number: 7324685
    Abstract: In one embodiment, a system comprises logic configured to identify a tip of a pin that has been press fit into a circuit board, logic configured to measure characteristics that pertain to a flat end surface and a chamfered surface of the identified pin tip, logic configured to compare the measured characteristics with at least one of stored reference values and each other, and logic configured to make a final decision as to whether the pin is properly installed based upon results of the comparing performed by the logic configured to compare.
    Type: Grant
    Filed: October 20, 2003
    Date of Patent: January 29, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Jose M. Mejias Miranda
  • Publication number: 20070286473
    Abstract: Various methods, carrier media, and systems for detecting defects on a specimen using a combination of bright field channel data and dark field channel data are provided. One computer-implemented method includes combining pixel-level data acquired for the specimen by a bright field channel and a dark field channel of an inspection system. The method also includes detecting defects on the specimen by applying a two-dimensional threshold to the combined data. The two-dimensional threshold is defined as a function of a threshold for the data acquired by the bright field channel and a threshold for the data acquired by the dark field channel.
    Type: Application
    Filed: June 8, 2006
    Publication date: December 13, 2007
    Applicant: KLA-TENCOR TECHNOLOGIES CORP.
    Inventors: Brian Leslie, Ashok Kulkarni
  • Patent number: 7218771
    Abstract: This invention discloses an electrical circuit inspection system including an optical subsystem for optically inspecting an electrical circuit and providing an inspection output identifying more than two different types of regions and an analysis subsystem for analyzing the inspection output, the analyzing including comparing the inspection output with a computer file reference identifying more than two different types of regions. A method for inspecting an electrical circuit inspection is also disclosed.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: May 15, 2007
    Assignee: Orbotech, Ltd.
    Inventors: Tally Gilat-Bernshtein, Zeev Gutman
  • Patent number: 7076094
    Abstract: A method of detecting a position of a lead of an electric component which additionally includes a body from which the lead extends, the method including the steps of illuminating a lengthwise limited portion of the lead, with a light incident thereto in a direction substantially perpendicular to a lengthwise direction of the lead, taking an image of the lead, on a side of a free end of the lead, in a direction parallel to the lengthwise direction of the lead, and detecting the position of the lead by processing image data representing the taken image.
    Type: Grant
    Filed: March 8, 2002
    Date of Patent: July 11, 2006
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Baksa Chi, Seigo Suzuki
  • Patent number: 7062080
    Abstract: A circuit board with lead-free solder is inspected by using light sources with different colors at different angles to obtain an image having a plurality of color components. For each pixel within an area in the obtained image, the brightness of a white component generated by mixing all of the color components is extracted. The brightness of each of the color components of each pixel is reduced by an amount corresponding to the extracted brightness of the white component and is adjusted such that the brightest of the color components becomes more strongly emphasized compared to the others, than the brightness before the brightness-reducing process was carried out and the loss in total brightness caused by the brightness-reducing process is restored. The image with restored brightness is displayed and the surface condition of the solder is judged on the basis of the distributions of the color components of this image.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: June 13, 2006
    Assignee: Omron Corporation
    Inventors: Akira Oshiumi, Yoshiki Fujii, Yujin Fujita
  • Patent number: 7058216
    Abstract: An apparatus for detecting a coplanarity of a plurality of leads of an electronic component that laterally extend from a main body thereof, including a holding device which holds the main body of the electronic component at an upper surface of the main body, an image taking device which faces the electronic component held by the holding device and has an optical axis that is inclined by a predetermined angle relative to a plane containing a bottom surface of the main body such that in a direction from the image taking device toward the main body, the optical axis goes down in a direction from the upper surface to the bottom surface, a background forming device which is provided on one of opposite sides of the electronic component that is opposite to the other side thereof on which the image taking device is provided, and which forms a background having an optical characteristic different from an optical characteristic of the leads, and an image processing device which processes an image of respective end port
    Type: Grant
    Filed: November 26, 2001
    Date of Patent: June 6, 2006
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventor: Tosuke Kawada
  • Patent number: 7027637
    Abstract: A method for determining a number of balls in a projection space comprises determining a projection of a portion of a ball grid array, determining at least one local maximum of the projection space for a given threshold, and determining at least a distance between adjacent maximum. The method further comprises determining an inter-peak histogram of the distances, determining an inter-ball distance for each pair of adjacent balls that has the maximum value of the inter-peak distance histogram corresponding to the pair of adjacent balls, and determining a position of a first ball and a position of a last ball. The method comprises verifying the position of the first ball and the position of the last ball based on a general inter-ball distance, and determining the number of balls.
    Type: Grant
    Filed: February 21, 2002
    Date of Patent: April 11, 2006
    Assignee: Siemens Corporate Research, Inc.
    Inventors: Tong Fang, Ming Fang
  • Patent number: 6990226
    Abstract: A method includes setting lead eye boxes and lead eye points on a gate and a support bar of a lead frame, before clamping the lead frame, and determining whether or not the lead frame is seated in an exact first position. The lead eye boxes and the lead eye points are again set on the gate and the support bar, after clamping the lead frame, and it is redetermined whether or not the lead frame is seated in the exact first position. The positions of leads of the lead frame are captured and memorized. Die eye boxes and die eye points are set on specific patterns of a die and it is determined whether or not the die is mounted in an exact second position.
    Type: Grant
    Filed: January 10, 2001
    Date of Patent: January 24, 2006
    Assignee: Amkor Technology, Inc.
    Inventors: Song Hak Kim, Hun Kil Cho
  • Patent number: 6990227
    Abstract: This invention discloses a method for printed circuit board (PCB) inspection, including providing a multiplicity of PCBs placed on an inspection panel, defining each non-identical PCB in terms of geometry and features which are to be inspected, grouping the PCBs into at least one cluster, the at least one cluster being defined in terms of an amount, location and orientation of the PCBs in the at least one cluster, creating a reference image for the panel defined by a location and orientation of the at least one cluster on the panel and inspecting the panel by comparing sensed information with the reference image.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: January 24, 2006
    Assignee: Orbotech LTD
    Inventors: Anat Greenberg, Gregory Gutarts, Anna Yaari, Michael Barel, Jacob Nadivi
  • Patent number: 6987875
    Abstract: A method and apparatus for inspection of probe marks made on the interconnection lands of semiconductor devices using machine vision is disclosed. An image of an interconnection land is analyzed, and features of the image that may constitute indicia of probe marks are refined through the application of a series of unique heuristic processes. The output of the method is measurement data that can be used to characterize and verify the processes used to electrically probe semiconductor devices.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: January 17, 2006
    Assignee: Cognex Technology and Investment Corporation
    Inventor: Aaron Wallack
  • Patent number: 6980687
    Abstract: A method and apparatus for inspecting chips formed as a fine pattern on a surface of an object to be inspected, in which one visual field of an optical observation system is divided into a plurality of areas. A plurality of predetermined good chips are arranged sequentially to each area. Image data of the predetermined good chips are stored at each specific position of the area. In addition, one visual field of the optical observation system is divided into a plurality of areas. When a plurality of good chips are observed in one visual field, coordinates of each good chip are memorized. When good chips in the visual field during learning are recognized, image of the area is obtained as a learned image. Even if the plurality of chips in one visual field of the optical observation system are not entirely nondefective, it can inspect effectively the chips. Further, a problem caused by distortion (distortion aberration) in the optical observation system can be solved.
    Type: Grant
    Filed: October 2, 2001
    Date of Patent: December 27, 2005
    Assignee: Kabushiki Kaisha Topcon
    Inventors: Kanji Ikegaya, Takashi Ito, Takaaki Ishii
  • Patent number: 6950548
    Abstract: A method and system create a geometric object model for use in machine vision inspection. A pixel image representation of an object is acquired. Based on this pixel image representation, part models for the parts of the object are generated. Each part model corresponds to a different part of the object. From the part models of the object, a model for the entire object can be created. Using this created object model, a test inspection is performed on a set of test images, and each of the test images is associated with a set of known inspection measurements. The test inspection produces a set of testing inspection measurements. If the test inspection yields satisfactory performance, the object models created are stored.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: September 27, 2005
    Assignee: Cognex Corporation
    Inventors: Ivan A. Bachelder, Yun Chang, Yasunari Tosa, Venkat Gopalakrishnan, Raymond Fix, Rob Milligan, Therese Hunt, Karen Roberts
  • Patent number: 6922482
    Abstract: A method and apparatus is provided for automatically classifying a defect on the surface of a semiconductor wafer into one of a predetermined number of core classes using a core classifier employing boundary and topographical information. The defect is then further classified into a subclass of arbitrarily defined defects defined by the user with a specific adaptive classifier associated with the one core class and trained to classify defects only from a limited number of related core classes. Defects that cannot be classified by the core classifier or the specific adaptive classifiers are classified by a full classifier.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: July 26, 2005
    Assignee: Applied Materials, Inc.
    Inventor: Ariel Ben-Porath
  • Patent number: 6917699
    Abstract: So as to perform high-precision position detection without performing pattern matching in the direction of rotation even when the object of detection involves a positional deviation in the direction of rotation, pattern matching between a reference image and a rotated image obtained by rotating this reference image is performed during registration, and then the difference between the measured value of the position obtained following rotation and the theoretical value of the position of the rotated image is retained as a calibration amount corresponding to the known angle of rotation. Upon detection, the measured value is detected by pattern matching between an image of the object of detection, which is detected by imaging the object of detection disposed in an attitude that includes a positional deviation in the direction of rotation, and a reference image; and this measured value is corrected by the calibration amount.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: July 12, 2005
    Assignee: Kabushiki Kaisha Shinkawa
    Inventor: Kenji Sugawara
  • Patent number: 6810728
    Abstract: To provide an evaluation of the remaining life (level of insulation degradation) of wire in an installation, a kit-based approach avoids the need for technical personnel to visit a customer location. The kit includes equipment and instructions for selecting specimens for removal, capturing pre-removal information, removing the specimens, and sending the specimens for evaluation. A round form padded with protective material simplifies packing of the specimens while avoiding customer damage to the specimens. Accelerated aging testing and comparison between results for specimens from zones particularly susceptible to aging and one or more reference specimens permits an evaluation of remaining wire life.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: November 2, 2004
    Assignee: Lectromechanical Design Company
    Inventors: Dnyanesh G. Kasture, Armin M. Bruning, Noel H. Turner, William G. Linzey
  • Patent number: 6813377
    Abstract: A method and an apparatus are disclosed for generating a model of an object from an image of the object. First, an orientation of the object in the image is determined through the generation of, and subsequent evaluation of, at least a portion of a frequency response of the image. Thereafter, the orientation is used to gauge the object. The gauging provides the necessary dimensional information that becomes a part of the geometrical model of the object. An embodiment is disclosed that generates a geometrical model of a leaded object from the image of the leaded object.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: November 2, 2004
    Assignee: Cognex Corporation
    Inventors: Venkat Gopalakrishnan, Albert Montillo, Ivan Bachelder
  • Patent number: 6801652
    Abstract: A method for checking the fitting at automatic onserting units for the onserting of substrates with components, comprising the steps of: taking a picture of the surface of a component to be onserted positioned in a delivery means with a camera; comparing the picture in an image evaluation unit following the camera to a stored pattern of the component to be onserted; given agreement in the comparison, onserting the component onto the substrate; and given disagreement in the comparison, outputting an error message.
    Type: Grant
    Filed: May 3, 1999
    Date of Patent: October 5, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Harald Stanzl, Jochen Prittmann
  • Patent number: 6795573
    Abstract: A statistical processing unit compares the gray levels at identical positions in raw and reference images using a raw image having three or more gray levels obtained by sensing an object by an image pick-up unit. As the reference image, a predetermined designed image or at least one shift image obtained by shifting the raw image by an integer multiple of the repetition period in the repetition direction of a specific pattern is used. The statistical processing unit statistically analyzes the occurrence state of the difference between the raw and reference images, thus accurately obtaining the formation state of repetitive patterns on the object.
    Type: Grant
    Filed: January 26, 2001
    Date of Patent: September 21, 2004
    Assignee: Nikon Corporation
    Inventor: Kouji Yoshida
  • Patent number: 6789240
    Abstract: A computerized system and method for inspecting and measuring a ball-shaped wire bond formed by an automated bonder pre-programmed to attach a connecting bond onto a bond pad of an integrated circuit by first obtaining a first image of said bond pad before bond attachment, then determining the coordinates of the center of said pad. Second, the bonder is instructed to attach a ball-shaped wire bond to the center of said pad. Next, a second image of said bond pad is obtained after bond attachment; this second image comprises an image of the ball-shaped portion of the bond and an image of the wire portion of said bond. The coordinates of the center of the ball-shaped portion of the bond are obtained by computer processing of the first and second images. The coordinates of the bond center and the pad center are compared, creating information for quality control of the bonder instruction and the bonding process.
    Type: Grant
    Filed: January 2, 2003
    Date of Patent: September 7, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Sreenivasan K. Koduri
  • Patent number: 6787378
    Abstract: A method is provided that allows a simple and inexpensive apparatus to measure the uniformity of the height-directional positions of spheres or hemispheres such as bump electrodes of a semiconductor device. The degree of focus is calculated from an image of bump electrodes 11a and 11b acquired at a first focusing position F1 using an imaging system. After that, the bump electrodes 11a and 11b and the imaging system is relatively moved closer or farther, and then the degree of focus is calculated from an image acquired at a second focusing position F2. The degrees of focus at these two focusing positions F1 and F2 are compared with each other. As a result, detected are the contour lines of the horizontal cross sections of the bump electrodes 11a and 11b at the height (F1+F2)/2 of the position of equal degree of focus indicated by PQ. On the basis of the shapes and/or sizes thereof, the height-directional positions of the bump electrodes 11a and 11b are measured.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: September 7, 2004
    Assignee: NEC Machinery Corporation
    Inventors: Akira Ishii, Jun Mitsudo
  • Patent number: 6738504
    Abstract: An inspection apparatus for semiconductor devices, comprising: a light irradiation means for irradiating light to a surface of a semiconductor device, the surface having external connection terminals formed thereon; an image pickup means for picking up a plane image of the surface of the semiconductor device by using an optical system to provide an image data; an inspection means for inspecting misalignment of tips of the external connection terminals based on the image data; the external connection terminals standing on, and being bonded to, electrode pads of the semiconductor device and being bent to crank shapes having respective middle portions laterally extending out of positions of the electrode pads; and the irradiation means irradiating light from a side opposite to the laterally extending middle portions of the external connection terminals with respect to the electrode pads.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: May 18, 2004
    Assignee: Shinko Electric Industries Co., Ltd
    Inventors: Mitsutoshi Higashi, Kei Murayama
  • Patent number: 6713311
    Abstract: A method for determining contact coplanarity of packaged semiconductor devices having a plurality of contacts. The method includes the steps of measuring the relative positions of the contacts on a subject semiconductor device; calculating from the measurements seating planes 64 formed by tilting the device to one or more of its corners and/or sides such that each said plane comprises contacts at or adjacent to the corners of the device; using the measured relative contact positions and the calculated seating planes to determine the highest deviation from contact coplanarity for the semiconductor device.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: March 30, 2004
    Assignee: Texas Instruments Incorporated
    Inventor: Lik Son Wong
  • Patent number: 6690819
    Abstract: A method and apparatus for accurately recognizing most of components available in the market with moderate illuminating condition in high speed image processing are disclosed. After imaging a component having a predetermined electrode pattern, a core electrode 32 is extracted with the image being swept from a corner 33a (S1) through a small window. A H0V0 coordinate system is implemented with the core electrode set as its origin to observe its neighbor electrodes (S2). At this state, electrodes are sequentially extracted through a small window placed in an area predicted from previously extracted electrodes. Thereafter, an extracted electrode pattern is produced, and coordinates of its electrodes are obtained. Then, the extracted electrode pattern is collated with the predetermined electrode pattern by overlaying with each other for positioning (S3).
    Type: Grant
    Filed: February 9, 2000
    Date of Patent: February 10, 2004
    Assignee: Juki Corporation
    Inventor: Takashi Teraji
  • Patent number: 6681151
    Abstract: A system and method for servoing robot marks using fiducial marks and machine vision provides a machine vision system having a machine vision search tool that is adapted to register a pattern, namely a trained fiducial mark, that is transformed by at least two translational degrees and at least one mon-translational degree of freedom. The fiducial is provided to workpiece carried by an end effector of a robot operating within a work area. When the workpiece enters an area of interest within a field of view of a camera of the machine vision system, the fiducial is recognized by the tool based upon a previously trained and calibrated stored image within the tool. The location of the work-piece is derived by the machine vision system based upon the viewed location of the fiducial. The location of the found fiducial is compared with that of a desired location for the fiducial. The desired location can be based upon a standard or desired position of the workpiece.
    Type: Grant
    Filed: December 15, 2000
    Date of Patent: January 20, 2004
    Assignee: Cognex Technology and Investment Corporation
    Inventors: Russ Weinzimmer, Aaron Wallack
  • Patent number: 6647132
    Abstract: Methods and apparatuses are disclosed for identifying regions of similar texture in an image. The areas of similar texture include areas conventionally thought of as similar texture regions as well as areas of more varied texture that are treated as regions of similar texture in order to identify them within an image. The method associates frequency characteristics of an image with a spatial position within the image by: applying a frequency analysis on sub-regions of the image, thereby, generating frequency characteristics representative of the sub-regions: and associating the frequency characteristics with the origin of the sub-regions. An embodiment disclosed applies a fast Fourier transform on sub-regions in a given direction to determine a dominant frequency of the sub-region and the power of the dominant frequency, both of which are associated with the respective sub-region by storing the dominant frequency and power in a frequency image and power image, respectively, at the position of the origin.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: November 11, 2003
    Assignee: Cognex Technology and Investment Corporation
    Inventors: Albert A. Montillo, Ivan A. Bachelder
  • Patent number: 6617602
    Abstract: A method of detecting an edge of an object, including the steps of lighting, in each one of a plurality of different directions, at least a portion of the object, taking an image of the portion of the object and a vicinity of the portion which are lighted in the each one of the different directions, synthesizing the respective images of the portion of the object taken by lighting the portion in the different directions, and detecting, based on the synthesized images, an edge of the portion of the object.
    Type: Grant
    Filed: April 20, 2001
    Date of Patent: September 9, 2003
    Assignee: Fuji Machine Mfg. Co., Ltd.
    Inventors: Seigo Kodama, Yasushi Okada
  • Patent number: 6608921
    Abstract: A bump inspecting apparatus lights a spherical solder bump mounted on the surface of a circuit board and has a reinforcing resin applied to the lower half thereof from all circumferential directions with rays of light which intersect at a predetermined angle. An image of the lighted solder bump is captured while the amount of light irradiated upon the central portion of a solder bump is reduced. An object is extracted from image data obtained by the image capture and the area and/or the aspect ratio of the object are confirmed. The quality of the state of the reinforcing resin applied to the solder bump can be inspected.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: August 19, 2003
    Assignee: NEC Electronics Corporation
    Inventors: Masahiko Inoue, Hiroshi Ikeda
  • Patent number: 6587580
    Abstract: A system for determining the optimal settings for parameter of a stencil printing machine. The system generates a model mapping parameter inputs to output results. The model is then used to determine the optimal settings of parameter inputs in order to produce the desired results. One form of mapping is to generate a neural network model of a system. The neural network is generated from data that includes multiple sets of input parameter settings and the resulting output associated with the inputs. Back propagation is then performed on the neural network to determine the optimal settings.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: July 1, 2003
    Assignee: Avaya Technology Corp.
    Inventor: Khalil N. Nikmanesh
  • Patent number: 6578175
    Abstract: A process for evaluating and correcting virtual integrated circuit designs includes a method and apparatus for determining a ratio of an amount of material, i.e. polysilicon or metal, in any given layer to an area of the layer. The ratio is then compared to a predetermined target ratio, which is based on a ratio of the total amount of the material to the entire area of the I-C design. The process then automatically inserts or deletes an amount of material from the layer as needed, using any of four methods. These methods include deletion, scaling, deletion and scaling or striping. The ratio for an erroneous layer is rechecked after the first correction is performed and the entire process is repeated using a Newton-Raphson or a Least Absolute Deviation Regression method until the ratio falls within the predetermined tolerances. If the layer has been filled, the layer is further checked for short circuits, fill isolation violations, antenna violations and the like which may have resulted from the material fill.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: June 10, 2003
    Assignee: Agere Systems Inc.
    Inventors: Carl A. Benevit, Shane S. Dias, John Anthony Pantone, Matthew M. Moucheron, John Michael Sharpe
  • Patent number: 6571006
    Abstract: Methods are disclosed that measure the extent of a group of objects within a digital image by comparing signature, representative of the relationship of the objects to one another, against instances of a measured signature at varying positions within the image. The position(s) where the signature(s) vary by a predetermined comparison criterion indicates the extent of the group of objects. It is disclosed that the comparison to a reference signature allows proper identification of measured signatures despite noise in the digital image. A preferred embodiment uses the CALIPER TOOL to generate signatures of edges, where the window of the CALIPER TOOL has a projection axis substantially parallel to the extent being measured. A preferred application is desired wherein the method measure the length of leads in a lead set.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: May 27, 2003
    Assignee: Cognex Corporation
    Inventors: Albert A. Montillo, Ivan A. Bachelder, Cyril C. Marrion, Jr.
  • Publication number: 20030067540
    Abstract: An apparatus to attach to a Multifunction Bond Strength Test Machine 1 to incorporate a digital camera 13 with zoom optics 14 and integrating software incorporated in a computer 16, including; A secure and reliable mounting system 15 that attaches the camera 13 and optics 14 to the Multifunction Test System 1, computer with embedded frame grabber circuitry 16 and software controls for the coordination of automatic positioning of test sites 9 under the camera 13 and identification of the specific test sites 9, software for capture and manipulation of the digital image of the test site 18, and software for quantification of image features.
    Type: Application
    Filed: October 9, 2001
    Publication date: April 10, 2003
    Inventor: Malcolm Cox
  • Patent number: 6526165
    Abstract: A method and apparatus are disclosed for refining a rough geometric description (GD) and a rough pose of an object having extensions. The invention locates anchor points within an image of the object and uses the anchor points to align in at least one dimension the rough GD. In one embodiment, the anchor points are the tips of the extensions of the object; the rough GD of the object is then aligned along the angular orientation indicated by the tips. Thereafter, other dimensions of the rough GD and the rough pose are measured, measuring the dimensions having less unknowns first. The rough GD and the rough pose are then updated to provide the refined GD and refined pose. For one measurement, an extent of a region is measured using the expected area of region to threshold the region and segment it from the remainder of the image before measuring the extent of the region. An application of refining a GD of a leaded object is disclosed.
    Type: Grant
    Filed: November 30, 1998
    Date of Patent: February 25, 2003
    Assignee: Cognex Corporation
    Inventors: Albert A. Montillo, Ivan A. Bachelder, Cyril C. Marrion, Jr.
  • Patent number: 6510240
    Abstract: An apparatus detects the presence or absence of a semiconductor device. The apparatus includes a wire bonding machine to form a connection with the semiconductor device, and a camera to form an image of a position of the semiconductor device. A processor controls the wire bonding machine and transforms the image to pixel data. Additionally, the processor converts the pixel data to discrimination data to indicate whether the semiconductor device is present. The processor controls the wire bonding machine in accordance with the presence or the absence of the semiconductor device.
    Type: Grant
    Filed: May 9, 1995
    Date of Patent: January 21, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Sreenivasan Kalyani Koduri, David Ho, Yee Hsun U
  • Patent number: 6442291
    Abstract: A method of inspecting an image to locate a ball grid array surface-mounted device includes the steps of inspecting the image to find its surface features and to determine their locations (referred to herein as their “observed” locations); comparing expected locations of those features with the observed locations to identify missing surface features; reinspecting the image in the vicinity of apparently missing surface features to verify if the feature is really missing or to find those features and to determine their “observed” locations; and determining, from the observed locations of the surface features, the position and/or angle of the ball grid array surface-mounted device. The invention can be used to determine the position and/or angle of ball grid array surface-mounted devices with surface features in any of many array configurations, e.g., a regular lattice, a checker board lattice, a reverse checker board lattice, a regular lattice with a holes., and a custom lattice.
    Type: Grant
    Filed: December 31, 1998
    Date of Patent: August 27, 2002
    Assignee: Cognex Corporation
    Inventor: Steven M. Whitman
  • Publication number: 20020102016
    Abstract: Image processing for detecting the position of a workpiece such as a semiconductor device employed in, for instance, wire boding including the step of obtaining first position (coordinates) of leads by way of imaging the leads individually after positioning the leads of a sample workpiece one at a time in the center of visual field of a camera, the step of obtaining second position (coordinates) of such respective leads by imaging all the leads that are in the visual field at one time, and the step of storing the differences between the first position and the second position in memory as a correction amount. Upon actual product manufacturing, the correction amount is added to the position (coordinates) of the respective leads of the workpiece obtained by collective imaging of the leads, thus obtaining the actual bonding point (coordinates) for the workpiece.
    Type: Application
    Filed: January 25, 2002
    Publication date: August 1, 2002
    Applicant: KABUSHIKI KAISHA SHINKAWA
    Inventors: Nobuto Yamazaki, Shinichi Baba, Kenji Sugawara
  • Patent number: 6375336
    Abstract: The invention describes a light reflection pattern to spread the volume of the emitted light from a bar-like light source with a plurality of grooves provided along a transparent substrate and plane portions adjacent to the grooves. By setting the inclined angle of the grooves along the transparent substrate the light is introduced with a high efficiency to a liquid crystal display device in the direction perpendicular to the substrate. By restricting the ratio of the width of the grooves to the pitch that is the occupied area in the range of 0.01-0.15 (preferably 0.01-0.1) the ratio becomes one in which the duplicate image component is not recognized by the naked eyes while image brightness is maintained.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: April 23, 2002
    Assignee: Minebea Co., Ltd.
    Inventors: Shingo Suzuki, Masafumi Okada, Koichi Toyoda
  • Patent number: 6292261
    Abstract: The present invention includes a system for providing a signal related to a physical condition of an object, such as an electronic component. Various types of electronic components may be used with the present invention, including leaded components, column, pin or grid array packages, and the like. The system includes a quill for releasably holding the object. The object has a major surface defining a plane, and a motion control system for rotating the quill about a central axis. Control electronics in the invention provide a plurality of trigger signals to each of two detectors, each detector adapted to view the same stripe in the plane upon receipt of a trigger signal and to output an image of the stripe. The detectors view a plurality of stripes while the motion control system rotates the quill, and the output from the detectors is received by processing circuitry for processing the plurality of images of the stripes to provide the signal related to the physical condition of the object.
    Type: Grant
    Filed: May 19, 1999
    Date of Patent: September 18, 2001
    Assignee: CyberOptics Corporation
    Inventors: David Fishbaine, Steven K. Case, John P. Konicek, Thomas L. Volkman, Brian D. Cohn, Jeffrey A. Jalkio
  • Patent number: 6278797
    Abstract: An inspection beam such as laser beam is scanned two-dimensionally on an inspection surface of a circuit board with a plurality of lands while allowing its reflected beam from the inspection surface to be received by a beam receiving section. The beam receiving section is formed by a device, such as a semiconductor position sensitive detector, which is capable of producing an output which varies according to a reflected beam brightness and reflected beam receiving position (which reflects the height level of the reflection surface). On the basis of the output of the beam receiving section, reflected beam brightness information and height level information at respective positions on the inspection surface are prepared. From the reflected beam brightness information at the respective positions, an existing region of each of the lands on the inspection surface can be fixed.
    Type: Grant
    Filed: September 25, 1998
    Date of Patent: August 21, 2001
    Assignee: NGK Spark Plug Co., Ltd.
    Inventors: Masato Nagasaki, Tomoyoshi Tsunekawa, Yoichi Matsubara, Akira Kotagiri
  • Patent number: 6275604
    Abstract: A computer implemented method and an apparatus for generating exposure data of a layout pattern used to fabricate semiconductor integrated circuits. The layout pattern is first analyzed to determine if it can be modified to one or more predefined patterns without having to segment the layout pattern into rectangular patterns. The layout pattern is then modified to the one or more predefined patterns. The modified pattern is also analyzed to determine if it can be modified into segmental block patterns and if so, it is modified accordingly. Finally, exposure data is generated using the modified segmental block patterns.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: August 14, 2001
    Assignee: Fujitsu Limited
    Inventors: Masaaki Miyajima, Yoshio Ito
  • Patent number: 6249598
    Abstract: A solder testing apparatus comprising image processing means for performing image processing on an image of an appearance of a soldered portion to identify shape characterizing amounts for the soldered portion; and defect determining means for performing good/bad determination on the soldered portion from data derived by the image processing means and data from test parameter storing means for storing shape characterizing amounts at design time, wherein tested-object standard shape estimating means is included for extracting shape characterizing amounts of a non-defective soldered portion by statistically processing shape characterizing amounts for soldered portions identified by the image processing means, and defect determining parameters stored in the test parameter storing means are updated based on standard shape values from the tested-object standard shape estimating means, so that a highly reliable test is realized by setting defect determining parameters based on actual shapes and dimensions of leads
    Type: Grant
    Filed: November 12, 1997
    Date of Patent: June 19, 2001
    Assignees: Hitachi, Ltd., Siemens Aktiengesellshaft
    Inventors: Toshifumi Honda, Yukio Matsuyama, Guenter Doemens, Peter Mengel, Ludwig Listl
  • Patent number: 6205238
    Abstract: Disclosed are apparatus and method for inspecting leads of an IC placed on a setting table. The apparatus comprises an optical image recognition part for scanning the setting table, a device for moving the recognition palt with respect to the setting table, a position detection palt for detecting a position of the recognition part on the basis of an output signal thereof, and a control part for controlling the device on the basis of a signal of the position detection pait so that the recognition part is positioned at an optimal position above the setting table. The setting table is scanned stepwise, and the optimal position is a position that the value of the output signal is maximized. The recognition pall is positioned at the optimal position. The arrangement and the status of the leads of the IC are inspected automatically in a short period of time, and productivity increases.
    Type: Grant
    Filed: August 31, 1998
    Date of Patent: March 20, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Yeon Soo Ma
  • Patent number: 6201892
    Abstract: An inspection system and method uses a first illumination apparatus to illuminate one or more features, such as solder balls on an electronic component or other protruding surfaces or features on an object being inspected. Once the object being inspected is illuminated, a first reflected image of the plurality of features is captured by an illumination detection device. The first reflected image is stored in an image buffer. The object being inspected is then illuminated by at least one additional illumination apparatus. Each additional illumination apparatus is selected so that it differs from the other illumination apparatuses in either geometrical arrangement, degree of diffusion or illumination characteristic. An additional reflected image of the object is then captured by the illumination detection device while the object is illuminated by each additional illumination apparatus. Each additional reflected image is also stored in an image buffer.
    Type: Grant
    Filed: August 14, 1998
    Date of Patent: March 13, 2001
    Assignee: Acuity Imaging, LLC
    Inventors: Jonathan Edmund Ludlow, Steven Joseph King
  • Patent number: 6188784
    Abstract: The present invention provides method and apparatus for determining lead integrity of IC devices characterized by an inspection arrangement which comprises optical elements for back lighting the leads disposed on either side of a trackway for the travel of the IC device thereon. The optical elements are arranged in such a fashion as to simultaneously produce a sharp backlit silhouette image of the leads protruding from either or both sides of the IC device. In accordance with the invention, means are provided for continuously and automatically feeding IC devices through an inspection station in the apparatus where an illumination source through the optical elements directs an intense light beam so that a sharp silhouette or backlit outline of the leads on both sides of the IC device is simultaneously obtained. A single camera is disposed to face the opposing direction of the illumination and optics to receive the silhouette or backlit outline of the IC device leads, as well as the top surface of the device.
    Type: Grant
    Filed: March 3, 1998
    Date of Patent: February 13, 2001
    Assignee: American Tech Manufacturing, Inc.
    Inventor: Frank V. Linker, Jr.
  • Patent number: 6133579
    Abstract: An entire contact row of an SMD component is illuminated by a light source direction in the direction of the contact row, and a shadow of the entire contact row is directed by a linear sensor. A shift of the contact row perpendicular to a contact surface formed by the contact row effects a shift of the position of the shadow on the linear sensor and also effects a modification of the expanse of the shadow. By identifying the minimum expanse of the shadow, a criterion for the co-planarity of the contact row derives from the minimum expanse itself and an indicator about the slanting attitude of the component derives from the position having the minimum expanse.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: October 17, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef Wacker, Hans-Horst Grasmueller
  • Patent number: 6118524
    Abstract: An illumination apparatus and method illuminates one or more reflective elements, such as solder balls on an electronic component or other protruding surfaces or objects. The illumination apparatus includes one or more arc shaped or arc shape arranged light sources that provides a substantially even illumination across the one or more reflective elements. An illumination detection device detects light beams reflecting off of the illuminated reflective elements for forming a reflected image. A method of processing the reflected image includes locating one or more points on each reflected image element representing an illuminated reflective element. The points on the reflected image elements are used to located the pattern of the reflected image elements and/or to fit an outline around each image element corresponding to a known percentage of the true dimensions of each solder ball or other reflective element.
    Type: Grant
    Filed: April 7, 1999
    Date of Patent: September 12, 2000
    Assignee: Acuity Imaging, LLC
    Inventors: Steven Joseph King, Jonathan Edmund Ludlow
  • Patent number: 6072898
    Abstract: A calibration and part inspection method and apparatus for the inspection of ball grid array, BGA, devices. Two cameras image a precision pattern mask with dot patterns deposited on a transparent reticle. The precision pattern mask is used for calibration of the system. A light source and overhead light reflective diffuser provide illumination. A first camera images the reticle precision pattern mask from directly below. An additional mirror or prism located below the bottom plane of the reticle reflects the reticle pattern mask from a side view, through prisms or reflective surfaces, into a second camera and a second additional mirror or prism located below the bottom plane of the reticle reflects the opposite side view of the reticle pattern mask through prisms or mirrors into a second camera. By imaging more than one dot pattern the missing state values of the system can be resolved using a trigonometric solution.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: June 6, 2000
    Inventors: Elwin M. Beaty, David P. Mork
  • Patent number: 6067376
    Abstract: Pixels of an image are classified (e.g., into foreground and background pixels). In a set of possible values for the pixels, each value is able to serve as a threshold for classifying the pixels. From among the set, a value is selected for the threshold that causes the classification of the pixels to emphasize a characteristic of the image.
    Type: Grant
    Filed: January 16, 1998
    Date of Patent: May 23, 2000
    Assignee: Cognex Corporation
    Inventor: David Li