Measuring External Leads Patents (Class 382/146)
-
Patent number: 6064756Abstract: A three dimensional inspection apparatus for ball array devices, where the ball array device is positioned in a fixed optical system. An illumination apparatus is positioned for illuminating the ball array device. A first camera is disposed in a fixed focus position relative to the ball array device for taking a first image of the ball array device to obtain a characteristic circular doughnut shape image from a ball. A second camera is disposed in a fixed focus position relative to the ball array device for taking a second image of the ball array device to obtain a top surface image of the ball. A processor applies triangulation calculations on related measurements of the first image and the second image to calculate a three dimensional position of the ball with reference to a pre-calculated calibration plane.Type: GrantFiled: May 28, 1999Date of Patent: May 16, 2000Assignee: Elwin M. BeatyInventors: Elwin M. Beaty, David P. Mork
-
Patent number: 6061466Abstract: Disclosed is an apparatus and method for inspecting a connection state of a lead electrode to a bump after TAB (tape automated bonding). An LSI chip is immobilized on a stage. A flexible lead is held by a holding portion and connected to a bump. Above the chip, a CCD camera is provided. The stage is controlled to move up and down by a moving control mechanism. Each of the lead/bump connection states immediately after ILB (Inner lead bonding) is taken in the form of image data and defined as a first image data. A second image data of the lead/bump connection state is taken after the bump and lead are moved to different positions by moving the stage in order to change the position of the chip by means of the moving control mechanism. Whether or not the lead is duly connected to the bump is determined by the comparison of the first and second image data.Type: GrantFiled: December 24, 1996Date of Patent: May 9, 2000Assignee: Kabushiki Kaisha ToshibaInventors: Chiaki Takubo, Eiichi Hosomi, Hiroshi Tazawa, Koji Shibasaki
-
Patent number: 6055054Abstract: A part inspection and calibration method for the inspection of printed circuit boards and integrated circuits includes a camera to image a precision pattern mask deposited on a transparent reticle. Small parts are placed on or above the transparent reticle to be inspected. An overhead mirror or prism reflects a side view of the part under inspection to the camera. The scene of the part is triangulated and the dimensions of the system can thus be calibrated. A precise reticle mask with dot patterns gives an additional set of information needed for calibration. By imagining more than one dot pattern the missing state values can be resolved using an iterative trigonometric solution. The system optics are designed to focus images for all perspectives without the need for an additional focusing element.Type: GrantFiled: May 5, 1997Date of Patent: April 25, 2000Inventors: Elwin M. Beaty, David P. Mork
-
Patent number: 6028319Abstract: The present invention discloses a calibration standard for use in a CCD or laser lead scanner for the measurement of lead configurations in an IC package by selectively making three leads with one on three of the four sides of the package at least 0.03 mm longer than the remaining leads such that a consistent calibration plane, i.e., seating plane, is obtained by the lead scanner such that the scanner can be calibrated for making accurate measurements. The utilization of the present invention calibration standard greatly improves the accuracy of measurements made by a CCD or laser lead scanner such that a repair and rework rate of up to 30% that is normally achieved by a conventional standard can be drastically reduced.Type: GrantFiled: January 6, 1998Date of Patent: February 22, 2000Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Yun T. Tsai
-
Patent number: 6026176Abstract: A method of inspecting an image to locate a ball grid array surface-mounted device includes the steps of inspecting the image to find its surface features and to determine their locations (referred to herein as their "observed" locations); comparing expected locations of those features with the observed locations to identify missing surface features; reinspecting the image in the vicinity of apparently missing surface features to verify if the feature is really missing or to find those features and to determine their "observed" locations; and determining, from the observed locations of the surface features, the position and/or angle of the ball grid array surface-mounted device. The invention can be used to determine the position and/or angle of ball grid array surface-mounted devices with surface features in any of many array configurations, e.g., a regular lattice, a checker board lattice, a reverse checker board lattice, a regular lattice with a holes, and a custom lattice.Type: GrantFiled: August 31, 1995Date of Patent: February 15, 2000Assignee: Cognex CorporationInventor: Steven M. Whitman
-
Patent number: 5995220Abstract: A semiconductor package inspection apparatus comprises single photographic device disposed above the semiconductor package, and comprises light splitter for splitting light in different directions according to three different wavelength ranges in the light; and three image pickup units for separately photographing light of the three wavelength ranges which has been split by the light splitter; lighting device comprising first lighting for inspecting leads of the semiconductor package; second lighting for inspecting marks printed on top face of the semiconductor package; and third lighting for inspecting defects of the semiconductor package, the first, second and third lightings being disposed at locations different from each other, and having wavelength ranges into which the light has been split by the light splitter, and inspection device for simultaneously operating the first, second and third lightings of the lighting device and the three image pickup units of the photographic device to inspect leads of thType: GrantFiled: February 18, 1999Date of Patent: November 30, 1999Assignee: Komatsu, Ltd.Inventor: Yasuyoshi Suzuki
-
Patent number: 5990944Abstract: A streak tube sweeping method in which a synchronization scan sweeping signal of a fixed repetition frequency is applied to vertical deflection plates in a streak tube, causing an electron beam, generated when a light to be measured is introduced to a photocathode in the streak tube, to sweep at the fixed repetition frequency across a phosphor screen in a first direction. At predetermined intervals that are multiples of the synchronization scan sweeping signal period, a horizontal blanking signal is applied to horizontal deflection plates in the streak tube, causing the electron beam to sweep a streak once every pulse across an output effective area of the phosphor screen. Hence, information of emitted light can be accurately measured even if the life of the light to be measured is longer than the period of the synchronization scan sweeping signal (or the period of the light pulse output from a laser light source, which is the source of the sweeping signal).Type: GrantFiled: July 18, 1997Date of Patent: November 23, 1999Assignee: Hamamatsu Photonics K.K.Inventor: Shigeru Abe
-
Patent number: 5991434Abstract: A system for inspecting leads of an IC using at least one camera is provided, where the system permits configuration of the camera to various positions. The camera provides a digitized frame of the IC leads. The system includes a set of configurable parameters for defining which leads of the IC are imaged in which of the digitized frames. The system also includes a computer for calculating the position of the leads on the IC being inspected in three dimensions, and for comparing these calculated positions to ideal known positions in determining whether the IC leads meet desired manufacturing tolerances.Type: GrantFiled: November 12, 1996Date of Patent: November 23, 1999Inventor: James W. St. Onge
-
Patent number: 5963662Abstract: A hybrid surface mount component inspection system which includes both vision and infrared inspection techniques to determine the presence of surface mount components on a printed wiring board, and the quality of solder joints of surface mount components on printed wiring boards by using data level sensor fusion to combine data from two infrared sensors to obtain emissivity independent thermal signatures of solder joints, and using feature level sensor fusion with active perception to assemble and process inspection information from any number of sensors to determine characteristic feature sets of different defect classes to classify solder defects.Type: GrantFiled: November 20, 1996Date of Patent: October 5, 1999Assignee: Georgia Tech Research CorporationInventors: George J. Vachtsevanos, Iqbal M. Dar, Kimberly E. Newman, Erin Sahinci
-
Patent number: 5943125Abstract: An inspection system and method uses a ring illumination apparatus to illuminate one or more reflective elements, such as solder balls on an electronic component or other protruding surfaces or objects. The ring illumination apparatus includes a substantially ring-shaped light source that provides a substantially even illumination across the one or more reflective elements. An illumination detection device detects light beams reflecting off of the illuminated reflective elements for forming a reflected image. A method of processing the reflected image includes locating one or more edges of each reflected image element representing an illuminated reflective element. The edges of the reflected image elements are located by determining the maximum intensity gradient in the pixels forming the reflected image element. The inspection system and method thereby determines various characteristics such as the absence/presence, location, pitch, size and shape of each reflective element.Type: GrantFiled: February 26, 1997Date of Patent: August 24, 1999Assignee: Acuity Imaging, LLCInventors: Steven Joseph King, Jonathan Edmund Ludlow, Jon Chouinard, George Schurr
-
Patent number: 5930381Abstract: The apparatus includes a light source section, a recognizing section, a moving device, and an operating section. The light source section is disposed transversely of a board so as to illuminate one side of the board. The recognizing section includes lenses, which are disposed transversely of the board so as to face the board from an opposite side relative to the light source section. The recognizing section also includes line image sensors disposed transversely of the board for receiving light rays from the lenses. The moving device is operable to move both the light source section and the recognizing section without changing the relative positions of these sections but moves them in such a way as to change their respective positions relative to the board. The operating section is operable to calculate image data for the entire board from image information obtained by the recognizing section and from position information obtained by the moving device.Type: GrantFiled: December 19, 1996Date of Patent: July 27, 1999Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Hideaki Watanabe, Kiyoshi Imai, Dai Yokoyama
-
Patent number: 5908150Abstract: There is provided a method of bonding inner leads of lead frames to electrodes of semiconductor chips, including the steps of (a) pictorially recognizing bonding sites of inner leads a semiconductor chip through wires for the certain number of lead frames among a plurality of lead frames and analyzing the bonding sites to obtain coordinate data numerically expressing the bonding sites, (b) calculating statistic about dispersion in the thus obtained coordinate data, (c) judging whether the thus calculated statistic is smaller or greater than a predetermined threshold value, and (d) bonding inner leads of lead frames to electrodes of semiconductor chips for the rest of lead frames in accordance with predetermined bonding site data without pictorially recognizing bonding sites thereof, if the statistic is equal to or smaller than the predetermined threshold value, or bonding inner leads of lead frames to electrodes of semiconductor chips for the rest of lead frames by pictorially recognizing bonding sites in advType: GrantFiled: May 29, 1997Date of Patent: June 1, 1999Assignee: NEC CorporationInventor: Takeo Miura
-
Patent number: 5909285Abstract: A part inspection and calibration method for the inspection of integrated circuits includes a camera to image a precision pattern mask deposited on a transparent reticle. Small parts are placed on or above the transparent reticle to be inspected. A light source and overhead light reflective diffuser provide illumination. An overhead mirror or prism reflects a side view of the part under inspection to the camera. The scene of the part is triangulated and the dimensions of the system can thus be calibrated. A reference line is located on the transparent reticle to allow an image through the prism to the camera of the reference line between the side view and the bottom view. A precise reticle mask with dot patterns gives an additional set of information needed for calibration. By imaging more than one dot pattern the missing state values can be resolved using an iterative trigonometric solution.Type: GrantFiled: October 21, 1997Date of Patent: June 1, 1999Inventors: Elwin M. Beaty, David P. Mork
-
Patent number: 5883663Abstract: A multiple image camera for measuring the alignment of objects in different planes. The camera includes two coupled imaging devices configured to directly image objects in different planes without any intervening reflective optics between the imaging devices and the objects. The camera thus allows measurement of the alignment between the first and second objects without the need for repeated calibration between the image from the two imaging devices.Type: GrantFiled: December 2, 1996Date of Patent: March 16, 1999Inventor: Robert P. Siwko
-
Patent number: 5838434Abstract: The invention is to a calibration unit (11) for use with a moveable scale reference (9) for calibration of semiconductor package outlines, the calibration unit (11) is a monolithic rectangular block which has a plurality of legs (12) formed on and integal with said rectangular block and having spacing independent from the leads on a semiconductor device.Type: GrantFiled: December 26, 1996Date of Patent: November 17, 1998Assignee: Semiconductor Technologies & Instruments, Inc.Inventors: David A. Skramsted, Clyde M. Guest, III, Dennis M. Botkins
-
Patent number: 5835622Abstract: A method and apparatus for locating and measuring capillary indentation marks on wire bonded leads by creating a normalized, one-dimensional circumferential projection of a candidate center location in an image of a capillary indentation mark and detecting signals in the one-dimensional circumferential projection that correspond to a predefined pattern. The one-dimensional circumferential projection can be generated and evaluated for a full or a sub-sampled set of candidate center locations according to a number of different methods.Type: GrantFiled: August 31, 1995Date of Patent: November 10, 1998Assignee: Cognex CorporationInventors: Juha Koljonen, John P. Petry, III
-
Patent number: 5828449Abstract: An inspection system and method uses a ring illumination apparatus to illuminate one or more reflective elements, such as solder balls on an electronic component or other protruding surfaces or objects. The ring illumination apparatus includes a substantially ring-shaped light source that provides a substantially even illumination across the one or more reflective elements. An illumination detection device detects light beams reflecting off of the illuminated reflective elements for forming a reflected image. A method of processing the reflected image includes locating one or more edges of each reflected image element representing an illuminated reflective element. The edges of the reflected image elements are located by determining the maximum intensity gradient in the pixels forming the reflected image element. The inspection system and method thereby determines various characteristics such as the absence/presence, location, pitch, size and shape of each reflective element.Type: GrantFiled: July 25, 1997Date of Patent: October 27, 1998Assignee: Acuity Imaging, LLCInventors: Steven Joseph King, Jonathan Edmund Ludlow, George Schurr
-
Patent number: 5812693Abstract: An integrated machine vision inspection and rework system is provided for inspecting and reworking printed circuit boards. The system includes an inspection unit that acquires image data of printed circuit boards mounted on a machine framework and a vision computer that processes the image data contained within a chamber in the framework. Also mounted on the framework is a three stage asynchronous conveyor with sensors, and drive and stepping motors that communicate with I/O boards connected to the vision computer. A rework station also mounted on the framework provides a dual reporting scheme, which includes both a laser indicator and a fault display monitor.Type: GrantFiled: August 14, 1995Date of Patent: September 22, 1998Assignee: Chrysler CorporationInventors: Robert G. Burt, Andrejs K. Kalnajs
-
Patent number: 5805722Abstract: In a machine vision system capable of capturing an optical image of a semiconductor electronic component part and digitizing the optical image, a method for locating, inspecting and placing parts known as large leaded devices, by estimating a part's location; estimating the approximate location of a group of leads; computing the center and angle of a lead scan search rectangle within which the leads in a group of leads must be located; scanning a lead scan search rectangle to locate lead edges and compile a list of edges; extracting lead positions; updating the part location estimate; and repeating these steps for each lead set to find all leads and lead centerlines; then calculating an optimal part position estimate by matching found lead positions with expected lead centerlines; and finally, inspecting the leads. A statistical lead rejection procedure is included during lead extraction.Type: GrantFiled: October 2, 1996Date of Patent: September 8, 1998Assignee: Cognex CorporationInventors: Christopher P. Cullen, Antonie J. Engel
-
Patent number: 5757956Abstract: A machine vision system for identifying the locations of bonding pads on an integrated circuit mounted in a lead frame. The system involves locating the bonding pads by searching an image with suitably rotated corner templates. A set of possible candidate bonding pads is created from the location of corner templates found during the search. The set is then scored utilizing matching criteria. The best candidate is selected from the set based upon the candidates' scores. The location of the bonding pad is then generated from the best candidate's corner template locations. The invention can be beneficially applied to locate bonding pads during wire bonding, as well as other machine vision applications.Type: GrantFiled: October 31, 1995Date of Patent: May 26, 1998Assignee: Cognex Corp.Inventors: Juha Koljonen, David Michael, Yasunari Tosa
-
Patent number: 5754679Abstract: A machine vision system for identifying the locations of bonding pads on an integrated circuit mounted in a lead frame. The system involves rotating the image of the die to produce an image of the die unrotated with respect to the lead frame (the "counter-rotated image"). The counter-rotated image is searched with corner templates of the bonding pad. A set of possible candidate bonding pads is created from the location of corner templates found during the search. The set is then scored utilizing matching criteria. The best candidate is selected from the set based upon the candidates' scores. The location of the bonding pad is then generated from the best candidate's corner template locations. The invention can be beneficially applied to locate bonding pads during wire bonding, as well as other machine vision applications.Type: GrantFiled: October 31, 1995Date of Patent: May 19, 1998Assignee: Cognex Corp.Inventors: Juha Koljonen, David Michael, Yasunari Tosa
-
Patent number: 5745593Abstract: Burr inspection system (120) inspects an electrical lead for a burr (112) in association with the operation of a machine vision lead inspection system (10) and includes machine vision circuitry (50) for forming an image (70) of the electrical lead (72) using machine vision lead inspection system (10). Edge detecting instructions (120) associate with machine vision circuitry (50) for determining a plurality of edges (89, 91) associated with the electrical lead (72). Scan line determining instructions (128) calculate a plurality of scan lines (88, 90) each corresponding to the contour of a selected one of the plurality of edges (89, 91). The scan lines (88, 90) are separated from edges (88, 90) and image (70) by a preselected distance (92). Inspecting circuitry (130) inspects each scan line (88, 90) to detect whether a burr image (112) crosses the scan line (88, 90) to determine the presence of a burr on the electrical lead.Type: GrantFiled: July 25, 1996Date of Patent: April 28, 1998Assignee: Semiconductor Technologies & Instruments, Inc.Inventors: Weerakiat Wahawisan, Rajiv Roy
-
Patent number: 5648853Abstract: An arrangement for inspecting straightness of an array of pins in which the array is illuminated by a thin beam of light. Images of surfaces of the array of pins that are illuminated are projected on a photo-sensitive device. The array of pins is movable relative to the beam of light and the imaging device. The imaging device and photo-sensitive device are also movable relative to the array of pins.Type: GrantFiled: May 18, 1995Date of Patent: July 15, 1997Assignee: Robotic Vision Systems, Inc.Inventors: Howard Stern, William E. Yonescu
-
Patent number: 5642158Abstract: This invention provides a method and apparatus for automatically inspecting the connection of a wire to a lead on lead frame containing a semiconductor chip or similar device. Using an image processor to locate the general position of a soldered lead in a digitized image, the present invention creates a template of an idealized optical indentation left by a good bond; determines parameters such as wire angle, idealized position and shape thresholds for applying the template; conducts a normalized correlation search of the digitized image; compares the results returned to the parameters and reports the resulting signals generated by this comparison to a host controller or other control module.Type: GrantFiled: May 2, 1994Date of Patent: June 24, 1997Assignee: Cognex CorporationInventors: John P. Petry, III, David J. Michael, Arman Garakani
-
Patent number: 5640199Abstract: This invention provides a method and apparatus for automatically locating the bond of a wire to a lead frame and semiconductor chip or similar device as an in-process operation to facilitate in-process inspection. The apparatus includes a wire bonding machine, or similar apparatus, having a movable platform such as an X-Y table for holding semiconductor chips situated in lead frames; a video camera or other optical sensing or imaging device for generating images, which camera is typically positioned over the target chip and lead frame to be bonded; illumination means for illuminating the chip in a lead frame; an image processor capable of summing said absolute difference values, whereby each sum is stored as a difference metric, and digitizing and analyzing the optically sensed images; a bonding mechanism; and a host controller connected to the bonding mechanism, the movable platform, the camera and the image processor.Type: GrantFiled: May 2, 1994Date of Patent: June 17, 1997Assignee: Cognex CorporationInventors: Arman Garakani, David J. Michael, Juha Koljonen
-
Patent number: 5627912Abstract: The present invention has a purpose to provide method of measuring the inclination of an IC in order to correct its position quickly and precisely without binzarized images. The method according to this invention: 1) defines an inspection area including open ends of IC pins, 2) extracts longitudinal edges and open ends of pin of each IC pin from a density projection of each inspection area, 3) selects a representative point for each inspection area on a line along the open ends of the pins and calculates a center and inclination of an IC according to a difference of coordinates of representative points on opposite sides of the IC.Type: GrantFiled: December 6, 1995Date of Patent: May 6, 1997Assignee: Yozan Inc.Inventor: Koji Matsumoto
-
Patent number: 5563703Abstract: An apparatus for and method of determining the coplanarity of leads of a semiconductor device is provided. The apparatus comprises a base (24) for placing the semiconductor device, and a plurality of mirrors (38) and (36) surrounding the base. The mirrors reflect an image of the leads of the semiconductor device to a camera. The camera records an image from which the lead coplanarity is determined. The base contains an optical datum (34) which provides a reference plane from which to measure coplanarity. The mirrors can be placed such that an off-axis image of the leads is reflected to the camera. The off-axis image improves the apparent sensitivity of the coplanarity measurement.Type: GrantFiled: October 10, 1995Date of Patent: October 8, 1996Assignee: Motorola, Inc.Inventors: Christopher J. Lebeau, James E. Hopkins
-
Patent number: 5528371Abstract: A measurement apparatus includes two mirrors reflecting light rays obtained when a group of leads arranged on one lateral surface of a semiconductor device and a light-shielding band pattern are illuminated in two different directions. The measurement apparatus thus inputs the light rays into a single imaging device without moving the semiconductor device and the transparent mounting plate so that the distance traveled by one light ray from an illumination unit to the imaging device is equal to the distance traveled by the other light ray through the mirror to a second imaging device. Thus, an inexpensive measurement apparatus automatically measures the dimensions of a semiconductor device at high speed using an automatic feeding function and to produces highly accurate measurements.Type: GrantFiled: December 21, 1994Date of Patent: June 18, 1996Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Hajime Sato, Yoshikazu Sakaue
-
Patent number: 5485398Abstract: In inspecting a bend of a wire which is bonded to, for example, a semiconductor device, a straight scale line with scale markings of constant intervals and a bonded-point line, both lines crossing each other at right angles, are shown on a monitor. An image of a wire that has a bend is monitored by a camera and displayed on a monitor. By overlapping the image of the bend of the wire on the scale line and then reading a scale marking which is closest to the bend of the wire, it is possible to ascertain the amount of the bend of the wire.Type: GrantFiled: March 16, 1995Date of Patent: January 16, 1996Assignee: Kabushiki Kaisha ShinkawaInventors: Nobuto Yamazaki, Shinichi Kumazawa