Inspecting Printed Circuit Boards Patents (Class 382/147)
  • Publication number: 20080008381
    Abstract: The present invention has been made to obtain a coordinate acquisition apparatus for test of a printed board that can automatically generate coordinates required for performing the clip test from a predetermined target object formed in a printed board to thereby automate the clip test. A coordinate acquisition apparatus for test of a printed board comprises: a camera that photographs a printed board; a target object detection section that uses pattern matching to detect a predetermined target object formed in the printed board from image data photographed by the camera; and a coordinate position acquisition section that acquires the coordinate position of the target object detected by the target object detection section with respect to the printed board.
    Type: Application
    Filed: October 27, 2006
    Publication date: January 10, 2008
    Applicant: FUJITSU LIMITED
    Inventors: Yasunori Ushio, Mikio Hara, Yoshiko Yamaguchi
  • Patent number: 7317522
    Abstract: A system and method for verifying defects in electrical circuit patterns including supplying a plurality of like electrical circuit patterns to a defect verification assembly after identification of candidate defects at an automated inspection assembly; verifying selected candidate defects as being one of: an actual defect, other than an actual defect; and marking a candidate defect in response to a recurrence of a given candidate defect at substantially corresponding locations on at least two electrical circuit patterns.
    Type: Grant
    Filed: March 7, 2005
    Date of Patent: January 8, 2008
    Assignee: Orbotech, Ltd.
    Inventor: Jacob Nedivi
  • Patent number: 7315641
    Abstract: A pattern correcting method of a mask for manufacturing a semiconductor device includes extracting a correction portion to be corrected from a mask pattern on the mask, obtaining a surrounding environment of the correction portion and giving a correction amount to the correction portion. The correction amount is variable. The variable correction amount is given to the correction portion in accordance with the surrounding environment of the correction portion.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: January 1, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kei Yoshikawa, Satoshi Usui, Koji Hashimoto
  • Publication number: 20070274609
    Abstract: An object of this invention is to realize, in a semiconductor defect review apparatus, a function of easily searching for an image similar to a reference image at high speed. To this end, an embodiment of this invention has a function of saving, as text information, pieces of information accompanying an image such as acquisition date and time, an acquisition condition, the result of analyzing a piece of information other than the image, and a user's comment, in association with the image. The embodiment is configured to narrow down similar image candidates by a keyword search using the pieces of accompanying information, calculate similarity of each image to a search reference image on the basis of the features of the image, and output search results in descending order of similarity.
    Type: Application
    Filed: May 22, 2007
    Publication date: November 29, 2007
    Applicant: Hitachi High-Technologies Corporation
    Inventors: Takehiro Hirai, Kazuo Aoki, Kenji Obara
  • Patent number: 7295695
    Abstract: A method of detecting a defect in a reticle or wafer uses wavelet transforms to differentiate between real defects and pattern noise. A first image and a second image of a sample are aligned. A wavelet transform is obtained of the difference between the images. The wavelet transformed difference image is filtered to distinguish between real defects and pattern defects.
    Type: Grant
    Filed: September 26, 2002
    Date of Patent: November 13, 2007
    Assignee: KLA-Tencor Technologies Corporation
    Inventor: Aditya Dayal
  • Patent number: 7283660
    Abstract: A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising: visually imaging a portion of the image on the lower layer; and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.
    Type: Grant
    Filed: November 7, 2001
    Date of Patent: October 16, 2007
    Assignee: Orbotech, Ltd.
    Inventors: Amnon Ganot, Hanan Gino, Golan Hanina, Zeev Kantor, Boris Kling, Shabtay Spinzi, Barry Ben-Ezra
  • Patent number: 7266235
    Abstract: A pattern inspection method in which an image can be detected without an image detection error caused by an adverse effect to be given by such factors as ions implanted in a wafer, pattern connection/non-connection, and pattern edge formation. A digital image of an object substrate is attained through microscopic observation thereof, the attained digital image is examined to detect defects, while masking a region pre-registered in terms of coordinates, or while masking a pattern meeting a pre-registered pattern, and an image of each of the defects thus detected is displayed. Further, each of the defects detected using the digital image attained through microscopic observation is checked to determine whether its feature meets a pre-registered feature or not. Defects having a feature that meets the pre-registered feature are so displayed that they can be turned on/off, or they are so displayed as to be distinguishable from the other defects.
    Type: Grant
    Filed: November 9, 2001
    Date of Patent: September 4, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hiroi, Masahiro Watanabe, Chie Shishido, Aritoshi Sugimoto, Maki Tanaka, Hiroshi Miyai, Asahiro Kuni, Yasuhiko Nara
  • Patent number: 7266232
    Abstract: An inspection apparatus (1) has an image pickup part (2) for performing an image pickup of a substrate (9), an operation part (4) to which an image signal is inputted from said image pickup part (2) and a computer (5), and the operation part (4) specifies an inspection image and a reference image from an object image acquired by the image pickup part (2). In the operation part (4), a region class to which each pixel of the specified inspection image belongs is specified on the basis of a corresponding pixel value of the reference image. In a comparator circuit of the operation part (4), a differential absolute value between each pixel of the inspection image and a corresponding pixel of the reference image is calculated and the differential absolute value is compared with a defect check threshold value in accordance with the specified region class, to perform defect check. The inspection apparatus (1) can thereby appropriately detect a defect in accordance with the region class to which each pixel belongs.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: September 4, 2007
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Hiroshi Asai, Yuichiro Hikida, Hiroyuki Onishi
  • Patent number: 7251348
    Abstract: Land circle calculating means (7) calculates a land circle as an approximate circle from label information (S6). Land circle accuracy-enhancing means (8) calculates again the land circle by changing a mask angle if land circle candidate information (S7) obtained is improper, so as to enhance the accuracy of the land circle. AND operation means (11) carries out an AND operation of a land circle image (S9) and a binary image (S10) to create a land missing image (S11). In-land binary means (12) calculates an in-land defect image (S12) from an original image (S4). OR operation means (13) carries out an OR operation of the in-land missing image (S11) and the in-land defect image (S12) to create a land defect image (S13).
    Type: Grant
    Filed: March 12, 2002
    Date of Patent: July 31, 2007
    Assignee: NEC Corporation
    Inventors: Yukiko Hatakeyama, Masahiko Nagano
  • Patent number: 7228257
    Abstract: A method of optimizing a set of steps in a semi-conductor processing system comprising a software control program, wherein the semi-conductor processing system includes a first function, a second function, and a third function, and further includes a memory for storing a set of variables, and wherein the set of steps further includes a first step, a second step, and a third step. The invention includes generating the first step on an editor application, wherein the first function is added to the first step, and if required, a first set of user input instructions is added. The invention also includes generating the second step on the editor application, wherein the second function is added to the second step, and if required, a second set of user input instructions is added; and generating the third step on the editor application, wherein the third function is added to the third step, and if required, a third set of user input instructions is added.
    Type: Grant
    Filed: June 13, 2003
    Date of Patent: June 5, 2007
    Assignee: Lam Research Corporation
    Inventors: Roger Patrick, Vincent Wong, Chung Ho Huang
  • Patent number: 7218772
    Abstract: A method for identification of anomalous structures, such as defects, includes the steps of providing a digital image and applying fractal encoding to identify a location of at least one anomalous portion of the image. The method does not require a reference image to identify the location of the anomalous portion. The method can further include the step of initializing an active contour based on the location information obtained from the fractal encoding step and deforming an active contour to enhance the boundary delineation of the anomalous portion.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: May 15, 2007
    Assignee: Ut-Battelle LLC
    Inventors: Shaun S. Gleason, Hamed Sari-Sarraf
  • Patent number: 7218771
    Abstract: This invention discloses an electrical circuit inspection system including an optical subsystem for optically inspecting an electrical circuit and providing an inspection output identifying more than two different types of regions and an analysis subsystem for analyzing the inspection output, the analyzing including comparing the inspection output with a computer file reference identifying more than two different types of regions. A method for inspecting an electrical circuit inspection is also disclosed.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: May 15, 2007
    Assignee: Orbotech, Ltd.
    Inventors: Tally Gilat-Bernshtein, Zeev Gutman
  • Patent number: 7213447
    Abstract: An apparatus and method for detecting characteristics of a microelectronic substrate. The microelectronic substrate can have a first surface with first topographical features, such as roughness elements, and a second surface facing opposite from the first surface and having second topographical features, such as protruding conductive structures. In one embodiment, the apparatus can include a support member configured to carry the microelectronic substrate with a first portion of the first surface exposed and a second portion of the second surface exposed. The apparatus can further include a topographical feature detector positioned proximate to support member and aligned with the first portion of the first surface of the microelectronic substrate to detect characteristics, such as a roughness, of the first surface while the microelectronic substrate is carried by the support member.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: May 8, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Chee Peng Neo, Cher Khng Victor Tan, Kian Seng Ho, Hock Chuan Tan
  • Patent number: 7181058
    Abstract: A method and system are provided for inspecting electronic components mounted on printed circuit boards utilizing both 3-D and 2-D data associated with the components and the background on which they are mounted on the printed circuit board. Preferably, a 3-D scanner in the form of a solid state dual detector laser images the components and solder paste on the printed circuit board to obtain the 3-D and 2-D data. Then, a high speed image processor processes the 3-D data to find the locations of the leads and the solder paste. Then, the high speed image processor processes the 2-D data together with the locations of the leads and the solder paste to distinguish the leads from the solder paste. The high speed image processor may calculate centroids of feet of the leads, average height of the feet and border violation percentage of the solder paste.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: February 20, 2007
    Assignee: GSI Group, Inc.
    Inventors: John J. Weisgerber, Donald J. Svetkoff, Donald K. Rohrer
  • Patent number: 7167583
    Abstract: An inspection system includes a plurality of models are applied in a way that enhances the effectiveness of each type of model. In one embodiment, a printed circuit board inspection system includes an image model, a structural model and a geometric model to inspect objects. The image model is first applied to an object being inspected to identify objects which look alike. After the image model is applied, a structural model is applied to determine whether the object exists in the image that has the same structure and is used to decide if the image model has truly found a part in the image. Lastly, a geometric model is applied and uses the approximate positional data provided by the previous two models to determine precisely the location of the object being inspected. Also described are techniques for learning and updating the plurality of models.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: January 23, 2007
    Assignee: Landrex Technologies Co., Ltd.
    Inventors: Pamela R. Lipson, Aparna Ratan, Chukka Srinivas, Pawan Sinha
  • Patent number: 7155052
    Abstract: A method for inspecting a patterned surface employs reference data related to the pattern to provide a map for identifying regions which are expected to generate equivalent images. These regions are then compared in an image-to-image comparison to identify possible defects. In a first implementation, the regions are related by local symmetry operators. In a second, disjoint corner features or other features are classified and similar features compared.
    Type: Grant
    Filed: June 10, 2002
    Date of Patent: December 26, 2006
    Assignee: Tokyo Seimitsu (Israel) Ltd
    Inventors: Mark Geshel, Niv Shmueli, Gideon Friedmann, Orna Bregman-Amitai
  • Patent number: 7133550
    Abstract: A pattern inspection method in which an image can be detected without an image detection error caused by an adverse effect to be given by such factors as ions implanted in a wafer, pattern connection/non-connection, and pattern edge formation. A digital image of an object substrate is attained through microscopic observation thereof, the attained digital image is examined to detect defects, while masking a region pre-registered in terms of coordinates, or while masking a pattern meeting a pre-registered pattern, and an image of each of the defects thus detected is displayed. Further, each of the defects detected using the digital image attained through microscopic observation is checked to determine whether its feature meets a pre-registered feature or not. Defects having a feature that meets the pre-registered feature are so displayed that they can be turned on/off, or they are so displayed as to be distinguishable from the other defects.
    Type: Grant
    Filed: November 8, 2001
    Date of Patent: November 7, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hiroi, Masahiro Watanabe, Chie Shishido, Aritoshi Sugimoto, Maki Tanaka, Hiroshi Miyai, Asahiro Kuni, Yasuhiko Nara
  • Patent number: 7116817
    Abstract: A method and apparatus for inspecting a wafer in which a focused charged particle beam is irradiated onto a surface of a wafer on which patterns are formed through a semiconductor device fabrication process, a secondary charged particle image of a desired area of the wafer is obtained by detecting secondary charged particles emitted from the surface of the wafer, and information about image feature amount of each pattern within the desired area from the obtained secondary charged particle beam image. The information about image feature amount is compared with a preset value, and on the basis of a result of the comparison, a quality of patterns which have been formed around the desired area is estimated, and information of a result of the estimation is outputted.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: October 3, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Maki Tanaka, Masahiro Watanabe, Kenji Watanabe, Mari Nozoe, Hiroshi Miyai
  • Patent number: 7116814
    Abstract: The image-based container defects detector consists of a plurality of camera units, a sensor unit, a frame grabber, and an image recognizer unit. The sensor unit serves to detect the vehicles entering the inspection station, and transmit a signal to the frame grabber for capturing the vehicle image by triggering the CCD camera thereby obtaining the information about the container's defect position and size. By dexterously utilizing image processing technique, the HIS (hue, saturation and intensity) color is employed to distinguish a normal area from a defected area in the container. Then quad-tree and merge is used to segregate image roughly. As for the non-defected area becoming obscured due to noise is removed using a filter. Finally the defected area is displayed on the screen. The present invention is well-suited for after detection as well as for on-line immediate detection for defect containers.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: October 3, 2006
    Assignee: Chunghwa Telecom Co., Ltd.
    Inventors: Bor-Shenn Jeng, Quen-Zong Wu, Yu-Pin Chen, Wei-Yuan Cheng
  • Patent number: 7113629
    Abstract: A pattern inspecting apparatus includes a substrate support table, a table driver for driving the substrate support table through actuators, a camera, an image processor, and a controller connected to a keyboard and a CRT. The image processor has a chip comparing inspection unit for executing a chip comparing inspection, a cell comparing inspection unit for executing a cell comparing inspection, an image memory, an integrating decision unit for integrating results of inspection by the chip comparing inspection unit and results of inspection by the cell comparing inspection unit and making a final decision as to the presence of a defect, and an area memory.
    Type: Grant
    Filed: April 1, 2002
    Date of Patent: September 26, 2006
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventor: Hiroyuki Onishi
  • Patent number: 7110591
    Abstract: A system and method for recognizing markers on, e.g., a PCB (printed circuit board). In one aspect, a system for recognizing a marker in an image comprises an image capture module (14) for extracting image features associated with an input image of a ROI (region of interest) captured through a lens 15, an image processor (16) comprising a first marker recognition processor (17) for recognizing a marker in the input image based on a normalized correlation and a second marker recognition processor (18) for recognizing a marker in the input image based on gray value histograms; a training module 19 for building template images and histograms that are used by the image processor (16) to detect a marker in the input image and a database (20) for indexing and storing trained template images and trained histograms.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: September 19, 2006
    Assignee: Siemens Corporate Research, Inc.
    Inventors: Claus Neubauer, Ming Fang
  • Patent number: 7106896
    Abstract: A semiconductor wafer ID recognition apparatus includes an image sensing optical section and recognition processing section. The image sensing optical section reads at least one identification information (ID) marked at an arbitrary position on a semiconductor wafer in accordance with a plurality of first read optical conditions registered in advance. The recognition processing section performs recognition processing including calculation of an evaluation score representing a read likelihood ratio for an image output from the image sensing optical section every read optical condition, and adopts a recognition result under a read optical condition exhibiting the highest score as an ID of the semiconductor wafer.
    Type: Grant
    Filed: April 6, 2001
    Date of Patent: September 12, 2006
    Assignee: NEC Corporation
    Inventor: Eiko Suzuki
  • Patent number: 7064845
    Abstract: A process for measuring of an object geometry is disclosed using a coordinate measuring device wherein the object geometry is recorded by an optical sensor and represented as an image content, wherein within the image content, geometric structures suitable for the measurement of the object are subsequently selected and evaluated.
    Type: Grant
    Filed: September 20, 2001
    Date of Patent: June 20, 2006
    Assignee: Werth Messtechnik GmbH
    Inventor: Ralf Christoph
  • Patent number: 7062080
    Abstract: A circuit board with lead-free solder is inspected by using light sources with different colors at different angles to obtain an image having a plurality of color components. For each pixel within an area in the obtained image, the brightness of a white component generated by mixing all of the color components is extracted. The brightness of each of the color components of each pixel is reduced by an amount corresponding to the extracted brightness of the white component and is adjusted such that the brightest of the color components becomes more strongly emphasized compared to the others, than the brightness before the brightness-reducing process was carried out and the loss in total brightness caused by the brightness-reducing process is restored. The image with restored brightness is displayed and the surface condition of the solder is judged on the basis of the distributions of the color components of this image.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: June 13, 2006
    Assignee: Omron Corporation
    Inventors: Akira Oshiumi, Yoshiki Fujii, Yujin Fujita
  • Patent number: 7050686
    Abstract: A fiber optic article can comprise a core, an inner region disposed about the core and a cladding disposed about the inner region. The index of refraction of the cladding can be less than that of the inner region, and the index of refraction of the inner region can be less than that of the core. The fiber can include a second cladding disposed about the cladding, where the second cladding has an index of refraction that is less than the index of refraction of the cladding. The inner region can have a non circular outer perimeter that includes at least one inwardly oriented section. The article can be elongate along a longitudinal axis and can include at least one longitudinally extending region, such as a stress inducing region, for providing birefringence and the inwardly oriented region can face the longitudinally extending region. The fiber optic article can include active material for providing light responsive to the article receiving pump light, such as, for example, one or more rare earths.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: May 23, 2006
    Assignee: Nufern
    Inventors: Julia A. Farroni, Upendra H. Manyam, Nils Jacobson, Kanishka Tankala, Adrian Carter
  • Patent number: 7035448
    Abstract: A comparative inspection technique is employed for detecting defects by comparing similar patterns formed in a mask. As thresholds of information appearing according to the pattern difference, a special graytone-defect extracting threshold in addition to thresholds for extracting ordinary defects in a opaque and a transmission part is newly provided. Further, by distinguishing a case of inspecting an area wherein the opaque and transmission parts are formed from a case of inspecting an area wherein a graytone part is formed, so that inspection is made by using the thresholds for extracting ordinary defects in the opaque and transmission parts in the case of inspecting the opaque and the transmission parts and that inspection is made by using the special graytone-defect extracting threshold in the case of inspecting the graytone part.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: April 25, 2006
    Assignee: Hoya Corporation
    Inventor: Kenji Nakayama
  • Patent number: 7031510
    Abstract: A color image of a circuit board is divided into respective color regions. Plural representative colors are set, and angle indices and distance indices are calculated for each pixel color in the color image in a predetermined color space. The angle indices for a particular pixel color represent angles between an individual color vector representing the particular pixel color and plural representative color vectors of the plural representative colors. The distance indices for a particular pixel color represent distances between the particular pixel color and the plural representative colors. Composite distance indices are then calculated for each pixel color in the color image, based on the distance indices and the angle indices. Each pixel in the color image is classified into plural representative color regions associated with the plural representative colors according to the composite distance indices, thereby dividing the image region of the color image into the plural representative color regions.
    Type: Grant
    Filed: February 20, 2002
    Date of Patent: April 18, 2006
    Assignee: Dainippon Screen Mfg. Co., Ltd.
    Inventors: Atsushi Imamura, Hiroshi Sano, Junichi Shiomi
  • Patent number: 7027639
    Abstract: A high-speed image acquisition system includes a source of light; a sensor for acquiring a plurality of images of the target; a system for determining relative movement between the source and the target; and an image processor for processing the acquired images to generate inspection information relative to the target. The system has an extended dynamic range provided by controlling illumination such that the plurality of images is acquired at two or more different illumination levels. In some embodiments, the high-speed image acquisition system is used to perform three dimensional phase profilometry inspection.
    Type: Grant
    Filed: August 13, 2002
    Date of Patent: April 11, 2006
    Assignee: CyberOptics Corporation
    Inventor: David Fishbaine
  • Patent number: 7020321
    Abstract: A pattern data converting method comprises reconstructing the design data into column regions, segmenting the column region into apparatus strips, and extracting unit data of the design data for each apparatus strip, wherein reconstructing the design data includes defining an rectangular region start code and a rectangular region end code to the rectangle regions, collating the rectangular region start and end codes, dividing the rectangular regions at the Y coordinate of the other rectangular region, and subjecting the rectangular region start code and rectangular region end code having the same Y coordinates to the region operation.
    Type: Grant
    Filed: March 27, 2002
    Date of Patent: March 28, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Kazuhiro Nakashima, Hideo Tsuchiya
  • Patent number: 7016526
    Abstract: A method is provided for the detection of defects on a semiconductor wafer by checking individual pixels on the wafer, collecting the signature of each pixel, defined by the way in which it responds to the light of a scanning beam, and determining whether the signature is that of a faultless pixel or of a pixel that is defective or suspect to be defective. An apparatus is also provided for the determination of such defects, which comprises a stage for supporting a wafer, a laser source generating a beam that is directed onto the wafer, collecting optics and photoelectric sensors for collecting the laser light scattered by the wafer in a number of directions and generating corresponding analog signals, an A/D converter deriving from said signals digital components defining pixel signatures, and selection systems for identifying the signatures of suspect pixels and verifying whether the suspect pixels are indeed defective.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: March 21, 2006
    Assignee: Applied Materials, Inc.
    Inventors: Zeev Smilansky, Sagie Tsadka, Zvi Lapidot, Rivi Sherman
  • Patent number: 6990227
    Abstract: This invention discloses a method for printed circuit board (PCB) inspection, including providing a multiplicity of PCBs placed on an inspection panel, defining each non-identical PCB in terms of geometry and features which are to be inspected, grouping the PCBs into at least one cluster, the at least one cluster being defined in terms of an amount, location and orientation of the PCBs in the at least one cluster, creating a reference image for the panel defined by a location and orientation of the at least one cluster on the panel and inspecting the panel by comparing sensed information with the reference image.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: January 24, 2006
    Assignee: Orbotech LTD
    Inventors: Anat Greenberg, Gregory Gutarts, Anna Yaari, Michael Barel, Jacob Nadivi
  • Patent number: 6987875
    Abstract: A method and apparatus for inspection of probe marks made on the interconnection lands of semiconductor devices using machine vision is disclosed. An image of an interconnection land is analyzed, and features of the image that may constitute indicia of probe marks are refined through the application of a series of unique heuristic processes. The output of the method is measurement data that can be used to characterize and verify the processes used to electrically probe semiconductor devices.
    Type: Grant
    Filed: December 21, 2001
    Date of Patent: January 17, 2006
    Assignee: Cognex Technology and Investment Corporation
    Inventor: Aaron Wallack
  • Patent number: 6987894
    Abstract: An appearance inspection apparatus is composed of a memory 14, a thread generator and a plurality of CPUs 10 to 13. The memory 14 stores image data of an appearance of an IC. The thread generator generates a thread in which a procedure is described for independently processing the image data stored in the memory 14 and storing the processing result into the memory 14. The plurality of CPUs 10 to 13 for executing the plurality of threads generated by the thread generator, in parallel. Thus, this can provide an appearance inspection apparatus and an appearance inspection method that can execute an appearance inspection at a high speed, irrespectively of a simple configuration.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: January 17, 2006
    Assignee: NEC Electronics Corporation
    Inventors: Yoshihiro Sasaki, Masahiko Nagao
  • Patent number: 6985618
    Abstract: A method of designing an overlay mark, which is used to determine the relative position between two or more successive layers of a substrate or between two or more separately generated patterns on a single layer of a substrate, is disclosed. The method includes optimizing the geometry of a first element of the mark according to a first scale. The method further includes optimizing the geometry of a second element of the mark according to a second scale. The method additionally includes optimizing the geometry of a third element of the mark according to a third scale.
    Type: Grant
    Filed: June 26, 2002
    Date of Patent: January 10, 2006
    Assignee: KLA-Tencor Technologies Corporation
    Inventors: Michael Adel, Mark Ghinovker, Walter Dean Mieher
  • Patent number: 6973209
    Abstract: A defect inspection system is provided which comprises an image acquiring section for acquiring a two-dimensional image of a subject which is a processing target in a manufacturing process, a defect extracting section for extracting a defect by a defect extraction algorithm using a predetermined parameter for an image acquired by the image acquiring section, a displaying section for displaying an image of a defect of the subject extracted by the defect extracting section, a parameter adjusting section for adjusting the parameter in accordance with a defect extraction degree for the subject, and a quality judging section for judging the quality of the subject based on a defect information extracted by the defect extracting section.
    Type: Grant
    Filed: July 25, 2001
    Date of Patent: December 6, 2005
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Toshihiko Tanaka
  • Patent number: 6954272
    Abstract: A transparent plate with fiducials for aligning and placing of dies on a panel with a high degree of accuracy is disclosed. The locations of the fiducials correspond to desired die locations. The transparent plate is arranged beneath the panel, with the fiducials aligned with cavities formed in the panel. The cavities have transparent bottoms. A die alignment mark on a die residing over the panel is used to establish the position of the die. Imaging a fiducial associated with a cavity is used to center the die with respect to the cavity. Accurate placement of the fiducials is accomplished by electron-beam lithography.
    Type: Grant
    Filed: January 16, 2002
    Date of Patent: October 11, 2005
    Assignee: Intel Corporation
    Inventors: Michelle T. Lam, Nathan C. McDaniel, Gary M. Barnes, Rene Cruz
  • Patent number: 6952492
    Abstract: A method and apparatus for inspecting a semiconductor device in which failure occurence conditions on a whole wafer are estimated by calculating the statistic of potential contrasts in pattern sections from sampled images to implement higher throughput, and defective conditions of a process are detected at an early stage with the help of time series data of the estimate result.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: October 4, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Maki Tanaka, Masahiro Watanabe, Kenji Watanabe, Mari Nozoe, Hiroshi Miyai
  • Patent number: 6950548
    Abstract: A method and system create a geometric object model for use in machine vision inspection. A pixel image representation of an object is acquired. Based on this pixel image representation, part models for the parts of the object are generated. Each part model corresponds to a different part of the object. From the part models of the object, a model for the entire object can be created. Using this created object model, a test inspection is performed on a set of test images, and each of the test images is associated with a set of known inspection measurements. The test inspection produces a set of testing inspection measurements. If the test inspection yields satisfactory performance, the object models created are stored.
    Type: Grant
    Filed: March 16, 2001
    Date of Patent: September 27, 2005
    Assignee: Cognex Corporation
    Inventors: Ivan A. Bachelder, Yun Chang, Yasunari Tosa, Venkat Gopalakrishnan, Raymond Fix, Rob Milligan, Therese Hunt, Karen Roberts
  • Patent number: 6923045
    Abstract: An apparatus and method for detecting characteristics of a microelectronic substrate. The microelectronic substrate can have a first surface with first topographical features, such as roughness elements, and a second surface facing opposite from the first surface and having second topographical features, such as protruding conductive structures. In one embodiment, the apparatus can include a support member configured to carry the microelectronic substrate with a first portion of the first surface exposed and a second portion of the second surface exposed. The apparatus can further include a topographical feature detector positioned proximate to support member and aligned with the first portion of the first surface of the microelectronic substrate to detect characteristics, such as a roughness, of the first surface while the microelectronic substrate is carried by the support member.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: August 2, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Chee Peng Neo, Cher Khng Victor Tan, Kian Seng Ho, Hock Chuan Tan
  • Patent number: 6925203
    Abstract: A position detection apparatus for detecting a position of a mark on an object includes a camera which captures an image of the mark, an extraction section which extracts a plurality of edge positions of the mark based on a signal derived from the image of the mark, each of the edge positions being associated with a combination of a direction and a polarity of the signal, and a determination section which determines a position of the mark, by comparing each of the plurality of extracted edge positions with a corresponding one of templates prepared for the respective combinations.
    Type: Grant
    Filed: March 8, 2000
    Date of Patent: August 2, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventor: Hiroshi Tanaka
  • Patent number: 6922482
    Abstract: A method and apparatus is provided for automatically classifying a defect on the surface of a semiconductor wafer into one of a predetermined number of core classes using a core classifier employing boundary and topographical information. The defect is then further classified into a subclass of arbitrarily defined defects defined by the user with a specific adaptive classifier associated with the one core class and trained to classify defects only from a limited number of related core classes. Defects that cannot be classified by the core classifier or the specific adaptive classifiers are classified by a full classifier.
    Type: Grant
    Filed: June 15, 1999
    Date of Patent: July 26, 2005
    Assignee: Applied Materials, Inc.
    Inventor: Ariel Ben-Porath
  • Patent number: 6917699
    Abstract: So as to perform high-precision position detection without performing pattern matching in the direction of rotation even when the object of detection involves a positional deviation in the direction of rotation, pattern matching between a reference image and a rotated image obtained by rotating this reference image is performed during registration, and then the difference between the measured value of the position obtained following rotation and the theoretical value of the position of the rotated image is retained as a calibration amount corresponding to the known angle of rotation. Upon detection, the measured value is detected by pattern matching between an image of the object of detection, which is detected by imaging the object of detection disposed in an attitude that includes a positional deviation in the direction of rotation, and a reference image; and this measured value is corrected by the calibration amount.
    Type: Grant
    Filed: April 18, 2002
    Date of Patent: July 12, 2005
    Assignee: Kabushiki Kaisha Shinkawa
    Inventor: Kenji Sugawara
  • Patent number: 6898305
    Abstract: The present invention provides techniques, including a method and system, for inspecting for defects in a circuit pattern on a semi-conductor material. One specific embodiment provides a trial inspection threshold setup method, where the initial threshold is modified after a defect analysis of trial inspection stored data. The modified threshold is then used as the threshold in actual inspection.
    Type: Grant
    Filed: February 22, 2001
    Date of Patent: May 24, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Hiroi, Masahiro Watanabe, Chie Shishido, Asahiro Kuni, Maki Tanaka, Hiroshi Miyai, Yasuhiko Nara, Mari Nozoe
  • Patent number: 6898304
    Abstract: A method and apparatus for parallel processing of data without the need for cross-communication or synchronization between processing nodes is provided. The system is especially suitable for use in a wafer inspection system for the semiconductor industry. Embodiments include scanning a small area of the wafer, and distributing pixel data among a plurality of processing nodes, each of which accept and process an optimal amount of pixel data independently of the other processing nodes, thereby enabling increased throughput without increasing system complexity.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: May 24, 2005
    Assignee: Applied Materials, Inc.
    Inventors: Ron Naftali, Vitaly Rubinovich
  • Patent number: 6880387
    Abstract: A method for enhancing information derived from acoustically inspected samples comprises deriving an acoustic image of a sample, and generating a visual superposition of one or more additional images. The additional images are selected from the group consisting of an optical image, a second acoustic image in a different sized field of view form said acoustic image, an infrared image, an X-ray image, and an electron beam image.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: April 19, 2005
    Assignee: Sonoscan, Inc.
    Inventors: Lawrence W. Kessler, Thomas E. Adams, Michael G. Oravecz
  • Patent number: 6870948
    Abstract: A method and apparatus for numerically analyzing a growth degree of grains grown on a surface of a semiconductor wafer, in which the growth degree of grains is automatically calculated and numerated through a computer by using an image file of the surface of the semiconductor wafer scanned by an SEM. A predetermined portion of a surface of the wafer is scanned using the SEM, and the scanned SEM image is simultaneously stored into a database. An automatic numerical program applies meshes to an analysis screen frame and selects an analysis area on a measured image. Thereafter, a smoothing process for reducing an influence of noise is performed on respective pixels designated by the meshes using an average value of image data of adjacent pixels. A standardization process is then performed, based on respective images in order to remove a brightness difference between the measured images.
    Type: Grant
    Filed: October 16, 2001
    Date of Patent: March 22, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Chung-sam Jun, Sang-Mun Chon, Sang-Bong Choi, Kye-Weon Kim, Sang-Hoon Lee, Yu-Sin Yang, Sang-Min Kim, Sang-Kil Lee
  • Patent number: 6853744
    Abstract: An improved circuit board inspection system incorporates a technique that confirms observed electrical connection defects. The improved circuit board inspection system applies a localized investigative routine upon portions of a printed circuit board having one or more identified defects. The technique accounts for the slope of a portion under test of the printed circuit board and provides results that are more accurate from inspection systems that report electrical connection defects.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: February 8, 2005
    Assignee: Agilent Technologies, Inc.
    Inventors: Horst Mueller, Sunit Bhalla, Kris Kanack, Stig Oresjo
  • Patent number: 6850637
    Abstract: An optical inspection system with an improved illumination system. The improved illumination system used to illustrate the invention has a base formed from a printed circuit board. Substrates for mounting lighting elements, which are exemplified by light emitting diodes, are formed also on printed circuit boards. These circuit boards have serrated edges and the diodes are mounted to the serrations. This configuration allows the light emitting elements to be focused on the focal point. Also in the exemplary illumination system, the light emitting elements have different beam widths so that variations in the illumination intensity as a function of elevation angle are reduced.
    Type: Grant
    Filed: June 28, 2000
    Date of Patent: February 1, 2005
    Assignee: Teradyne, Inc.
    Inventor: John B. Burnett
  • Patent number: 6845174
    Abstract: An arrangement for the identification of a substrate (S) having at least one identification marking (I), comprising a turntable (2) for rotating a substrate (S) placed thereon; an illumination source (4) and a receiving device (5) for evaluating the intensity of the light emerging from the illumination source (4), the edge zone of the substrate (S) placed on the turntable (2), upon rotation thereof, influencing the light intensity striking the receiving device (5); a device (6) for reading the identification marking (I), having a sensing region (E); and a calculation device that calculates a manipulated variable for a correction rotation angle about the rotation axis (A) for alignment of the identification marking (I) with respect to the sensing region (E), and a manipulated variable for a correction motion for changing the position of the sensing region (E) with respect to the rotation axis (A) or with respect to the actual position of the identification marking (I), and outputs them to a positioning devi
    Type: Grant
    Filed: January 18, 2002
    Date of Patent: January 18, 2005
    Assignee: Leica Microsystems Jena GmbH
    Inventors: Dominik Grau, Andreas Birkner, Knut Hiltawski, Frank Bernhardt
  • Patent number: 6831998
    Abstract: In order to provide a high-speed, inexpensive inspection system that has a short development period, that is flexible, and that allow algorithms to be easily changed, a PC equipped with an image input feature is used to capture an image detected by a line image sensor, this detected image is transferred to a plurality of PCs connected by a LAN, and defects are detected using software processing on the plurality of PCs.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: December 14, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Hiroya Koshishiba, Hideaki Doi, Mitsunobu Isobe, Kazushi Yoshimura, Haruomi Kobayashi, Chie Shishido