Inspecting Printed Circuit Boards Patents (Class 382/147)
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Patent number: 6529621Abstract: A reusable circuit design for use with electronic design automation EDA tools in designing integrated circuits is disclosed, as well as reticle inspection and fabrication methods that are based on such reusable circuit design. The reusable circuit design is stored on a computer readable medium and contains an electronic representation of a layout pattern for at least one layer of the circuit design on an integrated circuit. The layout pattern includes a flagged critical region which corresponds to a critical region on a reticle or integrated circuit that is susceptible to special inspection or fabrication procedures. In one aspect of the reusable circuit design, the special analysis is performed during one from a group consisting of reticle inspection, reticle production, integrated circuit fabrication, and fabricated integrated circuit inspection.Type: GrantFiled: December 17, 1998Date of Patent: March 4, 2003Assignee: KLA-TencorInventors: Lance A. Glasser, Jun Ye, Shauh-Teh Juang, David S. Alles, James N. Wiley
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Patent number: 6526164Abstract: A method for determining whether a defect that is detected by photomask inspection will adversely affect a semiconductor device, such as a wafer. The method has the ability of relating defect specifications directly to device performance and wafer yields, and assessing the impact of combining the defect with the critical dimension error using standard inspection tools.Type: GrantFiled: May 27, 1999Date of Patent: February 25, 2003Assignee: International Business Machines CorporationInventors: Scott Marshall Mansfield, Alfred Kwok-Kit Wong
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Publication number: 20030035576Abstract: An improved circuit board inspection system incorporates self learning techniques for accurate determination of Z-axis elevations of electrical connections. A Delta Z, referenced to a laser range finder generated surface map of the circuit board, is automatically determined from a series of cross sectional images of the electrical connections for each electrical connection on the circuit board. The Delta Z values for each electrical connection are stored in a data base from which customized Delta Z values for specifically defined board views may be calculated.Type: ApplicationFiled: October 16, 2002Publication date: February 20, 2003Inventor: Paul A. Roder
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Patent number: 6522777Abstract: Manufacturing lines include inspection systems for monitoring the quality of parts produced. Manufacturing lines for making semiconductor devices generally inspect each fabricated part. The information obtained is used to fix manufacturing problems in the semiconductor fab plant. A machine-vision system for inspecting devices includes a light source for propagating light to the device and an image detector that receives light from the device. The devices, such as semiconductors, are placed in trays for inspection at one or more inspection stations. A compartment for holding a plurality of trays is positioned near a first inspection station having a first inspection surface. An elevator elevates one of the trays from the compartment and presents the tray and the devices held by the tray to the first inspection surface. After being inspected at a first station, a tray-transfer device moves the tray from the first inspection station to a flipper mechanism. The flipper mechanism includes two jaws and a rotator.Type: GrantFiled: July 8, 1999Date of Patent: February 18, 2003Assignee: PPT Vision, Inc.Inventors: Mark T. Paulsen, Franz W. Ulrich
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Patent number: 6516086Abstract: A property of the surface such as height is sensed as a function of position on the surface. A statistical spread in the sensed property as a function of the position is computed. Regions where the material is present are distinguished from other regions on the basis of the spread, e.g. conductor tracks on a PCB assembly are distinguished from a PCB substrate by having lower spread.Type: GrantFiled: June 22, 1999Date of Patent: February 4, 2003Assignee: Koninklijke Philips Electronics N.V.Inventor: Egbert F. A. Land
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Patent number: 6512842Abstract: A method of analyzing defect images in a semiconductor manufacturing process wherein descriptors are assigned to images of defects caught during scanning of an inspection wafer. The images, assigned descriptors and linkage data are stored in a relational database. An operator can select an image to analyze and the review station assigns descriptors to the selected image and the database is searched for images having the assigned descriptors.Type: GrantFiled: April 9, 1999Date of Patent: January 28, 2003Assignee: Advanced Micro DevicesInventors: Paul J. Steffan, Allen S. Yu
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Patent number: 6501822Abstract: Systems and methods for analyzing for images in an x-ray inspection system are provided. One embodiment is a system for analyzing images in an x-ray inspection system. Briefly described, one such system comprises: a means for receiving an image of an object that is generated by an x-ray inspection system, the image of the object having a first field of view (FOV); a means for determining whether the first FOV associated with the image of the object matches a reference FOV corresponding to design data that models the object being inspected by the x-ray inspection system; and a means for modifying the design data based on the difference between the first FOV and the reference FOV.Type: GrantFiled: December 21, 2001Date of Patent: December 31, 2002Assignee: Agilent Technologies, Inc.Inventor: Paul A. Roder
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Patent number: 6490368Abstract: An improved circuit board inspection system incorporates self learning techniques for accurate determination of Z-axis elevations of electrical connections. A Delta Z, referenced to a laser range finder generated surface map of the circuit board, is automatically determined from a series of cross sectional images of the electrical connections for each electrical connection on the circuit board. The Delta Z values for each electrical connection are stored in a data base from which customized Delta Z values for specifically defined board views may be calculated.Type: GrantFiled: July 31, 2001Date of Patent: December 3, 2002Assignee: Agilent Technologies, Inc.Inventor: Paul A. Roder
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Publication number: 20020176618Abstract: A property of the surface such as height is sensed as a function of position on the surface. A statistical spread in the sensed property as a function of the position is computed. Regions where the material is present are distinguished from other regions on the basis of the spread, e.g. conductor tracks on a PCB assembly are distinguished from a PCB substrate by having lower spread.Type: ApplicationFiled: June 22, 1999Publication date: November 28, 2002Inventor: EGBERT F.A. LAND
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Patent number: 6477266Abstract: A vision comparison inspection system is disclosed for use in a printed circuit assembly production line having a plurality of component processing locations and a conveyor system for transporting circuit assemblies between processing locations in an upstream to downstream work flow direction. The vision comparison inspection system includes a printed circuit assembly image capture and inspection conveyor disposed in the production line, the image capture and inspection conveyor being adapted to receive printed circuit assemblies from an upstream portion of the production line and to transport the printed circuit assemblies to a downstream portion of the production line for subsequent processing. An electronic imaging device is fixedly positioned to capture an image of a printed circuit assembly located on the image capture and inspection conveyor. A lighting system is mounted for illuminating a printed circuit assembly located in the field of view of the imaging device.Type: GrantFiled: December 11, 1998Date of Patent: November 5, 2002Assignee: Lucent Technologies Inc.Inventor: Madhu Purushotum Asar
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Patent number: 6473520Abstract: A pellicle in which a portion for identifying the pellicle, which comprises a conductive film and predetermined patterns composed of conductors formed on the conductive film, is attached to a pellicle frame labeled with a pellicle membrane, is fixed onto a mask and electrically connected to signal lines formed on the mask and predetermined patterns composed of conductors. A reader supplies a source potential to the conductive film and reads electric signals sent from the predetermined patterns each comprised of the conductor through signal lines. The pellicle is identified according to each read signal.Type: GrantFiled: February 8, 1999Date of Patent: October 29, 2002Assignee: Oki Electric Industry Co., Ltd.Inventor: Hiroyuki Hunatsu
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Patent number: 6456736Abstract: A method and apparatus is provided for inspecting a semiconductor wafer for field-to-field critical dimension (CD) variations using statistical techniques, such that an optimal number of fields on the wafer under inspection are measured, thereby increasing the accuracy of the results of the inspection procedure and avoiding unnecessary sampling. Embodiments include randomly selecting a predetermined number of fields on a semiconductor wafer to be inspected, and measuring the CD of a comparable feature in each of the sample fields, as by a critical dimension scanning electron microscope (CD-SEM). A statistical function, such as an average or standard deviation, of the measured CDs is calculated. Further fields are the randomly selected, CDs measured, and the running average or standard deviation calculated after each CD is measured. If the last acquired CD does not change the average or standard deviation by a predetermined amount, the inspection procedure for the wafer under inspection is terminated.Type: GrantFiled: February 16, 1999Date of Patent: September 24, 2002Assignee: Applied Materials, Inc.Inventors: Bo Su, Zoe Osborne
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Patent number: 6445813Abstract: A motion of a printed circuit board (1) is detected by an encoder (4) arranged aside a belt conveyer (2), and the encoder generates a detection signal (S3) which activates a timing signal generator unit (5) for generating an image pickup start timing signal which is fed to a time measuring unit (6) for measuring the image storing time which corresponds to the time interval of the image pickup start signal (S1). According to the image storing time, the image signal (S2) generated by the line CCD camera (3) is normalized by the normalizing calculation means (7), and thereafter, the mounting condition of the printed circuit board is judged by the image recognizing section (B) with the use of the image data (D) to thereby realize a simple and convenient mechanism at a low cost and at a high precision.Type: GrantFiled: May 9, 2000Date of Patent: September 3, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuhiro Ikurumi, Masanori Yasutake, Osamu Nakao, Masaharu Tsujimura, Toshihiko Tsujikawa, Kenji Okamoto
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Patent number: 6442291Abstract: A method of inspecting an image to locate a ball grid array surface-mounted device includes the steps of inspecting the image to find its surface features and to determine their locations (referred to herein as their “observed” locations); comparing expected locations of those features with the observed locations to identify missing surface features; reinspecting the image in the vicinity of apparently missing surface features to verify if the feature is really missing or to find those features and to determine their “observed” locations; and determining, from the observed locations of the surface features, the position and/or angle of the ball grid array surface-mounted device. The invention can be used to determine the position and/or angle of ball grid array surface-mounted devices with surface features in any of many array configurations, e.g., a regular lattice, a checker board lattice, a reverse checker board lattice, a regular lattice with a holes., and a custom lattice.Type: GrantFiled: December 31, 1998Date of Patent: August 27, 2002Assignee: Cognex CorporationInventor: Steven M. Whitman
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Patent number: 6434264Abstract: A vision comparison inspection system is disclosed for use in a printed circuit assembly production line having a plurality of component processing locations and a conveyor system for transporting circuit assemblies between processing locations in an upstream to downstream work flow direction. The vision comparison inspection system includes a printed circuit assembly image capture and inspection conveyor disposed in the production line, the image capture and inspection conveyor being adapted to receive printed circuit assemblies from an upstream portion of the production line and to transport the printed circuit assemblies to a downstream portion of the production line for subsequent processing. An electronic imaging device is fixedly positioned to capture an image of a printed circuit assembly located on the image capture and inspection conveyor. A lighting system is mounted for illuminating a printed circuit assembly located in the field of view of the imaging device.Type: GrantFiled: December 11, 1998Date of Patent: August 13, 2002Assignee: Lucent Technologies Inc.Inventor: Madhu Purushotum Asar
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Patent number: 6421456Abstract: On a semiconductor wafer, recognition marks are fabricated on the crossing points of scribe lines for the purpose of proper wafer alignment in wafer sawing process. Since the recognition mark has a distinctive pattern that is distinguished from other circuit patterns on the chip, the recognition mark can be easily recognized by a camera in a sawing apparatus, and reduce the chance of wafer misaligning. When a part of circuit pattern on the semiconductor chip is used for the alignment purpose, the chance of wafer misalignment relatively high due to the similarity between the part chosen and other parts of the circuit pattern. The present invention also provides a method for sawing the wafer using the recognition marks.Type: GrantFiled: December 2, 1998Date of Patent: July 16, 2002Assignee: Samsung Electronics Co., Ltd.Inventors: Dae Woo Son, Youn Soo Lee, Byung Man Kim
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Publication number: 20020057830Abstract: A method and implementing system is provided in which a circuit board standard image is compared with a test board image and resulting areas where a circuit component is missing from or incorrectly positioned on the circuit board under test, are highlighted on the board being tested for operator inspection. Potentially faulty areas are highlighted by projecting light or light images having predetermined characteristics onto the faulty areas on the board being tested. A model or standard image is acquired by taking an image or digital photo of a circuit board known to have no defects, and comparing the acquired image with an image taken from a circuit board under test. Areas to be highlighted in a second mode are determined from known specifications and other input criteria such as known high defect areas, and this input is programmed into the processing to highlight defect-prone areas on a board being tested.Type: ApplicationFiled: December 16, 1998Publication date: May 16, 2002Inventors: JAMES SHERILL AKIN, EDWARD BLAKLEY MENARD
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Patent number: 6373917Abstract: An improved circuit board inspection system incorporates electrically controlled selection of Z-axis position for generation of laminographic images of electrical connections. Analysis of the laminographic images is performed by comparing the laminographic images to the CAD data representing the area of the circuit board in the image. The CAD data based on a reference Z-axis level is converted on-the-fly to compensate for changes in the field of view, magnification factors, etc. for non-reference Z-axis levels. Thus, laminographic images at the reference Z-axis level are compared directly to the reference level CAD data while laminographic images at non-reference Z-axis levels are compared to the on-the-fly modified non-reference level CAD data.Type: GrantFiled: August 30, 2000Date of Patent: April 16, 2002Assignee: Agilent Technologies, Inc.Inventor: Paul A. Roder
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Patent number: 6368884Abstract: A method is provided for manufacturing, the method including processing a workpiece in a plurality of processing steps and measuring characteristics of the processing performed on the workpiece in at least two of the plurality of processing steps. The method also includes displaying the characteristics measured by overlaying the characteristics measured at each of the at least two of the plurality of processing steps to display a final resulting workpiece.Type: GrantFiled: April 13, 2000Date of Patent: April 9, 2002Assignee: Advanced Micro Devices, Inc.Inventors: Greg Goodwin, Anastasia Lynn Oshelski
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Patent number: 6366690Abstract: A method is provided for the detection of defects on a semiconductor wafer by checking individual pixels on the wafer, collecting the signature of each pixel, defined by the way in which it responds to the light of a scanning beam, and determining whether the signature is that of a faultless pixel or of a pixel that is defective or suspect to be defective. An apparatus is also provided for the determination of such defects, which comprises a stage for supporting a wafer, a laser source generating a beam that is directed onto the wafer, collecting optics and photoelectric sensors for collecting the laser light scattered by the wafer in a number of directions and generating corresponding analog signals, an A/D converter deriving from the signals digital components defining pixel signatures, and selection systems for identifying the signatures of suspect pixels and verifying whether the suspect pixels are indeed defective.Type: GrantFiled: July 7, 1998Date of Patent: April 2, 2002Assignee: Applied Materials, Inc.Inventors: Zeev Smilansky, Sagie Tsadka, Zvi Lapidot, Rivi Sherman
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Publication number: 20020028013Abstract: A pair of edges that are located at ends as viewed in the widthwise direction of a design pattern are recognized. On the basis of the edge direction in which the paired edges are recognized, edge points on the design pattern are detected as sub-pixels. The widthwise dimension of the design pattern is calculated on the basis of the edge points. In addition, the widthwise dimension of a circuit pattern is calculated at the same position as the widthwise dimension of the design pattern. On the basis of the calculated widthwise dimensions, the semiconductor wafer circuit pattern is checked.Type: ApplicationFiled: June 20, 2001Publication date: March 7, 2002Inventors: Eiji Sawa, Hiromu Inoue
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Publication number: 20020019680Abstract: The present invention relates to a control method for improving the productivity of a screen printer for an electronics-mounting machine. Thus, a screen printer according to this invention uses a recognition camera to inspect the results of printing of a circuit board concurrently with a cleaning operation of the rear surface of a screen, thereby enabling the effective use of time. This screen printer also enables cream solder to be automatically supplied to reduce the operation time by determining whether the next screen to be used is unused. During automatic screen replacement, this screen printer enables a desired screen stored in the corresponding stocker to be automatically specified in order to replace the current screen in response to a selected NC program.Type: ApplicationFiled: January 22, 2001Publication date: February 14, 2002Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Noboru Nishikawa, Akihiko Wachi, Hiroyoshi Saito
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Publication number: 20020015520Abstract: An improved circuit board inspection system incorporates self learning techniques for accurate determination of Z-axis elevations of electrical connections. A Delta Z, referenced to a laser range finder generated surface map of the circuit board, is automatically determined from a series of cross sectional images of the electrical connections for each electrical connection on the circuit board. The Delta Z values for each electrical connection are stored in a data base from which customized Delta Z values for specifically defined board views may be calculated.Type: ApplicationFiled: July 31, 2001Publication date: February 7, 2002Inventor: Paul A. Roder
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Publication number: 20020015519Abstract: A method for bonding a material to a fibrous substrate surface that includes providing a catalyst at the fibrous substrate surface, then contacting that surface with a material that undergoes a metathesis reaction and then bonding the fibrous substrate surface to a second substrate. There are two embodiments of this method—a coating process and an adhesive process. In the coating embodiment, the metathesizable material is contacted with the catalyst on the substrate surface so that it undergoes metathesis polymerization to form the coating. The adhesive process includes (a) providing a catalyst at the fibrous substrate surface, (b) contacting the catalyst on the fibrous substrate surface with a metathesizable material so that the metathesizable material undergoes a metathesis reaction; and (c) contacting the fibrous substrate surface with a second substrate surface.Type: ApplicationFiled: January 29, 2001Publication date: February 7, 2002Applicant: Lord CorporationInventors: Edward F. Tokas, Kenneth C. Caster
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Patent number: 6339653Abstract: The present invention provides data analysis stations respectively for a probing tester and an automatic particle inspection machine. And, in the data analysis station, the coordinates on which the disposition of the chips are described on a product basis are equal to those on which the locations of the defects are described. Further, the station provides a function of determining which of the chips each defect belongs to. These data analysis stations are connected through a communication line. The present invention is capable of analyzing the data on a chip basis, resulting in being able to grasp the relation between how the defects are caused on each chip and the product character of the chip.Type: GrantFiled: March 10, 2000Date of Patent: January 15, 2002Assignee: Hitachi, Ltd.Inventors: Seiji Ishikawa, Masao Sakata, Jun Nakazato, Sadao Shimoyashiro, Hiroto Nagatomo, Yuzo Taniguchi, Osamu Satou, Tsutomu Okabe, Yuzaburo Sakamoto, Kimio Muramatsu, Kazuhiko Matsuoka, Taizo Hashimoto, Yuichi Ohyama, Yutaka Ebara, Isao Miyazaki, Shuichi Hanashima
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Patent number: 6330354Abstract: A method for analyzing image data is disclosed that will find defects on a multi-layer device having solder pads, such as a semiconductor computer chip. The method provides a device template image, a theoretical image created from data from several real images, for comparison to an image of a device to be tested after the solder pad data is segmented. The parameter values of the device to be tested are recorded and compared to the parameter values of the device template, forming a difference image. The difference image and the solder pad data are then run through a series of tests, wherein the device is determined defective or not defective.Type: GrantFiled: May 1, 1997Date of Patent: December 11, 2001Assignee: International Business Machines CorporationInventors: Pierre M. Companion, Karl K. Moody, III, Brenda M. Wilson
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Patent number: 6330353Abstract: A method for localization refinement of inspection patterns comprises the steps of providing a template image comprising pixels in a pattern, each pixel having an intensity, providing an input image having a same pattern of pixels as the template image and calculating an energy function by weighting a sum of modified optical flow constraints at locations of the pixels of both the template image and the input image to determine a shift and rotation between the pattern of the template image and the input image.Type: GrantFiled: December 18, 1997Date of Patent: December 11, 2001Assignee: Siemens Corporate Research, Inc.Inventors: Shang-Hong Lai, Ming Fang
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Patent number: 6317973Abstract: In a mounting system including a loading station having a transport conveyor for conveying printed circuit boards, a mounting machine for fabricating circuit devices by attaching electronic assemblies on printed circuit boards supplied thereto from said loading station, and a unloading station having a transport conveyor for conveying circuit devices supplied thereto from the mounting machine, the loading station includes a discriminating device for discriminating the kind or type of printed circuit boards and generating a discrimination signal for instructing the kind or type of the printed circuit board. A mounting process in the mounting machine in selectively set by the discrimination signal from the discriminating device. According to this mounting system, even when many kinds of circuit devices are fabricated by many kinds of printed circuit boards, mounting processes can be successively carried out by one mounting line.Type: GrantFiled: June 14, 1999Date of Patent: November 20, 2001Assignee: Sony Video (M) SDN.BHDInventors: Tokio Kuriyama, Masao Tomioka
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Patent number: 6317514Abstract: Novel method and apparatus are disclosed for inspecting a wafer surface to detect the presence thereon of exposed conductive material, particularly for determining the integrity of contact holes and vias, in semiconductor wafer manufacturing. The method comprises the steps of irradiating a spot of the wafer surface with a beam having a wavelength sufficiently shorter than the working function of the metal, such as deep UV light beam, collecting the electrons released by the irradiated wafer, generating an electrical signal that is a function of the collected electrons, and inspecting the signal to determine whether the contact holes or vias within the irradiated wafer spot are open. The apparatus comprises a vacuum chamber having therein a stage and chuck for supporting the wafer. An illumination source generates irradiating energy which is formed into a beam using appropriate optics so as to obtain the desired beam spot of the wafer's surface.Type: GrantFiled: September 9, 1998Date of Patent: November 13, 2001Assignee: Applied Materials, Inc.Inventors: Silviu Reinhorn, Gilad Almogy
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Patent number: 6317513Abstract: Inspection of solder paste on a printed circuit board using a before printing image (pre-application image) to normalize an after printing image (post-application image) of the printed circuit board. Existing lighting and optics used for alignment of the screen-printing stencil to the printed circuit board are used for the solder paste inspection. An embodiment is described wherein pad regions of the printed circuit board are inspected for information about the solder paste applied on the pad regions of the printed circuit board. A stencil in the screen printing process is also inspected using a before printing image (pre-application) to normalize an after printing image (post-application) of the stencil.Type: GrantFiled: September 18, 1998Date of Patent: November 13, 2001Assignee: Cognex CorporationInventors: David J. Michael, Juha Koljonen
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Patent number: 6314201Abstract: An improved circuit board inspection system incorporates self learning techniques for accurate determination of Z-axis elevations of electrical connections. A Delta Z, referenced to a laser range finder generated surface map of the circuit board, is automatically determined from a series of cross sectional images of the electrical connections for each electrical connection on the circuit board. The Delta Z values for each electrical connection are stored in a data base from which customized Delta Z values for specifically defined board views may be calculated.Type: GrantFiled: October 16, 1998Date of Patent: November 6, 2001Assignee: Agilent Technologies, Inc.Inventor: Paul A. Roder
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Patent number: 6285783Abstract: A pattern data development/generation apparatus includes a pattern generation circuit for obtaining a share of a target pattern in each square and outputting share data in reading pattern design data, decoding pattern data including a pattern shape, a pattern position and a pattern size, and assigning the decoded output data to the squares having an appropriate size as a unit, a pattern memory for holding a predetermined range of the share data generated by the pattern generation circuit, and a pattern memory readout circuit for reading out the share data of each square.Type: GrantFiled: September 25, 1997Date of Patent: September 4, 2001Assignee: Kabushiki Kaisha ToshibaInventors: Ikunao Isomura, Hideo Tsuchiya
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Patent number: 6278797Abstract: An inspection beam such as laser beam is scanned two-dimensionally on an inspection surface of a circuit board with a plurality of lands while allowing its reflected beam from the inspection surface to be received by a beam receiving section. The beam receiving section is formed by a device, such as a semiconductor position sensitive detector, which is capable of producing an output which varies according to a reflected beam brightness and reflected beam receiving position (which reflects the height level of the reflection surface). On the basis of the output of the beam receiving section, reflected beam brightness information and height level information at respective positions on the inspection surface are prepared. From the reflected beam brightness information at the respective positions, an existing region of each of the lands on the inspection surface can be fixed.Type: GrantFiled: September 25, 1998Date of Patent: August 21, 2001Assignee: NGK Spark Plug Co., Ltd.Inventors: Masato Nagasaki, Tomoyoshi Tsunekawa, Yoichi Matsubara, Akira Kotagiri
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Patent number: 6263098Abstract: A method is disclosed for determining the functionality of circuitry contained within integrated circuit modules. A composite image signal is compiled from signals that each represent the image on one of a plurality of layers that are sequentially exposed across the module. A netlist presenting the components of the circuitry and the interconnections therebetween, is generated from the composite image signal. Components from the netlist are then allocated to specific functions which are compiled to determine the functionality of the circuitry.Type: GrantFiled: September 11, 1998Date of Patent: July 17, 2001Assignee: The United States of America as represented by the Secretary of the ArmyInventor: Michael A. Dukes
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Patent number: 6259809Abstract: An image information recognition system is provided which quantifies an angle of rotation and/or magnification of a wiring pattern in an image to facilitate a subsequent image retrieval.Type: GrantFiled: August 31, 1998Date of Patent: July 10, 2001Assignee: Advantest CorporationInventor: Kazuyuki Maruo
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Patent number: 6246788Abstract: An apparatus, system, and method of optically inspecting printed circuit boards (PCBs) for defects, that reliably determines the dimensions of components including those having the same color as the background, and which can detect components which are missing, misoriented, misaligned, or not properly seated. The apparatus uses a camera and a coherent primary light source mounted at an angle away from the vertical so as to produce sharply defined PCB component shadows on the top surface of the PCB. An image of the PCB is captured, the shadow edges are symbolically decomposed into primitives from which gradients are produced, and then compared to a previously captured gradient of a defect-free PCB. Differences in the two image gradients, if any, are used to identify missing, misaligned, misoriented, and improperly seated components, and to detect foreign objects and other PCB defects.Type: GrantFiled: May 6, 1998Date of Patent: June 12, 2001Assignee: ISOA, Inc.Inventors: Ramakrishna Pattikonda, Youling Lin, Kathleen Hennessey
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Publication number: 20010002935Abstract: This invention discloses a method for printed circuit board (PCB) inspection, including providing a multiplicity of PCBs placed on an inspection panel, defining each non-identical PCB in terms of geometry and features which are to be inspected, grouping the PCBs into at least one cluster, the at least one cluster being defined in terms of an amount, location and orientation of the PCBs in the at least one cluster, creating a reference image for the panel defined by a location and orientation of the at least one cluster on the panel and inspecting the panel by comparing sensed information with the reference image.Type: ApplicationFiled: December 5, 2000Publication date: June 7, 2001Applicant: ORBOTECH LTD.Inventors: Anat Greenberg, Gregory Gutarts, Anna Yaari, Michael Barel, Jacob Nadivi
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Patent number: 6236747Abstract: An inspection system and method uses a first illumination apparatus, such as a ring illumination apparatus to illuminate one or more reflective elements, such as solder balls on an electronic component or other protruding surfaces or objects. The ring illumination apparatus includes a substantially ring-shaped light source that provides a substantially even illumination across the one or more reflective elements. An illumination detection device detects light beams reflecting off of the illuminated reflective elements for forming a first captured image. The system and method then uses a second, different illumination apparatus, such as an on-axis illumination apparatus to illuminate the reflective elements. The second illumination apparatus is selected so as to illuminate unwanted reflective elements substantially the same as they are illuminated by the first illumination apparatus while illuminating the desired reflective elements differently.Type: GrantFiled: August 14, 1998Date of Patent: May 22, 2001Assignee: Acuity Imaging, LLCInventors: Steven Joseph King, Jonathan Edmund Ludlow
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Patent number: 6222935Abstract: A pattern inspection method capable of providing an improved inspection reliability includes the following steps. A pattern classification is set every pixel-value range of a reference-image data obtained from a reference pattern. Each of the pattern classifications has reference-data preparing parameters. With respect to each pixel of the reference-image data, pixel values of a pixel window which is composed of the pixel as a center pixel and neighbor pixels around the center pixel are checked to prepare a reference data. When all of the pixels in the pixel window are within a single pixel-value range, the center pixel is decided as a pattern uniform portion, and the reference data is prepared according to the parameters of a corresponding pattern classification.Type: GrantFiled: February 22, 1999Date of Patent: April 24, 2001Assignee: Matsushita Electric Works, Ltd.Inventor: Shinji Okamoto
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Patent number: 6188785Abstract: An image signal of a large number of patterns of the same shape on an LSI wafer obtained by an image sensor is held in a memory circuit, by using a CMOS image sensor chip incorporating a one-dimensional CMOS photodiode array, an analog-to-digital conversion circuit, a memory circuit and a processing circuit. Then, the image signal and one-cycle and two-cycle displaced image signals cyclically displaced from the image signal by the processing circuit are algebraically processed by a defect detection algorithm in the processing circuit of the CMOS image sensor. By this processing, a defect image is extracted without using a normal inspection pattern. Thus, a high-speed processing, a simplification of a configuration of an apparatus and a miniaturization of the apparatus become possible.Type: GrantFiled: May 19, 1998Date of Patent: February 13, 2001Assignee: NEC CorporationInventors: Toyokazu Nakamura, Benjamin Tsai
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Patent number: 6175645Abstract: A method and an apparatus for an optical inspection of an object, having upper and lower faces, so as to detect defects existing on the object. First and second beams of an incident radiation are produced and directed onto the object. A light component of the first incident beam, which is reflected from one face of the object, and a light component of the second incident beam, which is transmitted through the upper and lower faces of the object, are simultaneously sensed. First and second images, formed, respectively by reflected and transmitted light components are acquired and analyzed so as to provide data indicative of the defects.Type: GrantFiled: January 22, 1998Date of Patent: January 16, 2001Assignee: Applied Materials, Inc.Inventors: Emanuel Elyasaf, Ehud Tirosh
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Patent number: 6173071Abstract: An apparatus and method for inspecting a printed circuit board, whereby a list of windows encompassing respective regions of the printed circuit board are generated. The windows are then scanned, and data representing the respective regions is captured and stored. The captured data includes data relating to a plurality of pixels for each window. Next, data relating to a plurality of adjacent pixels is retrieved, and values of the adjacent pixels are summed. Finally, either the data relating to the plurality of adjacent pixels or the sum of adjacent pixel values is selected for use in subsequent processing. The apparatus and method is especially useful for determining an average brightness level for each window.Type: GrantFiled: December 16, 1997Date of Patent: January 9, 2001Inventors: Harold Wasserman, Gregg E. Fuhriman
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Patent number: 6167149Abstract: An inspecting apparatus is arranged on an electronic component mounting line for inspecting whether a mounting state of the component mounted on a printed circuit board by a mounting apparatus in a precedent process or a printing state of a cream solder by a cream solder printing apparatus in a precedent process is non-defective or defective.Type: GrantFiled: June 8, 1999Date of Patent: December 26, 2000Assignee: Matsushita Electric Industrial Co.Inventors: Toshihiko Tsujikawa, Seiji Mizuoka, Masao Nagamoto
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Patent number: 6151407Abstract: A measurement system (1) has robotic system (3) mounted over a base plate (2) which provides a vertical height reference. In the optical head (8), a CCD camera (17) is adjustable to be pre-set in height. The optical head (8) also has an upper light source (18) comprising LEDs and a lower light source (25) comprising a white fluorescent lamp (26) for lateral component illumination. An air flow system (45) directs cooling air in a swirling motion around the tube. An image analysis computer (10) automatically performs various tests to co-ordinate optical and mechanical operation.Type: GrantFiled: August 1, 1997Date of Patent: November 21, 2000Assignee: MV Research LimitedInventors: Peter Conlon, Sean Michael O'Neill, James Mahon
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Patent number: 6151406Abstract: A ball grid array inspection and location method and apparatus includes a raw feature finding processor which uses a feature finding algorithm to find ball features (irrespective of number) and generate a list of raw features as an X and Y location for each feature located. An angle estimation processor receives the list of raw features, a user estimated orientation angle, and ball-to-ball pitch information and determines an estimated grid angle. An on-grid check processor receives the estimated grid angle, the list of raw features and the ball-to-ball pitch information and produces a set or list of on-grid features in the form of a list X and Y translation parameters for each feature/ball found on-grid.Type: GrantFiled: October 9, 1997Date of Patent: November 21, 2000Assignee: Cognex CorporationInventors: Yian Leng Chang, Nigel John Foster, Jane Alice Loizeaux
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Patent number: 6148099Abstract: An incremental concurrent learning method starts with providing potential defects and fabrication information and a primary classification rule and secondary classification rule selection from a knowledge defect database from multiple products with different process cycles. The method then performs a truth inquiry to update a classification rule database for use by the primary classification rule and secondary classification rule selection. The method performs a primary defect classification and checks the confidence of the classification, and performs a secondary defect classification if the confidence is not high. If the confidence of the secondary defect classification is not high, a new defect may have been discovered and a novelty defect detection step is performed to define artifacts or potential new defect types to provide information for the truth inquiry.Type: GrantFiled: July 3, 1997Date of Patent: November 14, 2000Assignee: Neopath, Inc.Inventors: Shih-Jong J. Lee, Chih-Chau L. Kuan
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Patent number: 6141040Abstract: A system of optics, cameras and image processor arrangement capable of capturing images of lead tips of object fields resulting in accurate 3 dimensional positions of all the leads on a Integrated Circuit such as a Quad Flat Package (QFP). The system comprises of a telecentric lens attached to a camera working with an arrangement of mirrors and lighting. The telecentric lens and mirror optical layout splits the acquired image into 2 orthogonal viewing fields of the same lead tips of the QFP. The QFP is placed flat on a pedestal, and for any given side of the QFP, the first field views the lead tips from the front. The second field views the lead tips from the bottom of the IC package. Enhanced lead tip images are acquired by a lighting arrangement that casts illumination on the lead tips only. Electronic processing techniques are used to compute the geometry of the laeds such as global coplanarity, lead standoff and inspection of other lead defects.Type: GrantFiled: December 19, 1997Date of Patent: October 31, 2000Assignee: Agilent Technologies, Inc.Inventor: Peng Seng Toh
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Patent number: 6128403Abstract: In order to solve various problems of a wafer, two-dimensional analysis using a wafer map is aided. An image of the wafer map is classified and displayed on a screen for each item such as a manufacturing step, a device and inspection. A trend chart is also attached in addition to the image of the wafer map.Type: GrantFiled: February 19, 1998Date of Patent: October 3, 2000Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Hiroji Ozaki
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Patent number: 6097428Abstract: A method and apparatus for inspecting the surface of an object such as a semiconductor wafer for contaminant particles. The apparatus includes a light source for illuminating an area on the surface of the object. A camera is positioned above the surface of the object and detects light scattered by any particles present on the surface at that area, the camera detecting light scattered from the area over a field of view, or window, which is defined by the camera, a focusing lens and the relative distance therebetween. A computer is coupled to the camera and serves to store, process, identify and/or analyze the light detected by the camera. The computer also serves to calculate a minimum light intensity threshold level which is dynamic to compensate for variances in the background light intensity of different portions of the object. The value of the threshold level is calculated for each window of the object defined by the apparatus using the equation: T.sub.W =.mu..sub.W +.eta.-.delta..sub.W, where T.sub.Type: GrantFiled: May 23, 1997Date of Patent: August 1, 2000Assignee: Inspex, Inc.Inventors: Wo-Tak Wu, Shun-Tak Wu, Joe Danko, Roy Foster
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Patent number: 6081613Abstract: A motion of a printed circuit board (1) is detected by an encoder (4) arranged aside a belt conveyer (2), and the encoder generates a detection signal (S.sub.3) which activates a timing signal generator unit (5) for generating an image pickup start timing signal which is fed to a time measuring unit (6) for measuring the image storing time which corresponds to the time interval of the image pickup start signal (S1). According to the image storing time, the image signal (S2) generated by the line CCD camera (3) is normalized by the normalizing calculation means (7), and thereafter, the mounting condition of the printed circuit board is judged by the image recognizing section (B) with the use of the image data (D) to thereby realize a simple and convenient mechanism at a low cost and at a high precision.Type: GrantFiled: August 24, 1995Date of Patent: June 27, 2000Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kazuhiro Ikurumi, Masanori Yasutake, Osamu Nakao, Masaharu Tsujimura, Toshihiko Tsujikawa, Kenji Okamoto