Silicon Containing Coating Patents (Class 427/255.27)
-
Patent number: 7618901Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.Type: GrantFiled: May 4, 2007Date of Patent: November 17, 2009Assignee: Micron Technology, Inc.Inventors: Gurtej Singh Sandhu, Randhir P S Thakur
-
Patent number: 7531679Abstract: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.Type: GrantFiled: November 14, 2002Date of Patent: May 12, 2009Assignee: Advanced Technology Materials, Inc.Inventors: Ziyun Wang, Chongying Xu, Ravi K. Laxman, Thomas H. Baum, Bryan Hendrix, Jeffrey Roeder
-
Publication number: 20090104460Abstract: An article of manufacture, or a component part thereof, having a decorative coating comprising a coating of silicon or a coating of hydrogenated amorphous silicon functionalized with a binding agent. A method of applying a decorative coating to the surface of an article of manufacture, or to the surface of a component part of an article of manufacture, by depositing a silicon coating on the surface to be decorated using silicon hydride gas, or by depositing a coating of hydrogenated amorphous silicon on the surface to be decorated and functionalizing the hydrogenated amorphous silicon coating with a binding agent.Type: ApplicationFiled: October 31, 2007Publication date: April 23, 2009Inventor: Gary Barone
-
Patent number: 7514342Abstract: A method of forming a deposited film according to the present invention includes: introducing a starting gas into a discharge space in a reaction vessel; and applying electric power to generate discharge to decompose the starting gas, wherein, when a self-bias voltage value which is generated at an electrode applied with first electric power reaches a preset threshold, second electric power higher than the first electric power is applied to the electrode to change the self-bias voltage value to another self-bias voltage value larger in absolute value than the threshold, and the deposited film is formed.Type: GrantFiled: May 20, 2005Date of Patent: April 7, 2009Assignee: Canon Kabushiki KaishaInventor: Atsushi Yasuno
-
Patent number: 7491660Abstract: A method is provided for making a FET device in which a nitride layer overlies the PFET gate structure, where the nitride layer has a compressive stress with a magnitude greater than about 2.8 GPa. This compressive stress permits improved device performance in the PFET. The nitride layer is deposited using a high-density plasma (HDP) process, wherein the substrate is disposed on an electrode to which a bias power in the range of about 50 W to about 500 W is supplied. The bias power is characterized as high-frequency power (supplied by an RF generator at 13.56 MHz). The FET device may also include NFET gate structures. A blocking layer is deposited over the NFET gate structures so that the nitride layer overlies the blocking layer; after the blocking layer is removed, the nitride layer is not in contact with the NFET gate structures. The nitride layer has a thickness in the range of about 300-2000 ?.Type: GrantFiled: October 17, 2007Date of Patent: February 17, 2009Assignees: International Business Machines Corporation, Novellus Systems. Inc.Inventors: Richard A. Conti, Ronald P. Bourque, Nancy R. Klymko, Anita Madan, Michael C. Smits, Roy H. Tilghman, Kwong Hon Wong, Daewon Yang
-
Publication number: 20080032040Abstract: To provide a wafer support and a semiconductor substrate processing method by which dopants released from a rear surface of a semiconductor substrate can be adequately restrained from reaching a top surface of a semiconductor substrate and a reaction gas can be restrained from reaching a rear surface of the semiconductor substrate.Type: ApplicationFiled: November 9, 2004Publication date: February 7, 2008Inventors: Akira Okabe, Kazuhisa Kawamoto
-
Patent number: 7306852Abstract: It is an object of the present invention to provide a gas barrier film improved in gas barrier characteristics by decreasing the adsorbent of the surface of a gas barrier layer to water and the like. The present invention attains the above object by providing a gas barrier film comprising a substrate, a gas barrier layer which is a vacuum deposition film, formed on one surface or both surfaces of the above substrate, and a water-repellent layer which is a film having water repellency, formed on the above gas barrier layer.Type: GrantFiled: March 11, 2005Date of Patent: December 11, 2007Assignee: Dai Nippon Printing Co.,Ltd.Inventor: Minoru Komada
-
Publication number: 20070254102Abstract: A method for producing a SiOx (x<1) is provided. The SiOx produced is adapted for use as an anode material in producing a lithium ion secondary battery having a large capacity which does not experience degradation with repeated cycles of use, and which has low irreversible capacity in the initial charge and discharge. The method for producing a SiOx (x<1) comprises the steps of heating a starting material which generates a silicon oxide gas to a temperature in the range of 1,100 to 1,600° C. in the presence of an inert gas or under a reduced pressure to produce the silicon oxide gas, while heating is metal silicon to a temperature in the range of 1,800 to 2,400° C. in the presence of an inert gas or under a reduced pressure to generate silicon gas, and precipitating the gas mixture of the silicon oxide gas and the metal silicon gas on a surface of a substrate.Type: ApplicationFiled: April 24, 2007Publication date: November 1, 2007Inventors: Hirofumi Fukuoka, Mikio Aramata, Satoru Miyawaki
-
Patent number: 7270849Abstract: An insulated organic copolymer is provided, having the excellent mechanical strength and deposition property at an interface contacting the lower base or the upper layer of the inorganic insulation film, and the effective dielectric constant is low as the whole film, which is suitable as the interlayer insulation film that separates the multi-layer copper wirings of the semiconductor device. The organosiloxane copolymer film is obtained by the polymerization of the cyclosiloxane and the straight-chain siloxane as the raw materials by the plasma excitation of both. At the interfaces contacting the inorganic insulation films, the interface layers having a film quality that is intricate and excellent in deposition property are prepared whereby the main component of the film composition is the straight-chain siloxane.Type: GrantFiled: July 15, 2003Date of Patent: September 18, 2007Assignee: NEC CorporationInventor: Yoshihiro Hayashi
-
Patent number: 7201937Abstract: The present invention provides unique methods of coating and novel coatings for MEMS devices. In general a two step process includes the coating of a first silane onto a substrate surface followed by a second treatment with or without a second silane and elevated temperatures.Type: GrantFiled: August 15, 2003Date of Patent: April 10, 2007Assignee: MicroSurfaces, Inc.Inventor: Xiaoyang Zhu
-
Patent number: 7166516Abstract: The semiconductor device fabrication method comprises the step of forming gate electrode 20 on a semiconductor substrate 10 with a gate insulation film 18 formed therebetween; the step of implanting dopants in the semiconductor substrate 10 with the gate electrode 20 as the mask to form dopant diffused regions 28, 36; the step of forming a silicon oxide film 38 on the semiconductor substrate 10, covering the gate electrodes 20; anisotropically etching the silicon oxide film 38 to form sidewall spacers 42 including the silicon oxide film 38 on the side walls of the gate electrode 20. In the step of forming a silicon oxide film 38, the silicon oxide film 38 is formed by thermal CVD at a 500–580° C. film forming temperature, using bis(tertiary-butylamino)silane and oxygen as raw materials.Type: GrantFiled: October 30, 2003Date of Patent: January 23, 2007Assignee: Fujitsu LimitedInventors: Masayuki Furuhashi, Toshifumi Mori, Young Suk Kim, Takayuki Ohba, Ryou Nakamura
-
Patent number: 7125582Abstract: A method including combining a silicon source precursor and a nitrogen source precursor at a temperature up to 550° C.; and forming a silicon nitride film. A system including a chamber; a silicon precursor source coupled to the chamber; a controller configured to control the introduction into the chamber of a silicon precursor from the silicon precursor source; and a memory coupled to the controller comprising a machine-readable medium having a machine-readable program embodied therein for directing operation of the system, the machine-readable program including instructions for controlling the second precursor source to introduce an effective amount of silicon precursor into the chamber at a temperature up to 550° C.Type: GrantFiled: July 30, 2003Date of Patent: October 24, 2006Assignee: Intel CorporationInventors: Michael L. McSwiney, Michael D. Goodner
-
Patent number: 7118779Abstract: Protective layers are formed on a surface of an atomic layer deposition (ALD) or chemical vapor deposition (CVD) reactor. Parts defining a reaction space for an ALD or CVD reactor can be treated, in situ or ex situ, with chemicals that deactivate reactive sites on the reaction space surface(s). A pre-treatment step can maximize the available reactive sites prior to the treatment step. With reactive sites deactivated by adsorbed treatment reactant, during subsequent processing the reactant gases have reduced reactivity or deposition upon these treated surfaces. Accordingly, purge steps can be greatly shortened and a greater number of runs can be conducted between cleaning steps to remove built-up deposition on the reactor walls.Type: GrantFiled: May 7, 2004Date of Patent: October 10, 2006Assignee: ASM America, Inc.Inventors: Mohith Verghese, Eric J. Shero
-
Patent number: 7067176Abstract: Silicon carbide structures are fabricated by fabricating a nitrided oxide layer on a layer of silicon carbide and annealing the nitrided oxide layer in an environment containing hydrogen. Such a fabrication of the nitrided oxide layer may be provided by forming the oxide layer in at least one of nitric oxide and nitrous oxide and/or annealing an oxide layer in at least one of nitric oxide and nitrous oxide. Alternatively, the nitrided oxide layer may be provided by fabricating an oxide layer and fabricating a nitride layer on the oxide layer so as to provide the nitrided oxide layer on which the nitride layer is fabricated. Furthermore, annealing the oxide layer may be provided as a separate step and/or substantially concurrently with another step such as fabricating the nitride layer or performing a contact anneal. The hydrogen environment may be pure hydrogen, hydrogen combined with other gases and/or result from a hydrogen precursor. Anneal temperatures of 400° C. or greater are preferred.Type: GrantFiled: October 26, 2001Date of Patent: June 27, 2006Assignee: Cree, Inc.Inventors: Mrinal Kanti Das, Lori A. Lipkin
-
Patent number: 7015061Abstract: The invention relates to low temperature curable spin-on glass materials which are useful for electronic applications, such as optical devices. A substantially crack-free and substantially void-free silicon polymer film is produced by (a) preparing a composition comprising at least one silicon containing pre-polymer having at least one organic group, a catalyst, and optionally water; (b) coating a substrate with the composition to form a film on the substrate, (c) crosslinking the composition by heating the composition at a temperature of about 250° C. or less for about 30 minutes or less, to produce a substantially crack-free and substantially void-free silicon polymer film, which silicon polymer has a weight ratio of organic groups to SiO groups of about 0.15:1 or more, and which silicon containing polymer film has a field breakdown voltage of about 2.5 MV/cm or more and a transparency to light in the range of about 400 nm to about 700 nm of about 95% or more.Type: GrantFiled: August 3, 2004Date of Patent: March 21, 2006Assignee: Honeywell International Inc.Inventors: Victor Lu, Lei Jin, Arlene J. Suedmeyer, Paul G. Apen
-
Patent number: 6998153Abstract: A method that includes placing a wafer within a process chamber, generating a nitrogen plasma that is remote from the process chamber, nitriding a surface of the wafer with the nitrogen plasma, depositing a nickel film over the nitrided silicon substrate surface, and annealing the nickel film to form NiSi.Type: GrantFiled: January 27, 2003Date of Patent: February 14, 2006Assignee: Applied Materials, Inc.Inventors: Mei-Ling Chiang, Thai-Cheng Chua
-
Patent number: 6958174Abstract: The present invention provides a solid material comprising a solid substrate having a thin metal film and methods for producing the same. The method generally involves using a plurality self-limiting reactions to control the thickness of the metal film.Type: GrantFiled: March 10, 2000Date of Patent: October 25, 2005Assignee: Regents of the University of ColoradoInventors: Jason W. Klaus, Steven M. George
-
Patent number: 6933021Abstract: A method of forming a titanium silicide nitride (TiSiN) layer on a substrate id described. The titanium silicide nitride (TiSiN) layer is formed by providing a substrate to a process chamber and treating the substrate with a silicon-containing gas. A titanium nitride layer is formed on the treated substrate and exposed to a silicon-containing gas. The titanium nitride (TiN) layer reacts with the silicon-containing gas to form the titanium silicide nitride (TiSiN) layer. The formation of the titanium silicide nitride (TiSiN) layer is compatible with integrated circuit fabrication processes. In one integrated circuit fabrication process, the titanium silicide nitride (TiSiN) layer may be used as a diffusion barrier for a tungsten (W) metallization process.Type: GrantFiled: April 16, 2002Date of Patent: August 23, 2005Assignee: Applied Materials, Inc.Inventors: Jing-Pei Chou, Chien-Teh Kao, Chiukin Lai, Roderick C. Mosely, Mei Chang
-
Patent number: 6926932Abstract: A method for forming a silicon oxide layer in the production of the polysilicon film transistor is disclosed. A plasma surface treatment is performed over a substrate after an amorphous silicon layer has been formed on the substrate by PECVD to transform a portion of the amorphous silicon layer into a superficial oxide layer.Type: GrantFiled: May 30, 2003Date of Patent: August 9, 2005Assignee: Toppoly Optoelectronics Corp.Inventor: Hui-Chu Lin
-
Patent number: 6896968Abstract: A protective coating for a carbon-containing component comprises a material selected from the group consisting of non-stoichiometric silicon and carbon; non-stoichiometric silicon and oxygen; non-stoichiometric silicon and nitrogen; compounds of silicon, oxygen, and carbon; compounds of silicon, oxygen and nitrogen; compounds of silicon, nitrogen, and carbon; and silicon.Type: GrantFiled: April 6, 2001Date of Patent: May 24, 2005Assignee: Honeywell International Inc.Inventor: Ilan Golecki
-
Patent number: 6890816Abstract: High quality epitaxial layers of monocrystalline perovskite materials (18) can be grown overlying monocrystalline substrates (12) such as gallium arsenide wafers by forming a metal template layer (16) on the monocrystalline substrate. The structure includes a metal-containing layer (16) to mitigate unwanted oxidation of underlying layers and a low-temperature seed layer (19) that prevents degradation of an epitaxial layer (14) during growth of the perovskite layer (18).Type: GrantFiled: February 7, 2003Date of Patent: May 10, 2005Assignee: Freescale Semiconductor, Inc.Inventors: Yong Liang, Ravindranath Droopad
-
Process for growing a dielectric layer on a silicon-containing surface using a mixture of N2O and O3
Patent number: 6864125Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting. The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.Type: GrantFiled: August 18, 2003Date of Patent: March 8, 2005Assignee: Micron Technology, Inc.Inventors: Gurtej Singh Sandhu, Randhir P S Thakur -
Patent number: 6861104Abstract: A method of enhancing adhesion strength of a boro-silicate glass (BSG) film to a silicon nitride film is provided. A semiconductor substrate with a silicon nitride film formed thereon is provided. The silicon nitride film is then exposed to oxygen-containing plasma such as ozone plasma. A thick BSG film is then deposited onto the treated surface of the silicon nitride film. By pre-treating the silicon nitride film with ozone plasma for about 60 seconds, an increase of near 50% of Kapp of the BSG film is obtained.Type: GrantFiled: May 22, 2002Date of Patent: March 1, 2005Assignee: United Microelectronics Corp.Inventors: Hsin-Chang Wu, Cheng-Yuan Tsai, Yu-Wen Fang, Neng-Hui Yang
-
Patent number: 6821566Abstract: A method of forming an insulating film containing silicon oxy-nitride includes a loading step, temperature raising step, oxidation step, cycle purge step, and annealing step, in this order. The temperature raising step is performed while supplying nitrogen gas and oxygen gas for preventing a silicon layer surface from being nitrided, at a supply ratio 100:1 to 1000:1. The oxidation step is performed at a temperature of 700 to 950° C. while supplying a gas that contains 1 to 5 vol % of water vapor and 95 to 99 vol % of nitrogen gas, to form a silicon oxide film. The annealing step is performed at a temperature of 800 to 950° C. while supplying a gas that contains 10 to 100 vol % of nitrogen monoxide gas, to convert a portion of the silicon oxide film into silicon oxy-nitride.Type: GrantFiled: November 20, 2002Date of Patent: November 23, 2004Assignee: Tokyo Electron LimitedInventors: Genji Nakamura, Yoshihide Tada, Masayuki Imai, Asami Suemura, Shingo Hishiya
-
Publication number: 20040224089Abstract: Embodiments of the invention generally provide a composition of silicon compounds and methods for using the silicon compounds to deposit a silicon-containing film. The processes employ introducing the silicon compound to a substrate surface and depositing a portion of the silicon compound, the silicon motif, as the silicon-containing film. The ligands are another portion of the silicon compound and are liberated as an in-situ etchant. The in-situ etchants supports the growth of selective silicon epitaxy. Silicon compounds include SiRX6, Si2RX6, Si2RX8, wherein X is independently hydrogen or halogen and R is carbon, silicon or germanium. Silicon compound also include compounds comprising three silicon atoms, fourth atom of carbon, silicon or germanium and atoms of hydrogen or halogen with at least one halogen, as well as, comprising four silicon atoms, fifth atom of carbon, silicon or germanium and atoms of hydrogen or halogen with at least one halogen.Type: ApplicationFiled: October 17, 2003Publication date: November 11, 2004Applicant: APPLIED MATERIALS, INC.Inventors: Kaushal K. Singh, Paul B. Comita, Lance A. Scudder, David K. Carlson
-
Publication number: 20040219295Abstract: The invention provides oxidation resistant coatings for transition metal substrates and transition metal alloy substrates and method for producing the same. The coatings may be multilayered, multiphase coatings or gradient multiphase coatings. In some embodiments the transition metal alloys may be boron-containing molybdenum silicate-based binary and ternary alloys. The coatings are integrated into the substrates to provide durable coatings that stand up under extreme temperature conditions.Type: ApplicationFiled: May 2, 2003Publication date: November 4, 2004Inventors: John H. Perepezko, Joon S. Park, Ridwan Sakidja
-
Publication number: 20040213907Abstract: Methods for controlling the grain structure of a polycrystalline Si-containing film involve depositing the film in stages so that the morphology of a first film layer deposited in an initial stage favorably influences the morphology of a second film layer deposited in a later stage. In an illustrated embodiment, the initial stage includes an anneal step. In another embodiment, the later stage involves depositing the second layer under different deposition conditions than for the first layer.Type: ApplicationFiled: April 24, 2003Publication date: October 28, 2004Inventors: Michael A. Todd, Keith D. Weeks
-
Patent number: 6749893Abstract: A method for making an integrated photonic device involves depositing buffer, core and cladding layers on the front side of a wafer. A thick tensile stress layer is deposited on the back side of the wafer just prior to performing a high temperature thermal treatment above 600° C. on the cladding layer to prevent the cracking of the layers as a result of the thermal treatment.Type: GrantFiled: January 31, 2002Date of Patent: June 15, 2004Assignee: DALSA Semiconductor Inc.Inventors: Luc Ouellet, Jonathan Lachance, Sylvie Archambault
-
Patent number: 6746709Abstract: The invention relates to a method for manufacture of a semiconductor component by the formation of a hydrogenous layer containing silicon on a substrate comprising or containing silicon such as a wafer or film. In order to achieve a good surface and volume passivation, it is proposed that during formation of the siliceous layer in the form of SiNxOy with 0<x≦1.5 and 0≦y≦2 one or more catalytically acting dopants are selectively added into the layer which release hydrogen from the SiNxOy layer. The concentration C of the dopants is 1×1014 cm3≦C≦1021 cm3.Type: GrantFiled: October 18, 2002Date of Patent: June 8, 2004Assignee: RWE Schott Solar GmbHInventors: Thomas Lauinger, Ingo Schwirtlich, Jens Moschner
-
Publication number: 20040096582Abstract: Silicon precursors for forming silicon-containing films in the manufacture of semiconductor devices, such as low dielectric constant (k) thin films, high k gate silicates, low temperature silicon epitaxial films, and films containing silicon nitride (Si3N4), siliconoxynitride (SiOxNy) and/or silicon dioxide (SiO2). The precursors of the invention are amenable to use in low temperature (e.g., <500° C.) chemical vapor deposition processes, for fabrication of ULSI devices and device structures.Type: ApplicationFiled: November 14, 2002Publication date: May 20, 2004Inventors: Ziyun Wang, Chongying Xu, Ravi K. Laxman, Thomas H. Baum, Bryan Hendrix, Jeffrey Roeder
-
Patent number: 6726955Abstract: A method of forming a polycrystalline silicon film comprising: providing a process gas mix comprising a silicon source gas and a dilution gas mix wherein the dilution gas mix comprises H2 and an inert gas; and forming a polycrystalline silicon film from said silicon source gas.Type: GrantFiled: June 27, 2000Date of Patent: April 27, 2004Assignee: Applied Materials, Inc.Inventors: Shulin Wang, Steven A. Chen, Lee Luo, Errol Sanchez
-
Patent number: 6716663Abstract: A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.Type: GrantFiled: August 29, 2002Date of Patent: April 6, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoyuki Morita, Takashi Ohtsuka, Michihito Ueda
-
Patent number: 6713316Abstract: A semiconductor substrate is placed within a housing. By supplying organometallic complexes and carbon dioxide in a supercritical state into the housing, a BST thin film is formed on a platinum thin film, while at the same time, carbon compounds, which are produced when the BST thin film is formed, are removed. The solubility of carbon compounds in the supercritical carbon dioxide is very high, and yet the viscosity of the supercritical carbon dioxide is low. Accordingly, the carbon compounds are removable efficiently from the BST thin film. An oxide or nitride film may also be formed by performing oxidation or nitriding at a low temperature using water in a supercritical or subcritical state, for example.Type: GrantFiled: August 29, 2002Date of Patent: March 30, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Kiyoyuki Morita, Takashi Ohtsuka, Michihito Ueda
-
Patent number: 6709512Abstract: When a polycrystalline or single crystal silicon layer is grown by catalytic CVD, a catalyst having a nitride covering at least its surface is used. In case that tungsten is used as the catalyst, tungsten nitride is formed as the nitride. The nitride is made by heating the surface of the catalyst to a high temperature around 1600 to 2100° C. in an atmosphere containing nitrogen prior to the growth. When the catalyst is heated to the temperature for its use or its nitrification, it is held in a hydrogen atmosphere.Type: GrantFiled: August 29, 2001Date of Patent: March 23, 2004Assignee: Sony CorporationInventors: Hisayoshi Yamoto, Hideo Yamanaka
-
Patent number: 6709608Abstract: A semiconductor processing component includes a quartz body characterized by silicon oxide filled micro cracks. The component is utilized as a processing component in a semiconductor furnace system. The quartz body is prepared by cleaning the component to remove a build up silicon layer and to expose micro cracks in the surface of the component and to etch the micro cracks into trenches. A silicon layer is applied onto the processing component body and at least a portion of the silicon is oxidized to silica to fill the trenches in the surface of the component body.Type: GrantFiled: July 22, 2002Date of Patent: March 23, 2004Assignee: General Electric CompanyInventors: Thomas Bert Gorczyca, Margaret Ellen Lazzeri, Frederic Francis Ahlgren
-
Patent number: 6706320Abstract: A process for modifying the surface of a substrate containing a polymeric material by contacting the surface with the modifying agent to bond the modifying agent to the surface the process comprising providing a solution of the modifying agent in a solvent and subjecting the solution of the modifying agent to a zone of elevated temperature to vaporize the solvent and provide diffuse contact between the modifying agent and the surface of the substrate.Type: GrantFiled: February 12, 2001Date of Patent: March 16, 2004Assignee: Commonwealth Scientific and Industrial Research OrganisationInventors: Con Filippou, Wojciech S Gutowski, David Proctor, Mark Spicer
-
Process for growing a dielectric layer on a silicon-containing surface using a mixture of N2O and O3
Publication number: 20040038462Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting. The presence of O3 in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.Type: ApplicationFiled: August 18, 2003Publication date: February 26, 2004Inventors: Gurtej Singh Sandhu, Randhir PS Thakur -
Publication number: 20040022945Abstract: A method for forming a coating on a substrate using an atmospheric pressure plasma discharge. The method comprises introducing an atomized liquid and/or solid coating-forming material into an atmospheric pressure plasma discharge and/or an ionized gas stream resulting therefrom, and exposing the substrate to the atomized coating-forming material. The application also described a method for polymerizing a polymer forming material, and further to apparatus for forming a coating on a substrate.Type: ApplicationFiled: March 25, 2003Publication date: February 5, 2004Inventors: Andrew Goodwin, Patrick Merlin, Jas Pal Badyal, Luke Ward
-
Patent number: 6656838Abstract: To provide a process for producing a semiconductor, which can form a CVD film at a high film-forming rate with a good step coverage, good uniformities of film forming rate and sheet resistance in the in-plane region of a wafer and a good reproducibility at every wafers, and an apparatus for treating a semiconductor for the process. In a treating chamber kept under pressure of 1,000-50,000 Pa, a wafer is placed on a susceptor, and a film is deposited on the wafer by heating the wafer at 500° C. or higher by a plate-shaped heater through the susceptor, while supplying a feed gas into the treating chamber at 500-50,000 sccm through gas injection nozzles provided near the center of a shower plate provided approximately in parallel with the wafer at a distance of 1-20 mm from the wafer and kept at a temperature of 200° C. or lower.Type: GrantFiled: May 21, 2002Date of Patent: December 2, 2003Assignee: Hitachi, Ltd.Inventors: Tomoji Watanabe, Akiko Kagatsume, Tadanori Yoshida
-
Patent number: 6652918Abstract: The invention relates to methods for treating ceramic surfaces to decrease their wettability by aqueous solutions. One method involves polishing the ceramic surface until wettability is decreased, and a second method involves a silane heat treatment. Both methods can be used to produce ceramic supports for IEF and electrophoresis gels, as well as microarray plates.Type: GrantFiled: December 10, 1999Date of Patent: November 25, 2003Assignee: The Morgan Crucible Company PLCInventors: Cheng-Tsin Lee, Keith A. Ferguson, Esteban V. Herreria
-
Patent number: 6632477Abstract: The present invention provides a method for making a superabrasive composite material having the general formula SixCyNz, and tools containing such a material. In one aspect, vapor forms of Si, C, and N elements are deposited onto a molten metal catalyst and solid SixCyNz is precipitated therefrom.Type: GrantFiled: July 16, 2001Date of Patent: October 14, 2003Inventor: Chien-Min Sung
-
Patent number: 6624091Abstract: A method of forming a fill layer over a layer in a semiconductor stack having gaps of high aspect ratio topography, and products produced thereby.Type: GrantFiled: May 7, 2001Date of Patent: September 23, 2003Assignee: Applied Materials, Inc.Inventor: Zheng Yuan
-
Patent number: 6613394Abstract: Described is a method of treating or coating homogeneously at least a portion of the surface of a material selected from metallic materials having a thickness of less than 100 &mgr;m and/or polymeric materials. The method of the present invention comprises exposing at least a portion of the surface of the material to an atmospheric plasma generated by an indirect plasmatron. In the method of the present invention, the surface of the material may undergo at least one of an increase in surface tension, a surface grafting, a surface cleaning and a surface sterilization.Type: GrantFiled: March 6, 2001Date of Patent: September 2, 2003Assignee: Wolff Walsrode AGInventors: Christian Kuckertz, Sven Jacobsen, Rainer Brandt, Klaus Landes, Ralf Hartmann
-
Patent number: 6610366Abstract: Methods for fabricating a layer of oxide on a silicon carbide layer are provided by forming the oxide layer on the silicon carbide layer and then annealing the oxide layer in an N2O environment at a predetermined temperature profile and at a predetermined flow rate profile of N2O. The predetermined temperature profile and the predetermined flow rate profile are selected so as to reduce interface states of the oxide/silicon carbide interface with energies near the conduction band of SiC.Type: GrantFiled: April 12, 2001Date of Patent: August 26, 2003Assignee: Cree, Inc.Inventor: Lori A. Lipkin
-
Patent number: 6610362Abstract: A method of forming a carbon doped oxide layer on a substrate is described. That method comprises introducing into a chemical vapor deposition apparatus a source of carbon, silicon, boron, and oxygen. That apparatus is then operated under conditions that cause a boron containing carbon doped oxide layer to form on the substrate.Type: GrantFiled: November 20, 2000Date of Patent: August 26, 2003Assignee: Intel CorporationInventor: Steven N. Towle
-
Process for growing a dielectric layer on a silicon-containing surface using a mixture of N2O and O3
Patent number: 6607946Abstract: This invention is embodied in an improved process for growing high-quality silicon dioxide layers on silicon by subjecting it to a gaseous mixture of nitrous oxide (N2O) and ozone (O3). The presence of O3 in the oxidizing ambiance greatly enhances the oxidation rate compared to an ambiance in which N2O is the only oxidizing agent. In addition to enhancing the oxidation rate of silicon, it is hypothesized that the presence of O3 interferes with the growth of a thin silicon oxynitride layer near the interface of the silicon dioxide layer and the unreacted silicon surface which makes oxidation in the presence of N2O alone virtually self-limiting. The presence of N2O in the oxidizing ambiance does not impair oxide reliability, as is the case when silicon is oxidized with N2O in the presence of a strong, fluorine-containing oxidizing agent such as NF3 or SF6.Type: GrantFiled: April 13, 1998Date of Patent: August 19, 2003Assignee: Micron Technology, Inc.Inventors: Gurtej Singh Sandhu, Randhir PS Thakur -
Publication number: 20030104227Abstract: A method of modifying a surface is disclosed. The method includes contacting the surface with a hydridosilane under conditions and for a time sufficient to form a covalent bond between a silicon atom of the hydridosilane and the oxygen atom of a hydroxyl group on the surface.Type: ApplicationFiled: January 3, 2003Publication date: June 5, 2003Applicant: University of Massachusetts, a Massachusetts CorporationInventors: Thomas J. McCarthy, Alexander Y. Fadeev
-
Asymmetric organocyclosiloxanes and their use for making organosilicon polymer low-k dielectric film
Patent number: 6572923Abstract: Methods for synthesizing extra low-k CVD precursors and forming extra low-k dielectric films on the surfaces of semiconductors wafers and integrated circuits are disclosed. An asymmetric organocyclosiloxane compound is applied to the surface where it will react with and form a film that will have a dielectric constant, k, from 2.0 to 2.5.Type: GrantFiled: January 9, 2002Date of Patent: June 3, 2003Assignee: The BOC Group, Inc.Inventors: Ce Ma, Qing Min Wang -
Publication number: 20030082300Abstract: Chemical vapor deposition processes utilize chemical precursors that allow for the deposition of thin films to be conducted at or near the mass transport limited regime. The processes have high deposition rates yet produce more uniform films, both compositionally and in thickness, than films prepared using conventional chemical precursors. In preferred embodiments, a higher order silane is employed to deposit thin films containing silicon that are useful in the semiconductor industry in various applications such as transistor gate electrodes.Type: ApplicationFiled: February 11, 2002Publication date: May 1, 2003Inventors: Michael A. Todd , Mark Hawkins
-
Patent number: 6548113Abstract: Vacuum/gas phase reactor embodiments used in gas phase dehydroxylation and alkylation reactions are described in which the substrate could be subjected to high vacuum, heated to target temperature, and treated with silane as quickly and efficiently as possible. To better facilitate the silylation and to increase the efficiency of the process, the reactor is designed to contain quasi-catalytic surfaces which can act both as an “activator” to put species in a higher energy state or a highly activated state, and as a “scrubber” to eliminate possible poisons or reactive by-products generated in the silylation reactions. One described embodiment is a hot filament reactor having hot, preferably metallic, solid surfaces within the reactor's chamber in which wafers having mesoporous silicate films are treated. Another is an IR reactor having upper and lower quartz windows sealing the upper and lower periphery of an aluminum annulus to form a heated chamber.Type: GrantFiled: November 9, 2000Date of Patent: April 15, 2003Assignee: Pacific Northwest DivisionInventors: Jerome Birnbaum, Gary Maupin, Glen Dunham, Glen Fryxell, Suresh Baskaran