Silicon Oxides Or Nitrides Patents (Class 427/579)
  • Patent number: 6531193
    Abstract: Silicon dioxide thin film have been deposited at temperatures from 25° C. to 250° C. by plasma enhanced chemical vapor deposition (PECVD) using tetramethylsilane (TMS) as the silicon containing precursor. At these temperatures, the PETMS oxide films have been found to exhibit adjustable stress and adjustable conformality. Post deposition annealing in forming gas at or below the deposition temperatures has been shown to be very effective in improving the PETMS oxide properties while preserving the low temperature aspect of the PETMS oxides.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: March 11, 2003
    Assignee: The Penn State Research Foundation
    Inventors: Stephen J. Fonash, Xin Lin, Douglas M. Reber
  • Publication number: 20030044515
    Abstract: The purpose of the present invention is to describe a novel approach for converting 3-dimensional, synthetic micro- and nano-templates into different materials with a retention of shape/dimensions and morphological features. The ultimate objective of this approach is to mass-produce micro- and nano-templates of tailored shapes through the use of synthetic or man-made micropreforms, and then chemical conversion of such templates by controlled chemical reactions into near net-shaped, micro- and nano-components of desired compositions. The basic idea of this invention is to obtain a synthetic microtemplate with a desired shape and with desired surface features, and then to convert the microtemplate into a different material through the use of chemical reactions.
    Type: Application
    Filed: August 22, 2002
    Publication date: March 6, 2003
    Applicant: The Ohio State University
    Inventor: Kenneth H. Sandhage
  • Patent number: 6521302
    Abstract: A method of reducing plasma-induced damage in a substrate, comprising providing a post-deposition ramp down of a plasma source power used in generating a plasma for substrate processing.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: February 18, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Francimar Campana-Schmitt, Carsten Schimanke
  • Patent number: 6521300
    Abstract: A method of coating an organic polymeric low-k dielectric layer starts by depositing a protective layer composed of silicon nitride (SiN) or silicon carbide (SiC) on a substrate. A hydrophilic surface is produced across a top surface of the protective layer by performing a fast surface treatment that subjects the surface to an oxygen-containing plasma at a pre-selected low radio frequency power. An adhesion promoter coating layer is formed over the top surface of the protective layer. The coating layer has promoter molecules, each promoter molecule having at least one hydrophobic group and one hydrophilic group. The low-k dielectric layer is spin-on coated onto the coating layer. Formation of the hydrophilic surface alters an orientation of the adhesion promoter molecules to facilitate the hydrophilic group of each of the adhesion promoter molecules facing the hydrophilic surface while the hydrophobic group of the adhesion promoter molecules faces the low-k dielectric layer.
    Type: Grant
    Filed: August 16, 2001
    Date of Patent: February 18, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Tsung-Tang Hsieh, Cheng-Yuan Tsai, Hsin-Chang Wu, Chih-An Huang
  • Publication number: 20020192396
    Abstract: A method of forming a film structure (e.g., film stack) comprising titanium (Ti) and titanium nitride (TiN) films is disclosed. In one aspect of the invention, a titanium silicide (TiSix) layer is formed on a Ti film, followed by deposition of a TiN film on the TiSix layer. The TiSix layer protects the underlying Ti film from chemical attack by TiCl4-based chemistry during subsequent TiN layer deposition. In another aspect of the invention, a cap layer of TiN is deposited between the Ti and TiN layers of a Ti/TiN film structure. The TiN cap layer inhibits chlorine migration from the overlying TiN layer into an underlying contact region, such as, for example, the source or drain of a transistor.
    Type: Application
    Filed: May 11, 2000
    Publication date: December 19, 2002
    Inventors: Shulin Wang, Mei Chang, Ramanujapuram A. Srinivas, Avgerinos Gelatos
  • Patent number: 6479110
    Abstract: A low dielectric constant, multiphase material which can be used as an interconnect dielectric in IC chips is disclosed. Also disclosed is a method for fabricating a multiphase low dielectric constant film utilizing a plasma enhanced chemical vapor deposition technique. Electronic devices containing insulating layers of the multiphase low dielectric constant materials that are prepared by the method are further disclosed.
    Type: Grant
    Filed: September 27, 2001
    Date of Patent: November 12, 2002
    Assignee: International Business Machines Corporation
    Inventors: Alfred Grill, Vishnubhai Vitthalbhai Patel, Stephen McConnell Gates
  • Patent number: 6479098
    Abstract: A method for reducing contaminants in a processing chamber 10 having chamber plasma processing region components comprising the following steps. The chamber plasma processing region components are cleaned. The chamber is then seasoned as follows. A first USG layer is formed over the chamber plasma processing region components. An FSG layer is formed over the first USG layer. A second USG layer is formed over the FSG layer. Wherein the USG, FSG, and second USG layers comprise a UFU season film. A UFU season film coating the chamber plasma processing region components of a processing chamber comprises: an inner USG layer over the chamber plasma processing region components; an FSG layer over the inner USG layer; and an outer USG layer over the FSG layer.
    Type: Grant
    Filed: December 26, 2000
    Date of Patent: November 12, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventors: Ming-Hwa Yoo, Yi-Lung Cheng, Szu-An Wu, Ying-Lang Wang
  • Patent number: 6475928
    Abstract: The process comprises the following steps: a) pretreatment of a surface of the substrate by means of a cold gas plasma at low or medium pressure in order to clean the said surface; b) growth, from the said cleaned surface of the substrate, of a nitride barrier layer by means of a cold gas plasma made up of an N2/H2 mixture at low or medium pressure; and c) deposition, on the nitride barrier layer, of a Ta2O5 dielectric layer by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD).
    Type: Grant
    Filed: July 15, 1998
    Date of Patent: November 5, 2002
    Assignee: France Telecom
    Inventors: Marc Berenguer, Roderick Devine
  • Patent number: 6468703
    Abstract: A process for the production of a color filter layer system structure on a substrate uses a structure lacquer layer which is deposited in a lift-off technique on the substrate. Lacquer layer surface regions and regions free of lacquer layer are present. Subsequently through a vacuum coating process a color filter layer system is deposited and subsequently with the lacquer layer surface regions the regions of the color filter layer system deposited thereon are removed. The deposition of the color filter layer system takes place through a plasma-enhanced coating at a temperature of maximally 150° C. The deposition takes place, for example, by sputtering or plasma-enhanced vapor deposition.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: October 22, 2002
    Assignee: Unaxis Trading AG
    Inventors: Johannes Edlingger, Reinhard Sperger, Maria Simotti
  • Patent number: 6465043
    Abstract: A method and apparatus for reducing particle contamination in a substrate processing chamber during deposition of a film having at least two layers. The method of the present invention includes the steps of introducing a first process gas into a chamber to deposit a first layer of the film over a wafer at a first selected pressure, introducing a second process gas into the chamber to deposit a second layer of the film over the wafer, and between deposition of said first and second layers, maintaining pressure within the chamber at a pressure that is sufficiently high that particles dislodged by introduction of the second process do not impact the wafer.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: October 15, 2002
    Assignee: Applied Materials, Inc.
    Inventor: Anand Gupta
  • Patent number: 6458721
    Abstract: A method for depositing highly conformal silicate glass layers via chemical vapor deposition through the reaction of TEOS and O3 comprises placing an in-process semiconductor wafer having multiple surface constituents in a plasma-enhanced chemical vapor deposition chamber. A “clean” silicate glass base layer substantially free of carbon particle impurities on an upper surface is formed in one of two ways. The first employs plasma-enhanced chemical vapor deposition using TEOS and diatomic oxygen gases as precursors to first deposit a “dirty” silicate glass base layer having carbon particle impurities imbedded on an upper surface thereof being transformed to a clean base layer by subjecting it to a plasma treatment, using a mixture of a diamagnetic oxygen-containing oxidant, such as ozone or hydrogen peroxide, and diatomic oxygen gas into the chamber and striking an RF plasma.
    Type: Grant
    Filed: August 23, 2001
    Date of Patent: October 1, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Ravi Iyer
  • Patent number: 6451390
    Abstract: A method for the deposition of a silicon dioxide film onto a substrate using plasma enhanced chemical vapor deposition and TEOS is disclosed. The method includes controlling the deposition rate of silicon dioxide on a substrate by pulsing the radio frequency power supply used to generate a TEOS oxide plasma. The obtained silicon dioxide film is good in electrical and mechanical film properties for the application of forming thin film transistors.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: September 17, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Haruhiro H. Goto, Takako Takehara, Carl A. Sorensen, William R. Harshbarger, Kam S. Law
  • Patent number: 6448187
    Abstract: A method and apparatus for depositing a low dielectric constant film includes depositing a silicon oxide based film, preferably by reaction of an organosilicon compound and an oxidizing gas at a low RF power level from about 10W to about 500W, exposing the silicon oxide based film to water or a hydrophobic-imparting surfactant such as hexamethyldisilazane, and curing the silicon oxide based film at an elevated temperature. Dissociation of the oxidizing gas can be increased in a separate microwave chamber to assist in controlling the carbon content of the deposited film. The moisture resistance of the silicon oxide based films is enhanced.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: September 10, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Wai-Fan Yau, David Cheung, Nasreen Gazala Chopra, Yung-Cheng Lu, Robert Mandal, Farhad Moghadam
  • Patent number: 6440504
    Abstract: The object of the present invention is to provide a deposited film forming apparatus and deposited film forming method that can efficiently, cheaply, and stably supply high-quality amorphous silicon devices. This object is achieved by providing a vacuum vessel capable of providing a substrate therein, evacuating the inside of the vacuum vessel by an evacuation means, introducing a gas from gas supply means into the vacuum vessel, and applying high-frequency power from a high-frequency power source, thereby generating a plasma, wherein the evacuation means comprises at least two evacuation means as first evacuation means and second evacuation means, wherein the vacuum vessel is moved while maintaining a vacuum between the two evacuation means, and wherein the vacuum vessel is capable of being connected to each of the evacuation means, high-frequency power source, and gas supply means through a detachable connection mechanism.
    Type: Grant
    Filed: December 5, 1997
    Date of Patent: August 27, 2002
    Assignee: Canon Kabushiki Kaisha
    Inventor: Kazuyoshi Akiyama
  • Patent number: 6440505
    Abstract: The invention includes methods of treating sodalime glass surfaces for deposition of silicon nitride and methods of forming field emission display devices. In one aspect, the invention includes a method of treating a sodalime glass surface for deposition of silicon nitride comprising: a) cleaning a surface of the glass with detergent; and b) contacting the cleaned surface with a solution comprising a strong oxidant to remove non-silicon-dioxide materials from the surface and from a zone underlying and proximate the surface.
    Type: Grant
    Filed: November 6, 2000
    Date of Patent: August 27, 2002
    Assignee: Micron Technology, Inc.
    Inventor: Kanwal K. Raina
  • Patent number: 6436487
    Abstract: In a film deposition process wherein a plasma generation chamber is divided from a deposition chamber, radicals are extracted from the plasma generation chamber to the deposition chamber and caused to react with a process gas to form a silicon oxide film. The deposition apparatus has a host controller for dictating a pattern of control of the process gas flow to an MFC provided in a feed part for feeding the process gas into the deposition chamber. The host controller gives the MFC instructions for executing control to, in a first half side time constituting not more than half of the whole film deposition time, first make zero or limit and then gradually increase the process gas flow. The process gas flow in the first half side time can also be limited so that the thickness of film deposited in the first half side time is not greater than 10% of the overall thickness of the silicon oxide film. A silicon-hydrogen compound (SinH2n+2 (n=1, 2, 3, . . . )) is used as the process gas.
    Type: Grant
    Filed: July 6, 2000
    Date of Patent: August 20, 2002
    Assignees: Anelva Corporation, NEC Corporation
    Inventors: Manabu Ikemoto, Katsuhisa Yuda
  • Patent number: 6436304
    Abstract: A plasma processing method using helicon wave excited plasma which makes it possible to control a degree of dissociation for a process gas by controlling the source power. In the plasma processing method using helicon wave excited plasma, the source power applied to the plasma generator is set lower than a source power corresponding to a discontinuous change of a characteristic line indicating the dependency of electron density or saturated ion current density on source power.
    Type: Grant
    Filed: February 5, 1997
    Date of Patent: August 20, 2002
    Assignee: Anelva Corporation
    Inventor: Hiroshi Nogami
  • Patent number: 6426125
    Abstract: According to an exemplary embodiment of the invention, a method of forming a plurality of layers on an article comprises steps of generating a plasma by forming an arc between a cathode and an anode; injecting a first material comprising an organic compound into the plasma to deposit a first layer on the article; injecting a second material comprising an organometallic material into the plasma to form a second layer on the first layer; and injecting a third material comprising a silicon containing organic compound into the plasma to deposit a third layer on the second layer. The invention also relates to an article of manufacture comprising a substrate; an interlayer disposed on the substrate; a second layer disposed on the interlayer, the second layer comprising an inorganic ultraviolet absorbing material; and a third layer disposed on the second layer, the third layer comprising an abrasion resistant material.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: July 30, 2002
    Assignee: General Electric Company
    Inventors: Barry Lee-Mean Yang, Charles Dominic Iacovangelo
  • Patent number: 6426144
    Abstract: A process for coating plastic substrates with a transparent layer compact that is not sensitive to scratches and abrasion and resistant to atmospheric influence with a plasma flame in a vacuum chamber at some distance from the substrate. The process includes the steps of: a cleaning of the substrate with an oxidizing gas in a first procedural step and then a cross linkage with an inert gas in a second procedural step, an oxidizing gas and a silicon-organic compound are used in a third procedural step to produce a first barrier layer, and an oxidizing gas, a silicon-organic compound, and a UV-absorbing compound are used in a fourth procedural step to deposit a sublayer with UV absorbers, an oxidizing gas and a silicon-organic compound are used in a fifth procedural step to deposit a scratch-resistant layer, an inert gas and a silicon-organic compound are used in a sixth procedural step to deposit a smooth layer.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: July 30, 2002
    Assignee: Leybold Systems GmbH
    Inventors: Heinrich Grünwald, Thomas Schulte, Klaus Nauenburg, Wilfried Dicken, Rudolf Beckmann
  • Publication number: 20020094388
    Abstract: Silicon dioxide thin film have been deposited at temperatures from 25° C. to 250° C. by plasma enhanced chemical vapor deposition (PECVD) using tetramethylsilane (TMS) as the silicon containing precursor. At these temperatures, the PETMS oxide films have been found to exhibit adjustable stress and adjustable conformality. Post deposition annealing in forming gas at or below the deposition temperatures has been shown to be very effective in improving the PETMS oxide properties while preserving the low temperature aspect of the PETMS oxides.
    Type: Application
    Filed: December 11, 2000
    Publication date: July 18, 2002
    Applicant: The Penn State Research Foundation
    Inventors: Stephen J. Fonash, Xin Lin, DOuglas M. Reber
  • Patent number: 6416823
    Abstract: An improved deposition chamber (2) includes a housing (4) defining a chamber (18) which houses a substrate support (14). A mixture of oxygen and SiF4 is delivered through a set of first nozzles (34) and silane is delivered through a set of second nozzles (34a) into the chamber around the periphery (40) of the substrate support. Silane (or a mixture of silane and SiF4) and oxygen are separately injected into the chamber generally centrally above the substrate from orifices (64, 76). The uniform dispersal of the gases coupled with the use of optimal flow rates for each gas results in uniformly low (under 3.4) dielectric constant across the film.
    Type: Grant
    Filed: February 29, 2000
    Date of Patent: July 9, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Shijian Li, Yaxin Wang, Fred C. Redeker, Tetsuya Ishikawa, Alan W. Collins
  • Patent number: 6417071
    Abstract: A method for filling a trench within a silicon substrate. There is first provided a silicon substrate having a trench formed therein. There is then formed upon the substrate and within the trench a gap filling silicon oxide trench fill layer employing an ozone assisted thermal chemical vapor deposition (SACVD) method. There is then carried out a densification of the gap filling silicon oxide trench fill layer by annealing in an oxidizing atmosphere at an elevated temperature. Finally, the gap filling silicon oxide trench fill layer is planarized by chemical mechanical polish (CMP) planarization to form the silicon oxide trench filling layer with attenuated surface sensitivity and with an enhanced bulk quality and reduced trench recess at corners.
    Type: Grant
    Filed: January 8, 2001
    Date of Patent: July 9, 2002
    Assignee: Taiwan Semiconductor Manufacturing Company
    Inventor: Syun-Ming Jang
  • Patent number: 6413583
    Abstract: A method for depositing silicon oxide layers having a low dielectric constant by reaction of an organosilicon compound and a hydroxyl forming compound at a substrate temperature less than about 400° C. The low dielectric constant films contain residual carbon and are useful for gap fill layers, pre-metal dielectric layers, inter-metal dielectric layers, and shallow trench isolation dielectric layers in sub-micron devices. The hydroxyl compound can be prepared prior to deposition from water or an organic compound. The silicon oxide layers are preferably deposited at a substrate temperature less than about 40° C. onto a liner layer produced from the organosilicon compound to provide gap fill layers having a dielectric constant less than about 3.0.
    Type: Grant
    Filed: June 22, 1999
    Date of Patent: July 2, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Farhad K. Moghadam, David W. Cheung, Ellie Yieh, Li-Qun Xia, Wai-Fan Yau, Chi-I Lang, Shin-Puu Jeng, Frederic Gaillard, Shankar Venkataraman, Srinivas Nemani
  • Patent number: 6413577
    Abstract: A process for operating a field emission display (FED) is disclosed. The FED has a faceplate and a baseplate, and a layer of praseodymium-manganese oxide disposed between the faceplate and baseplate. The layer absorbs photons during operation of the FED, and thus provides for improved performance of the FED because, for example, stray photons do not impact the underlying circuitry of the FED.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: July 2, 2002
    Assignee: Micron Technology, Inc.
    Inventors: Surjit S. Chadha, Robert T. Rasmussen
  • Patent number: 6410106
    Abstract: A method is used to form an intermetal dielectric layer. According to the invention, an unbiased-unclamped fluorinated silicate glass layer used as a protection layer is formed by high density plasma chemical vapor deposition on a biased-clamped fluorinated silicate glass layer formed by high density plasma chemical vapor deposition to prevent the biased-clamped fluorinated silicate glass layer from being exposed in a planarization process.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: June 25, 2002
    Assignee: United Microelectronics Crop.
    Inventors: Cheng-Yuan Tsai, Chih-Chien Liu, Ming-Sheng Yang
  • Patent number: 6403151
    Abstract: A method is used by a semiconductor processing tool. The method comprises forming a first layer above a substrate layer, and forming an inorganic bottom antireflective coating layer above the first layer by introducing at least two gases at a preselected ratio into the semiconductor processing tools. A signal indicating that the semiconductor processing tool has been serviced is received, and the ratio of the gases is varied in response to receiving the signal to control optical parameters of the bottom antireflective coating layer to enhance subsequent photolithographic processes.
    Type: Grant
    Filed: April 18, 2000
    Date of Patent: June 11, 2002
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Bradley Marc Davis, Craig William Christian, Allen Lewis Evans
  • Patent number: 6379757
    Abstract: A method for coating a plastic substrate with an abrasion resistant metal oxide layer which includes placing the plastic substrate in a vacuum chamber, forming a vacuum in the chamber, conducting electron beam evaporation of an oxide-forming metal or a metal oxide in the vacuum chamber, passing the evaporated metal or metal oxide into an argon plasma into which oxygen and nitrous oxide has been passed, and, exposing the plastic substrate to the plasma, whereby the abrasion resistant layer is deposited on an exposed surface of the substrate.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: April 30, 2002
    Assignee: General Electric Company
    Inventor: Charles Dominic Iacovangelo
  • Patent number: 6379510
    Abstract: A method of making a micro-mirror light beam switch having a thin flexible movable support member for supporting a thin central reflective mirror surface thereon and for supporting a plurality of thin unimorph piezoelectric cantilevered mirror actuators mechanically coupled between a fixed substrate and movable hinging portions of the thin movable support member. The method employs thin film deposition techniques and photolithography for readily forming the extremely thin switch, whereby the components thereof are substantially co-planar for precisely controlled, multi-axial micro-mirror motion and low voltage operation necessary for the rapid switching of optical traffic from fiber to fiber in the next-generation optical networks.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: April 30, 2002
    Inventors: Jonathan S. Kane, Gareth A. Hughes
  • Patent number: 6376028
    Abstract: The described device is introduced into a plastic container with a narrow opening and serves a plasma enhanced process for treating the inside surface of the container. The device (2) extends between the container opening and the container bottom along the container axis (X) and comprising a gas feed tube (23) for feeding a process gas into the container and permanent magnets (24) for establishing a stationary magnetic field inside the container. The magnets (24) form a column of superimposed magnets which is arranged inside the gas feed tube (23). The north and south poles of each magnet are positioned on opposite sides of the container axis (X). The device may also comprise cooling means (25) for cooling the gas feed tube and the magnets.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: April 23, 2002
    Assignee: Tetra Laval Holdings & Finance S.A.
    Inventors: Jacques Laurent, Pierre Fayet, Robert Devidal
  • Patent number: 6372283
    Abstract: The present invention provides a method for modifying a pyrolytic carbon surface to improve adhesion between it and a subsequently added polymer and/or a bio-active compound. In particular, plasma depositing an oxygen-containing, silicon-containing film forming monomer on a pyrolytic carbon surface improves adhesion of a polymer thereto, wherein the modified pyrolytic carbon surface and silicone rubber has a wet adhesion peel force greater than the wet adhesion peel force between an unmodified pyrolytic carbon and silicone rubber as measured by ASTM D 903-49 after 28 days in an aqueous environment, typically, at least 10 times greater.
    Type: Grant
    Filed: April 2, 1999
    Date of Patent: April 16, 2002
    Assignee: Medtronic, Inc.
    Inventors: Hong S. Shim, Mark C. S. Shu, David L. Miller, Edward Di Domenico, Catherine E. Taylor, Kenneth Keeney, Mark T. Stewart, Eileen L. Halverson
  • Patent number: 6372671
    Abstract: A dielectric layer of silica glass is formed by plasma enhanced chemical vapor deposition (PECVD) wherein a gaseous precursor of the dielectric layer is supplied to a deposition chamber in the presence of an electromagnetic field. The supply of the gaseous precursor is discontinued while continuing to maintain the electromagnetic field for a delay time exceeding 0.5 seconds after the discontinuation of the supply of the gaseous precursor. This improves the hydrophilic properties of said film. A siloxane-based SOG film is deposited on the dielectric layer.
    Type: Grant
    Filed: August 31, 2000
    Date of Patent: April 16, 2002
    Assignee: Zarlink Semiconductor Inc.
    Inventor: Vincent Fortin
  • Patent number: 6372291
    Abstract: A method of depositing a dielectric film on a substrate, comprising depositing a silicon oxide layer on the substrate; and treating the dielectric layer with oxygen. A layer of FSG having a fluorine content of greater than 7%, as measured by peak height ratio, deposited by HDP CVD, is treated with an oxygen plasma. The oxygen treatment stabilizes the film. In an alternative embodiment of the invention a thin (<1000 Å thick) layer of material such as silicon nitride is deposited on a layer of FSG using a low-pressure strike. The low pressure strike can be achieved by establishing flows of the process gases such that the pressure in the chamber is between 5 and 100 millitorr, turning on a bias voltage for a period of time sufficient to establish a weak plasma, which may be capacitively coupled. After the weak plasma is established a source voltage is turned on and subsequently the bias voltage is turned off.
    Type: Grant
    Filed: December 23, 1999
    Date of Patent: April 16, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Zhong Qiang Hua, Kasra Khazeni
  • Patent number: 6372303
    Abstract: A method is proposed for vacuum-coating a substrate using a plasma-CVD method. In order to control ion bombardment during the vacuum coating, a substrate voltage produced independently from a coating plasma is applied to the substrate. The substrate voltage is modified during the coating. The substrate voltage is a direct voltage that is pulsed in bipolar fashion with a frequency of 0.1 kHz to 10 MHz. A wear-resistant and friction-reducing multilayer structure of alternating hard material individual layers and carbon or silicon individual layers is proposed.
    Type: Grant
    Filed: April 5, 2000
    Date of Patent: April 16, 2002
    Assignee: Robert Bosch GmbH
    Inventors: Kurt Burger, Thomas Weber, Johannes Voigt, Susanne Lucas
  • Patent number: 6365518
    Abstract: Methods for processing a substrate are disclosed. In one embodiment of the invention, a substrate with a first layer and an oxide layer on the substrate is placed in a processing chamber. The oxide layer is removed while the substrate is at a first temperature in the processing chamber. A second layer is then formed on the first layer while the substrate is at a second temperature in the processing chamber.
    Type: Grant
    Filed: March 26, 2001
    Date of Patent: April 2, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Albert Lee, Chris Ngai, Christopher Bencher, Tom Nowak
  • Publication number: 20020034885
    Abstract: The present invention provides a coating film, which is not likely to cause cracks on the coated surface and is also capable of improving the resistance of the coated surface, especially oxidation resistance, corrosion resistance, and gas permeation resistance, a member provided with the coating film, and a method for producing the coating film. In the coating film of the present invention, a dense layer containing silicon dioxide as a principal component, which is obtained by heat-treating a solution containing perhydropolysilazane and polyorganosilazane, a ratio of the content of perhydropolysilazane to the total amount of polysilazane including perhydropolysilazane and polyorganosilazane being from 0.65 to 0.95, in air or air containing water vapor, was formed on the surface of a stainless steel plate.
    Type: Application
    Filed: July 23, 2001
    Publication date: March 21, 2002
    Inventor: Toyohiko Shindo
  • Patent number: 6346302
    Abstract: A high density plasma enhanced chemical vapor deposition method for depositing an insulating film such as a silicon oxide film on a silicon substrate includes at least both a first deposition period during which a first power having a first frequency is applied to the silicon substrate and a second deposition period during which a second power having a second frequency which is lower than the first frequency is applied to the silicon substrate to keep an underlying Si/SiO2 interface free from an interface state, where said underlying Si/SiO2 interface has already been formed under said insulating film.
    Type: Grant
    Filed: November 20, 1998
    Date of Patent: February 12, 2002
    Assignee: NEC Corporation
    Inventors: Koji Kishimoto, Kenichi Koyanagi
  • Patent number: 6342277
    Abstract: The present invention provides for sequential chemical vapor deposition by employing a reactor operated at low pressure, a pump to remove excess reactants, and a line to introduce gas into the reactor through a valve. A first reactant forms a monolayer on the part to be coated, while the second reactant passes through a radical generator which partially decomposes or activates the second reactant into a gaseous radical before it impinges on the monolayer. This second reactant does not necessarily form a monolayer but is available to react with the monolayer. A pump removes the excess second reactant and reaction products completing the process cycle. The process cycle can be repeated to grow the desired thickness of film.
    Type: Grant
    Filed: April 14, 1999
    Date of Patent: January 29, 2002
    Assignee: Licensee for Microelectronics: ASM America, Inc.
    Inventor: Arthur Sherman
  • Publication number: 20020006478
    Abstract: In a method of forming a silicon oxide film, the silicon oxide film is formed on a substrate by the use of a plasma CVD method. A plasma-generating region is separated from a deposition region which includes excitation oxygen molecules and excitation oxygen atoms. Plasma of first gas containing oxygen atoms is formed in the plasma-generating region while second gas containing silicon atoms is supplied into the deposition region. First quantity of the excitation oxygen molecules and second quantity of the excitation oxygen atoms are controlled intentionally.
    Type: Application
    Filed: March 27, 2001
    Publication date: January 17, 2002
    Inventors: Katsuhisa Yuda, Ge Xu
  • Patent number: 6335288
    Abstract: A method and apparatus are disclosed for depositing a dielectric film in a gap having an aspect ratio at least as large as 6:1. By cycling the gas chemistry of a high-density-plasma chemical-vapor-deposition system between deposition and etching conditions, the gap may be substantially 100% filled. Such filling is achieved by adjusting the flow rates of the precursor gases such that the deposition to sputtering ratio during the deposition phases is within certain predetermined limits.
    Type: Grant
    Filed: August 24, 2000
    Date of Patent: January 1, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Michael Kwan, Eric Liu
  • Publication number: 20010053423
    Abstract: An improved deposition chamber (2) includes a housing (4) defining a chamber (18) which houses a substrate support (14). A mixture of oxygen and SiF4 is delivered through a set of first nozzles (34) and silane is delivered through a set of second nozzles (34a) into the chamber around the periphery (40) of the substrate support. Silane (or a mixture of silane and SiF4) and oxygen are separately injected into the chamber generally centrally above the substrate from orifices (64, 76). The uniform dispersal of the gases coupled with the use of optimal flow rates for each gas results in uniformly low (under 3.4) dielectric constant across the film.
    Type: Application
    Filed: February 29, 2000
    Publication date: December 20, 2001
    Inventors: Shijian Li, Yaxin Wang, Fred C. Redeker, Tetsuya Ishikawa, Alan W. Collins
  • Patent number: 6326064
    Abstract: A process for reducing intrinsic stress and/or hydrogen content of a SiOx film grown by chemical vapor deposition. The process is applicable to plasma-enhanced and electron cyclotron resonance chemical vapor deposition of silicon dioxide wherein a vapor phase etchant is introduced while growing the silicon dioxide film. The presence of the etchant during the plasma deposition process allows for selective removal of high energy silicon dioxide molecules in the growing film thus reducing intrinsic stress within the film. The use of halogen etchants further reduces the amount of hydrogen present as hydroxyl within the film.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: December 4, 2001
    Assignee: LAM Research Corporation
    Inventors: Dean R. Denison, Mark Weise
  • Patent number: 6323142
    Abstract: In forming various types of insulating films in manufacture of a semiconductor device, carbon is gasified into CHx, COH etc. during film formation by adding active hydrogen and nitrogen oxide to reduce the carbon content during the film formation, and the effect of blocking impurities such as alkali metals is improved.
    Type: Grant
    Filed: September 6, 1996
    Date of Patent: November 27, 2001
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Mitsunori Sakama, Takeshi Fukada
  • Patent number: 6323135
    Abstract: The selectivity of an etchant to a capping layer in a Cu or Cu alloy interconnect member is significantly enhanced by providing a dielectric layer thereon with a faster etch rate. Embodiments include forming the dielectric layer with a faster etch rate by PECVD: (a) at a low frequency bias of about 0.1 kW or greater; (b) at a temperature of about 250° C. or greater; or (c) at a pressure greater than about 2.6 Torr.
    Type: Grant
    Filed: December 9, 1998
    Date of Patent: November 27, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Minh Van Ngo, Robin W. Cheung
  • Patent number: 6319856
    Abstract: Methods of forming dielectric layers and methods of forming capacitors are described. In one embodiment, a substrate is placed within a chemical vapor deposition reactor. In the presence of activated fluorine, a dielectric layer is chemical vapor deposited over the substrate and comprises fluorine from the activated fluorine. In another embodiment, a fluorine-comprising material is formed over at least a portion of an internal surface of the reactor. Subsequently, a dielectric layer is chemical vapor deposited over the substrate. During deposition, at least some of the fluorine-comprising material is dislodged from the surface portion and incorporated in the dielectric layer. In another embodiment, the internal surface of the reactor is treated with a gas plasma generated from a source gas comprising fluorine, sufficient to leave some residual fluorine thereover.
    Type: Grant
    Filed: September 26, 2000
    Date of Patent: November 20, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Garo J. Derderian, Gurtej S. Sandhu
  • Patent number: 6319568
    Abstract: A half tone phase shift mask material, suitable for use at 193 nm is disclosed. It comprises a layer of nitrogen rich silicon nitride that was formed by subjecting a mixture of a nitrogen bearing gas, such as nitrogen and/or ammonia, with a silicon bearing gas, such as silane, to a plasma discharge. Provided the ratio of the nitrogen bearing to the silicon bearing gases is about 10 to 1, films having the required optical properties at 193 nm are formed. These properties are a reflectance that is less than 15% and a transmittance that is between 4 and 15%. Related optical properties, namely an extinction coefficient of about 0.4 and a refractive index of about 2.5, are also closely approached. Additionally, the films are stable under prolonged UV exposure and exhibit good etch behavior.
    Type: Grant
    Filed: December 13, 1999
    Date of Patent: November 20, 2001
    Assignee: Industrial Technology Research Institute
    Inventors: Chang-Ming Dai, Lon A. Wang, H. L. Chen
  • Publication number: 20010033900
    Abstract: A film of fluorine-doped silicon glass (“FSG”) is exposed to a nitrogen-containing plasma to nitride a portion of the FSG film. In one embodiment, the FSG film is chemically-mechanically polished prior to nitriding. The nitriding process is believed to scavenge moisture and free fluorine from the FSG film. The plasma can heat the FSG film to about 400° C. for about one minute to incorporate about 0.4 atomic percent nitrogen to a depth of nearly a micron. Thus, the nitriding process can passivate the FSG film deeper than a via depth.
    Type: Application
    Filed: June 22, 1999
    Publication date: October 25, 2001
    Inventors: HICHEM M'SAAD, DEREK R. WITTY, MANOJ VELLAIKAL, LIN ZHANG, YAXIN WANG
  • Patent number: 6303523
    Abstract: A method and apparatus for depositing a low dielectric constant film by reaction of an organosilicon compound and an oxidizing gas at a constant RF power level from about 10 W to about 200 W or a pulsed RF power level from about 20 W to about 500 W. Dissociation of the oxidizing gas can be increased prior to mixing with the organosilicon compound, preferably within a separate microwave chamber, to assist in controlling the carbon content of the deposited film. The oxidized organosilane or organosiloxane film has good barrier properties for use as a liner or cap layer adjacent other dielectric layers. The oxidized organosilane or organosiloxane film may also be used as an etch stop and an intermetal dielectric layer for fabricating dual damascene structures. The oxidized organosilane or organosiloxane films also provide excellent adhesion between different dielectric layers.
    Type: Grant
    Filed: November 4, 1998
    Date of Patent: October 16, 2001
    Assignee: Applied Materials, Inc.
    Inventors: David Cheung, Wai-Fan Yau, Robert P. Mandal, Shin-Puu Jeng, Kuo-Wei Liu, Yung-Cheng Lu, Michael Barnes, Ralf B. Willecke, Farhad Moghadam, Tetsuya Ishikawa, Tze Wing Poon
  • Patent number: 6303519
    Abstract: A method of forming a fluorinated silicon oxide layer or an FSG film having a dielectric constant less than 3.2 is disclosed. The method includes introducing a fluorine-rich gas into a reacting chamber, introducing an oxygen-rich gas into the reacting chamber, creating a plasma environment in the reacting chamber to deposit the FSG film, and adjusting the flow rate of the oxygen-rich gas till the ratio of the flow rate of the oxygen-rich gas to the total flow rate of the fluorine-rich gas and silicon-rich gas is less than or equal to a pre-selected value to form the FSG film. The refraction index (RI) of the fluorinated silicon oxide layer must be greater than or equal to 1.46.
    Type: Grant
    Filed: July 20, 2000
    Date of Patent: October 16, 2001
    Assignee: United Microelectronics Corp.
    Inventor: Chih-Hsiang Hsiao
  • Patent number: 6303192
    Abstract: A method for making a multi-layered integrated circuit structure, includes depositing a methyl compound spin on glass layer over a substrate. The spin on glass layer is treated by plasma-deposition to form a SiO2 skin on the methyl compound spin on glass layer and then treated again by plasma-deposition to form a cap layer which adheres to the SiO2 skin.
    Type: Grant
    Filed: July 22, 1998
    Date of Patent: October 16, 2001
    Assignee: Philips Semiconductor Inc.
    Inventors: Rao V. Annapragada, Tekle M. Tafari, Subhas Bothra
  • Patent number: 6299948
    Abstract: Method for creating an electric discharge in an initial gas which is at atmospheric pressure and lies between two exciting electrodes, comprising applying a supply voltage to the two electrodes which is an AC voltage whose amplitude and frequency are adapted in order to maintain (1) at least a portion of the components of the gas in the excited state, and/or (2) the presence of electrons, between two successive half-cycles of the supply voltage.
    Type: Grant
    Filed: April 9, 1999
    Date of Patent: October 9, 2001
    Assignees: L'Air Liquide, Societe Anonyme pour l'Etude et l'Exploitation des Procedes Georges Claude, Softal Electronic
    Inventors: Nicolas Gherardi, Gamal Gouda, Françoise Massines, Alain Villermet, Eric Gat