Abstract: A method of jetting drops of encapsulant from an encapsulant jetter, the drops including primary drops and satellite drops that are much smaller than the primary drops. The method has the steps of providing a series of wire bonds electrically connecting a micro-electronic device to a series of conductors, jetting the drops of encapsulant from the jetter and, inducing a gas flow with a velocity sufficient to draw the satellite drops in a predetermined direction away from the series of wire bonds while having negligible effect on the primary drops.

Abstract: A printed circuit board to which a localised solder connection is to be made, the surface of said printed circuit board having a continuous or non-continuous coating of a composition comprising a halo-hydrocarbon polymer at a thickness of from 1 nm to 10 ?m.

Abstract: Methods and arrangements are described for forming an array of contacts for use in packaging one or more integrated circuit devices. In particular, various methods are described for forming contacts having thicknesses less than approximately 10 ?m, and in particular embodiments, between 0.5 to 2 ?m.

Abstract: The present invention provides a process for manufacturing an integrated circuit (IC) package and an integrated circuit (IC) package. The process, without limitation, includes providing an integrated circuit chip having a configuration, and forming a layer of overcoat material over the integrated circuit chip based upon the configuration.

Abstract: There are provided a process for the production of an entry sheet for drilling, comprising preparing a water-soluble resin composition solution by using a mixed solvent containing water and isopropyl alcohol in a specific ratio as a solvent of a water-soluble resin composition, then applying the solution to a sheet-like base material and drying the resultant base material to form a resin layer on the base material, and a method of drilling a printed wiring board material using the above entry sheet. According to the present invention, the problems of remaining bubbles in the resin layer and a decrease in surface flatness and smoothness due to the occurrence of a ridge, which are caused because the melting point of the water-soluble resin is lower than the boiling point of water, are overcome, and an entry sheet for drilling excellent in hole position accuracy is provided.

Abstract: A non-sticky water-based coating material in the form of a film applied to the face of a circuit board that is loaded with electronic parts; which comes into contact with the outside environment. The coating material can be formed into the film at room temperature without using a coalescence, does not contain a solvent and forms a membrane having flexibility, low Young's modulus, favorable adhesive properties, moisture resistance and insulating properties. Specifically, the non-sticky water-based conformal coating material includes a resin wherein a flexible acrylic resin having glass transition temperature of at most 0° C. is the main chain and a vinyl polymer having a glass transition temperature of at least 20° C. is grafted to the flexible acrylic resin; the content of the vinyl polymer being 10 to 70% by weight based on the flexible acrylic resin.

Abstract: The invention relates to a method of fabricating a flexible-rigid PCB which includes a flexible circuit substrate and a rigid circuit substrate. The flexible circuit substrate defines a rigid region and an exposed region and has a conductive pattern, such as conductive traces, formed on the exposed region. The method includes the steps of providing the flexible circuit substrate; printing a paste containing epoxy-silicone hybrid materials onto the conductive pattern; curing the paste; and building up the rigid circuit substrate on the rigid region of the flexible circuit substrate. Particularly, the paste having a specific composition is subjected to predetermined conditions of temperature and time in order to transform the paste into a peelable mask with heat resistance, chemical resistance and a contact angle greater than 20 degrees.

Abstract: A method and apparatus are described for an electronic component package. A standoff is formed on an active side of a substrate. The substrate has an electronic circuit. A conductive layer is deposited over at least a portion of the active side of the substrate. The conductive layer electrically couples a contact area on the active side of the substrate. The standoff is removed to create a flexible conductor.

Abstract: A method of synthesizing doped semiconductor nanocrystals.

Abstract: The present invention relates to an electrocatalytic coating and an electrode having the coating thereon, wherein the coating is a mixed metal oxide coating, preferably ruthenium, titanium and tin or antimony oxides. The coating uses water as a solvent that provides for a smoother surface than alcohol based solvents. The electrocatalytic coating can be used especially as an anode component of an electrolysis cell and in particular a cell for the electrolysis of aqueous chlor-alkali solutions.

Abstract: An advantage of the present invention is to suppress moisture infiltrating from a pad electrode portion from spreading over the surface of a wiring pattern and improve the reliability of a packaging board. The wiring pattern of the packaging board is formed on an insulating substrate and includes a wiring region, an electrode region (pad electrode) connected with a semiconductor device, and a boundary region provided between the wiring region and the electrode region. A gold plating layer is provided on the surface of the electrode region of the wiring pattern. The top surface of the boundary region of the wiring pattern is so formed as to be dented from the top surface of the wiring region of the wiring pattern, and there is provided a stepped portion in the boundary region.

Abstract: A method includes providing a circuit board having an outer surface, the outer surface configured with a plurality of discrete electrical components that are each manufactured independently of one another, and coating the outer surface and the plurality of discrete electrical components with a first protective dielectric layer. The method further includes coating the first protective dielectric layer with a second dielectric layer. The second dielectric layer includes a dielectric material having a modulus of elasticity less than 3.5 Giga-Pascal (GPa), a dielectric constant less than 2.7, a dielectric loss less than 0.002, a breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), a temperature stability to 3000 Celsius, a defect densities less than 0.5/centimeter, a pinhole free in films greater than 50 Angstroms, and is capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%.

Abstract: An electronic component, in which the outer perimeter portion of a component (2) is surrounded with a first sealing resin (4), a second sealing resin (3) is filled within the periphery of the first sealing resin (4), the component (2) and a board (1) are electrically connected by a wire (5), the edge, in the vicinity of which the wire (5) passes, of the outer perimeter edge portions of the component (2) is formed to be a chamfered oblique surface (31), and the wire (5) is provided to extend to the board (1) along the oblique surface (31). By this means, the overall height of the electronic component can be kept low.

Abstract: The invention pertains to a material composition for packaging. The composition comprises (a) an epoxy resin and (b) a curing agent, wherein the mixing ratio of said epoxy resin to said curing agent is in the range of from 0.7 to 1.1. The invention also pertains to a method of using said material composition for packaging a light-sensitive component on a substrate.

Abstract: Circuit carrier having a metal support layer, at least some portions of which are covered by a dielectric layer, the latter having a plurality of pores, with the pores being sealed by glass at least on the opposite side of the dielectric layer to the support layer.

Abstract: The invention relates to a method for the production of glass-coated electric components, wherein the components are, inter alia, passivated by the application of the glass. The lead-free glass used is not affected through purification and processing steps and the electric component is protected from mechanical damaging and other detrimental influences, such as impurities. Further, the method remarkably helps to stabilize the electrical properties of the components. Inter alia, a sufficient acid resistance is achieved and it results in an improvement of the expansion adjustment of the glass.

Abstract: A process for applying a protective coating to a flex circuit comprises providing a flex circuit having conductive traces on one surface and applying a protective coating in substantially a liquid state to the one surface from a first roller including the protective coating in a pattern thereon. The pattern includes at least one area on the one surface of the first roller that is not covered by the protective coating.

Abstract: There is disclosed a method, system, and screen for reducing solder voids on circuit boards. In an embodiment, there is provided a method of reducing solder voids on a circuit board, comprising: locating via holes provided at a conductive landing pad; and covering at least some of the via holes with a coating, whereby gases from the covered via holes are prevented from expanding and forming voids. In another embodiment, the method further comprises covering the location of at least some of the via holes in a pattern of strips, whereby more of the via holes may be covered by the coating while reducing areas of the conductive landing pad covered by the coating. In another embodiment, the coating and removal process may be performed at the same time as when all other areas of the circuit board are coated and removed, such that a separate manufacturing step is not required.

Abstract: A surface treatment process for a circuit board is provided. The circuit board includes a substrate, a first circuit layer disposed on an upper surface of the substrate, and a second circuit layer disposed on a lower surface of the substrate. The first circuit layer is electrically connected to the second circuit layer. In the surface treatment process for the circuit board, a first oxidation protection layer and a second oxidation protection layer are respectively formed on a portion of the first circuit layer and a portion of the second circuit layer by immersion. Afterwards, the first circuit layer exposed by the first oxidation protection layer is subjected to black oxidation to form a black oxide layer. The thickness of the first oxidation protection layer is thinner than or equal to the thickness of the black oxide layer.

Abstract: The present disclosure relates to high purity apparati, e.g., magnetic hard disk drives, and more specifically, to coatings for particle reduction of surfaces of such apparati. The provided coatings include thin polymer coatings with reactive pendant groups having crosslinking functionality and ability to anchor to substrate surfaces to suppress particle shedding from substrate surfaces. Provided is a substrate that includes a coating on at least a portion of the substrate that comprises a fluorinated acrylate random copolymer. Methods of reducing particulate contamination are also provided.

Abstract: This disclosure relates to compositions and methods for using such compositions to provide protective coatings, particularly of electronic components. Fired-on-foil ceramic capacitors coated with a polybenzoxazole encapsulant which may be embedded in printed wiring boards are disclosed.

Abstract: In a method for producing a parylene coating on a substrate containing an integrated electronic component which is e.g. an x-ray detector, the following steps are provided: vaporization of parylene; pyrolyzation of the vaporized parylene; polymerization of the pyrolyzed parylene, the polymerized parylene being deposited on a cooled substrate. The method provides controllable, patterned deposition of parylene on the cooled and/or heated substrate, the advantage being that x-ray converters, for example, can be anticorrosively encapsulated and a penetration depth of the parylene between phosphor needles or storage phosphor needles can be controlled, resulting in an improved resolution and improved modulation transfer function of electronic components.

Abstract: The invention relates to a method to increase the wettability of a substrate by providing said substrate at least partially with a conductive, metal free, hydrophilic carbon based coating. The carbon based coating is doped with nitrogen and has an electrical resistivity lower than 108 ohm-cm. The invention further relates to a substrate coated at least partially with a conductive metal free, hydrophilic carbon based coating.

Abstract: A wiring board which includes a product portion configured with at least one layer of electrically insulating base, a wiring pattern formed on the surface or inner portion of the electrically insulating base, and a wiring protection layer which is formed on the surface of the board and has an opening. Warping over the entire wiring board can be reduced since this wiring board has a warp-correcting portion warped in a direction different from that of the product portion.

Abstract: A method of fabricating a high density printed circuit board by applying a strippable adhesive layer on a reinforced substrate (rigid substrate or carrier film) used as a base substrate, forming a metal foil on the adhesive layer by means of plating, lamination or sputtering, and forming a high density circuit on the metal foil serving as a seed layer by means of pattern plating. Specifically, the method of the current invention includes the steps of attaching adhesive means to one surface of a reinforced substrate (rigid substrate or carrier film), forming a seed layer on the adhesive means and forming a circuit pattern on the seed layer, laminating an insulating layer on the circuit pattern and removing the reinforced substrate (rigid substrate or carrier film), and removing the seed layer.

Abstract: A method of fabricating a circuit board includes the following steps. First, a patterned metal board is provided. The patterned metal board includes a patterned circuit having at least a pad. Next, a dielectric layer is formed on the patterned metal board to cover the patterned circuit. Thereafter, a processing treatment is preformed on a surface of the patterned metal board in which the surface is opposite to the patterned circuit, such that at least a conductive joint column disposed on the pad and a circuit layer having the patterned circuit are formed. Afterwards, a solder mask layer is formed on the dielectric layer to cover the circuit layer, such that the solder mask layer is in contact with the conductive joint column, the conductive joint column passes through the solder mask layer, and a height of the conductive joint column exceeds a thickness of the solder mask layer.

Abstract: The present invention provides an adhesive aid composition having excellent adhesive strength to polyimide films without decreasing mechanical properties and being useful in the field of electric materials. An adhesive aid composition of the present invention contains a phenolic hydroxyl group-containing polyamide and a solvent as essential components. The phenolic hydroxyl group-containing polyamide preferably has a segment represented by formula (1): (wherein R1 represents a divalent aromatic group, and n represents an average number of substituents and is a positive number of 1 to 4). The adhesive aid composition of the present invention is suitably used for bonding polyimide films.

Abstract: A process for packaging an electronic device employs an insulating protective resin layer produced from one or more of the resin compositions: (1) 100 parts of an organic solvent-soluble resin having a polysiloxane skeleton and a polar group, 0.5 to 30 parts of an epoxy compound having an epoxy equivalent of more than 800, and an organic solvent, (2) 100 parts of an organic solvent-soluble resin having a polysiloxane skeleton and a polar group, 0.1 to 10 parts of an epoxy compound having an epoxy equivalent of 100 to 800, 2 to 30 weight parts of a polyvalent isocyanate compound, and an organic solvent; and (3) 100 parts of an organic solvent-soluble resin having a polysiloxane skeleton and a polar group, 0.1 to 20 parts of an epoxy compound having an epoxy equivalent of more than 800, 2 to 30 parts of a polyvalent isocyanate compound, and an organic solvent.

Abstract: Electrical components 402, 504, 506 are placed on a carrier 508. Then the components are encapsulated in an electrically insulating material 404. The carrier 508 is removed and the leads 414 of the encapsulated components are registered to intermediate connectors 412 in a central bonding, or joining, material 406 and to respective leads 410 of a printed circuit board 408. The components, central bonding material, and printed circuit board are then joined and interconnected.

Abstract: The present invention discloses encapsulant materials for use in glob top and/or dam and fill applications comprising base oligomer/monomers preferably having an acrylated/methacrylated or vinylene-containing oligomer/polymer, one or more multifunctional acrylate monomers, one or more thixotropic agents and, optionally, fillers, additives, photoinitiators and/or pigments. The encapsulant has low levels of water absorption and shrinkage.

Abstract: An encapsulant for encapsulating electronic components and a method of making and/or using the encapsulant may be provided. An electronic device that includes the encapsulant may be provided. The curable encapsulant composition may include a mixture of a functionalized polymer and at least one reactive monomer composition. The reactive monomer composition may include a reactive monomer component that may be a low temperature solid and may be present in an amount in the reactive monomer composition a range of greater than about 20 weight percent based on the total weight of reactive monomer composition.

Abstract: The optical/electrical composite wiring board comprises a lower insulating layer that also serves as a lower clad; a upper insulating layer that also serves as an upper clad; a core that is placed between the lower insulating layer and the upper insulating layer and has a predetermined optical wiring pattern; and a conductor layer that is placed along with the core between the lower insulating layer and the upper insulating layer and has a predetermined electrical wiring pattern. Herein, the core and the conductor layer are formed via a short manufacturing method, whereby the concave portion for optical wiring and the concave portion for electrical wiring are formed on the lower insulating layer by press process, and a core material and conductor material are filled into each of the concave portions, and afterward, the core material and conductor material are ground until they are flush with the upper surface of the lower insulating layer.

Abstract: Organic surfactants are employed to passivate the surfaces of MEMS devices, such as digital micromirrors. The binding of these surfactants to the surface is improved by first associating with the surface transition metal atoms or ions from Groups IVB, VB, and IVB of the periodic table.

Abstract: A method and system for depositing films on a substrate for copper interconnect in an integrated system is provided. The method includes moving the substrate into a processing chamber having a plurality of proximity heads. Selected ones of the proximity heads is configured to perform at least one of surface treatments and atomic layer depositions (ALDs). The processing chamber is part of the integrated system. Within the processing chamber, barrier layer deposition is performed over a surface of the substrate using one of the plurality of proximity heads functioning to perform barrier layer ALD. In addition, the method includes moving the substrate from the processing chamber, through a transfer module of the integrated system and into a processing module for performing copper seed layer deposition. The processing module for performing copper seed layer deposition is part of the integrated system.

Abstract: The present invention aims to provide a viscous fluid application device which allows improving manufacturing efficiency of semiconductor packages without deteriorating application position accuracy and decreasing designing flexibility. The device includes: an application unit (101) which applies viscous fluid to a substrate 140a; an application head (100) having a supply unit (102) which supplies the viscous fluid to the application unit (101); an X axis unit (110); a Y axis unit (120); a Z axis unit (130); a substrate carrying unit (140); a head height detection sensor (150); and a control unit (160). The supply unit (102) moves in the Y direction in cooperation with a movement in the Y direction of the application unit (101), and remains unmoved irrespective of a movement in the X and Z direction of the application unit (101).

Abstract: The invention relates to a method for a structured application of molecules on a strip conductor and to a molecular memory matrix. The inventive method makes it possible, for the first time, to economically and simply apply any number of molecular memory elements on the strip conductor in a structured and targeted way, thereby making available, also for the first time, a memory matrix at a molecular level.

Abstract: According to one embodiment of the disclosure, an environmental protection coating comprises a circuit assembly having a first protective dielectric layer and a second dielectric layer. The circuit assembly has an outer surface on which a plurality of discrete electrical components are attached. The first protective dielectric layer overlays the circuit assembly. The second dielectric layer overlays the first protective dielectric layer and is made of a dielectric material having modulus of elasticity less than 3.5 Giga-Pascal (GPa), dielectric constant less than 2.7, dielectric loss less than 0.008, breakdown voltage strength in excess of 2 million volts/centimeter (MV/cm), temperature stability to 3000 Celsius, defect densities less than 0.5/centimeter, pinhole free in films greater than 50 Angstroms, capable of being deposited conformally over and under 3D structures with thickness uniformity less than or equal to 10%.

Abstract: A printed wiring board comprising an insulating film, a wiring pattern formed on at least one surface of the insulating film, a metal plating layer on the wiring pattern, and a resin protective layer provided on the wiring pattern with the metal plating layer in between so as to expose terminal portions of the wiring pattern plated with the metal, wherein the metal plating layer on the wiring pattern has a surface roughness (Rz) of 1.1 ?m or above. A semiconductor device includes the printed wiring board and an electronic component mounted thereon. In production of the printed wiring board, the wiring pattern is surface roughened prior to forming the metal plating layer such that the metal plating layer formed thereon will have a surface roughness (Rz) of 1.1 ?m or above.

Abstract: A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

Abstract: A method of forming a high wear resistance coating on a substrate having a low coefficient of thermal expansion is described. The method may include providing the low CTE substrate, where a surface of the substrate includes a plurality of protrusions raised above the surface. A high wear resistance layer is formed on a top portion of protrusions, where the layer is not contiguous between adjacent protrusions on the substrate. Also, a wafer support component to support a wafer during, for example, a photolithography or inspection process. The wafer support component includes a substrate that has a material with a low coefficient of thermal expansion, where the substrate has a surface with a plurality of protrusions raised about the surface. A high wear resistance layer is formed on a top surface of each of the protrusions.

Abstract: An objective of the present invention is to provide a phosphorous-containing siliceous material having a specific permittivity of not more than 3.5. The phosphorus-containing silazane composition according to the present invention is characterized by comprising a polyalkylsilazane and at least one phosphorus compound in an organic solvent. A phosphorus-containing siliceous film may be formed by coating the composition onto a substrate to form a film which is then prebaked at a temperature of 50 to 300° C. and is then baked in an inert atmosphere at a temperature of 300 to 700° C. The phosphorus compound according to the present invention is preferably a pentavalent phosphoric ester or phosphazene compound.

Abstract: A flame resistant RFID tag comprises: a first flame resistant polymer film having a major surface; an RFID device secured to the major surface of the first flame resistant polymer film, the RFID device having proximal and distal surfaces and comprising an antenna electrically connected to an integrated circuit; and a first flame resistant pressure sensitive adhesive layer covering the distal surface of the RFID device. Methods of making the flame resistant RFID tags are also disclosed.

Abstract: A printed circuit board and a method of manufacturing a printed circuit board are disclosed. A printed circuit board in which optical waveguides are formed for transmitting optical signals together with electrical signals, which includes a cladding, a core embedded in the cladding that transmits optical signals, and a wiring pattern embedded in the cladding that transmits electrical signals, can offer improved optical connection efficiency and reduced material costs by enabling the cladding to act as an insulation layer and embedding the wiring pattern in the cladding.

Abstract: Microelectronic packages formed by using novel fluxing agents are disclosed. In one aspect, a microelectronic package may include a microelectronic device, a substrate, and an interconnect structure including a solder material coupling the microelectronic device with the substrate. Underfill material may be included around the interconnect structure between the microelectronic device and the substrate. The underfill material may include an organic rosin acid moiety derived from an anhydride adduct of a rosin compound that was used as a fluxing agent. Methods of making such microelectronic packages using anhydride adducts of rosin compounds are also disclosed.

Abstract: An encapsulant for encapsulating electronic components and a method of making and/or using the encapsulant may be provided. An electronic device that includes the encapsulant may be provided. The curable encapsulant composition may include a mixture of a functionalized polymer and at least one reactive monomer composition. The reactive monomer composition may include a reactive monomer component that may be a low temperature solid and may be present in an amount in the reactive monomer composition a range of greater than about 20 weight percent based on the total weight of reactive monomer composition. The mixture, at about low temperature, may be solid or tack-free, or both solid and tack-free.

Abstract: A process for generating a hard mask for the patterning of a first layer includes applying a second layer, which includes carbon, to the first layer that is to be patterned. A third layer, which includes silicon and carbon, is spun onto the second layer and an organic antireflection coating layer that is to be used with an overlying photoresist layer patternable using 193 nm technology, is appllied to the spun-on third layer.

Abstract: A coated heat spreader for a die includes a body and a coating on a surface of the body, wherein the outermost coating is an organic surface protectant. An IC package includes a die thermally coupled to a heat spreader coated with an organic surface protectant. A PCB assembly including a die thermally coupled to a heat spreader coated with an organic surface protectant, where the die is part of an IC package or is directly attached to the PCB. A method of making a coated heat spreader includes coating the organic surface protectant onto a surface of the heat spreader.

Abstract: Methods of reducing the intrusions or migrations of photolithography materials by introducing a sol-gel layer onto a porous thin film prior to applying the photolithography/photoresist material layer. Curing the sol-gel layer results in the sol-gel layer merging or unifying with the underlying porous thin film layer so that the combined sol-gel/thin layer exhibits substantially the same properties as the untreated porous thin film layer before the sol-gel was applied. As a result, a greater etching accuracy is achieved.

Abstract: A solder mask manufacturing method adapted to apply a solder mask on a surface of a substrate of a circuit board, said surface is provided with a conductor pattern having an unsheltered portion and a sheltered portion which is covered by said solder mask. The method comprises the steps of: a) disposing a layer of semi-solid solder mask material having an expansion coefficient substantially the same as that of the substrate on the surface of said substrate to cover said copper conductor pattern, and a metal foil covering the material layer; b) applying pressure to the metal foil and applying baking treatment to cure the solder mask material in to solid; c) utilizing chemical solution and plasma etching to remove the metal foil and the solid solder mask material above the unsheltered portion of said copper conductor pattern respectively such that the unsheltered portion can be exposed; and d) using chemical solution to remove the residual metal foil.

Abstract: An underfill material, such as a no flow underfill material, containing an anhydride adduct of a rosin compound is disclosed. In one aspect, the anhydride adduct of a rosin compound contains an organic rosin acid moiety and a substitute moiety for a hydroxyl group of a carboxylic acid attached at an acyl group of the organic rosin acid moiety. In another aspect, the anhydride adduct of the rosin compound contains a plurality of linked organic rosin acid moieties. Methods of using the underfill materials and packages formed by curing the underfill materials are also disclosed.